src/vm/jit/arm/emit.c

   1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25 */
  26
  27
  28 #include "config.h"
  29
  30 #include <assert.h>
  31 #include <stdint.h>
  32
  33 #include "vm/types.h"
  34
  35 #include "md-abi.h"
  36
  37 #include "vm/jit/arm/codegen.h"
  38
  39 #include "mm/memory.h"
  40
  41 #include "threads/lock-common.h"
  42
  43 #include "vm/exceptions.h"
  44 #include "vm/global.h"
  45
  46 #include "vm/jit/abi.h"
  47 #include "vm/jit/asmpart.h"
  48 #include "vm/jit/emit-common.h"
  49 #include "vm/jit/jit.h"
  50 #include "vm/jit/patcher-common.h"
  51 #include "vm/jit/replace.h"
  52 #include "vm/jit/trace.h"
  53
  54 #include "toolbox/logging.h" /* XXX for debugging only */
  55
  56
  57 /* emit_load *******************************************************************
  58
  59    Emits a possible load of an operand.
  60
  61 *******************************************************************************/
  62
  63 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  64 {
  65         codegendata  *cd;
  66         s4            disp;
  67         s4            reg;
  68
  69         /* get required compiler data */
  70
  71         cd = jd->cd;
  72
  73         if (src->flags & INMEMORY) {
  74                 COUNT_SPILLS;
  75
  76                 disp = src->vv.regoff;
  77
  78 #if defined(ENABLE_SOFTFLOAT)
  79                 switch (src->type) {
  80                 case TYPE_INT:
  81                 case TYPE_FLT:
  82                 case TYPE_ADR:
  83                         M_ILD(tempreg, REG_SP, disp);
  84                         break;
  85                 case TYPE_LNG:
  86                 case TYPE_DBL:
  87                         M_LLD(tempreg, REG_SP, disp);
  88                         break;
  89                 default:
  90                         vm_abort("emit_load: unknown type %d", src->type);
  91                 }
  92 #else
  93                 switch (src->type) {
  94                 case TYPE_INT:
  95                 case TYPE_ADR:
  96                         M_ILD(tempreg, REG_SP, disp);
  97                         break;
  98                 case TYPE_LNG:
  99                         M_LLD(tempreg, REG_SP, disp);
 100                         break;
 101                 case TYPE_FLT:
 102                         M_FLD(tempreg, REG_SP, disp);
 103                         break;
 104                 case TYPE_DBL:
 105                         M_DLD(tempreg, REG_SP, disp);
 106                         break;
 107                 default:
 108                         vm_abort("emit_load: unknown type %d", src->type);
 109                 }
 110 #endif
 111
 112                 reg = tempreg;
 113         }
 114         else
 115                 reg = src->vv.regoff;
 116
 117         return reg;
 118 }
 119
 120
 121 /* emit_load_low ***************************************************************
 122
 123    Emits a possible load of the low 32-bits of a long source operand.
 124
 125 *******************************************************************************/
 126
 127 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 128 {
 129         codegendata  *cd;
 130         s4            disp;
 131         s4            reg;
 132
 133         assert(src->type == TYPE_LNG);
 134
 135         /* get required compiler data */
 136
 137         cd = jd->cd;
 138
 139         if (src->flags & INMEMORY) {
 140                 COUNT_SPILLS;
 141
 142                 disp = src->vv.regoff;
 143
 144 #if defined(__ARMEL__)
 145                 M_ILD(tempreg, REG_SP, disp);
 146 #else
 147                 M_ILD(tempreg, REG_SP, disp + 4);
 148 #endif
 149
 150                 reg = tempreg;
 151         }
 152         else
 153                 reg = GET_LOW_REG(src->vv.regoff);
 154
 155         return reg;
 156 }
 157
 158
 159 /* emit_load_high **************************************************************
 160
 161    Emits a possible load of the high 32-bits of a long source operand.
 162
 163 *******************************************************************************/
 164
 165 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 166 {
 167         codegendata  *cd;
 168         s4            disp;
 169         s4            reg;
 170
 171         assert(src->type == TYPE_LNG);
 172
 173         /* get required compiler data */
 174
 175         cd = jd->cd;
 176
 177         if (src->flags & INMEMORY) {
 178                 COUNT_SPILLS;
 179
 180                 disp = src->vv.regoff;
 181
 182 #if defined(__ARMEL__)
 183                 M_ILD(tempreg, REG_SP, disp + 4);
 184 #else
 185                 M_ILD(tempreg, REG_SP, disp);
 186 #endif
 187
 188                 reg = tempreg;
 189         }
 190         else
 191                 reg = GET_HIGH_REG(src->vv.regoff);
 192
 193         return reg;
 194 }
 195
 196
 197 /* emit_store ******************************************************************
 198
 199    Emits a possible store to a variable.
 200
 201 *******************************************************************************/
 202
 203 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 204 {
 205         codegendata  *cd;
 206         s4            disp;
 207
 208         /* get required compiler data */
 209
 210         cd = jd->cd;
 211
 212         if (dst->flags & INMEMORY) {
 213                 COUNT_SPILLS;
 214
 215                 disp = dst->vv.regoff;
 216
 217 #if defined(ENABLE_SOFTFLOAT)
 218                 switch (dst->type) {
 219                 case TYPE_INT:
 220                 case TYPE_FLT:
 221                 case TYPE_ADR:
 222                         M_IST(d, REG_SP, disp);
 223                         break;
 224                 case TYPE_LNG:
 225                 case TYPE_DBL:
 226                         M_LST(d, REG_SP, disp);
 227                         break;
 228                 default:
 229                         vm_abort("emit_store: unknown type %d", dst->type);
 230                 }
 231 #else
 232                 switch (dst->type) {
 233                 case TYPE_INT:
 234                 case TYPE_ADR:
 235                         M_IST(d, REG_SP, disp);
 236                         break;
 237                 case TYPE_LNG:
 238                         M_LST(d, REG_SP, disp);
 239                         break;
 240                 case TYPE_FLT:
 241                         M_FST(d, REG_SP, disp);
 242                         break;
 243                 case TYPE_DBL:
 244                         M_DST(d, REG_SP, disp);
 245                         break;
 246                 default:
 247                         vm_abort("emit_store: unknown type %d", dst->type);
 248                 }
 249 #endif
 250         }
 251 }
 252
 253
 254 /* emit_copy *******************************************************************
 255
 256    Generates a register/memory to register/memory copy.
 257
 258 *******************************************************************************/
 259
 260 void emit_copy(jitdata *jd, instruction *iptr)
 261 {
 262         codegendata *cd;
 263         varinfo     *src;
 264         varinfo     *dst;
 265         s4           s1, d;
 266
 267         /* get required compiler data */
 268
 269         cd = jd->cd;
 270
 271         /* get source and destination variables */
 272
 273         src = VAROP(iptr->s1);
 274         dst = VAROP(iptr->dst);
 275
 276         /* XXX dummy call, removed me!!! */
 277         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
 278
 279         if ((src->vv.regoff != dst->vv.regoff) ||
 280                 ((src->flags ^ dst->flags) & INMEMORY)) {
 281
 282                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 283                         /* emit nothing, as the value won't be used anyway */
 284                         return;
 285                 }
 286
 287                 /* If one of the variables resides in memory, we can eliminate
 288                    the register move from/to the temporary register with the
 289                    order of getting the destination register and the load. */
 290
 291                 if (IS_INMEMORY(src->flags)) {
 292 #if !defined(ENABLE_SOFTFLOAT)
 293                         if (IS_FLT_DBL_TYPE(src->type))
 294                                 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
 295                         else
 296 #endif
 297                         {
 298                                 if (IS_2_WORD_TYPE(src->type))
 299                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
 300                                 else
 301                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
 302                         }
 303
 304                         s1 = emit_load(jd, iptr, src, d);
 305                 }
 306                 else {
 307 #if !defined(ENABLE_SOFTFLOAT)
 308                         if (IS_FLT_DBL_TYPE(src->type))
 309                                 s1 = emit_load(jd, iptr, src, REG_FTMP1);
 310                         else
 311 #endif
 312                         {
 313                                 if (IS_2_WORD_TYPE(src->type))
 314                                         s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
 315                                 else
 316                                         s1 = emit_load(jd, iptr, src, REG_ITMP1);
 317                         }
 318
 319                         d = codegen_reg_of_var(iptr->opc, dst, s1);
 320                 }
 321
 322                 if (s1 != d) {
 323 #if defined(ENABLE_SOFTFLOAT)
 324                         switch (src->type) {
 325                         case TYPE_INT:
 326                         case TYPE_FLT:
 327                         case TYPE_ADR:
 328                                 /* XXX grrrr, wrong direction! */
 329                                 M_MOV(d, s1);
 330                                 break;
 331                         case TYPE_LNG:
 332                         case TYPE_DBL:
 333                                 /* XXX grrrr, wrong direction! */
 334                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
 335                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
 336                                 break;
 337                         default:
 338                                 vm_abort("emit_copy: unknown type %d", src->type);
 339                         }
 340 #else
 341                         switch (src->type) {
 342                         case TYPE_INT:
 343                         case TYPE_ADR:
 344                                 /* XXX grrrr, wrong direction! */
 345                                 M_MOV(d, s1);
 346                                 break;
 347                         case TYPE_LNG:
 348                                 /* XXX grrrr, wrong direction! */
 349                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
 350                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
 351                                 break;
 352                         case TYPE_FLT:
 353                                 M_FMOV(s1, d);
 354                                 break;
 355                         case TYPE_DBL:
 356                                 M_DMOV(s1, d);
 357                                 break;
 358                         default:
 359                                 vm_abort("emit_copy: unknown type %d", src->type);
 360                         }
 361 #endif
 362                 }
 363
 364                 emit_store(jd, iptr, dst, d);
 365         }
 366 }
 367
 368
 369 /* emit_iconst *****************************************************************
 370
 371    XXX
 372
 373 *******************************************************************************/
 374
 375 void emit_iconst(codegendata *cd, s4 d, s4 value)
 376 {
 377         s4 disp;
 378
 379         if (IS_IMM(value))
 380                 M_MOV_IMM(d, value);
 381         else {
 382                 disp = dseg_add_s4(cd, value);
 383                 M_DSEG_LOAD(d, disp);
 384         }
 385 }
 386
 387
 388 /* emit_branch *****************************************************************
 389
 390    Emits the code for conditional and unconditional branchs.
 391
 392 *******************************************************************************/
 393
 394 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 395 {
 396         s4 checkdisp;
 397         s4 branchdisp;
 398
 399         /* calculate the different displacements */
 400
 401         checkdisp  = (disp - 8);
 402         branchdisp = (disp - 8) >> 2;
 403
 404         /* check which branch to generate */
 405
 406         if (condition == BRANCH_UNCONDITIONAL) {
 407                 /* check displacement for overflow */
 408
 409                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
 410                         /* if the long-branches flag isn't set yet, do it */
 411
 412                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 413                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 414                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 415                         }
 416
 417                         vm_abort("emit_branch: emit unconditional long-branch code");
 418                 }
 419                 else {
 420                         M_B(branchdisp);
 421                 }
 422         }
 423         else {
 424                 /* and displacement for overflow */
 425
 426                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
 427                         /* if the long-branches flag isn't set yet, do it */
 428
 429                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 430                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 431                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 432                         }
 433
 434                         vm_abort("emit_branch: emit conditional long-branch code");
 435                 }
 436                 else {
 437                         switch (condition) {
 438                         case BRANCH_EQ:
 439                                 M_BEQ(branchdisp);
 440                                 break;
 441                         case BRANCH_NE:
 442                                 M_BNE(branchdisp);
 443                                 break;
 444                         case BRANCH_LT:
 445                                 M_BLT(branchdisp);
 446                                 break;
 447                         case BRANCH_GE:
 448                                 M_BGE(branchdisp);
 449                                 break;
 450                         case BRANCH_GT:
 451                                 M_BGT(branchdisp);
 452                                 break;
 453                         case BRANCH_LE:
 454                                 M_BLE(branchdisp);
 455                                 break;
 456                         case BRANCH_UGT:
 457                                 M_BHI(branchdisp);
 458                                 break;
 459                         default:
 460                                 vm_abort("emit_branch: unknown condition %d", condition);
 461                         }
 462                 }
 463         }
 464 }
 465
 466
 467 /* emit_arithmetic_check *******************************************************
 468
 469    Emit an ArithmeticException check.
 470
 471 *******************************************************************************/
 472
 473 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 474 {
 475         if (INSTRUCTION_MUST_CHECK(iptr)) {
 476                 CHECK_INT_REG(reg);
 477                 M_TEQ_IMM(reg, 0);
 478                 M_TRAPEQ(0, EXCEPTION_HARDWARE_ARITHMETIC);
 479         }
 480 }
 481
 482
 483 /* emit_nullpointer_check ******************************************************
 484
 485    Emit a NullPointerException check.
 486
 487 *******************************************************************************/
 488
 489 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 490 {
 491         if (INSTRUCTION_MUST_CHECK(iptr)) {
 492                 M_TST(reg, reg);
 493                 M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
 494         }
 495 }
 496
 497 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
 498 {
 499         M_TST(reg, reg);
 500         M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
 501 }
 502
 503
 504 /* emit_arrayindexoutofbounds_check ********************************************
 505
 506    Emit a ArrayIndexOutOfBoundsException check.
 507
 508 *******************************************************************************/
 509
 510 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 511 {
 512         if (INSTRUCTION_MUST_CHECK(iptr)) {
 513                 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
 514                 M_CMP(s2, REG_ITMP3);
 515                 M_TRAPHS(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
 516         }
 517 }
 518
 519
 520 /* emit_arraystore_check *******************************************************
 521
 522    Emit an ArrayStoreException check.
 523
 524 *******************************************************************************/
 525
 526 void emit_arraystore_check(codegendata *cd, instruction *iptr)
 527 {
 528         if (INSTRUCTION_MUST_CHECK(iptr)) {
 529                 M_TST(REG_RESULT, REG_RESULT);
 530                 M_TRAPEQ(0, EXCEPTION_HARDWARE_ARRAYSTORE);
 531         }
 532 }
 533
 534
 535 /* emit_classcast_check ********************************************************
 536
 537    Emit a ClassCastException check.
 538
 539 *******************************************************************************/
 540
 541 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 542 {
 543         if (INSTRUCTION_MUST_CHECK(iptr)) {
 544                 switch (condition) {
 545                 case BRANCH_EQ:
 546                         M_TRAPEQ(s1, EXCEPTION_HARDWARE_CLASSCAST);
 547                         break;
 548
 549                 case BRANCH_LE:
 550                         M_TRAPLE(s1, EXCEPTION_HARDWARE_CLASSCAST);
 551                         break;
 552
 553                 case BRANCH_UGT:
 554                         M_TRAPHI(s1, EXCEPTION_HARDWARE_CLASSCAST);
 555                         break;
 556
 557                 default:
 558                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 559                 }
 560         }
 561 }
 562
 563 /* emit_exception_check ********************************************************
 564
 565    Emit an Exception check.
 566
 567 *******************************************************************************/
 568
 569 void emit_exception_check(codegendata *cd, instruction *iptr)
 570 {
 571         if (INSTRUCTION_MUST_CHECK(iptr)) {
 572                 M_TST(REG_RESULT, REG_RESULT);
 573                 M_TRAPEQ(0, EXCEPTION_HARDWARE_EXCEPTION);
 574         }
 575 }
 576
 577
 578 /* emit_trap *******************************************************************
 579
 580    Emit a trap instruction and return the original machine code.
 581
 582 *******************************************************************************/
 583
 584 uint32_t emit_trap(codegendata *cd)
 585 {
 586         uint32_t mcode;
 587
 588         /* Get machine code which is patched back in later. The
 589            trap is 1 instruction word long. */
 590
 591         mcode = *((u4 *) cd->mcodeptr);
 592
 593         M_TRAP(0, EXCEPTION_HARDWARE_PATCHER);
 594
 595         return mcode;
 596 }
 597
 598
 599 /* emit_verbosecall_enter ******************************************************
 600
 601    Generates the code for the call trace.
 602
 603 *******************************************************************************/
 604
 605 #if !defined(NDEBUG)
 606 void emit_verbosecall_enter(jitdata *jd)
 607 {
 608         methodinfo   *m;
 609         codegendata  *cd;
 610         registerdata *rd;
 611         methoddesc   *md;
 612         s4            disp;
 613         s4            i, s;
 614
 615         /* get required compiler data */
 616
 617         m  = jd->m;
 618         cd = jd->cd;
 619         rd = jd->rd;
 620
 621         md = m->parseddesc;
 622
 623         /* mark trace code */
 624
 625         M_NOP;
 626
 627         /* Keep stack 8-byte aligned. */
 628
 629         M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
 630         M_SUB_IMM(REG_SP, REG_SP, md->paramcount * 8);
 631
 632         /* save argument registers */
 633
 634         for (i = 0; i < md->paramcount; i++) {
 635                 if (!md->params[i].inmemory) {
 636                         s = md->params[i].regoff;
 637
 638                         switch (md->paramtypes[i].type) {
 639                         case TYPE_ADR:
 640                         case TYPE_INT:
 641                                 M_IST(s, REG_SP, i * 8);
 642                                 break;
 643                         case TYPE_LNG:
 644                                 M_LST(s, REG_SP, i * 8);
 645                                 break;
 646                         case TYPE_FLT:
 647                                 M_FST(s, REG_SP, i * 8);
 648                                 break;
 649                         case TYPE_DBL:
 650                                 M_DST(s, REG_SP, i * 8);
 651                                 break;
 652                         }
 653                 }
 654         }
 655
 656         disp = dseg_add_address(cd, m);
 657         M_DSEG_LOAD(REG_A0, disp);
 658         M_MOV(REG_A1, REG_SP);
 659         M_ADD_IMM(REG_A2, REG_SP, md->paramcount * 8 + 2 * 4 + cd->stackframesize);
 660         M_LONGBRANCH(trace_java_call_enter);
 661
 662         /* restore argument registers */
 663
 664         for (i = 0; i < md->paramcount; i++) {
 665                 if (!md->params[i].inmemory) {
 666                         s = md->params[i].regoff;
 667
 668                         switch (md->paramtypes[i].type) {
 669                         case TYPE_ADR:
 670                         case TYPE_INT:
 671                                 M_ILD(s, REG_SP, i * 8);
 672                                 break;
 673                         case TYPE_LNG:
 674                                 M_LLD(s, REG_SP, i * 8);
 675                                 break;
 676                         case TYPE_FLT:
 677                                 M_FLD(s, REG_SP, i * 8);
 678                                 break;
 679                         case TYPE_DBL:
 680                                 M_DLD(s, REG_SP, i * 8);
 681                                 break;
 682                         }
 683                 }
 684         }
 685
 686         /* Keep stack 8-byte aligned. */
 687
 688         M_ADD_IMM(REG_SP, REG_SP, md->paramcount * 8);
 689         M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
 690
 691         /* mark trace code */
 692
 693         M_NOP;
 694 }
 695 #endif /* !defined(NDEBUG) */
 696
 697
 698 /* emit_verbosecall_exit *******************************************************
 699
 700    Generates the code for the call trace.
 701
 702 *******************************************************************************/
 703
 704 #if !defined(NDEBUG)
 705 void emit_verbosecall_exit(jitdata *jd)
 706 {
 707         methodinfo   *m;
 708         codegendata  *cd;
 709         registerdata *rd;
 710         methoddesc   *md;
 711         s4            disp;
 712
 713         /* get required compiler data */
 714
 715         m  = jd->m;
 716         cd = jd->cd;
 717         rd = jd->rd;
 718
 719         md = m->parseddesc;
 720
 721         /* mark trace code */
 722
 723         M_NOP;
 724
 725         /* Keep stack 8-byte aligned. */
 726
 727         M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
 728         M_SUB_IMM(REG_SP, REG_SP, 1 * 8);
 729
 730         /* save return value */
 731
 732         switch (md->returntype.type) {
 733         case TYPE_ADR:
 734         case TYPE_INT:
 735         case TYPE_FLT:
 736                 M_IST(REG_RESULT, REG_SP, 0 * 8);
 737                 break;
 738         case TYPE_LNG:
 739         case TYPE_DBL:
 740                 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
 741                 break;
 742         }
 743
 744         disp = dseg_add_address(cd, m);
 745         M_DSEG_LOAD(REG_A0, disp);
 746         M_MOV(REG_A1, REG_SP);
 747         M_LONGBRANCH(trace_java_call_exit);
 748
 749         /* restore return value */
 750
 751         switch (md->returntype.type) {
 752         case TYPE_ADR:
 753         case TYPE_INT:
 754         case TYPE_FLT:
 755                 M_ILD(REG_RESULT, REG_SP, 0 * 8);
 756                 break;
 757         case TYPE_LNG:
 758         case TYPE_DBL:
 759                 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 8);
 760                 break;
 761         }
 762
 763         /* Keep stack 8-byte aligned. */
 764
 765         M_ADD_IMM(REG_SP, REG_SP, 1 * 8);
 766         M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
 767
 768         /* mark trace code */
 769
 770         M_NOP;
 771 }
 772 #endif /* !defined(NDEBUG) */
 773
 774
 775 /*
 776  * These are local overrides for various environment variables in Emacs.
 777  * Please do not remove this and leave it at the end of the file, where
 778  * Emacs will automagically detect them.
 779  * ---------------------------------------------------------------------
 780  * Local variables:
 781  * mode: c
 782  * indent-tabs-mode: t
 783  * c-basic-offset: 4
 784  * tab-width: 4
 785  * End:
 786  * vim:noexpandtab:sw=4:ts=4:
 787  */