1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
37 #include "vm/jit/arm/codegen.h"
39 #include "mm/memory.h"
41 #include "threads/lock-common.h"
43 #include "vm/exceptions.h"
44 #include "vm/global.h"
46 #include "vm/jit/abi.h"
47 #include "vm/jit/asmpart.h"
48 #include "vm/jit/emit-common.h"
49 #include "vm/jit/jit.h"
50 #include "vm/jit/patcher-common.h"
51 #include "vm/jit/replace.h"
52 #include "vm/jit/trace.h"
54 #include "toolbox/logging.h" /* XXX for debugging only */
57 /* emit_load *******************************************************************
59 Emits a possible load of an operand.
61 *******************************************************************************/
63 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
69 /* get required compiler data */
73 if (src->flags & INMEMORY) {
76 disp = src->vv.regoff;
78 #if defined(ENABLE_SOFTFLOAT)
83 M_ILD(tempreg, REG_SP, disp);
87 M_LLD(tempreg, REG_SP, disp);
90 vm_abort("emit_load: unknown type %d", src->type);
96 M_ILD(tempreg, REG_SP, disp);
99 M_LLD(tempreg, REG_SP, disp);
102 M_FLD(tempreg, REG_SP, disp);
105 M_DLD(tempreg, REG_SP, disp);
108 vm_abort("emit_load: unknown type %d", src->type);
115 reg = src->vv.regoff;
121 /* emit_load_low ***************************************************************
123 Emits a possible load of the low 32-bits of a long source operand.
125 *******************************************************************************/
127 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
133 assert(src->type == TYPE_LNG);
135 /* get required compiler data */
139 if (src->flags & INMEMORY) {
142 disp = src->vv.regoff;
144 #if defined(__ARMEL__)
145 M_ILD(tempreg, REG_SP, disp);
147 M_ILD(tempreg, REG_SP, disp + 4);
153 reg = GET_LOW_REG(src->vv.regoff);
159 /* emit_load_high **************************************************************
161 Emits a possible load of the high 32-bits of a long source operand.
163 *******************************************************************************/
165 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
171 assert(src->type == TYPE_LNG);
173 /* get required compiler data */
177 if (src->flags & INMEMORY) {
180 disp = src->vv.regoff;
182 #if defined(__ARMEL__)
183 M_ILD(tempreg, REG_SP, disp + 4);
185 M_ILD(tempreg, REG_SP, disp);
191 reg = GET_HIGH_REG(src->vv.regoff);
197 /* emit_store ******************************************************************
199 Emits a possible store to a variable.
201 *******************************************************************************/
203 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
208 /* get required compiler data */
212 if (dst->flags & INMEMORY) {
215 disp = dst->vv.regoff;
217 #if defined(ENABLE_SOFTFLOAT)
222 M_IST(d, REG_SP, disp);
226 M_LST(d, REG_SP, disp);
229 vm_abort("emit_store: unknown type %d", dst->type);
235 M_IST(d, REG_SP, disp);
238 M_LST(d, REG_SP, disp);
241 M_FST(d, REG_SP, disp);
244 M_DST(d, REG_SP, disp);
247 vm_abort("emit_store: unknown type %d", dst->type);
254 /* emit_copy *******************************************************************
256 Generates a register/memory to register/memory copy.
258 *******************************************************************************/
260 void emit_copy(jitdata *jd, instruction *iptr)
267 /* get required compiler data */
271 /* get source and destination variables */
273 src = VAROP(iptr->s1);
274 dst = VAROP(iptr->dst);
276 /* XXX dummy call, removed me!!! */
277 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
279 if ((src->vv.regoff != dst->vv.regoff) ||
280 ((src->flags ^ dst->flags) & INMEMORY)) {
282 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
283 /* emit nothing, as the value won't be used anyway */
287 /* If one of the variables resides in memory, we can eliminate
288 the register move from/to the temporary register with the
289 order of getting the destination register and the load. */
291 if (IS_INMEMORY(src->flags)) {
292 #if !defined(ENABLE_SOFTFLOAT)
293 if (IS_FLT_DBL_TYPE(src->type))
294 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
298 if (IS_2_WORD_TYPE(src->type))
299 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
301 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
304 s1 = emit_load(jd, iptr, src, d);
307 #if !defined(ENABLE_SOFTFLOAT)
308 if (IS_FLT_DBL_TYPE(src->type))
309 s1 = emit_load(jd, iptr, src, REG_FTMP1);
313 if (IS_2_WORD_TYPE(src->type))
314 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
316 s1 = emit_load(jd, iptr, src, REG_ITMP1);
319 d = codegen_reg_of_var(iptr->opc, dst, s1);
323 #if defined(ENABLE_SOFTFLOAT)
328 /* XXX grrrr, wrong direction! */
333 /* XXX grrrr, wrong direction! */
334 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
335 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
338 vm_abort("emit_copy: unknown type %d", src->type);
344 /* XXX grrrr, wrong direction! */
348 /* XXX grrrr, wrong direction! */
349 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
350 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
359 vm_abort("emit_copy: unknown type %d", src->type);
364 emit_store(jd, iptr, dst, d);
369 /* emit_iconst *****************************************************************
373 *******************************************************************************/
375 void emit_iconst(codegendata *cd, s4 d, s4 value)
382 disp = dseg_add_s4(cd, value);
383 M_DSEG_LOAD(d, disp);
388 /* emit_branch *****************************************************************
390 Emits the code for conditional and unconditional branchs.
392 *******************************************************************************/
394 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
399 /* calculate the different displacements */
401 checkdisp = (disp - 8);
402 branchdisp = (disp - 8) >> 2;
404 /* check which branch to generate */
406 if (condition == BRANCH_UNCONDITIONAL) {
407 /* check displacement for overflow */
409 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
410 /* if the long-branches flag isn't set yet, do it */
412 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
413 cd->flags |= (CODEGENDATA_FLAG_ERROR |
414 CODEGENDATA_FLAG_LONGBRANCHES);
417 vm_abort("emit_branch: emit unconditional long-branch code");
424 /* and displacement for overflow */
426 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
427 /* if the long-branches flag isn't set yet, do it */
429 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
430 cd->flags |= (CODEGENDATA_FLAG_ERROR |
431 CODEGENDATA_FLAG_LONGBRANCHES);
434 vm_abort("emit_branch: emit conditional long-branch code");
460 vm_abort("emit_branch: unknown condition %d", condition);
467 /* emit_arithmetic_check *******************************************************
469 Emit an ArithmeticException check.
471 *******************************************************************************/
473 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
475 if (INSTRUCTION_MUST_CHECK(iptr)) {
478 M_TRAPEQ(0, EXCEPTION_HARDWARE_ARITHMETIC);
483 /* emit_nullpointer_check ******************************************************
485 Emit a NullPointerException check.
487 *******************************************************************************/
489 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
491 if (INSTRUCTION_MUST_CHECK(iptr)) {
493 M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
497 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
500 M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
504 /* emit_arrayindexoutofbounds_check ********************************************
506 Emit a ArrayIndexOutOfBoundsException check.
508 *******************************************************************************/
510 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
512 if (INSTRUCTION_MUST_CHECK(iptr)) {
513 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
514 M_CMP(s2, REG_ITMP3);
515 M_TRAPHS(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
520 /* emit_arraystore_check *******************************************************
522 Emit an ArrayStoreException check.
524 *******************************************************************************/
526 void emit_arraystore_check(codegendata *cd, instruction *iptr)
528 if (INSTRUCTION_MUST_CHECK(iptr)) {
529 M_TST(REG_RESULT, REG_RESULT);
530 M_TRAPEQ(0, EXCEPTION_HARDWARE_ARRAYSTORE);
535 /* emit_classcast_check ********************************************************
537 Emit a ClassCastException check.
539 *******************************************************************************/
541 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
543 if (INSTRUCTION_MUST_CHECK(iptr)) {
546 M_TRAPEQ(s1, EXCEPTION_HARDWARE_CLASSCAST);
550 M_TRAPLE(s1, EXCEPTION_HARDWARE_CLASSCAST);
554 M_TRAPHI(s1, EXCEPTION_HARDWARE_CLASSCAST);
558 vm_abort("emit_classcast_check: unknown condition %d", condition);
563 /* emit_exception_check ********************************************************
565 Emit an Exception check.
567 *******************************************************************************/
569 void emit_exception_check(codegendata *cd, instruction *iptr)
571 if (INSTRUCTION_MUST_CHECK(iptr)) {
572 M_TST(REG_RESULT, REG_RESULT);
573 M_TRAPEQ(0, EXCEPTION_HARDWARE_EXCEPTION);
578 /* emit_trap *******************************************************************
580 Emit a trap instruction and return the original machine code.
582 *******************************************************************************/
584 uint32_t emit_trap(codegendata *cd)
588 /* Get machine code which is patched back in later. The
589 trap is 1 instruction word long. */
591 mcode = *((u4 *) cd->mcodeptr);
593 M_TRAP(0, EXCEPTION_HARDWARE_PATCHER);
599 /* emit_verbosecall_enter ******************************************************
601 Generates the code for the call trace.
603 *******************************************************************************/
606 void emit_verbosecall_enter(jitdata *jd)
615 /* get required compiler data */
623 /* mark trace code */
627 /* Keep stack 8-byte aligned. */
629 M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
630 M_SUB_IMM(REG_SP, REG_SP, md->paramcount * 8);
632 /* save argument registers */
634 for (i = 0; i < md->paramcount; i++) {
635 if (!md->params[i].inmemory) {
636 s = md->params[i].regoff;
638 switch (md->paramtypes[i].type) {
641 M_IST(s, REG_SP, i * 8);
644 M_LST(s, REG_SP, i * 8);
647 M_FST(s, REG_SP, i * 8);
650 M_DST(s, REG_SP, i * 8);
656 disp = dseg_add_address(cd, m);
657 M_DSEG_LOAD(REG_A0, disp);
658 M_MOV(REG_A1, REG_SP);
659 M_ADD_IMM(REG_A2, REG_SP, md->paramcount * 8 + 2 * 4 + cd->stackframesize);
660 M_LONGBRANCH(trace_java_call_enter);
662 /* restore argument registers */
664 for (i = 0; i < md->paramcount; i++) {
665 if (!md->params[i].inmemory) {
666 s = md->params[i].regoff;
668 switch (md->paramtypes[i].type) {
671 M_ILD(s, REG_SP, i * 8);
674 M_LLD(s, REG_SP, i * 8);
677 M_FLD(s, REG_SP, i * 8);
680 M_DLD(s, REG_SP, i * 8);
686 /* Keep stack 8-byte aligned. */
688 M_ADD_IMM(REG_SP, REG_SP, md->paramcount * 8);
689 M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
691 /* mark trace code */
695 #endif /* !defined(NDEBUG) */
698 /* emit_verbosecall_exit *******************************************************
700 Generates the code for the call trace.
702 *******************************************************************************/
705 void emit_verbosecall_exit(jitdata *jd)
713 /* get required compiler data */
721 /* mark trace code */
725 /* Keep stack 8-byte aligned. */
727 M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
728 M_SUB_IMM(REG_SP, REG_SP, 1 * 8);
730 /* save return value */
732 switch (md->returntype.type) {
736 M_IST(REG_RESULT, REG_SP, 0 * 8);
740 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
744 disp = dseg_add_address(cd, m);
745 M_DSEG_LOAD(REG_A0, disp);
746 M_MOV(REG_A1, REG_SP);
747 M_LONGBRANCH(trace_java_call_exit);
749 /* restore return value */
751 switch (md->returntype.type) {
755 M_ILD(REG_RESULT, REG_SP, 0 * 8);
759 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 8);
763 /* Keep stack 8-byte aligned. */
765 M_ADD_IMM(REG_SP, REG_SP, 1 * 8);
766 M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
768 /* mark trace code */
772 #endif /* !defined(NDEBUG) */
776 * These are local overrides for various environment variables in Emacs.
777 * Please do not remove this and leave it at the end of the file, where
778 * Emacs will automagically detect them.
779 * ---------------------------------------------------------------------
782 * indent-tabs-mode: t
786 * vim:noexpandtab:sw=4:ts=4: