src/vm/jit/arm/emit.c

   1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007, 2008
   4    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
   5
   6    This file is part of CACAO.
   7
   8    This program is free software; you can redistribute it and/or
   9    modify it under the terms of the GNU General Public License as
  10    published by the Free Software Foundation; either version 2, or (at
  11    your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful, but
  14    WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16    General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21    02110-1301, USA.
  22
  23 */
  24
  25
  26 #include "config.h"
  27
  28 #include <assert.h>
  29 #include <stdint.h>
  30
  31 #include "vm/types.h"
  32
  33 #include "md-abi.h"
  34
  35 #include "vm/jit/arm/codegen.h"
  36
  37 #include "mm/memory.hpp"
  38
  39 #include "threads/lock.hpp"
  40
  41 #include "vm/global.h"
  42
  43 #include "vm/jit/abi.h"
  44 #include "vm/jit/asmpart.h"
  45 #include "vm/jit/emit-common.hpp"
  46 #include "vm/jit/jit.hpp"
  47 #include "vm/jit/patcher-common.hpp"
  48 #include "vm/jit/replace.hpp"
  49 #include "vm/jit/trace.hpp"
  50 #include "vm/jit/trap.hpp"
  51
  52 #include "toolbox/logging.hpp" /* XXX for debugging only */
  53
  54
  55 /* emit_load *******************************************************************
  56
  57    Emits a possible load of an operand.
  58
  59 *******************************************************************************/
  60
  61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  62 {
  63         codegendata  *cd;
  64         s4            disp;
  65         s4            reg;
  66
  67         /* get required compiler data */
  68
  69         cd = jd->cd;
  70
  71         if (src->flags & INMEMORY) {
  72                 COUNT_SPILLS;
  73
  74                 disp = src->vv.regoff;
  75
  76 #if defined(ENABLE_SOFTFLOAT)
  77                 switch (src->type) {
  78                 case TYPE_INT:
  79                 case TYPE_FLT:
  80                 case TYPE_ADR:
  81                         M_ILD(tempreg, REG_SP, disp);
  82                         break;
  83                 case TYPE_LNG:
  84                 case TYPE_DBL:
  85                         M_LLD(tempreg, REG_SP, disp);
  86                         break;
  87                 default:
  88                         vm_abort("emit_load: unknown type %d", src->type);
  89                 }
  90 #else
  91                 switch (src->type) {
  92                 case TYPE_INT:
  93                 case TYPE_ADR:
  94                         M_ILD(tempreg, REG_SP, disp);
  95                         break;
  96                 case TYPE_LNG:
  97                         M_LLD(tempreg, REG_SP, disp);
  98                         break;
  99                 case TYPE_FLT:
 100                         M_FLD(tempreg, REG_SP, disp);
 101                         break;
 102                 case TYPE_DBL:
 103                         M_DLD(tempreg, REG_SP, disp);
 104                         break;
 105                 default:
 106                         vm_abort("emit_load: unknown type %d", src->type);
 107                 }
 108 #endif
 109
 110                 reg = tempreg;
 111         }
 112         else
 113                 reg = src->vv.regoff;
 114
 115         return reg;
 116 }
 117
 118
 119 /* emit_load_low ***************************************************************
 120
 121    Emits a possible load of the low 32-bits of a long source operand.
 122
 123 *******************************************************************************/
 124
 125 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 126 {
 127         codegendata  *cd;
 128         s4            disp;
 129         s4            reg;
 130
 131         assert(src->type == TYPE_LNG);
 132
 133         /* get required compiler data */
 134
 135         cd = jd->cd;
 136
 137         if (src->flags & INMEMORY) {
 138                 COUNT_SPILLS;
 139
 140                 disp = src->vv.regoff;
 141
 142 #if defined(__ARMEL__)
 143                 M_ILD(tempreg, REG_SP, disp);
 144 #else
 145                 M_ILD(tempreg, REG_SP, disp + 4);
 146 #endif
 147
 148                 reg = tempreg;
 149         }
 150         else
 151                 reg = GET_LOW_REG(src->vv.regoff);
 152
 153         return reg;
 154 }
 155
 156
 157 /* emit_load_high **************************************************************
 158
 159    Emits a possible load of the high 32-bits of a long source operand.
 160
 161 *******************************************************************************/
 162
 163 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 164 {
 165         codegendata  *cd;
 166         s4            disp;
 167         s4            reg;
 168
 169         assert(src->type == TYPE_LNG);
 170
 171         /* get required compiler data */
 172
 173         cd = jd->cd;
 174
 175         if (src->flags & INMEMORY) {
 176                 COUNT_SPILLS;
 177
 178                 disp = src->vv.regoff;
 179
 180 #if defined(__ARMEL__)
 181                 M_ILD(tempreg, REG_SP, disp + 4);
 182 #else
 183                 M_ILD(tempreg, REG_SP, disp);
 184 #endif
 185
 186                 reg = tempreg;
 187         }
 188         else
 189                 reg = GET_HIGH_REG(src->vv.regoff);
 190
 191         return reg;
 192 }
 193
 194
 195 /* emit_store ******************************************************************
 196
 197    Emits a possible store to a variable.
 198
 199 *******************************************************************************/
 200
 201 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 202 {
 203         codegendata  *cd;
 204         s4            disp;
 205
 206         /* get required compiler data */
 207
 208         cd = jd->cd;
 209
 210         if (dst->flags & INMEMORY) {
 211                 COUNT_SPILLS;
 212
 213                 disp = dst->vv.regoff;
 214
 215 #if defined(ENABLE_SOFTFLOAT)
 216                 switch (dst->type) {
 217                 case TYPE_INT:
 218                 case TYPE_FLT:
 219                 case TYPE_ADR:
 220                         M_IST(d, REG_SP, disp);
 221                         break;
 222                 case TYPE_LNG:
 223                 case TYPE_DBL:
 224                         M_LST(d, REG_SP, disp);
 225                         break;
 226                 default:
 227                         vm_abort("emit_store: unknown type %d", dst->type);
 228                 }
 229 #else
 230                 switch (dst->type) {
 231                 case TYPE_INT:
 232                 case TYPE_ADR:
 233                         M_IST(d, REG_SP, disp);
 234                         break;
 235                 case TYPE_LNG:
 236                         M_LST(d, REG_SP, disp);
 237                         break;
 238                 case TYPE_FLT:
 239                         M_FST(d, REG_SP, disp);
 240                         break;
 241                 case TYPE_DBL:
 242                         M_DST(d, REG_SP, disp);
 243                         break;
 244                 default:
 245                         vm_abort("emit_store: unknown type %d", dst->type);
 246                 }
 247 #endif
 248         }
 249 }
 250
 251
 252 /* emit_copy *******************************************************************
 253
 254    Generates a register/memory to register/memory copy.
 255
 256 *******************************************************************************/
 257
 258 void emit_copy(jitdata *jd, instruction *iptr)
 259 {
 260         codegendata *cd;
 261         varinfo     *src;
 262         varinfo     *dst;
 263         s4           s1, d;
 264
 265         /* get required compiler data */
 266
 267         cd = jd->cd;
 268
 269         /* get source and destination variables */
 270
 271         src = VAROP(iptr->s1);
 272         dst = VAROP(iptr->dst);
 273
 274         /* XXX dummy call, removed me!!! */
 275         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
 276
 277         if ((src->vv.regoff != dst->vv.regoff) ||
 278                 ((src->flags ^ dst->flags) & INMEMORY)) {
 279
 280                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 281                         /* emit nothing, as the value won't be used anyway */
 282                         return;
 283                 }
 284
 285                 /* If one of the variables resides in memory, we can eliminate
 286                    the register move from/to the temporary register with the
 287                    order of getting the destination register and the load. */
 288
 289                 if (IS_INMEMORY(src->flags)) {
 290 #if !defined(ENABLE_SOFTFLOAT)
 291                         if (IS_FLT_DBL_TYPE(src->type))
 292                                 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
 293                         else
 294 #endif
 295                         {
 296                                 if (IS_2_WORD_TYPE(src->type))
 297                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
 298                                 else
 299                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
 300                         }
 301
 302                         s1 = emit_load(jd, iptr, src, d);
 303                 }
 304                 else {
 305 #if !defined(ENABLE_SOFTFLOAT)
 306                         if (IS_FLT_DBL_TYPE(src->type))
 307                                 s1 = emit_load(jd, iptr, src, REG_FTMP1);
 308                         else
 309 #endif
 310                         {
 311                                 if (IS_2_WORD_TYPE(src->type))
 312                                         s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
 313                                 else
 314                                         s1 = emit_load(jd, iptr, src, REG_ITMP1);
 315                         }
 316
 317                         d = codegen_reg_of_var(iptr->opc, dst, s1);
 318                 }
 319
 320                 if (s1 != d) {
 321 #if defined(ENABLE_SOFTFLOAT)
 322                         switch (src->type) {
 323                         case TYPE_INT:
 324                         case TYPE_FLT:
 325                         case TYPE_ADR:
 326                                 /* XXX grrrr, wrong direction! */
 327                                 M_MOV(d, s1);
 328                                 break;
 329                         case TYPE_LNG:
 330                         case TYPE_DBL:
 331                                 /* XXX grrrr, wrong direction! */
 332                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
 333                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
 334                                 break;
 335                         default:
 336                                 vm_abort("emit_copy: unknown type %d", src->type);
 337                         }
 338 #else
 339                         switch (src->type) {
 340                         case TYPE_INT:
 341                         case TYPE_ADR:
 342                                 /* XXX grrrr, wrong direction! */
 343                                 M_MOV(d, s1);
 344                                 break;
 345                         case TYPE_LNG:
 346                                 /* XXX grrrr, wrong direction! */
 347                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
 348                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
 349                                 break;
 350                         case TYPE_FLT:
 351                                 M_FMOV(s1, d);
 352                                 break;
 353                         case TYPE_DBL:
 354                                 M_DMOV(s1, d);
 355                                 break;
 356                         default:
 357                                 vm_abort("emit_copy: unknown type %d", src->type);
 358                         }
 359 #endif
 360                 }
 361
 362                 emit_store(jd, iptr, dst, d);
 363         }
 364 }
 365
 366
 367 /* emit_iconst *****************************************************************
 368
 369    XXX
 370
 371 *******************************************************************************/
 372
 373 void emit_iconst(codegendata *cd, s4 d, s4 value)
 374 {
 375         s4 disp;
 376
 377         if (IS_IMM(value))
 378                 M_MOV_IMM(d, value);
 379         else {
 380                 disp = dseg_add_s4(cd, value);
 381                 M_DSEG_LOAD(d, disp);
 382         }
 383 }
 384
 385
 386 /**
 387  * Emits code updating the condition register by comparing one integer
 388  * register to an immediate integer value.
 389  */
 390 void emit_icmp_imm(codegendata* cd, int reg, int32_t value)
 391 {
 392         int32_t disp;
 393
 394         if (IS_IMM(value)) {
 395                 M_CMP_IMM(reg, value);
 396         } else if (IS_IMM(-value)) {
 397                 M_CMN_IMM(reg, -value);
 398         } else {
 399                 assert(reg != REG_ITMP3);
 400                 disp = dseg_add_s4(cd, value);
 401                 M_DSEG_LOAD(REG_ITMP3, disp);
 402                 M_CMP(reg, REG_ITMP3);
 403         }
 404 }
 405
 406
 407 /* emit_branch *****************************************************************
 408
 409    Emits the code for conditional and unconditional branchs.
 410
 411 *******************************************************************************/
 412
 413 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 414 {
 415         s4 checkdisp;
 416         s4 branchdisp;
 417
 418         /* calculate the different displacements */
 419
 420         checkdisp  = (disp - 8);
 421         branchdisp = (disp - 8) >> 2;
 422
 423         /* check which branch to generate */
 424
 425         if (condition == BRANCH_UNCONDITIONAL) {
 426                 /* check displacement for overflow */
 427
 428                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
 429                         /* if the long-branches flag isn't set yet, do it */
 430
 431                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 432                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 433                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 434                         }
 435
 436                         vm_abort("emit_branch: emit unconditional long-branch code");
 437                 }
 438                 else {
 439                         M_B(branchdisp);
 440                 }
 441         }
 442         else {
 443                 /* and displacement for overflow */
 444
 445                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
 446                         /* if the long-branches flag isn't set yet, do it */
 447
 448                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 449                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 450                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 451                         }
 452
 453                         vm_abort("emit_branch: emit conditional long-branch code");
 454                 }
 455                 else {
 456                         switch (condition) {
 457                         case BRANCH_EQ:
 458                                 M_BEQ(branchdisp);
 459                                 break;
 460                         case BRANCH_NE:
 461                                 M_BNE(branchdisp);
 462                                 break;
 463                         case BRANCH_LT:
 464                                 M_BLT(branchdisp);
 465                                 break;
 466                         case BRANCH_GE:
 467                                 M_BGE(branchdisp);
 468                                 break;
 469                         case BRANCH_GT:
 470                                 M_BGT(branchdisp);
 471                                 break;
 472                         case BRANCH_LE:
 473                                 M_BLE(branchdisp);
 474                                 break;
 475                         case BRANCH_UGT:
 476                                 M_BHI(branchdisp);
 477                                 break;
 478                         default:
 479                                 vm_abort("emit_branch: unknown condition %d", condition);
 480                         }
 481                 }
 482         }
 483 }
 484
 485
 486 /* emit_arithmetic_check *******************************************************
 487
 488    Emit an ArithmeticException check.
 489
 490 *******************************************************************************/
 491
 492 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 493 {
 494         if (INSTRUCTION_MUST_CHECK(iptr)) {
 495                 CHECK_INT_REG(reg);
 496                 M_TEQ_IMM(reg, 0);
 497                 M_TRAPEQ(0, TRAP_ArithmeticException);
 498         }
 499 }
 500
 501
 502 /* emit_nullpointer_check ******************************************************
 503
 504    Emit a NullPointerException check.
 505
 506 *******************************************************************************/
 507
 508 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 509 {
 510         if (INSTRUCTION_MUST_CHECK(iptr)) {
 511                 M_TST(reg, reg);
 512                 M_TRAPEQ(0, TRAP_NullPointerException);
 513         }
 514 }
 515
 516 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
 517 {
 518         M_TST(reg, reg);
 519         M_TRAPEQ(0, TRAP_NullPointerException);
 520 }
 521
 522
 523 /* emit_arrayindexoutofbounds_check ********************************************
 524
 525    Emit a ArrayIndexOutOfBoundsException check.
 526
 527 *******************************************************************************/
 528
 529 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 530 {
 531         if (INSTRUCTION_MUST_CHECK(iptr)) {
 532                 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
 533                 M_CMP(s2, REG_ITMP3);
 534                 M_TRAPHS(s2, TRAP_ArrayIndexOutOfBoundsException);
 535         }
 536 }
 537
 538
 539 /* emit_arraystore_check *******************************************************
 540
 541    Emit an ArrayStoreException check.
 542
 543 *******************************************************************************/
 544
 545 void emit_arraystore_check(codegendata *cd, instruction *iptr)
 546 {
 547         if (INSTRUCTION_MUST_CHECK(iptr)) {
 548                 M_TST(REG_RESULT, REG_RESULT);
 549                 M_TRAPEQ(0, TRAP_ArrayStoreException);
 550         }
 551 }
 552
 553
 554 /* emit_classcast_check ********************************************************
 555
 556    Emit a ClassCastException check.
 557
 558 *******************************************************************************/
 559
 560 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 561 {
 562         if (INSTRUCTION_MUST_CHECK(iptr)) {
 563                 switch (condition) {
 564                 case BRANCH_EQ:
 565                         M_TRAPEQ(s1, TRAP_ClassCastException);
 566                         break;
 567
 568                 case BRANCH_NE:
 569                         M_TRAPNE(s1, TRAP_ClassCastException);
 570                         break;
 571
 572                 case BRANCH_LT:
 573                         M_TRAPLT(s1, TRAP_ClassCastException);
 574                         break;
 575
 576                 case BRANCH_LE:
 577                         M_TRAPLE(s1, TRAP_ClassCastException);
 578                         break;
 579
 580                 case BRANCH_UGT:
 581                         M_TRAPHI(s1, TRAP_ClassCastException);
 582                         break;
 583
 584                 default:
 585                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 586                 }
 587         }
 588 }
 589
 590 /* emit_exception_check ********************************************************
 591
 592    Emit an Exception check.
 593
 594 *******************************************************************************/
 595
 596 void emit_exception_check(codegendata *cd, instruction *iptr)
 597 {
 598         if (INSTRUCTION_MUST_CHECK(iptr)) {
 599                 M_TST(REG_RESULT, REG_RESULT);
 600                 M_TRAPEQ(0, TRAP_CHECK_EXCEPTION);
 601         }
 602 }
 603
 604
 605 /* emit_trap_compiler **********************************************************
 606
 607    Emit a trap instruction which calls the JIT compiler.
 608
 609 *******************************************************************************/
 610
 611 void emit_trap_compiler(codegendata *cd)
 612 {
 613         M_TRAP(REG_METHODPTR, TRAP_COMPILER);
 614 }
 615
 616
 617 /* emit_trap *******************************************************************
 618
 619    Emit a trap instruction and return the original machine code.
 620
 621 *******************************************************************************/
 622
 623 uint32_t emit_trap(codegendata *cd)
 624 {
 625         uint32_t mcode;
 626
 627         /* Get machine code which is patched back in later. The
 628            trap is 1 instruction word long. */
 629
 630         mcode = *((uint32_t *) cd->mcodeptr);
 631
 632         M_TRAP(0, TRAP_PATCHER);
 633
 634         return mcode;
 635 }
 636
 637
 638 /**
 639  * Emit code to recompute the procedure vector.
 640  */
 641 void emit_recompute_pv(codegendata *cd)
 642 {
 643         // This is used to recompute our PV (we use the IP for this) out
 644         // of the current PC.
 645         int32_t disp = (int32_t) (cd->mcodeptr - cd->mcodebase);
 646
 647         // We use PC relative addressing.
 648         disp += 8;
 649
 650         // Sanity checks.
 651         assert((disp & 0x03) == 0);
 652         assert(disp >= 0 && disp <= 0x03ffffff);
 653
 654         // ATTENTION: If you change this, you have to look at other functions
 655         // as well! Following things depend on it: md_codegen_get_pv_from_pc();
 656         if (disp > 0x0003ffff) {
 657                 M_SUB_IMM(REG_PV, REG_PC, IMM_ROTL(disp >> 18, 9));
 658                 M_SUB_IMM(REG_PV, REG_PV, IMM_ROTL(disp >> 10, 5));
 659                 M_SUB_IMM(REG_PV, REG_PV, IMM_ROTL(disp >> 2, 1));
 660         } else if (disp > 0x000003ff) {
 661                 M_SUB_IMM(REG_PV, REG_PC, IMM_ROTL(disp >> 10, 5));
 662                 M_SUB_IMM(REG_PV, REG_PV, IMM_ROTL(disp >> 2, 1));
 663         } else {
 664                 M_SUB_IMM(REG_PV, REG_PC, IMM_ROTL(disp >> 2, 1));
 665         }
 666 }
 667
 668
 669 /**
 670  * Generates synchronization code to enter a monitor.
 671  */
 672 #if defined(ENABLE_THREADS)
 673 void emit_monitor_enter(jitdata* jd, int32_t syncslot_offset)
 674 {
 675         int32_t disp;
 676
 677         // Get required compiler data.
 678         methodinfo*  m  = jd->m;
 679         codegendata* cd = jd->cd;
 680
 681 # if !defined(NDEBUG)
 682         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
 683                 M_STMFD(BITMASK_ARGS, REG_SP);
 684                 syncslot_offset += 4 * 4;
 685         }
 686 # endif
 687
 688         /* get the correct lock object */
 689
 690         if (m->flags & ACC_STATIC) {
 691                 disp = dseg_add_address(cd, &m->clazz->object.header);
 692                 M_DSEG_LOAD(REG_A0, disp);
 693         }
 694         else {
 695                 emit_nullpointer_check_force(cd, NULL, REG_A0);
 696         }
 697
 698         M_STR(REG_A0, REG_SP, syncslot_offset);
 699         disp = dseg_add_functionptr(cd, LOCK_monitor_enter);
 700         M_DSEG_BRANCH(disp);
 701         emit_recompute_pv(cd);
 702
 703 # if !defined(NDEBUG)
 704         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
 705                 M_LDMFD(BITMASK_ARGS, REG_SP);
 706 # endif
 707 }
 708 #endif
 709
 710
 711 /**
 712  * Generates synchronization code to leave a monitor.
 713  */
 714 #if defined(ENABLE_THREADS)
 715 void emit_monitor_exit(jitdata* jd, int32_t syncslot_offset)
 716 {
 717         int32_t disp;
 718
 719         // Get required compiler data.
 720         methodinfo*  m  = jd->m;
 721         codegendata* cd = jd->cd;
 722
 723         /* we need to save the proper return value */
 724
 725         methoddesc* md = m->parseddesc;
 726
 727         switch (md->returntype.type) {
 728         case TYPE_INT:
 729         case TYPE_ADR:
 730         case TYPE_LNG:
 731         case TYPE_FLT: /* XXX TWISTI: is that correct? */
 732         case TYPE_DBL:
 733                 M_STMFD(BITMASK_RESULT, REG_SP);
 734                 syncslot_offset += 2 * 4;
 735                 break;
 736         }
 737
 738         M_LDR(REG_A0, REG_SP, syncslot_offset);
 739         disp = dseg_add_functionptr(cd, LOCK_monitor_exit);
 740         M_DSEG_BRANCH(disp);
 741
 742         /* we no longer need PV here, no more loading */
 743         /*emit_recompute_pv(cd);*/
 744
 745         switch (md->returntype.type) {
 746         case TYPE_INT:
 747         case TYPE_ADR:
 748         case TYPE_LNG:
 749         case TYPE_FLT: /* XXX TWISTI: is that correct? */
 750         case TYPE_DBL:
 751                 M_LDMFD(BITMASK_RESULT, REG_SP);
 752                 break;
 753         }
 754 }
 755 #endif
 756
 757
 758 /* emit_verbosecall_enter ******************************************************
 759
 760    Generates the code for the call trace.
 761
 762 *******************************************************************************/
 763
 764 #if !defined(NDEBUG)
 765 void emit_verbosecall_enter(jitdata *jd)
 766 {
 767         methodinfo   *m;
 768         codegendata  *cd;
 769         registerdata *rd;
 770         methoddesc   *md;
 771         s4            disp;
 772         s4            i, s;
 773
 774         /* get required compiler data */
 775
 776         m  = jd->m;
 777         cd = jd->cd;
 778         rd = jd->rd;
 779
 780         md = m->parseddesc;
 781
 782         /* mark trace code */
 783
 784         M_NOP;
 785
 786         /* Keep stack 8-byte aligned. */
 787
 788         M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
 789         M_SUB_IMM(REG_SP, REG_SP, md->paramcount * 8);
 790
 791         /* save argument registers */
 792
 793         for (i = 0; i < md->paramcount; i++) {
 794                 if (!md->params[i].inmemory) {
 795                         s = md->params[i].regoff;
 796
 797                         switch (md->paramtypes[i].type) {
 798                         case TYPE_INT:
 799                         case TYPE_FLT:
 800                         case TYPE_ADR:
 801                                 M_IST(s, REG_SP, i * 8);
 802                                 break;
 803                         case TYPE_LNG:
 804                         case TYPE_DBL:
 805                                 M_LST(s, REG_SP, i * 8);
 806                                 break;
 807                         }
 808                 }
 809         }
 810
 811         disp = dseg_add_address(cd, m);
 812         M_DSEG_LOAD(REG_A0, disp);
 813         M_MOV(REG_A1, REG_SP);
 814         M_ADD_IMM(REG_A2, REG_SP, md->paramcount * 8 + 2 * 4 + cd->stackframesize * 8);
 815         M_LONGBRANCH(trace_java_call_enter);
 816
 817         /* restore argument registers */
 818
 819         for (i = 0; i < md->paramcount; i++) {
 820                 if (!md->params[i].inmemory) {
 821                         s = md->params[i].regoff;
 822
 823                         switch (md->paramtypes[i].type) {
 824                         case TYPE_INT:
 825                         case TYPE_FLT:
 826                         case TYPE_ADR:
 827                                 M_ILD(s, REG_SP, i * 8);
 828                                 break;
 829                         case TYPE_LNG:
 830                         case TYPE_DBL:
 831                                 M_LLD(s, REG_SP, i * 8);
 832                                 break;
 833                         }
 834                 }
 835         }
 836
 837         /* Keep stack 8-byte aligned. */
 838
 839         M_ADD_IMM(REG_SP, REG_SP, md->paramcount * 8);
 840         M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
 841
 842         /* mark trace code */
 843
 844         M_NOP;
 845 }
 846 #endif /* !defined(NDEBUG) */
 847
 848
 849 /* emit_verbosecall_exit *******************************************************
 850
 851    Generates the code for the call trace.
 852
 853 *******************************************************************************/
 854
 855 #if !defined(NDEBUG)
 856 void emit_verbosecall_exit(jitdata *jd)
 857 {
 858         methodinfo   *m;
 859         codegendata  *cd;
 860         registerdata *rd;
 861         methoddesc   *md;
 862         s4            disp;
 863
 864         /* get required compiler data */
 865
 866         m  = jd->m;
 867         cd = jd->cd;
 868         rd = jd->rd;
 869
 870         md = m->parseddesc;
 871
 872         /* mark trace code */
 873
 874         M_NOP;
 875
 876         /* Keep stack 8-byte aligned. */
 877
 878         M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
 879         M_SUB_IMM(REG_SP, REG_SP, 1 * 8);
 880
 881         /* save return value */
 882
 883         switch (md->returntype.type) {
 884         case TYPE_ADR:
 885         case TYPE_INT:
 886         case TYPE_FLT:
 887                 M_IST(REG_RESULT, REG_SP, 0 * 8);
 888                 break;
 889         case TYPE_LNG:
 890         case TYPE_DBL:
 891                 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
 892                 break;
 893         }
 894
 895         disp = dseg_add_address(cd, m);
 896         M_DSEG_LOAD(REG_A0, disp);
 897         M_MOV(REG_A1, REG_SP);
 898         M_LONGBRANCH(trace_java_call_exit);
 899
 900         /* restore return value */
 901
 902         switch (md->returntype.type) {
 903         case TYPE_ADR:
 904         case TYPE_INT:
 905         case TYPE_FLT:
 906                 M_ILD(REG_RESULT, REG_SP, 0 * 8);
 907                 break;
 908         case TYPE_LNG:
 909         case TYPE_DBL:
 910                 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 8);
 911                 break;
 912         }
 913
 914         /* Keep stack 8-byte aligned. */
 915
 916         M_ADD_IMM(REG_SP, REG_SP, 1 * 8);
 917         M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
 918
 919         /* mark trace code */
 920
 921         M_NOP;
 922 }
 923 #endif /* !defined(NDEBUG) */
 924
 925
 926 /**
 927  * Emit profiling code for method frequency counting.
 928  * Its slow but working, so be carefull, if you want to use it...
 929  */
 930 #if defined(ENABLE_PROFILING)
 931 void emit_profile_method(codegendata* cd, codeinfo* code)
 932 {
 933         ICONST(REG_ITMP3,code);
 934         M_LDR(REG_ITMP2,REG_ITMP3,OFFSET(codeinfo, frequency));
 935         M_ADD_IMM(REG_ITMP2, REG_ITMP2, 1);
 936         M_STR(REG_ITMP2,REG_ITMP3,OFFSET(codeinfo, frequency));
 937 //      M_TRAP(0, TRAP_DEBUG);
 938 }
 939
 940 #endif
 941
 942 /**
 943  * Emit profiling code for basicblock frequency counting.
 944  * Its slow but working, so be carefull, if you want to use it...
 945  */
 946 #if defined(ENABLE_PROFILING)
 947 void emit_profile_basicblock(codegendata* cd, codeinfo* code, basicblock* bptr)
 948 {
 949         ICONST(REG_ITMP3,code);
 950         M_LDR(REG_ITMP2,REG_ITMP3,OFFSET(codeinfo, bbfrequency));
 951         M_ADD_IMM(REG_ITMP2, REG_ITMP2, 1);
 952         M_STR(REG_ITMP2,REG_ITMP3,OFFSET(codeinfo, bbfrequency));
 953 }
 954 #endif
 955
 956
 957 /**
 958  * Emit profiling code to start CPU cycle counting.
 959  */
 960 #if defined(ENABLE_PROFILING)
 961 void emit_profile_cycle_start(codegendata* cd, codeinfo* code)
 962 {
 963         // XXX Not implemented yet!
 964 }
 965 #endif
 966
 967
 968 /**
 969  * Emit profiling code to stop CPU cycle counting.
 970  */
 971 #if defined(ENABLE_PROFILING)
 972 void emit_profile_cycle_stop(codegendata* cd, codeinfo* code)
 973 {
 974         // XXX Not implemented yet!
 975 }
 976 #endif
 977
 978 /*
 979  * These are local overrides for various environment variables in Emacs.
 980  * Please do not remove this and leave it at the end of the file, where
 981  * Emacs will automagically detect them.
 982  * ---------------------------------------------------------------------
 983  * Local variables:
 984  * mode: c
 985  * indent-tabs-mode: t
 986  * c-basic-offset: 4
 987  * tab-width: 4
 988  * End:
 989  * vim:noexpandtab:sw=4:ts=4:
 990  */