src/vm/jit/arm/emit.c

   1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
  26
  27 */
  28
  29
  30 #include "config.h"
  31
  32 #include <assert.h>
  33
  34 #include "vm/types.h"
  35
  36 #include "md-abi.h"
  37
  38 #include "vm/jit/arm/codegen.h"
  39
  40 #include "mm/memory.h"
  41
  42 #include "threads/lock-common.h"
  43
  44 #include "vm/builtin.h"
  45 #include "vm/exceptions.h"
  46 #include "vm/global.h"
  47
  48 #include "vm/jit/abi.h"
  49 #include "vm/jit/asmpart.h"
  50 #include "vm/jit/emit-common.h"
  51 #include "vm/jit/jit.h"
  52 #include "vm/jit/replace.h"
  53
  54 #include "toolbox/logging.h" /* XXX for debugging only */
  55
  56
  57 /* emit_load *******************************************************************
  58
  59    Emits a possible load of an operand.
  60
  61 *******************************************************************************/
  62
  63 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  64 {
  65         codegendata  *cd;
  66         s4            disp;
  67         s4            reg;
  68
  69         /* get required compiler data */
  70
  71         cd = jd->cd;
  72
  73         if (src->flags & INMEMORY) {
  74                 COUNT_SPILLS;
  75
  76                 disp = src->vv.regoff * 4;
  77
  78 #if defined(ENABLE_SOFTFLOAT)
  79                 switch (src->type) {
  80                 case TYPE_INT:
  81                 case TYPE_FLT:
  82                 case TYPE_ADR:
  83                         M_ILD(tempreg, REG_SP, disp);
  84                         break;
  85                 case TYPE_LNG:
  86                 case TYPE_DBL:
  87                         M_LLD(tempreg, REG_SP, disp);
  88                         break;
  89                 default:
  90                         vm_abort("emit_load: unknown type %d", src->type);
  91                 }
  92 #else
  93                 switch (src->type) {
  94                 case TYPE_INT:
  95                 case TYPE_ADR:
  96                         M_ILD(tempreg, REG_SP, disp);
  97                         break;
  98                 case TYPE_LNG:
  99                         M_LLD(tempreg, REG_SP, disp);
 100                         break;
 101                 case TYPE_FLT:
 102                         M_FLD(tempreg, REG_SP, disp);
 103                         break;
 104                 case TYPE_DBL:
 105                         M_DLD(tempreg, REG_SP, disp);
 106                         break;
 107                 default:
 108                         vm_abort("emit_load: unknown type %d", src->type);
 109                 }
 110 #endif
 111
 112                 reg = tempreg;
 113         }
 114         else
 115                 reg = src->vv.regoff;
 116
 117         return reg;
 118 }
 119
 120
 121 /* emit_load_low ***************************************************************
 122
 123    Emits a possible load of the low 32-bits of a long source operand.
 124
 125 *******************************************************************************/
 126
 127 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 128 {
 129         codegendata  *cd;
 130         s4            disp;
 131         s4            reg;
 132
 133         assert(src->type == TYPE_LNG);
 134
 135         /* get required compiler data */
 136
 137         cd = jd->cd;
 138
 139         if (src->flags & INMEMORY) {
 140                 COUNT_SPILLS;
 141
 142                 disp = src->vv.regoff * 4;
 143
 144 #if defined(__ARMEL__)
 145                 M_ILD(tempreg, REG_SP, disp);
 146 #else
 147                 M_ILD(tempreg, REG_SP, disp + 4);
 148 #endif
 149
 150                 reg = tempreg;
 151         }
 152         else
 153                 reg = GET_LOW_REG(src->vv.regoff);
 154
 155         return reg;
 156 }
 157
 158
 159 /* emit_load_high **************************************************************
 160
 161    Emits a possible load of the high 32-bits of a long source operand.
 162
 163 *******************************************************************************/
 164
 165 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 166 {
 167         codegendata  *cd;
 168         s4            disp;
 169         s4            reg;
 170
 171         assert(src->type == TYPE_LNG);
 172
 173         /* get required compiler data */
 174
 175         cd = jd->cd;
 176
 177         if (src->flags & INMEMORY) {
 178                 COUNT_SPILLS;
 179
 180                 disp = src->vv.regoff * 4;
 181
 182 #if defined(__ARMEL__)
 183                 M_ILD(tempreg, REG_SP, disp + 4);
 184 #else
 185                 M_ILD(tempreg, REG_SP, disp);
 186 #endif
 187
 188                 reg = tempreg;
 189         }
 190         else
 191                 reg = GET_HIGH_REG(src->vv.regoff);
 192
 193         return reg;
 194 }
 195
 196
 197 /* emit_store ******************************************************************
 198
 199    Emits a possible store to a variable.
 200
 201 *******************************************************************************/
 202
 203 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 204 {
 205         codegendata  *cd;
 206         s4            disp;
 207
 208         /* get required compiler data */
 209
 210         cd = jd->cd;
 211
 212         if (dst->flags & INMEMORY) {
 213                 COUNT_SPILLS;
 214
 215                 disp = dst->vv.regoff * 4;
 216
 217 #if defined(ENABLE_SOFTFLOAT)
 218                 switch (dst->type) {
 219                 case TYPE_INT:
 220                 case TYPE_FLT:
 221                 case TYPE_ADR:
 222                         M_IST(d, REG_SP, disp);
 223                         break;
 224                 case TYPE_LNG:
 225                 case TYPE_DBL:
 226                         M_LST(d, REG_SP, disp);
 227                         break;
 228                 default:
 229                         vm_abort("emit_store: unknown type %d", dst->type);
 230                 }
 231 #else
 232                 switch (dst->type) {
 233                 case TYPE_INT:
 234                 case TYPE_ADR:
 235                         M_IST(d, REG_SP, disp);
 236                         break;
 237                 case TYPE_LNG:
 238                         M_LST(d, REG_SP, disp);
 239                         break;
 240                 case TYPE_FLT:
 241                         M_FST(d, REG_SP, disp);
 242                         break;
 243                 case TYPE_DBL:
 244                         M_DST(d, REG_SP, disp);
 245                         break;
 246                 default:
 247                         vm_abort("emit_store: unknown type %d", dst->type);
 248                 }
 249 #endif
 250         }
 251         else if (IS_LNG_TYPE(dst->type)) {
 252 #if defined(__ARMEL__)
 253                 assert(GET_HIGH_REG(dst->vv.regoff) != REG_SPLIT);
 254 #else
 255                 assert(GET_LOW_REG(dst->vv.regoff) != REG_SPLIT);
 256 #endif
 257         }
 258 }
 259
 260
 261 /* emit_copy *******************************************************************
 262
 263    Generates a register/memory to register/memory copy.
 264
 265 *******************************************************************************/
 266
 267 void emit_copy(jitdata *jd, instruction *iptr)
 268 {
 269         codegendata *cd;
 270         varinfo     *src;
 271         varinfo     *dst;
 272         s4           s1, d;
 273
 274         /* get required compiler data */
 275
 276         cd = jd->cd;
 277
 278         /* get source and destination variables */
 279
 280         src = VAROP(iptr->s1);
 281         dst = VAROP(iptr->dst);
 282
 283         /* XXX dummy call, removed me!!! */
 284         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
 285
 286         if ((src->vv.regoff != dst->vv.regoff) ||
 287                 ((src->flags ^ dst->flags) & INMEMORY)) {
 288
 289                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 290                         /* emit nothing, as the value won't be used anyway */
 291                         return;
 292                 }
 293
 294                 /* If one of the variables resides in memory, we can eliminate
 295                    the register move from/to the temporary register with the
 296                    order of getting the destination register and the load. */
 297
 298                 if (IS_INMEMORY(src->flags)) {
 299 #if !defined(ENABLE_SOFTFLOAT)
 300                         if (IS_FLT_DBL_TYPE(src->type))
 301                                 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
 302                         else
 303 #endif
 304                         {
 305                                 if (IS_2_WORD_TYPE(src->type))
 306                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
 307                                 else
 308                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
 309                         }
 310
 311                         s1 = emit_load(jd, iptr, src, d);
 312                 }
 313                 else {
 314 #if !defined(ENABLE_SOFTFLOAT)
 315                         if (IS_FLT_DBL_TYPE(src->type))
 316                                 s1 = emit_load(jd, iptr, src, REG_FTMP1);
 317                         else
 318 #endif
 319                         {
 320                                 if (IS_2_WORD_TYPE(src->type))
 321                                         s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
 322                                 else
 323                                         s1 = emit_load(jd, iptr, src, REG_ITMP1);
 324                         }
 325
 326                         d = codegen_reg_of_var(iptr->opc, dst, s1);
 327                 }
 328
 329                 if (s1 != d) {
 330 #if defined(ENABLE_SOFTFLOAT)
 331                         switch (src->type) {
 332                         case TYPE_INT:
 333                         case TYPE_FLT:
 334                         case TYPE_ADR:
 335                                 /* XXX grrrr, wrong direction! */
 336                                 M_MOV(d, s1);
 337                                 break;
 338                         case TYPE_LNG:
 339                         case TYPE_DBL:
 340                                 /* XXX grrrr, wrong direction! */
 341                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
 342                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
 343                                 break;
 344                         default:
 345                                 vm_abort("emit_copy: unknown type %d", src->type);
 346                         }
 347 #else
 348                         switch (src->type) {
 349                         case TYPE_INT:
 350                         case TYPE_ADR:
 351                                 /* XXX grrrr, wrong direction! */
 352                                 M_MOV(d, s1);
 353                                 break;
 354                         case TYPE_LNG:
 355                                 /* XXX grrrr, wrong direction! */
 356                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
 357                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
 358                                 break;
 359                         case TYPE_FLT:
 360                                 M_FMOV(s1, d);
 361                                 break;
 362                         case TYPE_DBL:
 363                                 M_DMOV(s1, d);
 364                                 break;
 365                         default:
 366                                 vm_abort("emit_copy: unknown type %d", src->type);
 367                         }
 368 #endif
 369                 }
 370
 371                 emit_store(jd, iptr, dst, d);
 372         }
 373 }
 374
 375
 376 /* emit_iconst *****************************************************************
 377
 378    XXX
 379
 380 *******************************************************************************/
 381
 382 void emit_iconst(codegendata *cd, s4 d, s4 value)
 383 {
 384         s4 disp;
 385
 386         if (IS_IMM(value))
 387                 M_MOV_IMM(d, value);
 388         else {
 389                 disp = dseg_add_s4(cd, value);
 390                 M_DSEG_LOAD(d, disp);
 391         }
 392 }
 393
 394
 395 /* emit_branch *****************************************************************
 396
 397    Emits the code for conditional and unconditional branchs.
 398
 399 *******************************************************************************/
 400
 401 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 402 {
 403         s4 checkdisp;
 404         s4 branchdisp;
 405
 406         /* calculate the different displacements */
 407
 408         checkdisp  = (disp - 8);
 409         branchdisp = (disp - 8) >> 2;
 410
 411         /* check which branch to generate */
 412
 413         if (condition == BRANCH_UNCONDITIONAL) {
 414                 /* check displacement for overflow */
 415
 416                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
 417                         /* if the long-branches flag isn't set yet, do it */
 418
 419                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 420                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 421                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 422                         }
 423
 424                         vm_abort("emit_branch: emit unconditional long-branch code");
 425                 }
 426                 else {
 427                         M_B(branchdisp);
 428                 }
 429         }
 430         else {
 431                 /* and displacement for overflow */
 432
 433                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
 434                         /* if the long-branches flag isn't set yet, do it */
 435
 436                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 437                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 438                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 439                         }
 440
 441                         vm_abort("emit_branch: emit conditional long-branch code");
 442                 }
 443                 else {
 444                         switch (condition) {
 445                         case BRANCH_EQ:
 446                                 M_BEQ(branchdisp);
 447                                 break;
 448                         case BRANCH_NE:
 449                                 M_BNE(branchdisp);
 450                                 break;
 451                         case BRANCH_LT:
 452                                 M_BLT(branchdisp);
 453                                 break;
 454                         case BRANCH_GE:
 455                                 M_BGE(branchdisp);
 456                                 break;
 457                         case BRANCH_GT:
 458                                 M_BGT(branchdisp);
 459                                 break;
 460                         case BRANCH_LE:
 461                                 M_BLE(branchdisp);
 462                                 break;
 463                         case BRANCH_UGT:
 464                                 M_BHI(branchdisp);
 465                                 break;
 466                         default:
 467                                 vm_abort("emit_branch: unknown condition %d", condition);
 468                         }
 469                 }
 470         }
 471 }
 472
 473
 474 /* emit_arithmetic_check *******************************************************
 475
 476    Emit an ArithmeticException check.
 477
 478 *******************************************************************************/
 479
 480 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 481 {
 482         if (INSTRUCTION_MUST_CHECK(iptr)) {
 483                 CHECK_INT_REG(reg);
 484                 M_TEQ_IMM(reg, 0);
 485                 M_TRAPEQ(0, EXCEPTION_HARDWARE_ARITHMETIC);
 486         }
 487 }
 488
 489
 490 /* emit_nullpointer_check ******************************************************
 491
 492    Emit a NullPointerException check.
 493
 494 *******************************************************************************/
 495
 496 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 497 {
 498         if (INSTRUCTION_MUST_CHECK(iptr)) {
 499                 M_TST(reg, reg);
 500                 M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
 501         }
 502 }
 503
 504 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
 505 {
 506         M_TST(reg, reg);
 507         M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
 508 }
 509
 510
 511 /* emit_arrayindexoutofbounds_check ********************************************
 512
 513    Emit a ArrayIndexOutOfBoundsException check.
 514
 515 *******************************************************************************/
 516
 517 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 518 {
 519         if (INSTRUCTION_MUST_CHECK(iptr)) {
 520                 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
 521                 M_CMP(s2, REG_ITMP3);
 522                 M_TRAPHS(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
 523         }
 524 }
 525
 526
 527 /* emit_classcast_check ********************************************************
 528
 529    Emit a ClassCastException check.
 530
 531 *******************************************************************************/
 532
 533 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 534 {
 535         if (INSTRUCTION_MUST_CHECK(iptr)) {
 536                 switch (condition) {
 537                 case BRANCH_EQ:
 538                         M_TRAPEQ(s1, EXCEPTION_HARDWARE_CLASSCAST);
 539                         break;
 540
 541                 case BRANCH_LE:
 542                         M_TRAPLE(s1, EXCEPTION_HARDWARE_CLASSCAST);
 543                         break;
 544
 545                 case BRANCH_UGT:
 546                         M_TRAPHI(s1, EXCEPTION_HARDWARE_CLASSCAST);
 547                         break;
 548
 549                 default:
 550                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 551                 }
 552         }
 553 }
 554
 555 /* emit_exception_check ********************************************************
 556
 557    Emit an Exception check.
 558
 559 *******************************************************************************/
 560
 561 void emit_exception_check(codegendata *cd, instruction *iptr)
 562 {
 563         if (INSTRUCTION_MUST_CHECK(iptr)) {
 564                 M_TST(REG_RESULT, REG_RESULT);
 565                 M_TRAPEQ(0, EXCEPTION_HARDWARE_EXCEPTION);
 566         }
 567 }
 568
 569
 570 /* emit_patcher_stubs **********************************************************
 571
 572    Generates the code for the patcher stubs.
 573
 574 *******************************************************************************/
 575
 576 void emit_patcher_stubs(jitdata *jd)
 577 {
 578         codegendata *cd;
 579         patchref    *pref;
 580         u4           mcode;
 581         u1          *savedmcodeptr;
 582         u1          *tmpmcodeptr;
 583         s4           targetdisp;
 584         s4           disp;
 585
 586         /* get required compiler data */
 587
 588         cd = jd->cd;
 589
 590         /* generate patcher stub call code */
 591
 592         targetdisp = 0;
 593
 594         for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
 595                 /* check code segment size */
 596
 597                 MCODECHECK(100);
 598
 599                 /* Get machine code which is patched back in later. The
 600                    call is 1 instruction word long. */
 601
 602                 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
 603
 604                 mcode = *((u4 *) tmpmcodeptr);
 605
 606                 /* Patch in the call to call the following code (done at
 607                    compile time). */
 608
 609                 savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr              */
 610                 cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position     */
 611
 612                 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 2);
 613                 M_B(disp);
 614
 615                 cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr       */
 616
 617                 /* create stack frame (align stack to 8-byte) */
 618
 619                 M_SUB_IMM(REG_SP, REG_SP, 8 * 4);
 620
 621                 /* save itmp3 onto stack */
 622
 623                 M_STR_INTERN(REG_ITMP3, REG_SP, 6 * 4);
 624
 625                 /* calculate return address and move it onto stack */
 626                 /* ATTENTION: we can not use BL to branch to patcher stub,        */
 627                 /* ATTENTION: because we need to preserve LR for leaf methods     */
 628
 629                 disp = (s4) (((u4 *) cd->mcodeptr) - (((u4 *) tmpmcodeptr) + 1) + 2);
 630
 631                 M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_PC, disp);
 632                 M_STR_INTERN(REG_ITMP3, REG_SP, 4 * 4);
 633
 634                 /* move pointer to java_objectheader onto stack */
 635
 636 #if defined(ENABLE_THREADS)
 637                 /* order reversed because of data segment layout */
 638
 639                 (void) dseg_add_unique_address(cd, NULL);           /* flcword    */
 640                 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
 641                 disp = dseg_add_unique_address(cd, NULL);           /* vftbl      */
 642
 643                 M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_PV, -disp / 4);
 644                 M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
 645 #else
 646                 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
 647                 M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
 648 #endif
 649
 650                 /* move machine code onto stack */
 651
 652                 disp = dseg_add_unique_s4(cd, mcode);
 653                 M_DSEG_LOAD(REG_ITMP3, disp);
 654                 M_STR_INTERN(REG_ITMP3, REG_SP, 2 * 4);
 655
 656                 /* move class/method/field reference onto stack */
 657
 658                 disp = dseg_add_unique_address(cd, pref->ref);
 659                 M_DSEG_LOAD(REG_ITMP3, disp);
 660                 M_STR_INTERN(REG_ITMP3, REG_SP, 1 * 4);
 661
 662                 /* move data segment displacement onto stack */
 663
 664                 disp = dseg_add_unique_s4(cd, pref->disp);
 665                 M_DSEG_LOAD(REG_ITMP3, disp);
 666                 M_STR_INTERN(REG_ITMP3, REG_SP, 5 * 4);
 667
 668                 /* move patcher function pointer onto stack */
 669
 670                 disp = dseg_add_functionptr(cd, pref->patcher);
 671                 M_DSEG_LOAD(REG_ITMP3, disp);
 672                 M_STR_INTERN(REG_ITMP3, REG_SP, 0 * 4);
 673
 674                 /* finally call the patcher via asm_patcher_wrapper */
 675                 /* ATTENTION: don't use REG_PV here, because some patchers need it */
 676
 677                 if (targetdisp == 0) {
 678                         targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
 679
 680                         disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
 681                         /*M_DSEG_BRANCH_NOLINK(REG_PC, REG_PV, a);*/
 682                         /* TODO: this is only a hack */
 683                         M_DSEG_LOAD(REG_ITMP3, disp);
 684                         M_MOV(REG_PC, REG_ITMP3);
 685                 }
 686                 else {
 687                         disp = (((u4 *) cd->mcodebase) + targetdisp) -
 688                                 (((u4 *) cd->mcodeptr) + 2);
 689
 690                         M_B(disp);
 691                 }
 692         }
 693 }
 694
 695
 696 /* emit_replacement_stubs ******************************************************
 697
 698    Generates the code for the replacement stubs.
 699
 700 *******************************************************************************/
 701
 702 #if defined(ENABLE_REPLACEMENT)
 703 void emit_replacement_stubs(jitdata *jd)
 704 {
 705         codegendata *cd;
 706         codeinfo    *code;
 707         rplpoint    *rplp;
 708         u1          *savedmcodeptr;
 709         s4           disp;
 710         s4           i;
 711
 712         /* get required compiler data */
 713
 714         cd   = jd->cd;
 715         code = jd->code;
 716 }
 717 #endif /* defined(ENABLE_REPLACEMENT) */
 718
 719
 720 /* emit_verbosecall_enter ******************************************************
 721
 722    Generates the code for the call trace.
 723
 724 *******************************************************************************/
 725
 726 #if !defined(NDEBUG)
 727 void emit_verbosecall_enter(jitdata *jd)
 728 {
 729         methodinfo   *m;
 730         codegendata  *cd;
 731         registerdata *rd;
 732         methoddesc   *md;
 733         s4            stackframesize;
 734         s4            disp;
 735         s4            i, t, s1, s2;
 736
 737         /* get required compiler data */
 738
 739         m  = jd->m;
 740         cd = jd->cd;
 741         rd = jd->rd;
 742
 743         md = m->parseddesc;
 744
 745         /* stackframesize is changed below */
 746
 747         stackframesize = cd->stackframesize;
 748
 749         /* mark trace code */
 750
 751         M_NOP;
 752
 753         /* Save argument registers to stack (including LR and PV).  Keep
 754            stack 8-byte aligned. */
 755
 756         M_STMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
 757         M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* space for a3, a4 and m */
 758
 759         stackframesize += 6 + 2 + 2 + 1 + 1;
 760
 761         /* prepare args for tracer */
 762
 763         i = md->paramcount - 1;
 764
 765         if (i > 3)
 766                 i = 3;
 767
 768         for (; i >= 0; i--) {
 769                 t = md->paramtypes[i].type;
 770
 771                 /* load argument into register (s1) and make it of TYPE_LNG */
 772
 773                 if (!md->params[i].inmemory) {
 774                         s1 = md->params[i].regoff;
 775
 776                         if (!IS_2_WORD_TYPE(t)) {
 777                                 M_MOV_IMM(REG_ITMP1, 0);
 778                                 s1 = PACK_REGS(s1, REG_ITMP1);
 779                         }
 780                         else {
 781                                 SPLIT_OPEN(t, s1, REG_ITMP1);
 782                                 SPLIT_LOAD(t, s1, stackframesize);
 783                         }
 784                 }
 785                 else {
 786                         s1 = REG_ITMP12_PACKED;
 787                         s2 = md->params[i].regoff + stackframesize;
 788
 789                         if (IS_2_WORD_TYPE(t))
 790                                 M_LLD(s1, REG_SP, s2 * 4);
 791                         else {
 792                                 M_ILD(GET_LOW_REG(s1), REG_SP, s2 * 4);
 793                                 M_MOV_IMM(GET_HIGH_REG(s1), 0);
 794                         }
 795                 }
 796
 797                 /* place argument for tracer */
 798
 799                 if (i < 2) {
 800 #if defined(__ARMEL__)
 801                         s2 = PACK_REGS(abi_registers_integer_argument[i * 2],
 802                                                    abi_registers_integer_argument[i * 2 + 1]);
 803 #else /* defined(__ARMEB__) */
 804                         s2 = PACK_REGS(abi_registers_integer_argument[i * 2 + 1],
 805                                                    abi_registers_integer_argument[i * 2]);
 806 #endif
 807                         M_LNGMOVE(s1, s2);
 808                 }
 809                 else {
 810                         s2 = (i - 2) * 2;
 811                         M_LST(s1, REG_SP, s2 * 4);
 812                 }
 813         }
 814
 815         /* prepare methodinfo pointer for tracer */
 816
 817         disp = dseg_add_address(cd, m);
 818         M_DSEG_LOAD(REG_ITMP1, disp);
 819         M_STR_INTERN(REG_ITMP1, REG_SP, 16);
 820
 821         /* call tracer here (we use a long branch) */
 822
 823         M_LONGBRANCH(builtin_verbosecall_enter);
 824
 825         /* Restore argument registers from stack.  Keep stack 8-byte
 826            aligned. */
 827
 828         M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4);    /* free argument stack */
 829         M_LDMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
 830
 831         /* mark trace code */
 832
 833         M_NOP;
 834 }
 835 #endif /* !defined(NDEBUG) */
 836
 837
 838 /* emit_verbosecall_exit *******************************************************
 839
 840    Generates the code for the call trace.
 841
 842    void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
 843
 844 *******************************************************************************/
 845
 846 #if !defined(NDEBUG)
 847 void emit_verbosecall_exit(jitdata *jd)
 848 {
 849         methodinfo   *m;
 850         codegendata  *cd;
 851         registerdata *rd;
 852         methoddesc   *md;
 853         s4            disp;
 854
 855         /* get required compiler data */
 856
 857         m  = jd->m;
 858         cd = jd->cd;
 859         rd = jd->rd;
 860
 861         md = m->parseddesc;
 862
 863         /* mark trace code */
 864
 865         M_NOP;
 866
 867         /* Keep stack 8-byte aligned. */
 868
 869         M_STMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
 870         M_SUB_IMM(REG_SP, REG_SP, (1 + 1) * 4);              /* space for f and m */
 871
 872         switch (md->returntype.type) {
 873         case TYPE_ADR:
 874         case TYPE_INT:
 875                 M_INTMOVE(REG_RESULT, GET_LOW_REG(REG_A0_A1_PACKED));
 876                 M_MOV_IMM(GET_HIGH_REG(REG_A0_A1_PACKED), 0);
 877                 break;
 878
 879         case TYPE_LNG:
 880                 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
 881                 break;
 882
 883         case TYPE_FLT:
 884                 M_IST(REG_RESULT, REG_SP, 0 * 4);
 885                 break;
 886
 887         case TYPE_DBL:
 888                 M_LNGMOVE(REG_RESULT_PACKED, REG_A2_A3_PACKED);
 889                 break;
 890         }
 891
 892         disp = dseg_add_address(cd, m);
 893         M_DSEG_LOAD(REG_ITMP1, disp);
 894         M_AST(REG_ITMP1, REG_SP, 1 * 4);
 895         M_LONGBRANCH(builtin_verbosecall_exit);
 896
 897         /* Keep stack 8-byte aligned. */
 898
 899         M_ADD_IMM(REG_SP, REG_SP, (1 + 1) * 4);            /* free argument stack */
 900         M_LDMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
 901
 902         /* mark trace code */
 903
 904         M_NOP;
 905 }
 906 #endif /* !defined(NDEBUG) */
 907
 908
 909 /*
 910  * These are local overrides for various environment variables in Emacs.
 911  * Please do not remove this and leave it at the end of the file, where
 912  * Emacs will automagically detect them.
 913  * ---------------------------------------------------------------------
 914  * Local variables:
 915  * mode: c
 916  * indent-tabs-mode: t
 917  * c-basic-offset: 4
 918  * tab-width: 4
 919  * End:
 920  * vim:noexpandtab:sw=4:ts=4:
 921  */