1 /* src/vm/jit/arm/codegen.c - machine code generator for Arm
3 Copyright (C) 1996-2005, 2006, 2007, 2008, 2009, 2010
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
35 #include "vm/jit/arm/arch.h"
36 #include "vm/jit/arm/codegen.h"
38 #include "mm/memory.hpp"
40 #include "native/localref.hpp"
41 #include "native/native.hpp"
43 #include "threads/lock.hpp"
45 #include "vm/jit/builtin.hpp"
46 #include "vm/exceptions.hpp"
47 #include "vm/global.h"
48 #include "vm/loader.hpp"
49 #include "vm/options.h"
52 #include "vm/jit/abi.h"
53 #include "vm/jit/asmpart.h"
54 #include "vm/jit/codegen-common.hpp"
55 #include "vm/jit/dseg.h"
56 #include "vm/jit/emit-common.hpp"
57 #include "vm/jit/jit.hpp"
58 #include "vm/jit/linenumbertable.hpp"
59 #include "vm/jit/methodheader.h"
60 #include "vm/jit/parse.hpp"
61 #include "vm/jit/patcher-common.hpp"
62 #include "vm/jit/reg.h"
66 * Generates machine code for the method prolog.
68 void codegen_emit_prolog(jitdata* jd)
77 // Get required compiler data.
78 methodinfo* m = jd->m;
79 codeinfo* code = jd->code;
80 codegendata* cd = jd->cd;
81 registerdata* rd = jd->rd;
83 int32_t savedregs_num = 0;
84 uint32_t savedregs_bitmask = 0;
86 if (!code_is_leafmethod(code)) {
88 savedregs_bitmask = (1<<REG_LR);
91 for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
93 savedregs_bitmask |= (1<<(rd->savintregs[i]));
97 for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
98 vm_abort("codegen_emit_prolog: Floating-point callee saved registers are not saved to stack");
102 /* save return address and used callee saved registers */
104 if (savedregs_bitmask != 0)
105 M_STMFD(savedregs_bitmask, REG_SP);
107 /* create additional stack frame for spilled variables (if necessary) */
109 int32_t additional_bytes = (cd->stackframesize * 8 - savedregs_num * 4);
111 if (additional_bytes > 0)
112 M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, additional_bytes / 4);
114 /* take arguments out of register or stack frame */
117 for (i = 0, len = 0; i < md->paramcount; i++) {
118 s1 = md->params[i].regoff;
119 t = md->paramtypes[i].type;
121 varindex = jd->local_map[len * 5 + t];
123 len += (IS_2_WORD_TYPE(t)) ? 2 : 1; /* 2 word type arguments */
125 if (varindex == UNUSED)
130 /* ATTENTION: we use interger registers for all arguments (even float) */
131 #if !defined(ENABLE_SOFTFLOAT)
132 if (IS_INT_LNG_TYPE(t)) {
134 if (!md->params[i].inmemory) {
135 if (!(var->flags & INMEMORY)) {
136 if (IS_2_WORD_TYPE(t))
137 M_LNGMOVE(s1, var->vv.regoff);
139 M_INTMOVE(s1, var->vv.regoff);
142 if (IS_2_WORD_TYPE(t))
143 M_LST(s1, REG_SP, var->vv.regoff);
145 M_IST(s1, REG_SP, var->vv.regoff);
148 else { /* stack arguments */
149 if (!(var->flags & INMEMORY)) { /* stack arg -> register */
150 if (IS_2_WORD_TYPE(t))
151 M_LLD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1);
153 M_ILD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1);
155 else { /* stack arg -> spilled */
156 /* Reuse Memory Position on Caller Stack */
157 var->vv.regoff = cd->stackframesize * 8 + s1;
160 #if !defined(ENABLE_SOFTFLOAT)
163 if (!md->params[i].inmemory) {
164 if (!(var->flags & INMEMORY)) {
165 if (IS_2_WORD_TYPE(t))
166 M_CAST_L2D(s1, var->vv.regoff);
168 M_CAST_I2F(s1, var->vv.regoff);
171 if (IS_2_WORD_TYPE(t))
172 M_LST(s1, REG_SP, var->vv.regoff);
174 M_IST(s1, REG_SP, var->vv.regoff);
178 if (!(var->flags & INMEMORY)) {
179 if (IS_2_WORD_TYPE(t))
180 M_DLD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1);
182 M_FLD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1);
185 /* Reuse Memory Position on Caller Stack */
186 var->vv.regoff = cd->stackframesize * 8 + s1;
190 #endif /* !defined(ENABLE_SOFTFLOAT) */
196 * Generates machine code for the method epilog.
198 void codegen_emit_epilog(jitdata* jd)
202 // Get required compiler data.
203 codeinfo* code = jd->code;
204 codegendata* cd = jd->cd;
205 registerdata* rd = jd->rd;
207 int32_t savedregs_num = 0;
208 uint32_t savedregs_bitmask = 0;
210 if (!code_is_leafmethod(code)) {
212 savedregs_bitmask = (1<<REG_LR);
215 for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
217 savedregs_bitmask |= (1<<(rd->savintregs[i]));
220 /* deallocate stackframe for spilled variables */
222 int32_t additional_bytes = (cd->stackframesize * 8 - savedregs_num * 4);
224 if (additional_bytes > 0)
225 M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, additional_bytes / 4);
227 /* restore callee saved registers + do return */
229 if (savedregs_bitmask) {
230 if (!code_is_leafmethod(code)) {
231 savedregs_bitmask &= ~(1<<REG_LR);
232 savedregs_bitmask |= (1<<REG_PC);
234 M_LDMFD(savedregs_bitmask, REG_SP);
237 /* if LR was not on stack, we need to return manually */
239 if (code_is_leafmethod(code))
240 M_MOV(REG_PC, REG_LR);
245 * Generates machine code for one ICMD.
247 void codegen_emit_instruction(jitdata* jd, instruction* iptr)
250 builtintable_entry* bte;
251 methodinfo* lm; // Local methodinfo for ICMD_INVOKE*.
252 unresolved_method* um;
254 unresolved_field* uf;
256 int32_t s1, s2, s3, d;
259 // Get required compiler data.
260 codegendata* cd = jd->cd;
265 /* constant operations ************************************************/
267 case ICMD_ACONST: /* ... ==> ..., constant */
269 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
270 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
271 disp = dseg_add_unique_address(cd, NULL);
273 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
274 iptr->sx.val.c.ref, disp);
276 M_DSEG_LOAD(d, disp);
279 ICONST(d, (u4) iptr->sx.val.anyptr);
281 emit_store_dst(jd, iptr, d);
284 case ICMD_FCONST: /* ... ==> ..., constant */
286 #if defined(ENABLE_SOFTFLOAT)
287 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
288 ICONST(d, iptr->sx.val.i);
289 emit_store_dst(jd, iptr, d);
291 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
292 FCONST(d, iptr->sx.val.f);
293 emit_store_dst(jd, iptr, d);
297 case ICMD_DCONST: /* ... ==> ..., constant */
299 #if defined(ENABLE_SOFTFLOAT)
300 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
301 LCONST(d, iptr->sx.val.l);
302 emit_store_dst(jd, iptr, d);
304 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
305 DCONST(d, iptr->sx.val.d);
306 emit_store_dst(jd, iptr, d);
311 /* integer operations *************************************************/
313 case ICMD_INT2BYTE: /* ..., value ==> ..., value */
315 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
316 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
317 M_MOV(d, REG_LSL(s1, 24));
318 M_MOV(d, REG_ASR(d, 24));
319 emit_store_dst(jd, iptr, d);
322 case ICMD_INT2CHAR: /* ..., value ==> ..., value */
324 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
325 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
326 M_MOV(d, REG_LSL(s1, 16));
327 M_MOV(d, REG_LSR(d, 16)); /* ATTENTION: char is unsigned */
328 emit_store_dst(jd, iptr, d);
331 case ICMD_INT2SHORT: /* ..., value ==> ..., value */
333 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
334 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
335 M_MOV(d, REG_LSL(s1, 16));
336 M_MOV(d, REG_ASR(d, 16));
337 emit_store_dst(jd, iptr, d);
340 case ICMD_I2L: /* ..., value ==> ..., value */
342 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
343 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
344 M_INTMOVE(s1, GET_LOW_REG(d));
345 M_MOV(GET_HIGH_REG(d), REG_ASR(s1, 31));
346 emit_store_dst(jd, iptr, d);
349 case ICMD_L2I: /* ..., value ==> ..., value */
351 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
352 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
354 emit_store_dst(jd, iptr, d);
357 case ICMD_INEG: /* ..., value ==> ..., - value */
359 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
360 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
362 emit_store_dst(jd, iptr, d);
365 case ICMD_LNEG: /* ..., value ==> ..., - value */
367 s1 = emit_load_s1(jd, iptr, REG_ITMP12_PACKED);
368 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
369 M_RSB_IMMS(GET_LOW_REG(d), GET_LOW_REG(s1), 0);
370 M_RSC_IMM(GET_HIGH_REG(d), GET_HIGH_REG(s1), 0);
371 emit_store_dst(jd, iptr, d);
374 case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */
376 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
377 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
378 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
380 emit_store_dst(jd, iptr, d);
383 case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */
385 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
386 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
387 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
388 M_ADD_S(GET_LOW_REG(d), s1, s2);
389 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
390 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
391 M_ADC(GET_HIGH_REG(d), s1, s2);
392 emit_store_dst(jd, iptr, d);
398 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
399 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
401 if (IS_IMM(iptr->sx.val.i)) {
402 M_ADD_IMM(d, s1, iptr->sx.val.i);
403 } else if (IS_IMM(-iptr->sx.val.i)) {
404 M_SUB_IMM(d, s1, (-iptr->sx.val.i));
406 ICONST(REG_ITMP3, iptr->sx.val.i);
407 M_ADD(d, s1, REG_ITMP3);
410 emit_store_dst(jd, iptr, d);
413 case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */
414 /* sx.val.l = constant */
416 s3 = iptr->sx.val.l & 0xffffffff;
417 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
418 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
420 M_ADD_IMMS(GET_LOW_REG(d), s1, s3);
422 ICONST(REG_ITMP3, s3);
423 M_ADD_S(GET_LOW_REG(d), s1, REG_ITMP3);
425 s3 = iptr->sx.val.l >> 32;
426 s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
428 M_ADC_IMM(GET_HIGH_REG(d), s1, s3);
430 ICONST(REG_ITMP3, s3);
431 M_ADC(GET_HIGH_REG(d), s1, REG_ITMP3);
433 emit_store_dst(jd, iptr, d);
436 case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */
438 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
439 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
440 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
442 emit_store_dst(jd, iptr, d);
445 case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
447 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
448 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
449 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
450 M_SUB_S(GET_LOW_REG(d), s1, s2);
451 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
452 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
453 M_SBC(GET_HIGH_REG(d), s1, s2);
454 emit_store_dst(jd, iptr, d);
457 case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */
458 /* sx.val.i = constant */
460 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
461 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
462 if (IS_IMM(iptr->sx.val.i))
463 M_SUB_IMM(d, s1, iptr->sx.val.i);
465 ICONST(REG_ITMP3, iptr->sx.val.i);
466 M_SUB(d, s1, REG_ITMP3);
468 emit_store_dst(jd, iptr, d);
471 case ICMD_LSUBCONST: /* ..., value ==> ..., value - constant */
472 /* sx.val.l = constant */
474 s3 = iptr->sx.val.l & 0xffffffff;
475 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
476 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
478 M_SUB_IMMS(GET_LOW_REG(d), s1, s3);
480 ICONST(REG_ITMP3, s3);
481 M_SUB_S(GET_LOW_REG(d), s1, REG_ITMP3);
483 s3 = iptr->sx.val.l >> 32;
484 s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
486 M_SBC_IMM(GET_HIGH_REG(d), s1, s3);
488 ICONST(REG_ITMP3, s3);
489 M_SBC(GET_HIGH_REG(d), s1, REG_ITMP3);
491 emit_store_dst(jd, iptr, d);
494 case ICMD_IMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
496 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
497 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
498 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
500 emit_store_dst(jd, iptr, d);
503 case ICMD_IDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
504 case ICMD_IREM: /* ..., val1, val2 ==> ..., val1 % val2 */
506 s1 = emit_load_s1(jd, iptr, REG_A0);
507 s2 = emit_load_s2(jd, iptr, REG_A1);
508 emit_arithmetic_check(cd, iptr, s2);
510 /* move arguments into argument registers */
511 M_INTMOVE(s1, REG_A0);
512 M_INTMOVE(s2, REG_A1);
514 /* call builtin function */
515 bte = iptr->sx.s23.s3.bte;
516 disp = dseg_add_functionptr(cd, bte->fp);
520 emit_recompute_pv(cd);
522 /* move result into destination register */
523 d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
524 M_INTMOVE(REG_RESULT, d);
525 emit_store_dst(jd, iptr, d);
528 case ICMD_LDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
529 case ICMD_LREM: /* ..., val1, val2 ==> ..., val1 % val2 */
531 /* move arguments into argument registers */
533 s1 = emit_load_s1(jd, iptr, REG_A0_A1_PACKED);
534 s2 = emit_load_s2(jd, iptr, REG_A2_A3_PACKED);
535 /* XXX TODO: only do this if arithmetic check is really done! */
536 M_ORR(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
537 emit_arithmetic_check(cd, iptr, REG_ITMP3);
539 M_LNGMOVE(s1, REG_A0_A1_PACKED);
540 M_LNGMOVE(s2, REG_A2_A3_PACKED);
542 /* call builtin function */
543 bte = iptr->sx.s23.s3.bte;
544 disp = dseg_add_functionptr(cd, bte->fp);
548 emit_recompute_pv(cd);
550 /* move result into destination register */
551 d = codegen_reg_of_dst(jd, iptr, REG_RESULT_PACKED);
552 M_LNGMOVE(REG_RESULT_PACKED, d);
553 emit_store_dst(jd, iptr, d);
556 case ICMD_IMULPOW2: /* ..., value ==> ..., value * (2 ^ constant) */
557 /* sx.val.i = constant */
559 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
560 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
561 M_MOV(d, REG_LSL(s1, iptr->sx.val.i));
562 emit_store_dst(jd, iptr, d);
565 case ICMD_IDIVPOW2: /* ..., value ==> ..., value / (2 ^ constant) */
566 /* sx.val.i = constant */
568 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
569 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
570 /* this rounds towards 0 as java likes it */
571 M_MOV(REG_ITMP3, REG_ASR(s1, 31));
572 M_ADD(REG_ITMP3, s1, REG_LSR(REG_ITMP3, 32 - iptr->sx.val.i));
573 M_MOV(d, REG_ASR(REG_ITMP3, iptr->sx.val.i));
574 /* this rounds towards nearest, not java style */
575 /*M_MOV_S(d, REG_ASR(s1, iptr->sx.val.i));
576 M_ADCMI_IMM(d, d, 0);*/
577 emit_store_dst(jd, iptr, d);
580 case ICMD_IREMPOW2: /* ..., value ==> ..., value % constant */
581 /* sx.val.i = constant [ (2 ^ x) - 1 ] */
583 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
584 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
585 M_MOV_S(REG_ITMP1, s1);
586 M_RSBMI_IMM(REG_ITMP1, REG_ITMP1, 0);
587 if (IS_IMM(iptr->sx.val.i))
588 M_AND_IMM(REG_ITMP1, iptr->sx.val.i, d);
590 ICONST(REG_ITMP3, iptr->sx.val.i);
591 M_AND(REG_ITMP1, REG_ITMP3, d);
593 M_RSBMI_IMM(d, d, 0);
594 emit_store_dst(jd, iptr, d);
597 case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */
599 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
600 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
601 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
602 M_AND_IMM(s2, 0x1f, REG_ITMP2);
603 M_MOV(d, REG_LSL_REG(s1, REG_ITMP2));
604 emit_store_dst(jd, iptr, d);
607 case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
609 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
610 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
611 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
612 M_AND_IMM(s2, 0x1f, REG_ITMP2);
613 M_MOV(d, REG_ASR_REG(s1, REG_ITMP2));
614 emit_store_dst(jd, iptr, d);
617 case ICMD_IUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
619 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
620 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
621 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
622 M_AND_IMM(s2, 0x1f, REG_ITMP2);
623 M_MOV(d, REG_LSR_REG(s1, REG_ITMP2));
624 emit_store_dst(jd, iptr, d);
627 case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */
628 /* sx.val.i = constant */
630 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
631 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
632 M_MOV(d, REG_LSL(s1, iptr->sx.val.i & 0x1f));
633 emit_store_dst(jd, iptr, d);
636 case ICMD_ISHRCONST: /* ..., value ==> ..., value >> constant */
637 /* sx.val.i = constant */
639 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
640 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
641 /* we need to check for zero here because arm interprets it as SHR by 32 */
642 if ((iptr->sx.val.i & 0x1f) == 0) {
645 M_MOV(d, REG_ASR(s1, iptr->sx.val.i & 0x1f));
647 emit_store_dst(jd, iptr, d);
650 case ICMD_IUSHRCONST: /* ..., value ==> ..., value >>> constant */
651 /* sx.val.i = constant */
653 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
654 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
655 /* we need to check for zero here because arm interprets it as SHR by 32 */
656 if ((iptr->sx.val.i & 0x1f) == 0)
659 M_MOV(d, REG_LSR(s1, iptr->sx.val.i & 0x1f));
660 emit_store_dst(jd, iptr, d);
663 case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */
665 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
666 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
667 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
669 emit_store_dst(jd, iptr, d);
672 case ICMD_LAND: /* ..., val1, val2 ==> ..., val1 & val2 */
674 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
675 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
676 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
677 M_AND(s1, s2, GET_LOW_REG(d));
678 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
679 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
680 M_AND(s1, s2, GET_HIGH_REG(d));
681 emit_store_dst(jd, iptr, d);
684 case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */
686 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
687 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
688 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
690 emit_store_dst(jd, iptr, d);
693 case ICMD_LOR: /* ..., val1, val2 ==> ..., val1 | val2 */
695 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
696 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
697 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
698 M_ORR(s1, s2, GET_LOW_REG(d));
699 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
700 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
701 M_ORR(s1, s2, GET_HIGH_REG(d));
702 emit_store_dst(jd, iptr, d);
705 case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
707 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
708 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
709 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
711 emit_store_dst(jd, iptr, d);
714 case ICMD_LXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
716 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
717 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
718 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
719 M_EOR(s1, s2, GET_LOW_REG(d));
720 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
721 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
722 M_EOR(s1, s2, GET_HIGH_REG(d));
723 emit_store_dst(jd, iptr, d);
727 /* floating operations ************************************************/
729 #if !defined(ENABLE_SOFTFLOAT)
731 case ICMD_FNEG: /* ..., value ==> ..., - value */
733 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
734 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
736 emit_store_dst(jd, iptr, d);
739 case ICMD_FADD: /* ..., val1, val2 ==> ..., val1 + val2 */
741 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
742 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
743 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
745 emit_store_dst(jd, iptr, d);
748 case ICMD_FSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
750 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
751 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
752 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
754 emit_store_dst(jd, iptr, d);
757 case ICMD_FMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
759 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
760 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
761 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
763 emit_store_dst(jd, iptr, d);
766 case ICMD_FDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
767 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
768 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
769 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
771 emit_store_dst(jd, iptr, d);
774 /* ATTENTION: Jave does not want IEEE behaviour in FREM, do
778 case ICMD_FREM: /* ..., val1, val2 ==> ..., val1 % val2 */
780 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
781 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
782 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
784 emit_store_dst(jd, iptr, d);
788 case ICMD_DNEG: /* ..., value ==> ..., - value */
790 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
791 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
793 emit_store_dst(jd, iptr, d);
796 case ICMD_DADD: /* ..., val1, val2 ==> ..., val1 + val2 */
798 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
799 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
800 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
802 emit_store_dst(jd, iptr, d);
805 case ICMD_DSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
807 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
808 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
809 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
811 emit_store_dst(jd, iptr, d);
814 case ICMD_DMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
816 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
817 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
818 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
820 emit_store_dst(jd, iptr, d);
823 case ICMD_DDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
825 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
826 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
827 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
829 emit_store_dst(jd, iptr, d);
832 /* ATTENTION: Jave does not want IEEE behaviour in DREM, do
836 case ICMD_DREM: /* ..., val1, val2 ==> ..., val1 % val2 */
838 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
839 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
840 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
842 emit_store_dst(jd, iptr, d);
846 case ICMD_I2F: /* ..., value ==> ..., (float) value */
848 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
849 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
850 #if defined(__VFP_FP__)
856 emit_store_dst(jd, iptr, d);
859 case ICMD_I2D: /* ..., value ==> ..., (double) value */
861 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
862 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
863 #if defined(__VFP_FP__)
869 emit_store_dst(jd, iptr, d);
872 case ICMD_F2I: /* ..., value ==> ..., (int) value */
874 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
875 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
876 #if defined(__VFP_FP__)
877 M_CVTFI(s1, REG_FTMP2);
878 M_FMRS(REG_FTMP2, d);
880 /* this uses round towards zero, as Java likes it */
882 /* this checks for NaN; to return zero as Java likes it */
886 emit_store_dst(jd, iptr, d);
889 case ICMD_D2I: /* ..., value ==> ..., (int) value */
891 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
892 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
893 #if defined(__VFP_FP__)
894 M_CVTDI(s1, REG_FTMP2);
895 M_FMRS(REG_FTMP2, d);
897 /* this uses round towards zero, as Java likes it */
899 /* this checks for NaN; to return zero as Java likes it */
903 emit_store_dst(jd, iptr, d);
906 case ICMD_D2F: /* ..., value ==> ..., (float) value */
908 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
909 d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
911 emit_store_dst(jd, iptr, d);
914 case ICMD_F2D: /* ..., value ==> ..., (double) value */
916 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
917 d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
919 emit_store_dst(jd, iptr, d);
922 case ICMD_FCMPG: /* ..., val1, val2 ==> ..., val1 fcmpg val2 */
924 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
925 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
926 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
929 #if defined(__VFP_FP__)
930 M_FMSTAT; /* on VFP we need to transfer the flags */
932 M_SUBGT_IMM(d, d, 1);
933 M_ADDLT_IMM(d, d, 1);
934 emit_store_dst(jd, iptr, d);
937 case ICMD_DCMPG: /* ..., val1, val2 ==> ..., val1 dcmpg val2 */
939 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
940 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
941 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
944 #if defined(__VFP_FP__)
945 M_FMSTAT; /* on VFP we need to transfer the flags */
947 M_SUBGT_IMM(d, d, 1);
948 M_ADDLT_IMM(d, d, 1);
949 emit_store_dst(jd, iptr, d);
952 case ICMD_FCMPL: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
954 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
955 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
956 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
959 #if defined(__VFP_FP__)
960 M_FMSTAT; /* on VFP we need to transfer the flags */
962 M_SUBLT_IMM(d, d, 1);
963 M_ADDGT_IMM(d, d, 1);
964 emit_store_dst(jd, iptr, d);
967 case ICMD_DCMPL: /* ..., val1, val2 ==> ..., val1 dcmpl val2 */
969 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
970 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
971 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
974 #if defined(__VFP_FP__)
975 M_FMSTAT; /* on VFP we need to transfer the flags */
977 M_SUBLT_IMM(d, d, 1);
978 M_ADDGT_IMM(d, d, 1);
979 emit_store_dst(jd, iptr, d);
982 #endif /* !defined(ENABLE_SOFTFLOAT) */
985 /* memory operations **************************************************/
987 case ICMD_BALOAD: /* ..., arrayref, index ==> ..., value */
989 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
990 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
991 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
992 /* implicit null-pointer check */
993 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
994 M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
995 M_LDRSB(d, REG_ITMP1, OFFSET(java_bytearray_t, data[0]));
996 emit_store_dst(jd, iptr, d);
999 case ICMD_CALOAD: /* ..., arrayref, index ==> ..., value */
1001 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1002 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1003 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1004 /* implicit null-pointer check */
1005 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1006 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1007 M_LDRH(d, REG_ITMP1, OFFSET(java_chararray_t, data[0]));
1008 emit_store_dst(jd, iptr, d);
1011 case ICMD_SALOAD: /* ..., arrayref, index ==> ..., value */
1013 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1014 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1015 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1016 /* implicit null-pointer check */
1017 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1018 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1019 M_LDRSH(d, REG_ITMP1, OFFSET(java_shortarray_t, data[0]));
1020 emit_store_dst(jd, iptr, d);
1023 case ICMD_IALOAD: /* ..., arrayref, index ==> ..., value */
1025 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1026 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1027 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1028 /* implicit null-pointer check */
1029 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1030 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1031 M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_intarray_t, data[0]));
1032 emit_store_dst(jd, iptr, d);
1035 case ICMD_LALOAD: /* ..., arrayref, index ==> ..., value */
1037 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1038 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1039 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1040 /* implicit null-pointer check */
1041 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1042 M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1043 M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_longarray_t, data[0]));
1044 emit_store_dst(jd, iptr, d);
1047 case ICMD_FALOAD: /* ..., arrayref, index ==> ..., value */
1049 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1050 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1051 /* implicit null-pointer check */
1052 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1053 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1054 #if !defined(ENABLE_SOFTFLOAT)
1055 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1056 M_FLD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray_t, data[0]));
1058 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1059 M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray_t, data[0]));
1061 emit_store_dst(jd, iptr, d);
1064 case ICMD_DALOAD: /* ..., arrayref, index ==> ..., value */
1066 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1067 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1068 /* implicit null-pointer check */
1069 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1070 M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1071 #if !defined(ENABLE_SOFTFLOAT)
1072 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1073 M_DLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray_t, data[0]));
1075 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1076 M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray_t, data[0]));
1078 emit_store_dst(jd, iptr, d);
1081 case ICMD_AALOAD: /* ..., arrayref, index ==> ..., value */
1083 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1084 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1085 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1086 /* implicit null-pointer check */
1087 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1088 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1089 M_LDR_INTERN(d, REG_ITMP1, OFFSET(java_objectarray_t, data[0]));
1090 emit_store_dst(jd, iptr, d);
1093 case ICMD_BASTORE: /* ..., arrayref, index, value ==> ... */
1095 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1096 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1097 /* implicit null-pointer check */
1098 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1099 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1100 M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
1101 M_STRB(s3, REG_ITMP1, OFFSET(java_bytearray_t, data[0]));
1104 case ICMD_CASTORE: /* ..., arrayref, index, value ==> ... */
1106 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1107 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1108 /* implicit null-pointer check */
1109 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1110 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1111 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1112 M_STRH(s3, REG_ITMP1, OFFSET(java_chararray_t, data[0]));
1115 case ICMD_SASTORE: /* ..., arrayref, index, value ==> ... */
1117 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1118 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1119 /* implicit null-pointer check */
1120 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1121 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1122 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1123 M_STRH(s3, REG_ITMP1, OFFSET(java_shortarray_t, data[0]));
1126 case ICMD_IASTORE: /* ..., arrayref, index, value ==> ... */
1128 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1129 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1130 /* implicit null-pointer check */
1131 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1132 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1133 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1134 M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_intarray_t, data[0]));
1137 case ICMD_LASTORE: /* ..., arrayref, index, value ==> ... */
1139 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1140 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1141 /* implicit null-pointer check */
1142 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1143 M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1144 s3 = emit_load_s3(jd, iptr, REG_ITMP12_PACKED);
1145 M_LST_INTERN(s3, REG_ITMP3, OFFSET(java_longarray_t, data[0]));
1148 case ICMD_FASTORE: /* ..., arrayref, index, value ==> ... */
1150 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1151 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1152 /* implicit null-pointer check */
1153 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1154 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1155 #if !defined(ENABLE_SOFTFLOAT)
1156 s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1157 M_FST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray_t, data[0]));
1159 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1160 M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray_t, data[0]));
1164 case ICMD_DASTORE: /* ..., arrayref, index, value ==> ... */
1166 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1167 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1168 /* implicit null-pointer check */
1169 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1170 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 3)); /* REG_ITMP1 = s1 + 8 * s2 */
1171 #if !defined(ENABLE_SOFTFLOAT)
1172 s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1173 M_DST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray_t, data[0]));
1175 s3 = emit_load_s3(jd, iptr, REG_ITMP23_PACKED);
1176 M_LST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray_t, data[0]));
1180 case ICMD_AASTORE: /* ..., arrayref, index, value ==> ... */
1182 s1 = emit_load_s1(jd, iptr, REG_A0);
1183 s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1184 s3 = emit_load_s3(jd, iptr, REG_A1);
1186 /* implicit null-pointer check */
1187 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1189 /* move arguments to argument registers */
1190 M_INTMOVE(s1, REG_A0);
1191 M_INTMOVE(s3, REG_A1);
1193 /* call builtin function */
1194 disp = dseg_add_functionptr(cd, BUILTIN_FAST_canstore);
1195 M_DSEG_BRANCH(disp);
1198 emit_recompute_pv(cd);
1200 /* check resturn value of builtin */
1201 emit_arraystore_check(cd, iptr);
1203 /* finally store address into array */
1204 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1205 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1206 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1207 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1208 M_STR_INTERN(s3, REG_ITMP1, OFFSET(java_objectarray_t, data[0]));
1211 case ICMD_GETSTATIC: /* ... ==> ..., value */
1212 switch (fieldtype) {
1214 #if defined(ENABLE_SOFTFLOAT)
1218 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1219 M_ILD_INTERN(d, REG_ITMP3, 0);
1222 #if defined(ENABLE_SOFTFLOAT)
1225 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1226 M_LLD_INTERN(d, REG_ITMP3, 0);
1228 #if !defined(ENABLE_SOFTFLOAT)
1230 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1231 M_FLD_INTERN(d, REG_ITMP3, 0);
1234 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1235 M_DLD_INTERN(d, REG_ITMP3, 0);
1241 emit_store_dst(jd, iptr, d);
1244 case ICMD_GETFIELD: /* ..., objectref, value ==> ... */
1246 s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1247 emit_nullpointer_check(cd, iptr, s1);
1250 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1251 uf = iptr->sx.s23.s3.uf;
1252 fieldtype = uf->fieldref->parseddesc.fd->type;
1256 fi = iptr->sx.s23.s3.fmiref->p.field;
1257 fieldtype = fi->type;
1261 #if !defined(ENABLE_SOFTFLOAT)
1262 /* HACK: softnull checks on floats */
1263 if (!INSTRUCTION_MUST_CHECK(iptr) && IS_FLT_DBL_TYPE(fieldtype))
1264 emit_nullpointer_check_force(cd, iptr, s1);
1267 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1269 uf = iptr->sx.s23.s3.uf;
1271 patcher_add_patch_ref(jd, PATCHER_get_putfield, uf, 0);
1274 switch (fieldtype) {
1276 #if defined(ENABLE_SOFTFLOAT)
1280 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1284 #if defined(ENABLE_SOFTFLOAT)
1287 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1290 #if !defined(ENABLE_SOFTFLOAT)
1292 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1296 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1303 emit_store_dst(jd, iptr, d);
1306 case ICMD_PUTFIELD: /* ..., objectref, value ==> ... */
1308 s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1309 emit_nullpointer_check(cd, iptr, s1);
1311 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1312 uf = iptr->sx.s23.s3.uf;
1313 fieldtype = uf->fieldref->parseddesc.fd->type;
1317 fi = iptr->sx.s23.s3.fmiref->p.field;
1318 fieldtype = fi->type;
1322 #if !defined(ENABLE_SOFTFLOAT)
1323 /* HACK: softnull checks on floats */
1324 if (!INSTRUCTION_MUST_CHECK(iptr) && IS_FLT_DBL_TYPE(fieldtype))
1325 emit_nullpointer_check_force(cd, iptr, s1);
1328 switch (fieldtype) {
1330 #if defined(ENABLE_SOFTFLOAT)
1334 s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1336 #if defined(ENABLE_SOFTFLOAT)
1337 case TYPE_DBL: /* fall through */
1340 s2 = emit_load_s2(jd, iptr, REG_ITMP12_PACKED);
1342 #if !defined(ENABLE_SOFTFLOAT)
1345 s2 = emit_load_s2(jd, iptr, REG_FTMP1);
1352 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1354 uf = iptr->sx.s23.s3.uf;
1356 patcher_add_patch_ref(jd, PATCHER_get_putfield, uf, 0);
1359 switch (fieldtype) {
1361 #if defined(ENABLE_SOFTFLOAT)
1365 M_IST(s2, s1, disp);
1368 #if defined(ENABLE_SOFTFLOAT)
1371 M_LST(s2, s1, disp);
1373 #if !defined(ENABLE_SOFTFLOAT)
1375 M_FST(s2, s1, disp);
1378 M_DST(s2, s1, disp);
1387 /* branch operations **************************************************/
1389 case ICMD_ATHROW: /* ..., objectref ==> ... (, objectref) */
1391 disp = dseg_add_functionptr(cd, asm_handle_exception);
1392 M_DSEG_LOAD(REG_ITMP3, disp);
1393 M_MOV(REG_ITMP2_XPC, REG_PC);
1394 M_MOV(REG_PC, REG_ITMP3);
1395 M_NOP; /* nop ensures that XPC is less than the end */
1396 /* of basic block */
1399 case ICMD_IF_LEQ: /* ..., value ==> ... */
1401 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1402 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1403 if (iptr->sx.val.l == 0) {
1404 M_ORR_S(s1, s2, REG_ITMP3);
1407 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1408 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1409 M_CMP(s1, REG_ITMP3);*/
1410 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1411 M_CMPEQ(s2, REG_ITMP3);
1413 emit_beq(cd, iptr->dst.block);
1416 case ICMD_IF_LLT: /* ..., value ==> ... */
1418 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1419 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1420 if (iptr->sx.val.l == 0) {
1421 /* if high word is less than zero, the whole long is too */
1423 emit_blt(cd, iptr->dst.block);
1426 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1427 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1428 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1429 M_CMP(s1, REG_ITMP3);*/
1430 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1431 M_MOVGT_IMM(2, REG_ITMP1);
1432 M_MOVEQ_IMM(1, REG_ITMP1);
1434 /* low compare: x=x-1(ifLO) */
1435 emit_icmp_imm(cd, s2, (iptr->sx.val.l & 0xffffffff));
1436 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1437 M_CMP(s2, REG_ITMP3);*/
1438 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1440 /* branch if (x LT 1) */
1441 M_CMP_IMM(REG_ITMP1, 1);
1442 emit_blt(cd, iptr->dst.block);
1446 case ICMD_IF_LLE: /* ..., value ==> ... */
1448 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1449 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1450 if (iptr->sx.val.l == 0) {
1451 /* if high word is less than zero, the whole long is too */
1453 emit_blt(cd, iptr->dst.block);
1455 /* ... otherwise the low word has to be zero (tricky!) */
1457 emit_beq(cd, iptr->dst.block);
1460 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1461 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1462 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1463 M_CMP(s1, REG_ITMP3);*/
1464 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1465 M_MOVGT_IMM(2, REG_ITMP1);
1466 M_MOVEQ_IMM(1, REG_ITMP1);
1468 /* low compare: x=x+1(ifHI) */
1469 emit_icmp_imm(cd, s2, (iptr->sx.val.l & 0xffffffff));
1470 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1471 M_CMP(s2, REG_ITMP3);*/
1472 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1474 /* branch if (x LE 1) */
1475 M_CMP_IMM(REG_ITMP1, 1);
1476 emit_ble(cd, iptr->dst.block);
1480 case ICMD_IF_LGE: /* ..., value ==> ... */
1482 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1483 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1484 if (iptr->sx.val.l == 0) {
1485 /* if high word is greater or equal zero, the whole long is too */
1487 emit_bge(cd, iptr->dst.block);
1490 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1491 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1492 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1493 M_CMP(s1, REG_ITMP3);*/
1494 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1495 M_MOVGT_IMM(2, REG_ITMP1);
1496 M_MOVEQ_IMM(1, REG_ITMP1);
1498 /* low compare: x=x-1(ifLO) */
1499 emit_icmp_imm(cd, s2, (iptr->sx.val.l & 0xffffffff));
1500 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1501 M_CMP(s2, REG_ITMP3);*/
1502 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1504 /* branch if (x GE 1) */
1505 M_CMP_IMM(REG_ITMP1, 1);
1506 emit_bge(cd, iptr->dst.block);
1510 case ICMD_IF_LGT: /* ..., value ==> ... */
1512 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1513 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1515 if (iptr->sx.val.l == 0) {
1516 /* if high word is greater than zero, the whole long is too */
1519 codegen_add_branch_ref(cd, iptr->dst.block);
1521 /* ... or high was zero and low is non zero (tricky!) */
1522 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1523 M_MOVLT_IMM(1, REG_ITMP3);
1524 M_ORR_S(REG_ITMP3, s2, REG_ITMP3);
1526 codegen_add_branch_ref(cd, iptr->dst.block);
1530 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1531 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1532 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1533 M_CMP(s1, REG_ITMP3);*/
1534 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1535 M_MOVGT_IMM(2, REG_ITMP1);
1536 M_MOVEQ_IMM(1, REG_ITMP1);
1538 /* low compare: x=x+1(ifHI) */
1539 emit_icmp_imm(cd, s2, (iptr->sx.val.l & 0xffffffff));
1540 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1541 M_CMP(s2, REG_ITMP3);*/
1542 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1544 /* branch if (x GT 1) */
1545 M_CMP_IMM(REG_ITMP1, 1);
1546 emit_bgt(cd, iptr->dst.block);
1552 case ICMD_IF_LNE: /* ..., value ==> ... */
1554 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1555 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1556 if (iptr->sx.val.l == 0) {
1557 M_ORR_S(s1, s2, REG_ITMP3);
1560 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1561 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1562 M_CMP(s1, REG_ITMP3);*/
1563 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1564 M_CMPEQ(s2, REG_ITMP3);
1566 emit_bne(cd, iptr->dst.block);
1569 case ICMD_IF_LCMPEQ: /* ..., value, value ==> ... */
1570 /* op1 = target JavaVM pc */
1572 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1573 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1576 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1577 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1580 emit_beq(cd, iptr->dst.block);
1583 case ICMD_IF_LCMPNE: /* ..., value, value ==> ... */
1584 /* op1 = target JavaVM pc */
1586 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1587 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1590 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1591 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1594 emit_bne(cd, iptr->dst.block);
1597 case ICMD_IF_LCMPLT: /* ..., value, value ==> ... */
1598 /* op1 = target JavaVM pc */
1600 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1601 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1602 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1604 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1605 M_MOVGT_IMM(2, REG_ITMP3);
1606 M_MOVEQ_IMM(1, REG_ITMP3);
1608 /* low compare: x=x-1(ifLO) */
1609 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1610 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1612 M_SUBLO_IMM(REG_ITMP3, REG_ITMP3, 1);
1614 /* branch if (x LT 1) */
1615 M_CMP_IMM(REG_ITMP3, 1);
1616 emit_blt(cd, iptr->dst.block);
1619 case ICMD_IF_LCMPLE: /* ..., value, value ==> ... */
1620 /* op1 = target JavaVM pc */
1622 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1623 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1624 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1626 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1627 M_MOVGT_IMM(2, REG_ITMP3);
1628 M_MOVEQ_IMM(1, REG_ITMP3);
1630 /* low compare: x=x-1(ifLO) */
1631 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1632 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1634 M_ADDHI_IMM(REG_ITMP3, REG_ITMP3, 1);
1636 /* branch if (x LE 1) */
1637 M_CMP_IMM(REG_ITMP3, 1);
1638 emit_ble(cd, iptr->dst.block);
1641 case ICMD_IF_LCMPGT: /* ..., value, value ==> ... */
1642 /* op1 = target JavaVM pc */
1644 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1645 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1646 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1648 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1649 M_MOVGT_IMM(2, REG_ITMP3);
1650 M_MOVEQ_IMM(1, REG_ITMP3);
1652 /* low compare: x=x-1(ifLO) */
1653 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1654 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1656 M_ADDHI_IMM(REG_ITMP3, REG_ITMP3, 1);
1658 /* branch if (x GT 1) */
1659 M_CMP_IMM(REG_ITMP3, 1);
1660 emit_bgt(cd, iptr->dst.block);
1663 case ICMD_IF_LCMPGE: /* ..., value, value ==> ... */
1664 /* op1 = target JavaVM pc */
1666 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1667 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1668 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1670 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1671 M_MOVGT_IMM(2, REG_ITMP3);
1672 M_MOVEQ_IMM(1, REG_ITMP3);
1674 /* low compare: x=x-1(ifLO) */
1675 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1676 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1678 M_SUBLO_IMM(REG_ITMP3, REG_ITMP3, 1);
1680 /* branch if (x GE 1) */
1681 M_CMP_IMM(REG_ITMP3, 1);
1682 emit_bge(cd, iptr->dst.block);
1685 case ICMD_TABLESWITCH: /* ..., index ==> ... */
1688 branch_target_t *table;
1690 table = iptr->dst.table;
1692 l = iptr->sx.s23.s2.tablelow;
1693 i = iptr->sx.s23.s3.tablehigh;
1695 /* calculate new index (index - low) */
1696 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1698 M_INTMOVE(s1, REG_ITMP1);
1699 } else if (IS_IMM(l)) {
1700 M_SUB_IMM(REG_ITMP1, s1, l);
1702 ICONST(REG_ITMP2, l);
1703 M_SUB(REG_ITMP1, s1, REG_ITMP2);
1706 /* range check (index <= high-low) */
1708 emit_icmp_imm(cd, REG_ITMP1, i-1);
1709 emit_bugt(cd, table[0].block);
1711 /* build jump table top down and use address of lowest entry */
1716 dseg_add_target(cd, table->block);
1721 /* length of dataseg after last dseg_add_target is used by load */
1722 /* TODO: this loads from data-segment */
1723 M_ADD(REG_ITMP2, REG_PV, REG_LSL(REG_ITMP1, 2));
1724 M_LDR(REG_PC, REG_ITMP2, -(cd->dseglen));
1728 bte = iptr->sx.s23.s3.bte;
1729 if (bte->stub == NULL) {
1730 disp = dseg_add_functionptr(cd, bte->fp);
1732 disp = dseg_add_functionptr(cd, bte->stub);
1735 M_DSEG_LOAD(REG_PV, disp); /* pointer to built-in-function */
1737 /* generate the actual call */
1739 M_MOV(REG_LR, REG_PC);
1740 M_MOV(REG_PC, REG_PV);
1742 #if !defined(__SOFTFP__)
1743 /* TODO: this is only a hack, since we use R0/R1 for float
1744 return! this depends on gcc; it is independent from
1745 our ENABLE_SOFTFLOAT define */
1746 if (d != TYPE_VOID && IS_FLT_DBL_TYPE(d)) {
1747 #if 0 && !defined(NDEBUG)
1748 dolog("BUILTIN that returns float or double (%s.%s)", m->clazz->name->text, m->name->text);
1750 /* we cannot use this macro, since it is not defined
1751 in ENABLE_SOFTFLOAT M_CAST_FLT_TO_INT_TYPED(d,
1752 REG_FRESULT, REG_RESULT_TYPED(d)); */
1753 if (IS_2_WORD_TYPE(d)) {
1754 DCD(0xed2d8102); /* stfd f0, [sp, #-8]! */
1755 M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
1757 DCD(0xed2d0101); /* stfs f0, [sp, #-4]!*/
1758 M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
1764 case ICMD_INVOKESPECIAL:
1765 emit_nullpointer_check(cd, iptr, REG_A0);
1768 case ICMD_INVOKESTATIC:
1769 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1770 um = iptr->sx.s23.s3.um;
1771 disp = dseg_add_unique_address(cd, NULL);
1773 patcher_add_patch_ref(jd, PATCHER_invokestatic_special,
1777 lm = iptr->sx.s23.s3.fmiref->p.method;
1778 disp = dseg_add_address(cd, lm->stubroutine);
1781 M_DSEG_LOAD(REG_PV, disp); /* Pointer to method */
1783 /* generate the actual call */
1785 M_MOV(REG_LR, REG_PC);
1786 M_MOV(REG_PC, REG_PV);
1789 case ICMD_INVOKEVIRTUAL:
1790 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1791 um = iptr->sx.s23.s3.um;
1792 int32_t disp = dseg_add_unique_s4(cd, 0);
1793 patcher_add_patch_ref(jd, PATCHER_invokevirtual, um, disp);
1795 // The following instruction MUST NOT change a0 because of the implicit NPE check.
1796 M_LDR_INTERN(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
1799 assert(REG_ITMP1 != REG_METHODPTR);
1800 assert(REG_ITMP2 == REG_METHODPTR);
1802 M_DSEG_LOAD(REG_ITMP1, disp);
1803 M_ADD(REG_METHODPTR, REG_METHODPTR, REG_ITMP1);
1805 // This must be a load with displacement,
1806 // otherwise the JIT method address patching does
1807 // not work anymore (see md_jit_method_patch_address).
1808 M_LDR_INTERN(REG_PV, REG_METHODPTR, 0);
1811 lm = iptr->sx.s23.s3.fmiref->p.method;
1812 s1 = OFFSET(vftbl_t, table[0]) + sizeof(methodptr) * lm->vftblindex;
1814 // The following instruction MUST NOT change a0 because of the implicit NPE check.
1815 M_LDR_INTERN(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
1816 M_LDR(REG_PV, REG_METHODPTR, s1);
1819 // Generate the actual call.
1820 M_MOV(REG_LR, REG_PC);
1821 M_MOV(REG_PC, REG_PV);
1824 case ICMD_INVOKEINTERFACE:
1825 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1826 um = iptr->sx.s23.s3.um;
1827 int32_t disp = dseg_add_unique_s4(cd, 0);
1828 int32_t disp2 = dseg_add_unique_s4(cd, 0);
1830 // XXX We need two displacements.
1831 assert(disp2 == disp - 4);
1832 patcher_add_patch_ref(jd, PATCHER_invokeinterface, um, disp);
1834 // The following instruction MUST NOT change a0 because of the implicit NPE check.
1835 M_LDR_INTERN(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
1838 assert(REG_ITMP1 != REG_METHODPTR);
1839 assert(REG_ITMP2 == REG_METHODPTR);
1840 assert(REG_ITMP3 != REG_METHODPTR);
1842 M_DSEG_LOAD(REG_ITMP1, disp);
1843 M_LDR_REG(REG_METHODPTR, REG_METHODPTR, REG_ITMP1);
1845 M_DSEG_LOAD(REG_ITMP3, disp2);
1846 M_ADD(REG_METHODPTR, REG_METHODPTR, REG_ITMP3);
1848 // This must be a load with displacement,
1849 // otherwise the JIT method address patching does
1850 // not work anymore (see md_jit_method_patch_address).
1851 M_LDR_INTERN(REG_PV, REG_METHODPTR, 0);
1854 lm = iptr->sx.s23.s3.fmiref->p.method;
1855 s1 = OFFSET(vftbl_t, interfacetable[0]) - sizeof(methodptr*) * lm->clazz->index;
1856 s2 = sizeof(methodptr) * (lm - lm->clazz->methods);
1858 // The following instruction MUST NOT change a0 because of the implicit NPE check.
1859 M_LDR_INTERN(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
1860 M_LDR(REG_METHODPTR, REG_METHODPTR, s1);
1861 M_LDR(REG_PV, REG_METHODPTR, s2);
1864 // Generate the actual call.
1865 M_MOV(REG_LR, REG_PC);
1866 M_MOV(REG_PC, REG_PV);
1869 case ICMD_CHECKCAST: /* ..., objectref ==> ..., objectref */
1871 if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
1872 /* object type cast-check */
1877 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1882 super = iptr->sx.s23.s3.c.cls;
1883 superindex = super->index;
1886 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1888 /* if class is not resolved, check which code to call */
1890 if (super == NULL) {
1892 emit_label_beq(cd, BRANCH_LABEL_1);
1894 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
1895 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_flags,
1896 iptr->sx.s23.s3.c.ref, disp);
1898 M_DSEG_LOAD(REG_ITMP2, disp);
1899 disp = dseg_add_s4(cd, ACC_INTERFACE);
1900 M_DSEG_LOAD(REG_ITMP3, disp);
1901 M_TST(REG_ITMP2, REG_ITMP3);
1902 emit_label_beq(cd, BRANCH_LABEL_2);
1905 /* interface checkcast code */
1907 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
1908 if ((super == NULL) || !IS_IMM(superindex)) {
1909 disp = dseg_add_unique_s4(cd, superindex);
1911 if (super == NULL) {
1912 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_index,
1913 iptr->sx.s23.s3.c.ref, disp);
1917 emit_label_beq(cd, BRANCH_LABEL_3);
1920 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_object_t, vftbl));
1921 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
1923 /* we put unresolved or non-immediate superindices onto dseg */
1924 if ((super == NULL) || !IS_IMM(superindex)) {
1925 /* disp was computed before we added the patcher */
1926 M_DSEG_LOAD(REG_ITMP2, disp);
1927 M_CMP(REG_ITMP3, REG_ITMP2);
1929 assert(IS_IMM(superindex));
1930 M_CMP_IMM(REG_ITMP3, superindex);
1933 emit_classcast_check(cd, iptr, BRANCH_LE, REG_ITMP3, s1);
1935 /* if we loaded the superindex out of the dseg above, we do
1936 things differently here! */
1937 if ((super == NULL) || !IS_IMM(superindex)) {
1939 M_LDR_INTERN(REG_ITMP3, s1, OFFSET(java_object_t, vftbl));
1941 /* this assumes something */
1942 assert(OFFSET(vftbl_t, interfacetable[0]) == 0);
1944 /* this does: REG_ITMP3 - superindex * sizeof(methodptr*) */
1945 assert(sizeof(methodptr*) == 4);
1946 M_SUB(REG_ITMP2, REG_ITMP3, REG_LSL(REG_ITMP2, 2));
1952 s2 = OFFSET(vftbl_t, interfacetable[0]) -
1953 superindex * sizeof(methodptr*);
1957 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, s2);
1958 M_TST(REG_ITMP3, REG_ITMP3);
1959 emit_classcast_check(cd, iptr, BRANCH_EQ, REG_ITMP3, s1);
1962 emit_label_br(cd, BRANCH_LABEL_4);
1964 emit_label(cd, BRANCH_LABEL_3);
1967 /* class checkcast code */
1969 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
1970 if (super == NULL) {
1971 emit_label(cd, BRANCH_LABEL_2);
1973 disp = dseg_add_unique_address(cd, NULL);
1975 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_vftbl,
1976 iptr->sx.s23.s3.c.ref,
1980 disp = dseg_add_address(cd, super->vftbl);
1983 emit_label_beq(cd, BRANCH_LABEL_5);
1986 // The following code checks whether object s is a subtype of class t.
1987 // Represents the following semantic:
1988 // if (!fast_subtype_check(s->vftbl, t->vftbl)) throw;
1990 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_object_t, vftbl));
1991 M_DSEG_LOAD(REG_ITMP3, disp);
1993 if (super == NULL || super->vftbl->subtype_depth >= DISPLAY_SIZE) {
1994 // Represents the following semantic:
1995 // if (*(s->vftbl + t->vftbl->subtype_offset) == t->vftbl) good;
1997 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
1998 M_LDR_INTERN(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
1999 M_LDR_REG(REG_ITMP1, REG_ITMP2, REG_ITMP1);
2000 M_CMP(REG_ITMP1, REG_ITMP3);
2001 emit_load_s1(jd, iptr, REG_ITMP1); /* reload s1, might have been destroyed */
2002 emit_label_beq(cd, BRANCH_LABEL_6); /* good */
2004 // Represents the following semantic:
2005 // if (t->vftbl->subtype_offset != OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE])) throw;
2007 // REG_ITMP3==t->vftbl;
2008 if (super == NULL) {
2009 M_LDR_INTERN(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
2010 M_CMP_IMM(REG_ITMP1, OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE]));
2011 emit_load_s1(jd, iptr, REG_ITMP1); /* reload s1, might have been destroyed */
2012 emit_classcast_check(cd, iptr, BRANCH_NE, 0, s1); /* throw */
2015 // Represents the following semantic:
2016 // if (s->vftbl->subtype_depth < t->vftbl->subtype_depth) throw;
2018 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2019 M_LDR_INTERN(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, subtype_depth));
2020 M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, subtype_depth));
2021 M_CMP(REG_ITMP1, REG_ITMP3);
2022 emit_load_s1(jd, iptr, REG_ITMP1); /* reload s1, might have been destroyed */
2023 emit_classcast_check(cd, iptr, BRANCH_LT, 0, s1); /* throw */
2025 // Represents the following semantic:
2026 // if (s->vftbl->subtype_overflow[t->vftbl->subtype_depth - DISPLAY_SIZE] != t->vftbl) throw;
2028 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl->subtype_depth;
2029 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, subtype_overflow));
2030 M_ADD(REG_ITMP2, REG_ITMP2, REG_LSL(REG_ITMP3, 2)); /* REG_ITMP2 = REG_ITMP2 + 4 * REG_ITMP3 */
2031 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, -DISPLAY_SIZE * SIZEOF_VOID_P);
2032 M_DSEG_LOAD(REG_ITMP3, disp); /* reload REG_ITMP3, was destroyed */
2033 M_CMP(REG_ITMP2, REG_ITMP3);
2034 emit_classcast_check(cd, iptr, BRANCH_NE, 0, s1); /* throw */
2036 emit_label(cd, BRANCH_LABEL_6);
2039 // Represents the following semantic:
2040 // if (*(s->vftbl + t->vftbl->subtype_offset) != t->vftbl) throw;
2042 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2043 M_ALD(REG_ITMP2, REG_ITMP2, super->vftbl->subtype_offset);
2044 M_CMP(REG_ITMP2, REG_ITMP3);
2045 emit_classcast_check(cd, iptr, BRANCH_NE, 0, s1);
2049 emit_label(cd, BRANCH_LABEL_5);
2052 if (super == NULL) {
2053 emit_label(cd, BRANCH_LABEL_1);
2054 emit_label(cd, BRANCH_LABEL_4);
2057 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
2060 /* array type cast-check */
2062 s1 = emit_load_s1(jd, iptr, REG_A0);
2063 M_INTMOVE(s1, REG_A0);
2065 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2066 disp = dseg_add_unique_address(cd, NULL);
2068 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
2069 iptr->sx.s23.s3.c.ref,
2073 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2075 M_DSEG_LOAD(REG_A1, disp);
2076 disp = dseg_add_functionptr(cd, BUILTIN_arraycheckcast);
2077 M_DSEG_BRANCH(disp);
2079 emit_recompute_pv(cd);
2081 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2082 M_TST(REG_RESULT, REG_RESULT);
2083 emit_classcast_check(cd, iptr, BRANCH_EQ, REG_RESULT, s1);
2085 d = codegen_reg_of_dst(jd, iptr, s1);
2089 emit_store_dst(jd, iptr, d);
2092 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult */
2098 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2103 super = iptr->sx.s23.s3.c.cls;
2104 superindex = super->index;
2107 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2108 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2111 M_MOV(REG_ITMP1, s1);
2115 /* if class is not resolved, check which code to call */
2117 if (super == NULL) {
2121 emit_label_beq(cd, BRANCH_LABEL_1);
2123 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
2124 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_flags,
2125 iptr->sx.s23.s3.c.ref, disp);
2127 M_DSEG_LOAD(REG_ITMP2, disp);
2128 disp = dseg_add_s4(cd, ACC_INTERFACE);
2129 M_DSEG_LOAD(REG_ITMP3, disp);
2130 M_TST(REG_ITMP2, REG_ITMP3);
2131 emit_label_beq(cd, BRANCH_LABEL_2);
2134 /* interface checkcast code */
2136 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2137 if ((super == NULL) || !IS_IMM(superindex)) {
2138 disp = dseg_add_unique_s4(cd, superindex);
2140 if (super == NULL) {
2141 /* If d == REG_ITMP2, then it's destroyed in check
2146 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_index,
2147 iptr->sx.s23.s3.c.ref, disp);
2152 emit_label_beq(cd, BRANCH_LABEL_3);
2155 M_LDR_INTERN(REG_ITMP1, s1, OFFSET(java_object_t, vftbl));
2156 M_LDR_INTERN(REG_ITMP3,
2157 REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
2159 /* we put unresolved or non-immediate superindices onto dseg
2160 and do things slightly different */
2161 if ((super == NULL) || !IS_IMM(superindex)) {
2162 /* disp was computed before we added the patcher */
2163 M_DSEG_LOAD(REG_ITMP2, disp);
2164 M_CMP(REG_ITMP3, REG_ITMP2);
2166 if (d == REG_ITMP2) {
2173 /* this assumes something */
2174 assert(OFFSET(vftbl_t, interfacetable[0]) == 0);
2176 /* this does: REG_ITMP3 - superindex * sizeof(methodptr*) */
2177 assert(sizeof(methodptr*) == 4);
2178 M_SUB(REG_ITMP1, REG_ITMP1, REG_LSL(REG_ITMP2, 2));
2180 if (d == REG_ITMP2) {
2187 assert(IS_IMM(superindex));
2188 M_CMP_IMM(REG_ITMP3, superindex);
2192 s2 = OFFSET(vftbl_t, interfacetable[0]) -
2193 superindex * sizeof(methodptr*);
2197 M_LDR_INTERN(REG_ITMP3, REG_ITMP1, s2);
2198 M_TST(REG_ITMP3, REG_ITMP3);
2202 emit_label_br(cd, BRANCH_LABEL_4);
2204 emit_label(cd, BRANCH_LABEL_3);
2207 /* class checkcast code */
2209 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2210 if (super == NULL) {
2211 emit_label(cd, BRANCH_LABEL_2);
2213 disp = dseg_add_unique_address(cd, NULL);
2215 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_vftbl,
2216 iptr->sx.s23.s3.c.ref, disp);
2219 disp = dseg_add_address(cd, super->vftbl);
2223 emit_label_beq(cd, BRANCH_LABEL_5);
2226 // The following code checks whether object s is a subtype of class t.
2227 // Represents the following semantic:
2228 // fast_subtype_check(s->vftbl, t->vftbl));
2230 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_object_t, vftbl));
2231 M_DSEG_LOAD(REG_ITMP3, disp);
2233 if (super == NULL || super->vftbl->subtype_depth >= DISPLAY_SIZE) {
2234 // Represents the following semantic:
2235 // if (*(s->vftbl + t->vftbl->subtype_offset) == t->vftbl) true;
2237 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2238 M_LDR_INTERN(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
2239 M_LDR_REG(REG_ITMP1, REG_ITMP2, REG_ITMP1);
2240 M_CMP(REG_ITMP1, REG_ITMP3);
2241 emit_label_beq(cd, BRANCH_LABEL_6); /* true */
2243 // Represents the following semantic:
2244 // if (t->vftbl->subtype_offset != OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE])) false;
2246 // REG_ITMP3==t->vftbl;
2247 if (super == NULL) {
2248 M_LDR_INTERN(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
2249 M_CMP_IMM(REG_ITMP1, OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE]));
2250 emit_label_bne(cd, BRANCH_LABEL_7); /* false */
2253 // Represents the following semantic:
2254 // if (s->vftbl->subtype_depth < t->vftbl->subtype_depth) false;
2256 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2257 M_LDR_INTERN(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, subtype_depth));
2258 M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, subtype_depth));
2259 M_CMP(REG_ITMP1, REG_ITMP3);
2260 emit_label_blt(cd, BRANCH_LABEL_8); /* false */
2262 // Represents the following semantic:
2263 // if (s->vftbl->subtype_overflow[t->vftbl->subtype_depth - DISPLAY_SIZE] != t->vftbl) false;
2265 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl->subtype_depth;
2266 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, subtype_overflow));
2267 M_ADD(REG_ITMP2, REG_ITMP2, REG_LSL(REG_ITMP3, 2)); /* REG_ITMP2 = REG_ITMP2 + 4 * REG_ITMP3 */
2268 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, -DISPLAY_SIZE * SIZEOF_VOID_P);
2269 M_DSEG_LOAD(REG_ITMP3, disp); /* reload REG_ITMP3, was destroyed */
2270 M_CMP(REG_ITMP2, REG_ITMP3);
2272 emit_label(cd, BRANCH_LABEL_6);
2274 emit_label(cd, BRANCH_LABEL_7);
2275 emit_label(cd, BRANCH_LABEL_8);
2277 /* If d == REG_ITMP2, then it's destroyed */
2283 // Represents the following semantic:
2284 // *(s->vftbl + t->vftbl->subtype_offset) == t->vftbl;
2286 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2287 M_ALD(REG_ITMP2, REG_ITMP2, super->vftbl->subtype_offset);
2288 M_CMP(REG_ITMP2, REG_ITMP3);
2289 /* If d == REG_ITMP2, then it's destroyed */
2296 emit_label(cd, BRANCH_LABEL_5);
2299 if (super == NULL) {
2300 emit_label(cd, BRANCH_LABEL_1);
2301 emit_label(cd, BRANCH_LABEL_4);
2306 emit_store_dst(jd, iptr, d);
2309 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref */
2311 /* copy sizes to stack if necessary */
2313 MCODECHECK((iptr->s1.argcount << 1) + 64);
2315 for (s1 = iptr->s1.argcount; --s1 >= 0; ) {
2317 var = VAR(iptr->sx.s23.s2.args[s1]);
2319 /* copy SAVEDVAR sizes to stack */
2321 if (!(var->flags & PREALLOC)) {
2322 s2 = emit_load(jd, iptr, var, REG_ITMP1);
2323 M_STR(s2, REG_SP, s1 * 4);
2327 /* a0 = dimension count */
2329 assert(IS_IMM(iptr->s1.argcount));
2330 M_MOV_IMM(REG_A0, iptr->s1.argcount);
2332 /* is patcher function set? */
2334 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2335 disp = dseg_add_unique_address(cd, NULL);
2337 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
2338 iptr->sx.s23.s3.c.ref, disp);
2341 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2343 /* a1 = arraydescriptor */
2345 M_DSEG_LOAD(REG_A1, disp);
2347 /* a2 = pointer to dimensions = stack pointer */
2349 M_INTMOVE(REG_SP, REG_A2);
2351 /* call builtin_multianewarray here */
2353 disp = dseg_add_functionptr(cd, BUILTIN_multianewarray);
2354 M_DSEG_BRANCH(disp);
2358 emit_recompute_pv(cd);
2360 /* check for exception before result assignment */
2362 emit_exception_check(cd, iptr);
2366 d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2367 M_INTMOVE(REG_RESULT, d);
2368 emit_store_dst(jd, iptr, d);
2372 vm_abort("Unknown ICMD %d during code generation", iptr->opc);
2373 } /* the big switch */
2377 /* codegen_emit_stub_native ****************************************************
2379 Emits a stub routine which calls a native method.
2381 *******************************************************************************/
2383 void codegen_emit_stub_native(jitdata *jd, methoddesc *nmd, functionptr f, int skipparams)
2394 /* get required compiler data */
2400 /* initialize variables */
2404 /* calculate stackframe size */
2406 cd->stackframesize =
2407 1 + /* return address */
2408 sizeof(stackframeinfo_t) / SIZEOF_VOID_P + /* stackframeinfo */
2409 sizeof(localref_table) / SIZEOF_VOID_P + /* localref_table */
2410 nmd->memuse; /* stack arguments */
2412 /* align stack to 8-byte */
2414 cd->stackframesize = (cd->stackframesize + 1) & ~1;
2416 /* create method header */
2418 (void) dseg_add_unique_address(cd, code); /* CodeinfoPointer */
2419 (void) dseg_add_unique_s4(cd, cd->stackframesize); /* FrameSize */
2420 (void) dseg_add_unique_s4(cd, 0); /* IsLeaf */
2421 (void) dseg_add_unique_s4(cd, 0); /* IntSave */
2422 (void) dseg_add_unique_s4(cd, 0); /* FltSave */
2424 /* generate stub code */
2426 M_STMFD(1<<REG_LR, REG_SP);
2427 M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize * 2 - 1);
2429 #if defined(ENABLE_GC_CACAO)
2430 /* Save callee saved integer registers in stackframeinfo (GC may
2431 need to recover them during a collection). */
2433 disp = cd->stackframesize - SIZEOF_VOID_P - sizeof(stackframeinfo_t) +
2434 OFFSET(stackframeinfo_t, intregs);
2436 for (i = 0; i < INT_SAV_CNT; i++)
2437 M_STR_INTERN(abi_registers_integer_saved[i], REG_SP, disp + i * 4);
2440 /* Save integer and float argument registers (these are 4
2441 registers, stack is 8-byte aligned). */
2443 M_STMFD(BITMASK_ARGS, REG_SP);
2444 /* TODO: floating point */
2446 /* create native stackframe info */
2448 M_ADD_IMM(REG_A0, REG_SP, 4*4);
2449 M_MOV(REG_A1, REG_PV);
2450 disp = dseg_add_functionptr(cd, codegen_start_native_call);
2451 M_DSEG_BRANCH(disp);
2455 emit_recompute_pv(cd);
2457 /* remember class argument */
2459 if (m->flags & ACC_STATIC)
2460 M_MOV(REG_ITMP3, REG_RESULT);
2462 /* Restore integer and float argument registers (these are 4
2463 registers, stack is 8-byte aligned). */
2465 M_LDMFD(BITMASK_ARGS, REG_SP);
2466 /* TODO: floating point */
2468 /* copy or spill arguments to new locations */
2469 /* ATTENTION: the ARM has only integer argument registers! */
2471 for (i = md->paramcount - 1, j = i + skipparams; i >= 0; i--, j--) {
2472 t = md->paramtypes[i].type;
2474 if (!md->params[i].inmemory) {
2475 s1 = md->params[i].regoff;
2476 s2 = nmd->params[j].regoff;
2478 if (!nmd->params[j].inmemory) {
2479 #if !defined(__ARM_EABI__)
2480 SPLIT_OPEN(t, s2, REG_ITMP1);
2483 if (IS_2_WORD_TYPE(t))
2488 #if !defined(__ARM_EABI__)
2489 SPLIT_STORE_AND_CLOSE(t, s2, 0);
2493 if (IS_2_WORD_TYPE(t))
2494 M_LST(s1, REG_SP, s2);
2496 M_IST(s1, REG_SP, s2);
2500 s1 = md->params[i].regoff + cd->stackframesize * 8;
2501 s2 = nmd->params[j].regoff;
2503 if (IS_2_WORD_TYPE(t)) {
2504 M_LLD(REG_ITMP12_PACKED, REG_SP, s1);
2505 M_LST(REG_ITMP12_PACKED, REG_SP, s2);
2508 M_ILD(REG_ITMP1, REG_SP, s1);
2509 M_IST(REG_ITMP1, REG_SP, s2);
2514 /* Handle native Java methods. */
2516 if (m->flags & ACC_NATIVE) {
2517 /* put class into second argument register */
2519 if (m->flags & ACC_STATIC)
2520 M_MOV(REG_A1, REG_ITMP3);
2522 /* put env into first argument register */
2524 disp = dseg_add_address(cd, VM_get_jnienv());
2525 M_DSEG_LOAD(REG_A0, disp);
2528 /* Call the native function. */
2530 disp = dseg_add_functionptr(cd, f);
2531 M_DSEG_BRANCH(disp);
2534 /* TODO: this is only needed because of the tracer ... do we
2537 emit_recompute_pv(cd);
2539 #if !defined(__SOFTFP__)
2540 /* TODO: this is only a hack, since we use R0/R1 for float return! */
2541 /* this depends on gcc; it is independent from our ENABLE_SOFTFLOAT define */
2542 if (md->returntype.type != TYPE_VOID && IS_FLT_DBL_TYPE(md->returntype.type)) {
2543 #if 0 && !defined(NDEBUG)
2544 dolog("NATIVESTUB that returns float or double (%s.%s)", m->clazz->name->text, m->name->text);
2546 /* we cannot use this macro, since it is not defined in ENABLE_SOFTFLOAT */
2547 /* M_CAST_FLT_TO_INT_TYPED(md->returntype.type, REG_FRESULT, REG_RESULT_TYPED(md->returntype.type)); */
2548 if (IS_2_WORD_TYPE(md->returntype.type)) {
2549 DCD(0xed2d8102); /* stfd f0, [sp, #-8]! */
2550 M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
2552 DCD(0xed2d0101); /* stfs f0, [sp, #-4]!*/
2553 M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
2558 /* remove native stackframe info */
2559 /* TODO: improve this store/load */
2561 M_STMFD(BITMASK_RESULT, REG_SP);
2563 M_ADD_IMM(REG_A0, REG_SP, 2*4);
2564 M_MOV(REG_A1, REG_PV);
2565 disp = dseg_add_functionptr(cd, codegen_finish_native_call);
2566 M_DSEG_BRANCH(disp);
2567 emit_recompute_pv(cd);
2569 M_MOV(REG_ITMP1_XPTR, REG_RESULT);
2570 M_LDMFD(BITMASK_RESULT, REG_SP);
2572 #if defined(ENABLE_GC_CACAO)
2573 /* restore callee saved int registers from stackframeinfo (GC might have */
2574 /* modified them during a collection). */
2576 disp = cd->stackframesize - SIZEOF_VOID_P - sizeof(stackframeinfo_t) +
2577 OFFSET(stackframeinfo_t, intregs);
2579 for (i = 0; i < INT_SAV_CNT; i++)
2580 M_LDR_INTERN(abi_registers_integer_saved[i], REG_SP, disp + i * 4);
2583 /* finish stub code, but do not yet return to caller */
2585 M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize * 2 - 1);
2586 M_LDMFD(1<<REG_LR, REG_SP);
2588 /* check for exception */
2590 M_TST(REG_ITMP1_XPTR, REG_ITMP1_XPTR);
2591 M_MOVEQ(REG_LR, REG_PC); /* if no exception, return to caller */
2593 /* handle exception here */
2595 M_SUB_IMM(REG_ITMP2_XPC, REG_LR, 4);/* move fault address into xpc */
2597 disp = dseg_add_functionptr(cd, asm_handle_nat_exception);
2598 M_DSEG_LOAD(REG_ITMP3, disp); /* load asm exception handler address */
2599 M_MOV(REG_PC, REG_ITMP3); /* jump to asm exception handler */
2603 /* asm_debug *******************************************************************
2607 *******************************************************************************/
2609 void asm_debug(int a1, int a2, int a3, int a4)
2611 printf("===> i am going to exit after this debugging message!\n");
2612 printf("got asm_debug(%p, %p, %p, %p)\n",(void*)a1,(void*)a2,(void*)a3,(void*)a4);
2613 vm_abort("leave you now");
2618 * These are local overrides for various environment variables in Emacs.
2619 * Please do not remove this and leave it at the end of the file, where
2620 * Emacs will automagically detect them.
2621 * ---------------------------------------------------------------------
2624 * indent-tabs-mode: t
2628 * vim:noexpandtab:sw=4:ts=4: