1 /* src/vm/jit/arm/codegen.c - machine code generator for Arm
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: codegen.c 8183 2007-07-05 20:37:05Z michi $
39 #include "vm/jit/arm/arch.h"
40 #include "vm/jit/arm/codegen.h"
42 #include "mm/memory.h"
44 #include "native/native.h"
46 #include "threads/lock-common.h"
48 #include "vm/builtin.h"
49 #include "vm/exceptions.h"
50 #include "vm/global.h"
53 #include "vm/jit/abi.h"
54 #include "vm/jit/asmpart.h"
55 #include "vm/jit/codegen-common.h"
56 #include "vm/jit/dseg.h"
57 #include "vm/jit/emit-common.h"
58 #include "vm/jit/jit.h"
59 #include "vm/jit/md.h"
60 #include "vm/jit/methodheader.h"
61 #include "vm/jit/parse.h"
62 #include "vm/jit/patcher-common.h"
63 #include "vm/jit/reg.h"
65 #if defined(ENABLE_LSRA)
66 #include "vm/jit/allocator/lsra.h"
69 #include "vmcore/loader.h"
70 #include "vmcore/options.h"
73 /* codegen_emit ****************************************************************
75 Generates machine code.
77 *******************************************************************************/
79 bool codegen_emit(jitdata *jd)
100 methodinfo *lm; /* local methodinfo for ICMD_INVOKE* */
101 unresolved_method *um;
102 builtintable_entry *bte;
105 /* get required compiler data */
112 /* prevent compiler warnings */
120 /* space to save used callee saved registers */
122 savedregs_num = (jd->isleafmethod) ? 0 : 1; /* space to save the LR */
123 savedregs_num += (INT_SAV_CNT - rd->savintreguse);
124 /*savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);*/
125 assert((FLT_SAV_CNT - rd->savfltreguse) == 0);
127 spilledregs_num = rd->memuse;
129 #if defined(ENABLE_THREADS) /* space to save argument of monitor_enter */
130 if (checksync && (m->flags & ACC_SYNCHRONIZED))
134 cd->stackframesize = spilledregs_num * 8 + savedregs_num * 4;
136 /* XXX QUICK FIX: We shouldn't align the stack in Java code, but
137 only in native stubs. */
138 /* align stack to 8-byte */
140 cd->stackframesize = (cd->stackframesize + 4) & ~4;
142 /* SECTION: Method Header */
143 /* create method header */
145 (void) dseg_add_unique_address(cd, code); /* CodeinfoPointer */
146 (void) dseg_add_unique_s4(cd, cd->stackframesize); /* FrameSize */
148 #if defined(ENABLE_THREADS)
149 /* IsSync contains the offset relative to the stack pointer for the
150 argument of monitor_exit used in the exception handler. Since the
151 offset could be zero and give a wrong meaning of the flag it is
155 if (checksync && (m->flags & ACC_SYNCHRONIZED))
156 (void) dseg_add_unique_s4(cd, rd->memuse * 8 + 4);/* IsSync */
159 (void) dseg_add_unique_s4(cd, 0); /* IsSync */
161 (void) dseg_add_unique_s4(cd, jd->isleafmethod); /* IsLeaf */
162 (void) dseg_add_unique_s4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
163 (void) dseg_add_unique_s4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
164 (void) dseg_addlinenumbertablesize(cd);
165 (void) dseg_add_unique_s4(cd, jd->exceptiontablelength); /* ExTableSize */
167 /* create exception table */
169 for (ex = jd->exceptiontable; ex != NULL; ex = ex->down) {
170 dseg_add_target(cd, ex->start);
171 dseg_add_target(cd, ex->end);
172 dseg_add_target(cd, ex->handler);
173 (void) dseg_add_unique_address(cd, ex->catchtype.any);
176 /* save return address and used callee saved registers */
178 savedregs_bitmask = 0;
180 if (!jd->isleafmethod)
181 savedregs_bitmask = (1<<REG_LR);
183 for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--)
184 savedregs_bitmask |= (1<<(rd->savintregs[i]));
187 for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
188 log_text("!!! CODEGEN: floating-point callee saved registers are not saved to stack (SEVERE! STACK IS MESSED UP!)");
189 /* TODO: floating-point */
193 if (savedregs_bitmask)
194 M_STMFD(savedregs_bitmask, REG_SP);
196 /* create additional stack frame for spilled variables (if necessary) */
198 if ((cd->stackframesize / 4 - savedregs_num) > 0)
199 M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize / 4 - savedregs_num);
201 /* take arguments out of register or stack frame */
204 for (i = 0, len = 0; i < md->paramcount; i++) {
205 s1 = md->params[i].regoff;
206 t = md->paramtypes[i].type;
208 varindex = jd->local_map[len * 5 + t];
210 len += (IS_2_WORD_TYPE(t)) ? 2 : 1; /* 2 word type arguments */
212 if (varindex == UNUSED)
217 /* ATTENTION: we use interger registers for all arguments (even float) */
218 #if !defined(ENABLE_SOFTFLOAT)
219 if (IS_INT_LNG_TYPE(t)) {
221 if (!md->params[i].inmemory) {
222 if (!(var->flags & INMEMORY)) {
223 if (IS_2_WORD_TYPE(t))
224 M_LNGMOVE(s1, var->vv.regoff);
226 M_INTMOVE(s1, var->vv.regoff);
229 if (IS_2_WORD_TYPE(t))
230 M_LST(s1, REG_SP, var->vv.regoff);
232 M_IST(s1, REG_SP, var->vv.regoff);
235 else { /* stack arguments */
236 if (!(var->flags & INMEMORY)) { /* stack arg -> register */
237 if (IS_2_WORD_TYPE(t))
238 M_LLD(var->vv.regoff, REG_SP, cd->stackframesize + s1);
240 M_ILD(var->vv.regoff, REG_SP, cd->stackframesize + s1);
242 else { /* stack arg -> spilled */
243 /* Reuse Memory Position on Caller Stack */
244 var->vv.regoff = cd->stackframesize + s1;
247 #if !defined(ENABLE_SOFTFLOAT)
250 if (!md->params[i].inmemory) {
251 if (!(var->flags & INMEMORY)) {
252 M_CAST_INT_TO_FLT_TYPED(t, s1, var->vv.regoff);
255 if (IS_2_WORD_TYPE(t))
256 M_LST(s1, REG_SP, var->vv.regoff);
258 M_IST(s1, REG_SP, var->vv.regoff);
262 if (!(var->flags & INMEMORY)) {
263 if (IS_2_WORD_TYPE(t))
264 M_DLD(var->vv.regoff, REG_SP, cd->stackframesize + s1);
266 M_FLD(var->vv.regoff, REG_SP, cd->stackframesize + s1);
269 /* Reuse Memory Position on Caller Stack */
270 var->vv.regoff = cd->stackframesize + s1;
274 #endif /* !defined(ENABLE_SOFTFLOAT) */
277 #if defined(ENABLE_THREADS)
278 /* call monitorenter function */
280 if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
281 /* stack offset for monitor argument */
285 # if !defined(NDEBUG)
286 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
287 M_STMFD(BITMASK_ARGS, REG_SP);
292 /* get the correct lock object */
294 if (m->flags & ACC_STATIC) {
295 disp = dseg_add_address(cd, &m->class->object.header);
296 M_DSEG_LOAD(REG_A0, disp);
299 emit_nullpointer_check_force(cd, iptr, REG_A0);
302 M_STR(REG_A0, REG_SP, s1);
303 disp = dseg_add_functionptr(cd, LOCK_monitor_enter);
305 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
308 # if !defined(NDEBUG)
309 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
310 M_LDMFD(BITMASK_ARGS, REG_SP);
316 /* call trace function */
318 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
319 emit_verbosecall_enter(jd);
322 /* end of header generation */
324 /* create replacement points */
325 REPLACEMENT_POINTS_INIT(cd, jd);
327 /* SECTION: ICMD Code Generation */
328 /* for all basic blocks */
330 for (bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
332 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
334 /* is this basic block reached? */
336 if (bptr->flags < BBREACHED)
339 /* branch resolving */
341 codegen_resolve_branchrefs(cd, bptr);
343 /* handle replacement points */
344 REPLACEMENT_POINT_BLOCK_START(cd, bptr);
346 /* copy interface registers to their destination */
352 #if defined(ENABLE_LSRA)
356 var = VAR(bptr->invars[len]);
357 if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
358 if (!(var->flags & INMEMORY))
362 M_INTMOVE(REG_ITMP1, d);
363 emit_store(jd, NULL, var, d);
370 var = VAR(bptr->invars[len]);
372 if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
373 d = codegen_reg_of_var(0, var, REG_ITMP1);
374 M_INTMOVE(REG_ITMP1, d);
375 emit_store(jd, NULL, var, d);
378 assert((var->flags & INOUT));
381 #if defined(ENABLE_LSRA)
385 /* for all instructions */
388 for (iptr = bptr->iinstr; len > 0; len--, iptr++) {
390 /* add line number */
391 if (iptr->line != currentline) {
392 dseg_addlinenumber(cd, iptr->line);
393 currentline = iptr->line;
396 MCODECHECK(64); /* an instruction usually needs < 64 words */
400 case ICMD_NOP: /* ... ==> ... */
403 /* constant operations ************************************************/
405 case ICMD_ICONST: /* ... ==> ..., constant */
407 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
408 ICONST(d, iptr->sx.val.i);
409 emit_store_dst(jd, iptr, d);
412 case ICMD_ACONST: /* ... ==> ..., constant */
414 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
415 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
416 disp = dseg_add_unique_address(cd, NULL);
418 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
419 iptr->sx.val.c.ref, disp);
421 if (opt_showdisassemble)
424 M_DSEG_LOAD(d, disp);
427 ICONST(d, (u4) iptr->sx.val.anyptr);
429 emit_store_dst(jd, iptr, d);
432 case ICMD_LCONST: /* ... ==> ..., constant */
434 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
435 LCONST(d, iptr->sx.val.l);
436 emit_store_dst(jd, iptr, d);
439 case ICMD_FCONST: /* ... ==> ..., constant */
441 #if defined(ENABLE_SOFTFLOAT)
442 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
443 ICONST(d, iptr->sx.val.i);
444 emit_store_dst(jd, iptr, d);
446 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
447 FCONST(d, iptr->sx.val.f);
448 emit_store_dst(jd, iptr, d);
452 case ICMD_DCONST: /* ... ==> ..., constant */
454 #if defined(ENABLE_SOFTFLOAT)
455 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
456 LCONST(d, iptr->sx.val.l);
457 emit_store_dst(jd, iptr, d);
459 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
460 DCONST(d, iptr->sx.val.d);
461 emit_store_dst(jd, iptr, d);
466 /* load/store/copy/move operations ************************************/
468 case ICMD_ILOAD: /* ... ==> ..., content of local variable */
469 case ICMD_ALOAD: /* op1 = local variable */
473 case ICMD_ISTORE: /* ..., value ==> ... */
484 if (!(iptr->flags.bits & INS_FLAG_RETADDR))
488 /* pop operations *****************************************************/
490 /* attention: double and longs are only one entry in CACAO ICMDs */
492 case ICMD_POP: /* ..., value ==> ... */
493 case ICMD_POP2: /* ..., value, value ==> ... */
498 /* integer operations *************************************************/
500 case ICMD_INT2BYTE: /* ..., value ==> ..., value */
502 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
503 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
504 M_MOV(d, REG_LSL(s1, 24));
505 M_MOV(d, REG_ASR(d, 24));
506 emit_store_dst(jd, iptr, d);
509 case ICMD_INT2CHAR: /* ..., value ==> ..., value */
511 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
512 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
513 M_MOV(d, REG_LSL(s1, 16));
514 M_MOV(d, REG_LSR(d, 16)); /* ATTENTION: char is unsigned */
515 emit_store_dst(jd, iptr, d);
518 case ICMD_INT2SHORT: /* ..., value ==> ..., value */
520 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
521 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
522 M_MOV(d, REG_LSL(s1, 16));
523 M_MOV(d, REG_ASR(d, 16));
524 emit_store_dst(jd, iptr, d);
527 case ICMD_I2L: /* ..., value ==> ..., value */
529 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
530 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
531 M_INTMOVE(s1, GET_LOW_REG(d));
532 M_MOV(GET_HIGH_REG(d), REG_ASR(s1, 31));
533 emit_store_dst(jd, iptr, d);
536 case ICMD_L2I: /* ..., value ==> ..., value */
538 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
539 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
541 emit_store_dst(jd, iptr, d);
544 case ICMD_INEG: /* ..., value ==> ..., - value */
546 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
547 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
549 emit_store_dst(jd, iptr, d);
552 case ICMD_LNEG: /* ..., value ==> ..., - value */
554 s1 = emit_load_s1(jd, iptr, REG_ITMP12_PACKED);
555 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
556 M_RSB_IMMS(GET_LOW_REG(d), GET_LOW_REG(s1), 0);
557 M_RSC_IMM(GET_HIGH_REG(d), GET_HIGH_REG(s1), 0);
558 emit_store_dst(jd, iptr, d);
561 case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */
563 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
564 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
565 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
567 emit_store_dst(jd, iptr, d);
570 case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */
572 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
573 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
574 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
575 M_ADD_S(GET_LOW_REG(d), s1, s2);
576 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
577 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
578 M_ADC(GET_HIGH_REG(d), s1, s2);
579 emit_store_dst(jd, iptr, d);
585 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
586 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
588 if (IS_IMM(iptr->sx.val.i)) {
589 M_ADD_IMM(d, s1, iptr->sx.val.i);
590 } else if (IS_IMM(-iptr->sx.val.i)) {
591 M_SUB_IMM(d, s1, (-iptr->sx.val.i));
593 ICONST(REG_ITMP3, iptr->sx.val.i);
594 M_ADD(d, s1, REG_ITMP3);
597 emit_store_dst(jd, iptr, d);
600 case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */
601 /* sx.val.l = constant */
603 s3 = iptr->sx.val.l & 0xffffffff;
604 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
605 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
607 M_ADD_IMMS(GET_LOW_REG(d), s1, s3);
609 ICONST(REG_ITMP3, s3);
610 M_ADD_S(GET_LOW_REG(d), s1, REG_ITMP3);
612 s3 = iptr->sx.val.l >> 32;
613 s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
615 M_ADC_IMM(GET_HIGH_REG(d), s1, s3);
617 ICONST(REG_ITMP3, s3);
618 M_ADC(GET_HIGH_REG(d), s1, REG_ITMP3);
620 emit_store_dst(jd, iptr, d);
623 case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */
625 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
626 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
627 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
629 emit_store_dst(jd, iptr, d);
632 case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
634 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
635 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
636 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
637 M_SUB_S(GET_LOW_REG(d), s1, s2);
638 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
639 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
640 M_SBC(GET_HIGH_REG(d), s1, s2);
641 emit_store_dst(jd, iptr, d);
644 case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */
645 /* sx.val.i = constant */
647 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
648 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
649 if (IS_IMM(iptr->sx.val.i))
650 M_SUB_IMM(d, s1, iptr->sx.val.i);
652 ICONST(REG_ITMP3, iptr->sx.val.i);
653 M_SUB(d, s1, REG_ITMP3);
655 emit_store_dst(jd, iptr, d);
658 case ICMD_LSUBCONST: /* ..., value ==> ..., value - constant */
659 /* sx.val.l = constant */
661 s3 = iptr->sx.val.l & 0xffffffff;
662 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
663 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
665 M_SUB_IMMS(GET_LOW_REG(d), s1, s3);
667 ICONST(REG_ITMP3, s3);
668 M_SUB_S(GET_LOW_REG(d), s1, REG_ITMP3);
670 s3 = iptr->sx.val.l >> 32;
671 s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
673 M_SBC_IMM(GET_HIGH_REG(d), s1, s3);
675 ICONST(REG_ITMP3, s3);
676 M_SBC(GET_HIGH_REG(d), s1, REG_ITMP3);
678 emit_store_dst(jd, iptr, d);
681 case ICMD_IMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
683 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
684 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
685 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
687 emit_store_dst(jd, iptr, d);
690 case ICMD_IDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
691 case ICMD_IREM: /* ..., val1, val2 ==> ..., val1 % val2 */
693 s1 = emit_load_s1(jd, iptr, REG_A0);
694 s2 = emit_load_s2(jd, iptr, REG_A1);
695 emit_arithmetic_check(cd, iptr, s2);
697 /* move arguments into argument registers */
698 M_INTMOVE(s1, REG_A0);
699 M_INTMOVE(s2, REG_A1);
701 /* call builtin function */
702 bte = iptr->sx.s23.s3.bte;
703 disp = dseg_add_functionptr(cd, bte->fp);
707 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
710 /* move result into destination register */
711 d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
712 M_INTMOVE(REG_RESULT, d);
713 emit_store_dst(jd, iptr, d);
716 case ICMD_LDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
717 case ICMD_LREM: /* ..., val1, val2 ==> ..., val1 % val2 */
719 /* move arguments into argument registers */
721 s1 = emit_load_s1(jd, iptr, REG_A0_A1_PACKED);
722 s2 = emit_load_s2(jd, iptr, REG_A2_A3_PACKED);
723 /* XXX TODO: only do this if arithmetic check is really done! */
724 M_ORR(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
725 emit_arithmetic_check(cd, iptr, REG_ITMP3);
727 M_LNGMOVE(s1, REG_A0_A1_PACKED);
728 M_LNGMOVE(s2, REG_A2_A3_PACKED);
730 /* call builtin function */
731 bte = iptr->sx.s23.s3.bte;
732 disp = dseg_add_functionptr(cd, bte->fp);
736 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
739 /* move result into destination register */
740 d = codegen_reg_of_dst(jd, iptr, REG_RESULT_PACKED);
741 M_LNGMOVE(REG_RESULT_PACKED, d);
742 emit_store_dst(jd, iptr, d);
745 case ICMD_IMULPOW2: /* ..., value ==> ..., value * (2 ^ constant) */
746 /* sx.val.i = constant */
748 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
749 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
750 M_MOV(d, REG_LSL(s1, iptr->sx.val.i));
751 emit_store_dst(jd, iptr, d);
754 case ICMD_IDIVPOW2: /* ..., value ==> ..., value / (2 ^ constant) */
755 /* sx.val.i = constant */
757 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
758 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
759 /* this rounds towards 0 as java likes it */
760 M_MOV(REG_ITMP3, REG_ASR(s1, 31));
761 M_ADD(REG_ITMP3, s1, REG_LSR(REG_ITMP3, 32 - iptr->sx.val.i));
762 M_MOV(d, REG_ASR(REG_ITMP3, iptr->sx.val.i));
763 /* this rounds towards nearest, not java style */
764 /*M_MOV_S(d, REG_ASR(s1, iptr->sx.val.i));
765 M_ADCMI_IMM(d, d, 0);*/
766 emit_store_dst(jd, iptr, d);
769 case ICMD_IREMPOW2: /* ..., value ==> ..., value % constant */
770 /* sx.val.i = constant [ (2 ^ x) - 1 ] */
772 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
773 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
774 M_MOV_S(REG_ITMP1, s1);
775 M_RSBMI_IMM(REG_ITMP1, REG_ITMP1, 0);
776 if (IS_IMM(iptr->sx.val.i))
777 M_AND_IMM(REG_ITMP1, iptr->sx.val.i, d);
779 ICONST(REG_ITMP3, iptr->sx.val.i);
780 M_AND(REG_ITMP1, REG_ITMP3, d);
782 M_RSBMI_IMM(d, d, 0);
783 emit_store_dst(jd, iptr, d);
786 case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */
788 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
789 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
790 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
791 M_AND_IMM(s2, 0x1f, REG_ITMP2);
792 M_MOV(d, REG_LSL_REG(s1, REG_ITMP2));
793 emit_store_dst(jd, iptr, d);
796 case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
798 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
799 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
800 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
801 M_AND_IMM(s2, 0x1f, REG_ITMP2);
802 M_MOV(d, REG_ASR_REG(s1, REG_ITMP2));
803 emit_store_dst(jd, iptr, d);
806 case ICMD_IUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
808 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
809 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
810 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
811 M_AND_IMM(s2, 0x1f, REG_ITMP2);
812 M_MOV(d, REG_LSR_REG(s1, REG_ITMP2));
813 emit_store_dst(jd, iptr, d);
816 case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */
817 /* sx.val.i = constant */
819 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
820 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
821 M_MOV(d, REG_LSL(s1, iptr->sx.val.i & 0x1f));
822 emit_store_dst(jd, iptr, d);
825 case ICMD_ISHRCONST: /* ..., value ==> ..., value >> constant */
826 /* sx.val.i = constant */
828 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
829 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
830 /* we need to check for zero here because arm interprets it as SHR by 32 */
831 if ((iptr->sx.val.i & 0x1f) == 0) {
834 M_MOV(d, REG_ASR(s1, iptr->sx.val.i & 0x1f));
836 emit_store_dst(jd, iptr, d);
839 case ICMD_IUSHRCONST: /* ..., value ==> ..., value >>> constant */
840 /* sx.val.i = constant */
842 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
843 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
844 /* we need to check for zero here because arm interprets it as SHR by 32 */
845 if ((iptr->sx.val.i & 0x1f) == 0)
848 M_MOV(d, REG_LSR(s1, iptr->sx.val.i & 0x1f));
849 emit_store_dst(jd, iptr, d);
852 case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */
854 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
855 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
856 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
858 emit_store_dst(jd, iptr, d);
861 case ICMD_LAND: /* ..., val1, val2 ==> ..., val1 & val2 */
863 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
864 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
865 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
866 M_AND(s1, s2, GET_LOW_REG(d));
867 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
868 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
869 M_AND(s1, s2, GET_HIGH_REG(d));
870 emit_store_dst(jd, iptr, d);
873 case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */
875 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
876 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
877 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
879 emit_store_dst(jd, iptr, d);
882 case ICMD_LOR: /* ..., val1, val2 ==> ..., val1 | val2 */
884 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
885 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
886 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
887 M_ORR(s1, s2, GET_LOW_REG(d));
888 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
889 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
890 M_ORR(s1, s2, GET_HIGH_REG(d));
891 emit_store_dst(jd, iptr, d);
894 case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
896 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
897 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
898 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
900 emit_store_dst(jd, iptr, d);
903 case ICMD_LXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
905 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
906 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
907 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
908 M_EOR(s1, s2, GET_LOW_REG(d));
909 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
910 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
911 M_EOR(s1, s2, GET_HIGH_REG(d));
912 emit_store_dst(jd, iptr, d);
916 /* floating operations ************************************************/
918 #if !defined(ENABLE_SOFTFLOAT)
920 case ICMD_FNEG: /* ..., value ==> ..., - value */
922 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
923 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
925 emit_store_dst(jd, iptr, d);
928 case ICMD_FADD: /* ..., val1, val2 ==> ..., val1 + val2 */
930 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
931 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
932 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
934 emit_store_dst(jd, iptr, d);
937 case ICMD_FSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
939 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
940 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
941 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
943 emit_store_dst(jd, iptr, d);
946 case ICMD_FMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
948 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
949 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
950 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
952 emit_store_dst(jd, iptr, d);
955 case ICMD_FDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
956 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
957 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
958 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
960 emit_store_dst(jd, iptr, d);
963 /* ATTENTION: Jave does not want IEEE behaviour in FREM, do
966 case ICMD_FREM: /* ..., val1, val2 ==> ..., val1 % val2 */
968 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
969 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
970 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
972 emit_store_dst(jd, iptr, d);
975 case ICMD_DNEG: /* ..., value ==> ..., - value */
977 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
978 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
980 emit_store_dst(jd, iptr, d);
983 case ICMD_DADD: /* ..., val1, val2 ==> ..., val1 + val2 */
985 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
986 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
987 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
989 emit_store_dst(jd, iptr, d);
992 case ICMD_DSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
994 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
995 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
996 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
998 emit_store_dst(jd, iptr, d);
1001 case ICMD_DMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
1003 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1004 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1005 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1007 emit_store_dst(jd, iptr, d);
1010 case ICMD_DDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
1012 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1013 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1014 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1016 emit_store_dst(jd, iptr, d);
1019 /* ATTENTION: Jave does not want IEEE behaviour in DREM, do
1022 case ICMD_DREM: /* ..., val1, val2 ==> ..., val1 % val2 */
1024 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1025 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1026 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1028 emit_store_dst(jd, iptr, d);
1031 case ICMD_I2F: /* ..., value ==> ..., (float) value */
1033 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1034 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1036 emit_store_dst(jd, iptr, d);
1039 case ICMD_I2D: /* ..., value ==> ..., (double) value */
1041 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1042 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1044 emit_store_dst(jd, iptr, d);
1047 case ICMD_F2I: /* ..., value ==> ..., (int) value */
1049 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1050 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1051 /* this uses round towards zero, as Java likes it */
1053 /* this checks for NaN; to return zero as Java likes it */
1056 emit_store_dst(jd, iptr, d);
1059 case ICMD_D2I: /* ..., value ==> ..., (int) value */
1061 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1062 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1063 /* this uses round towards zero, as Java likes it */
1065 /* this checks for NaN; to return zero as Java likes it */
1068 emit_store_dst(jd, iptr, d);
1071 case ICMD_D2F: /* ..., value ==> ..., (float) value */
1073 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1074 d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1076 emit_store_dst(jd, iptr, d);
1079 case ICMD_F2D: /* ..., value ==> ..., (double) value */
1081 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1082 d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1084 emit_store_dst(jd, iptr, d);
1087 case ICMD_FCMPG: /* ..., val1, val2 ==> ..., val1 fcmpg val2 */
1089 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1090 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1091 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1094 M_SUBGT_IMM(d, d, 1);
1095 M_ADDLT_IMM(d, d, 1);
1096 emit_store_dst(jd, iptr, d);
1099 case ICMD_DCMPG: /* ..., val1, val2 ==> ..., val1 dcmpg val2 */
1101 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1102 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1103 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1106 M_SUBGT_IMM(d, d, 1);
1107 M_ADDLT_IMM(d, d, 1);
1108 emit_store_dst(jd, iptr, d);
1111 case ICMD_FCMPL: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
1113 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1114 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1115 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1118 M_SUBLT_IMM(d, d, 1);
1119 M_ADDGT_IMM(d, d, 1);
1120 emit_store_dst(jd, iptr, d);
1123 case ICMD_DCMPL: /* ..., val1, val2 ==> ..., val1 dcmpl val2 */
1125 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1126 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1127 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1130 M_SUBLT_IMM(d, d, 1);
1131 M_ADDGT_IMM(d, d, 1);
1132 emit_store_dst(jd, iptr, d);
1135 #endif /* !defined(ENABLE_SOFTFLOAT) */
1138 /* memory operations **************************************************/
1140 case ICMD_ARRAYLENGTH: /* ..., arrayref ==> ..., length */
1142 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1143 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1144 /* implicit null-pointer check */
1145 M_ILD_INTERN(d, s1, OFFSET(java_arrayheader, size));
1146 emit_store_dst(jd, iptr, d);
1149 case ICMD_BALOAD: /* ..., arrayref, index ==> ..., value */
1151 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1152 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1153 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1154 /* implicit null-pointer check */
1155 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1156 M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
1157 M_LDRSB(d, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1158 emit_store_dst(jd, iptr, d);
1161 case ICMD_CALOAD: /* ..., arrayref, index ==> ..., value */
1163 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1164 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1165 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1166 /* implicit null-pointer check */
1167 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1168 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1169 M_LDRH(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1170 emit_store_dst(jd, iptr, d);
1173 case ICMD_SALOAD: /* ..., arrayref, index ==> ..., value */
1175 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1176 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1177 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1178 /* implicit null-pointer check */
1179 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1180 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1181 M_LDRSH(d, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1182 emit_store_dst(jd, iptr, d);
1185 case ICMD_IALOAD: /* ..., arrayref, index ==> ..., value */
1187 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1188 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1189 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1190 /* implicit null-pointer check */
1191 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1192 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1193 M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1194 emit_store_dst(jd, iptr, d);
1197 case ICMD_LALOAD: /* ..., arrayref, index ==> ..., value */
1199 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1200 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1201 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1202 /* implicit null-pointer check */
1203 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1204 M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1205 M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_longarray, data[0]));
1206 emit_store_dst(jd, iptr, d);
1209 case ICMD_FALOAD: /* ..., arrayref, index ==> ..., value */
1211 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1212 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1213 /* implicit null-pointer check */
1214 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1215 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1216 #if !defined(ENABLE_SOFTFLOAT)
1217 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1218 M_FLD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1220 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1221 M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1223 emit_store_dst(jd, iptr, d);
1226 case ICMD_DALOAD: /* ..., arrayref, index ==> ..., value */
1228 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1229 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1230 /* implicit null-pointer check */
1231 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1232 M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1233 #if !defined(ENABLE_SOFTFLOAT)
1234 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1235 M_DLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray, data[0]));
1237 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1238 M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray, data[0]));
1240 emit_store_dst(jd, iptr, d);
1243 case ICMD_AALOAD: /* ..., arrayref, index ==> ..., value */
1245 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1246 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1247 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1248 /* implicit null-pointer check */
1249 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1250 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1251 M_LDR_INTERN(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1252 emit_store_dst(jd, iptr, d);
1255 case ICMD_BASTORE: /* ..., arrayref, index, value ==> ... */
1257 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1258 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1259 /* implicit null-pointer check */
1260 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1261 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1262 M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
1263 M_STRB(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1266 case ICMD_CASTORE: /* ..., arrayref, index, value ==> ... */
1268 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1269 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1270 /* implicit null-pointer check */
1271 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1272 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1273 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1274 M_STRH(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1277 case ICMD_SASTORE: /* ..., arrayref, index, value ==> ... */
1279 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1280 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1281 /* implicit null-pointer check */
1282 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1283 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1284 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1285 M_STRH(s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1288 case ICMD_IASTORE: /* ..., arrayref, index, value ==> ... */
1290 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1291 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1292 /* implicit null-pointer check */
1293 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1294 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1295 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1296 M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1299 case ICMD_LASTORE: /* ..., arrayref, index, value ==> ... */
1301 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1302 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1303 /* implicit null-pointer check */
1304 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1305 M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1306 s3 = emit_load_s3(jd, iptr, REG_ITMP12_PACKED);
1307 M_LST_INTERN(s3, REG_ITMP3, OFFSET(java_longarray, data[0]));
1310 case ICMD_FASTORE: /* ..., arrayref, index, value ==> ... */
1312 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1313 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1314 /* implicit null-pointer check */
1315 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1316 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1317 #if !defined(ENABLE_SOFTFLOAT)
1318 s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1319 M_FST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1321 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1322 M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1326 case ICMD_DASTORE: /* ..., arrayref, index, value ==> ... */
1328 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1329 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1330 /* implicit null-pointer check */
1331 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1332 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 3)); /* REG_ITMP1 = s1 + 8 * s2 */
1333 #if !defined(ENABLE_SOFTFLOAT)
1334 s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1335 M_DST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1337 s3 = emit_load_s3(jd, iptr, REG_ITMP23_PACKED);
1338 M_LST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1342 case ICMD_AASTORE: /* ..., arrayref, index, value ==> ... */
1344 s1 = emit_load_s1(jd, iptr, REG_A0);
1345 s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1346 s3 = emit_load_s3(jd, iptr, REG_A1);
1348 /* implicit null-pointer check */
1349 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1351 /* move arguments to argument registers */
1352 M_INTMOVE(s1, REG_A0);
1353 M_INTMOVE(s3, REG_A1);
1355 /* call builtin function */
1356 disp = dseg_add_functionptr(cd, BUILTIN_canstore);
1357 M_DSEG_BRANCH(disp);
1360 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
1363 /* check resturn value of builtin */
1364 emit_exception_check(cd, iptr);
1366 /* finally store address into array */
1367 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1368 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1369 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1370 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1371 M_STR_INTERN(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1374 case ICMD_GETSTATIC: /* ... ==> ..., value */
1376 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1377 unresolved_field *uf = iptr->sx.s23.s3.uf;
1379 fieldtype = uf->fieldref->parseddesc.fd->type;
1381 disp = dseg_add_unique_address(cd, NULL);
1383 patcher_add_patch_ref(jd, PATCHER_get_putstatic, uf, disp);
1385 if (opt_showdisassemble)
1389 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1391 fieldtype = fi->type;
1393 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1394 patcher_add_patch_ref(jd, PATCHER_initialize_class,
1397 if (opt_showdisassemble)
1401 disp = dseg_add_address(cd, &(fi->value));
1404 M_DSEG_LOAD(REG_ITMP3, disp);
1405 switch (fieldtype) {
1407 #if defined(ENABLE_SOFTFLOAT)
1411 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1412 M_ILD_INTERN(d, REG_ITMP3, 0);
1415 #if defined(ENABLE_SOFTFLOAT)
1418 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1419 M_LLD_INTERN(d, REG_ITMP3, 0);
1421 #if !defined(ENABLE_SOFTFLOAT)
1423 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1424 M_FLD_INTERN(d, REG_ITMP3, 0);
1427 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1428 M_DLD_INTERN(d, REG_ITMP3, 0);
1434 emit_store_dst(jd, iptr, d);
1437 case ICMD_PUTSTATIC: /* ..., value ==> ... */
1439 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1440 unresolved_field *uf = iptr->sx.s23.s3.uf;
1442 fieldtype = uf->fieldref->parseddesc.fd->type;
1444 disp = dseg_add_unique_address(cd, NULL);
1446 patcher_add_patch_ref(jd, PATCHER_get_putstatic, uf, disp);
1448 if (opt_showdisassemble)
1452 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1454 fieldtype = fi->type;
1456 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1457 patcher_add_patch_ref(jd, PATCHER_initialize_class,
1460 if (opt_showdisassemble)
1464 disp = dseg_add_address(cd, &(fi->value));
1467 M_DSEG_LOAD(REG_ITMP3, disp);
1468 switch (fieldtype) {
1470 #if defined(ENABLE_SOFTFLOAT)
1474 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1475 M_IST_INTERN(s1, REG_ITMP3, 0);
1478 #if defined(ENABLE_SOFTFLOAT)
1481 s1 = emit_load_s1(jd, iptr, REG_ITMP12_PACKED);
1482 M_LST_INTERN(s1, REG_ITMP3, 0);
1484 #if !defined(ENABLE_SOFTFLOAT)
1486 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1487 M_FST_INTERN(s1, REG_ITMP3, 0);
1490 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1491 M_DST_INTERN(s1, REG_ITMP3, 0);
1499 case ICMD_GETFIELD: /* ..., objectref, value ==> ... */
1501 s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1502 emit_nullpointer_check(cd, iptr, s1);
1505 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1506 unresolved_field *uf = iptr->sx.s23.s3.uf;
1508 fieldtype = uf->fieldref->parseddesc.fd->type;
1511 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1513 fieldtype = fi->type;
1517 #if !defined(ENABLE_SOFTFLOAT)
1518 /* HACK: softnull checks on floats */
1519 if (!INSTRUCTION_MUST_CHECK(iptr) && IS_FLT_DBL_TYPE(fieldtype))
1520 emit_nullpointer_check_force(cd, iptr, s1);
1523 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1524 unresolved_field *uf = iptr->sx.s23.s3.uf;
1526 patcher_add_patch_ref(jd, PATCHER_get_putfield, uf, 0);
1528 if (opt_showdisassemble)
1534 switch (fieldtype) {
1536 #if defined(ENABLE_SOFTFLOAT)
1540 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1544 #if defined(ENABLE_SOFTFLOAT)
1547 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1550 #if !defined(ENABLE_SOFTFLOAT)
1552 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1556 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1563 emit_store_dst(jd, iptr, d);
1566 case ICMD_PUTFIELD: /* ..., objectref, value ==> ... */
1568 s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1569 emit_nullpointer_check(cd, iptr, s1);
1571 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1572 unresolved_field *uf = iptr->sx.s23.s3.uf;
1574 fieldtype = uf->fieldref->parseddesc.fd->type;
1577 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1579 fieldtype = fi->type;
1583 #if !defined(ENABLE_SOFTFLOAT)
1584 /* HACK: softnull checks on floats */
1585 if (!INSTRUCTION_MUST_CHECK(iptr) && IS_FLT_DBL_TYPE(fieldtype))
1586 emit_nullpointer_check_force(cd, iptr, s1);
1589 switch (fieldtype) {
1591 #if defined(ENABLE_SOFTFLOAT)
1595 s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1597 #if defined(ENABLE_SOFTFLOAT)
1598 case TYPE_DBL: /* fall through */
1601 s2 = emit_load_s2(jd, iptr, REG_ITMP12_PACKED);
1603 #if !defined(ENABLE_SOFTFLOAT)
1606 s2 = emit_load_s2(jd, iptr, REG_FTMP1);
1613 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1614 unresolved_field *uf = iptr->sx.s23.s3.uf;
1616 patcher_add_patch_ref(jd, PATCHER_get_putfield, uf, 0);
1618 if (opt_showdisassemble)
1624 switch (fieldtype) {
1626 #if defined(ENABLE_SOFTFLOAT)
1630 M_IST(s2, s1, disp);
1633 #if defined(ENABLE_SOFTFLOAT)
1636 M_LST(s2, s1, disp);
1638 #if !defined(ENABLE_SOFTFLOAT)
1640 M_FST(s2, s1, disp);
1643 M_DST(s2, s1, disp);
1652 /* branch operations **************************************************/
1654 case ICMD_ATHROW: /* ..., objectref ==> ... (, objectref) */
1656 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1657 M_INTMOVE(s1, REG_ITMP1_XPTR);
1658 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1659 patcher_add_patch_ref(jd, PATCHER_resolve_class,
1660 iptr->sx.s23.s2.uc, 0);
1662 if (opt_showdisassemble)
1665 disp = dseg_add_functionptr(cd, asm_handle_exception);
1666 M_DSEG_LOAD(REG_ITMP3, disp);
1667 M_MOV(REG_ITMP2_XPC, REG_PC);
1668 M_MOV(REG_PC, REG_ITMP3);
1669 M_NOP; /* nop ensures that XPC is less than the end */
1670 /* of basic block */
1673 case ICMD_GOTO: /* ... ==> ... */
1676 emit_br(cd, iptr->dst.block);
1679 case ICMD_JSR: /* ... ==> ... */
1681 emit_br(cd, iptr->sx.s23.s3.jsrtarget.block);
1684 case ICMD_IFNULL: /* ..., value ==> ... */
1685 case ICMD_IFNONNULL:
1687 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1689 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IFNULL, BRANCH_OPT_NONE);
1692 case ICMD_IFLT: /* ..., value ==> ... */
1693 case ICMD_IFLE: /* op1 = target JavaVM pc, val.i = constant */
1699 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1700 M_COMPARE(s1, iptr->sx.val.i);
1701 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IFEQ, BRANCH_OPT_NONE);
1704 case ICMD_IF_LEQ: /* ..., value ==> ... */
1706 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1707 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1708 if (iptr->sx.val.l == 0) {
1709 M_ORR_S(s1, s2, REG_ITMP3);
1712 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1713 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1714 M_CMP(s1, REG_ITMP3);*/
1715 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1716 M_CMPEQ(s2, REG_ITMP3);
1718 emit_beq(cd, iptr->dst.block);
1721 case ICMD_IF_LLT: /* ..., value ==> ... */
1723 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1724 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1725 if (iptr->sx.val.l == 0) {
1726 /* if high word is less than zero, the whole long is too */
1728 emit_blt(cd, iptr->dst.block);
1731 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1732 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1733 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1734 M_CMP(s1, REG_ITMP3);*/
1735 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1736 M_MOVGT_IMM(2, REG_ITMP1);
1737 M_MOVEQ_IMM(1, REG_ITMP1);
1739 /* low compare: x=x-1(ifLO) */
1740 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1741 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1742 M_CMP(s2, REG_ITMP3);*/
1743 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1745 /* branch if (x LT 1) */
1746 M_CMP_IMM(REG_ITMP1, 1);
1747 emit_blt(cd, iptr->dst.block);
1751 case ICMD_IF_LLE: /* ..., value ==> ... */
1753 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1754 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1755 if (iptr->sx.val.l == 0) {
1756 /* if high word is less than zero, the whole long is too */
1758 emit_blt(cd, iptr->dst.block);
1760 /* ... otherwise the low word has to be zero (tricky!) */
1762 emit_beq(cd, iptr->dst.block);
1765 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1766 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1767 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1768 M_CMP(s1, REG_ITMP3);*/
1769 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1770 M_MOVGT_IMM(2, REG_ITMP1);
1771 M_MOVEQ_IMM(1, REG_ITMP1);
1773 /* low compare: x=x+1(ifHI) */
1774 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1775 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1776 M_CMP(s2, REG_ITMP3);*/
1777 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1779 /* branch if (x LE 1) */
1780 M_CMP_IMM(REG_ITMP1, 1);
1781 emit_ble(cd, iptr->dst.block);
1785 case ICMD_IF_LGE: /* ..., value ==> ... */
1787 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1788 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1789 if (iptr->sx.val.l == 0) {
1790 /* if high word is greater or equal zero, the whole long is too */
1792 emit_bge(cd, iptr->dst.block);
1795 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1796 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1797 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1798 M_CMP(s1, REG_ITMP3);*/
1799 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1800 M_MOVGT_IMM(2, REG_ITMP1);
1801 M_MOVEQ_IMM(1, REG_ITMP1);
1803 /* low compare: x=x-1(ifLO) */
1804 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1805 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1806 M_CMP(s2, REG_ITMP3);*/
1807 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1809 /* branch if (x GE 1) */
1810 M_CMP_IMM(REG_ITMP1, 1);
1811 emit_bge(cd, iptr->dst.block);
1815 case ICMD_IF_LGT: /* ..., value ==> ... */
1817 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1818 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1820 if (iptr->sx.val.l == 0) {
1821 /* if high word is greater than zero, the whole long is too */
1824 codegen_add_branch_ref(cd, iptr->dst.block);
1826 /* ... or high was zero and low is non zero (tricky!) */
1827 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1828 M_MOVLT_IMM(1, REG_ITMP3);
1829 M_ORR_S(REG_ITMP3, s2, REG_ITMP3);
1831 codegen_add_branch_ref(cd, iptr->dst.block);
1835 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1836 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1837 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1838 M_CMP(s1, REG_ITMP3);*/
1839 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1840 M_MOVGT_IMM(2, REG_ITMP1);
1841 M_MOVEQ_IMM(1, REG_ITMP1);
1843 /* low compare: x=x+1(ifHI) */
1844 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1845 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1846 M_CMP(s2, REG_ITMP3);*/
1847 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1849 /* branch if (x GT 1) */
1850 M_CMP_IMM(REG_ITMP1, 1);
1851 emit_bgt(cd, iptr->dst.block);
1857 case ICMD_IF_LNE: /* ..., value ==> ... */
1859 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1860 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1861 if (iptr->sx.val.l == 0) {
1862 M_ORR_S(s1, s2, REG_ITMP3);
1865 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1866 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1867 M_CMP(s1, REG_ITMP3);*/
1868 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1869 M_CMPEQ(s2, REG_ITMP3);
1871 emit_bne(cd, iptr->dst.block);
1874 case ICMD_IF_ICMPEQ: /* ..., value, value ==> ... */
1875 case ICMD_IF_ICMPNE:
1876 case ICMD_IF_ICMPLT:
1877 case ICMD_IF_ICMPLE:
1878 case ICMD_IF_ICMPGT:
1879 case ICMD_IF_ICMPGE:
1881 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1882 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1884 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_ICMPEQ, BRANCH_OPT_NONE);
1887 case ICMD_IF_ACMPEQ: /* ..., value, value ==> ... */
1888 case ICMD_IF_ACMPNE:
1890 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1891 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1893 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_ACMPEQ, BRANCH_OPT_NONE);
1896 case ICMD_IF_LCMPEQ: /* ..., value, value ==> ... */
1897 /* op1 = target JavaVM pc */
1899 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1900 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1903 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1904 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1907 emit_beq(cd, iptr->dst.block);
1910 case ICMD_IF_LCMPNE: /* ..., value, value ==> ... */
1911 /* op1 = target JavaVM pc */
1913 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1914 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1917 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1918 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1921 emit_bne(cd, iptr->dst.block);
1924 case ICMD_IF_LCMPLT: /* ..., value, value ==> ... */
1925 /* op1 = target JavaVM pc */
1927 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1928 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1929 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1931 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1932 M_MOVGT_IMM(2, REG_ITMP3);
1933 M_MOVEQ_IMM(1, REG_ITMP3);
1935 /* low compare: x=x-1(ifLO) */
1936 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1937 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1939 M_SUBLO_IMM(REG_ITMP3, REG_ITMP3, 1);
1941 /* branch if (x LT 1) */
1942 M_CMP_IMM(REG_ITMP3, 1);
1943 emit_blt(cd, iptr->dst.block);
1946 case ICMD_IF_LCMPLE: /* ..., value, value ==> ... */
1947 /* op1 = target JavaVM pc */
1949 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1950 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1951 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1953 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1954 M_MOVGT_IMM(2, REG_ITMP3);
1955 M_MOVEQ_IMM(1, REG_ITMP3);
1957 /* low compare: x=x-1(ifLO) */
1958 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1959 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1961 M_ADDHI_IMM(REG_ITMP3, REG_ITMP3, 1);
1963 /* branch if (x LE 1) */
1964 M_CMP_IMM(REG_ITMP3, 1);
1965 emit_ble(cd, iptr->dst.block);
1968 case ICMD_IF_LCMPGT: /* ..., value, value ==> ... */
1969 /* op1 = target JavaVM pc */
1971 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1972 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1973 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1975 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1976 M_MOVGT_IMM(2, REG_ITMP3);
1977 M_MOVEQ_IMM(1, REG_ITMP3);
1979 /* low compare: x=x-1(ifLO) */
1980 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1981 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1983 M_ADDHI_IMM(REG_ITMP3, REG_ITMP3, 1);
1985 /* branch if (x GT 1) */
1986 M_CMP_IMM(REG_ITMP3, 1);
1987 emit_bgt(cd, iptr->dst.block);
1990 case ICMD_IF_LCMPGE: /* ..., value, value ==> ... */
1991 /* op1 = target JavaVM pc */
1993 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1994 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1995 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1997 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1998 M_MOVGT_IMM(2, REG_ITMP3);
1999 M_MOVEQ_IMM(1, REG_ITMP3);
2001 /* low compare: x=x-1(ifLO) */
2002 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
2003 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
2005 M_SUBLO_IMM(REG_ITMP3, REG_ITMP3, 1);
2007 /* branch if (x GE 1) */
2008 M_CMP_IMM(REG_ITMP3, 1);
2009 emit_bge(cd, iptr->dst.block);
2012 case ICMD_TABLESWITCH: /* ..., index ==> ... */
2015 branch_target_t *table;
2017 table = iptr->dst.table;
2019 l = iptr->sx.s23.s2.tablelow;
2020 i = iptr->sx.s23.s3.tablehigh;
2022 /* calculate new index (index - low) */
2023 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2025 M_INTMOVE(s1, REG_ITMP1);
2026 } else if (IS_IMM(l)) {
2027 M_SUB_IMM(REG_ITMP1, s1, l);
2029 ICONST(REG_ITMP2, l);
2030 M_SUB(REG_ITMP1, s1, REG_ITMP2);
2033 /* range check (index <= high-low) */
2035 M_COMPARE(REG_ITMP1, i-1);
2036 emit_bugt(cd, table[0].block);
2038 /* build jump table top down and use address of lowest entry */
2043 dseg_add_target(cd, table->block);
2048 /* length of dataseg after last dseg_add_target is used by load */
2049 /* TODO: this loads from data-segment */
2050 M_ADD(REG_ITMP2, REG_PV, REG_LSL(REG_ITMP1, 2));
2051 M_LDR(REG_PC, REG_ITMP2, -(cd->dseglen));
2054 case ICMD_LOOKUPSWITCH: /* ..., key ==> ... */
2057 lookup_target_t *lookup;
2059 lookup = iptr->dst.lookup;
2061 i = iptr->sx.s23.s2.lookupcount;
2064 MCODECHECK((i<<2)+8);
2065 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2068 M_COMPARE(s1, lookup->value);
2069 emit_beq(cd, lookup->target.block);
2073 /* default branch */
2074 emit_br(cd, iptr->sx.s23.s3.lookupdefault.block);
2078 case ICMD_FRETURN: /* ..., retvalue ==> ... */
2080 #if !defined(ENABLE_SOFTFLOAT)
2081 REPLACEMENT_POINT_RETURN(cd, iptr);
2082 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
2083 M_CAST_FLT_TO_INT_TYPED(VAROP(iptr->s1)->type, s1, REG_RESULT);
2084 goto ICMD_RETURN_do;
2087 case ICMD_IRETURN: /* ..., retvalue ==> ... */
2089 REPLACEMENT_POINT_RETURN(cd, iptr);
2090 s1 = emit_load_s1(jd, iptr, REG_RESULT);
2091 M_INTMOVE(s1, REG_RESULT);
2092 goto ICMD_RETURN_do;
2094 case ICMD_DRETURN: /* ..., retvalue ==> ... */
2096 #if !defined(ENABLE_SOFTFLOAT)
2097 REPLACEMENT_POINT_RETURN(cd, iptr);
2098 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
2099 M_CAST_FLT_TO_INT_TYPED(VAROP(iptr->s1)->type, s1, REG_RESULT_PACKED);
2100 goto ICMD_RETURN_do;
2103 case ICMD_LRETURN: /* ..., retvalue ==> ... */
2105 REPLACEMENT_POINT_RETURN(cd, iptr);
2106 s1 = emit_load_s1(jd, iptr, REG_RESULT_PACKED);
2107 M_LNGMOVE(s1, REG_RESULT_PACKED);
2108 goto ICMD_RETURN_do;
2110 case ICMD_ARETURN: /* ..., retvalue ==> ... */
2112 REPLACEMENT_POINT_RETURN(cd, iptr);
2113 s1 = emit_load_s1(jd, iptr, REG_RESULT);
2114 M_INTMOVE(s1, REG_RESULT);
2115 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2116 patcher_add_patch_ref(jd, PATCHER_resolve_class,
2117 iptr->sx.s23.s2.uc, 0);
2119 if (opt_showdisassemble)
2122 goto ICMD_RETURN_do;
2124 case ICMD_RETURN: /* ... ==> ... */
2126 REPLACEMENT_POINT_RETURN(cd, iptr);
2129 #if !defined(NDEBUG)
2130 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
2131 emit_verbosecall_exit(jd);
2134 #if defined(ENABLE_THREADS)
2135 /* call monitorexit function */
2137 if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2138 /* stack offset for monitor argument */
2140 s1 = rd->memuse * 8;
2142 /* we need to save the proper return value */
2144 switch (iptr->opc) {
2148 case ICMD_FRETURN: /* XXX TWISTI: is that correct? */
2150 M_STMFD(BITMASK_RESULT, REG_SP);
2155 M_LDR(REG_A0, REG_SP, s1);
2156 disp = dseg_add_functionptr(cd, LOCK_monitor_exit);
2157 M_DSEG_BRANCH(disp);
2159 /* we no longer need PV here, no more loading */
2160 /*s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2161 M_RECOMPUTE_PV(s1);*/
2163 switch (iptr->opc) {
2167 case ICMD_FRETURN: /* XXX TWISTI: is that correct? */
2169 M_LDMFD(BITMASK_RESULT, REG_SP);
2175 /* deallocate stackframe for spilled variables */
2177 if ((cd->stackframesize / 4 - savedregs_num) > 0)
2178 M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize / 4 - savedregs_num);
2180 /* restore callee saved registers + do return */
2182 if (savedregs_bitmask) {
2183 if (!jd->isleafmethod) {
2184 savedregs_bitmask &= ~(1<<REG_LR);
2185 savedregs_bitmask |= (1<<REG_PC);
2187 M_LDMFD(savedregs_bitmask, REG_SP);
2190 /* if LR was not on stack, we need to return manually */
2192 if (jd->isleafmethod)
2193 M_MOV(REG_PC, REG_LR);
2196 case ICMD_BUILTIN: /* ..., arg1, arg2, arg3 ==> ... */
2198 bte = iptr->sx.s23.s3.bte;
2200 goto ICMD_INVOKE_do;
2202 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ... */
2203 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2204 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer */
2205 case ICMD_INVOKEINTERFACE:
2207 REPLACEMENT_POINT_INVOKE(cd, iptr);
2209 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2211 um = iptr->sx.s23.s3.um;
2212 md = um->methodref->parseddesc.md;
2215 lm = iptr->sx.s23.s3.fmiref->p.method;
2217 md = lm->parseddesc;
2221 /* copy arguments to registers or stack location */
2223 s3 = md->paramcount;
2225 MCODECHECK((s3 << 1) + 64);
2227 for (s3 = s3 - 1; s3 >= 0; s3--) {
2228 var = VAR(iptr->sx.s23.s2.args[s3]);
2229 d = md->params[s3].regoff;
2231 if (var->flags & PREALLOC) /* argument was precolored? */
2234 /* TODO: document me */
2235 #if !defined(ENABLE_SOFTFLOAT)
2236 if (IS_INT_LNG_TYPE(var->type)) {
2237 #endif /* !defined(ENABLE_SOFTFLOAT) */
2238 if (!md->params[s3].inmemory) {
2239 s1 = emit_load(jd, iptr, var, d);
2241 if (IS_2_WORD_TYPE(var->type))
2247 if (IS_2_WORD_TYPE(var->type)) {
2248 s1 = emit_load(jd, iptr, var, REG_ITMP12_PACKED);
2249 M_LST(s1, REG_SP, d);
2252 s1 = emit_load(jd, iptr, var, REG_ITMP1);
2253 M_IST(s1, REG_SP, d);
2256 #if !defined(ENABLE_SOFTFLOAT)
2259 if (!md->params[s3].inmemory) {
2260 s1 = emit_load(jd, iptr, var, REG_FTMP1);
2261 M_CAST_FLT_TO_INT_TYPED(var->type, s1, d);
2264 s1 = emit_load(jd, iptr, var, REG_FTMP1);
2265 if (IS_2_WORD_TYPE(var->type))
2266 M_DST(s1, REG_SP, d);
2268 M_FST(s1, REG_SP, d);
2271 #endif /* !defined(ENABLE_SOFTFLOAT) */
2274 switch (iptr->opc) {
2277 if (bte->stub == NULL) {
2278 disp = dseg_add_functionptr(cd, bte->fp);
2280 disp = dseg_add_functionptr(cd, bte->stub);
2283 M_DSEG_LOAD(REG_PV, disp); /* pointer to built-in-function */
2285 /* generate the actual call */
2287 M_MOV(REG_LR, REG_PC);
2288 M_MOV(REG_PC, REG_PV);
2289 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2292 emit_exception_check(cd, iptr);
2295 case ICMD_INVOKESPECIAL:
2296 emit_nullpointer_check(cd, iptr, REG_A0);
2299 case ICMD_INVOKESTATIC:
2301 disp = dseg_add_unique_address(cd, NULL);
2303 patcher_add_patch_ref(jd, PATCHER_invokestatic_special,
2306 if (opt_showdisassemble)
2310 disp = dseg_add_address(cd, lm->stubroutine);
2312 M_DSEG_LOAD(REG_PV, disp); /* Pointer to method */
2314 /* generate the actual call */
2316 M_MOV(REG_LR, REG_PC);
2317 M_MOV(REG_PC, REG_PV);
2318 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2322 case ICMD_INVOKEVIRTUAL:
2324 patcher_add_patch_ref(jd, PATCHER_invokevirtual, um, 0);
2326 if (opt_showdisassemble)
2332 s1 = OFFSET(vftbl_t, table[0]) +
2333 sizeof(methodptr) * lm->vftblindex;
2335 /* implicit null-pointer check */
2336 M_LDR_INTERN(REG_METHODPTR, REG_A0,
2337 OFFSET(java_objectheader, vftbl));
2338 M_LDR_INTERN(REG_PV, REG_METHODPTR, s1);
2340 /* generate the actual call */
2342 M_MOV(REG_LR, REG_PC);
2343 M_MOV(REG_PC, REG_PV);
2344 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2348 case ICMD_INVOKEINTERFACE:
2350 patcher_add_patch_ref(jd, PATCHER_invokeinterface, um, 0);
2352 if (opt_showdisassemble)
2359 s1 = OFFSET(vftbl_t, interfacetable[0]) -
2360 sizeof(methodptr*) * lm->class->index;
2361 s2 = sizeof(methodptr) * (lm - lm->class->methods);
2364 /* implicit null-pointer check */
2365 M_LDR_INTERN(REG_METHODPTR, REG_A0,
2366 OFFSET(java_objectheader, vftbl));
2367 M_LDR_INTERN(REG_METHODPTR, REG_METHODPTR, s1);
2368 M_LDR_INTERN(REG_PV, REG_METHODPTR, s2);
2370 /* generate the actual call */
2372 M_MOV(REG_LR, REG_PC);
2373 M_MOV(REG_PC, REG_PV);
2374 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2379 /* store size of call code in replacement point */
2380 REPLACEMENT_POINT_INVOKE_RETURN(cd, iptr);
2382 /* store return value */
2384 d = md->returntype.type;
2386 #if !defined(__SOFTFP__)
2387 /* TODO: this is only a hack, since we use R0/R1 for float
2388 return! this depends on gcc; it is independent from
2389 our ENABLE_SOFTFLOAT define */
2390 if (iptr->opc == ICMD_BUILTIN && d != TYPE_VOID && IS_FLT_DBL_TYPE(d)) {
2391 #if 0 && !defined(NDEBUG)
2392 dolog("BUILTIN that returns float or double (%s.%s)", m->class->name->text, m->name->text);
2394 /* we cannot use this macro, since it is not defined
2395 in ENABLE_SOFTFLOAT M_CAST_FLT_TO_INT_TYPED(d,
2396 REG_FRESULT, REG_RESULT_TYPED(d)); */
2397 if (IS_2_WORD_TYPE(d)) {
2398 DCD(0xed2d8102); /* stfd f0, [sp, #-8]! */
2399 M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
2401 DCD(0xed2d0101); /* stfs f0, [sp, #-4]!*/
2402 M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
2407 if (d != TYPE_VOID) {
2408 #if !defined(ENABLE_SOFTFLOAT)
2409 if (IS_INT_LNG_TYPE(d)) {
2410 #endif /* !defined(ENABLE_SOFTFLOAT) */
2411 if (IS_2_WORD_TYPE(d)) {
2412 s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT_PACKED);
2413 M_LNGMOVE(REG_RESULT_PACKED, s1);
2416 s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2417 M_INTMOVE(REG_RESULT, s1);
2420 #if !defined(ENABLE_SOFTFLOAT)
2422 s1 = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
2423 M_CAST_INT_TO_FLT_TYPED(VAROP(iptr->dst)->type, REG_RESULT_TYPED(VAROP(iptr->dst)->type), s1);
2425 #endif /* !defined(ENABLE_SOFTFLOAT) */
2427 emit_store_dst(jd, iptr, s1);
2431 case ICMD_CHECKCAST: /* ..., objectref ==> ..., objectref */
2433 if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
2434 /* object type cast-check */
2439 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2444 super = iptr->sx.s23.s3.c.cls;
2445 superindex = super->index;
2448 if ((super == NULL) || !(super->flags & ACC_INTERFACE))
2449 CODEGEN_CRITICAL_SECTION_NEW;
2451 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2453 /* if class is not resolved, check which code to call */
2455 if (super == NULL) {
2457 emit_label_beq(cd, BRANCH_LABEL_1);
2459 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
2460 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_flags,
2461 iptr->sx.s23.s3.c.ref, disp);
2463 if (opt_showdisassemble)
2466 M_DSEG_LOAD(REG_ITMP2, disp);
2467 disp = dseg_add_s4(cd, ACC_INTERFACE);
2468 M_DSEG_LOAD(REG_ITMP3, disp);
2469 M_TST(REG_ITMP2, REG_ITMP3);
2470 emit_label_beq(cd, BRANCH_LABEL_2);
2473 /* interface checkcast code */
2475 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2476 if ((super == NULL) || !IS_IMM(superindex)) {
2477 disp = dseg_add_unique_s4(cd, superindex);
2479 if (super == NULL) {
2480 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_index,
2481 iptr->sx.s23.s3.c.ref, disp);
2483 if (opt_showdisassemble)
2488 emit_label_beq(cd, BRANCH_LABEL_3);
2491 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2492 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
2494 /* we put unresolved or non-immediate superindices onto dseg */
2495 if ((super == NULL) || !IS_IMM(superindex)) {
2496 /* disp was computed before we added the patcher */
2497 M_DSEG_LOAD(REG_ITMP2, disp);
2498 M_CMP(REG_ITMP3, REG_ITMP2);
2500 assert(IS_IMM(superindex));
2501 M_CMP_IMM(REG_ITMP3, superindex);
2504 emit_classcast_check(cd, iptr, BRANCH_LE, REG_ITMP3, s1);
2506 /* if we loaded the superindex out of the dseg above, we do
2507 things differently here! */
2508 if ((super == NULL) || !IS_IMM(superindex)) {
2510 M_LDR_INTERN(REG_ITMP3, s1, OFFSET(java_objectheader, vftbl));
2512 /* this assumes something */
2513 assert(OFFSET(vftbl_t, interfacetable[0]) == 0);
2515 /* this does: REG_ITMP3 - superindex * sizeof(methodptr*) */
2516 assert(sizeof(methodptr*) == 4);
2517 M_SUB(REG_ITMP2, REG_ITMP3, REG_LSL(REG_ITMP2, 2));
2523 s2 = OFFSET(vftbl_t, interfacetable[0]) -
2524 superindex * sizeof(methodptr*);
2528 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, s2);
2529 M_TST(REG_ITMP3, REG_ITMP3);
2530 emit_classcast_check(cd, iptr, BRANCH_EQ, REG_ITMP3, s1);
2533 emit_label_br(cd, BRANCH_LABEL_4);
2535 emit_label(cd, BRANCH_LABEL_3);
2538 /* class checkcast code */
2540 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2541 if (super == NULL) {
2542 emit_label(cd, BRANCH_LABEL_2);
2544 disp = dseg_add_unique_address(cd, NULL);
2546 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_vftbl,
2547 iptr->sx.s23.s3.c.ref,
2550 if (opt_showdisassemble)
2554 disp = dseg_add_address(cd, super->vftbl);
2557 emit_label_beq(cd, BRANCH_LABEL_5);
2560 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2561 M_DSEG_LOAD(REG_ITMP3, disp);
2563 CODEGEN_CRITICAL_SECTION_START;
2565 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
2566 M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
2567 M_SUB(REG_ITMP2, REG_ITMP2, REG_ITMP3);
2568 M_DSEG_LOAD(REG_ITMP3, disp);
2569 M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
2571 CODEGEN_CRITICAL_SECTION_END;
2573 M_CMP(REG_ITMP2, REG_ITMP3);
2574 emit_classcast_check(cd, iptr, BRANCH_UGT, 0, s1);
2577 emit_label(cd, BRANCH_LABEL_5);
2580 if (super == NULL) {
2581 emit_label(cd, BRANCH_LABEL_1);
2582 emit_label(cd, BRANCH_LABEL_4);
2585 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
2588 /* array type cast-check */
2590 s1 = emit_load_s1(jd, iptr, REG_A0);
2591 M_INTMOVE(s1, REG_A0);
2593 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2594 disp = dseg_add_unique_address(cd, NULL);
2596 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
2597 iptr->sx.s23.s3.c.ref,
2600 if (opt_showdisassemble)
2604 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2606 M_DSEG_LOAD(REG_A1, disp);
2607 disp = dseg_add_functionptr(cd, BUILTIN_arraycheckcast);
2608 M_DSEG_BRANCH(disp);
2611 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2612 M_RECOMPUTE_PV(disp);
2614 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2615 M_TST(REG_RESULT, REG_RESULT);
2616 emit_classcast_check(cd, iptr, BRANCH_EQ, REG_RESULT, s1);
2618 d = codegen_reg_of_dst(jd, iptr, s1);
2622 emit_store_dst(jd, iptr, d);
2625 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult */
2631 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2636 super = iptr->sx.s23.s3.c.cls;
2637 superindex = super->index;
2640 if ((super == NULL) || !(super->flags & ACC_INTERFACE))
2641 CODEGEN_CRITICAL_SECTION_NEW;
2643 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2644 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2647 M_MOV(REG_ITMP1, s1);
2651 /* if class is not resolved, check which code to call */
2653 if (super == NULL) {
2657 emit_label_beq(cd, BRANCH_LABEL_1);
2659 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
2660 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_flags,
2661 iptr->sx.s23.s3.c.ref, disp);
2663 if (opt_showdisassemble)
2666 M_DSEG_LOAD(REG_ITMP2, disp);
2667 disp = dseg_add_s4(cd, ACC_INTERFACE);
2668 M_DSEG_LOAD(REG_ITMP3, disp);
2669 M_TST(REG_ITMP2, REG_ITMP3);
2670 emit_label_beq(cd, BRANCH_LABEL_2);
2673 /* interface checkcast code */
2675 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2676 if ((super == NULL) || !IS_IMM(superindex)) {
2677 disp = dseg_add_unique_s4(cd, superindex);
2679 if (super == NULL) {
2680 /* If d == REG_ITMP2, then it's destroyed in check
2685 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_index,
2686 iptr->sx.s23.s3.c.ref, disp);
2688 if (opt_showdisassemble)
2694 emit_label_beq(cd, BRANCH_LABEL_3);
2697 M_LDR_INTERN(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2698 M_LDR_INTERN(REG_ITMP3,
2699 REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
2701 /* we put unresolved or non-immediate superindices onto dseg
2702 and do things slightly different */
2703 if ((super == NULL) || !IS_IMM(superindex)) {
2704 /* disp was computed before we added the patcher */
2705 M_DSEG_LOAD(REG_ITMP2, disp);
2706 M_CMP(REG_ITMP3, REG_ITMP2);
2708 if (d == REG_ITMP2) {
2715 /* this assumes something */
2716 assert(OFFSET(vftbl_t, interfacetable[0]) == 0);
2718 /* this does: REG_ITMP3 - superindex * sizeof(methodptr*) */
2719 assert(sizeof(methodptr*) == 4);
2720 M_SUB(REG_ITMP1, REG_ITMP1, REG_LSL(REG_ITMP2, 2));
2722 if (d == REG_ITMP2) {
2729 assert(IS_IMM(superindex));
2730 M_CMP_IMM(REG_ITMP3, superindex);
2734 s2 = OFFSET(vftbl_t, interfacetable[0]) -
2735 superindex * sizeof(methodptr*);
2739 M_LDR_INTERN(REG_ITMP3, REG_ITMP1, s2);
2740 M_TST(REG_ITMP3, REG_ITMP3);
2744 emit_label_br(cd, BRANCH_LABEL_4);
2746 emit_label(cd, BRANCH_LABEL_3);
2749 /* class checkcast code */
2751 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2752 if (super == NULL) {
2753 emit_label(cd, BRANCH_LABEL_2);
2755 disp = dseg_add_unique_address(cd, NULL);
2757 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_vftbl,
2758 iptr->sx.s23.s3.c.ref, disp);
2760 if (opt_showdisassemble)
2764 disp = dseg_add_address(cd, super->vftbl);
2768 emit_label_beq(cd, BRANCH_LABEL_5);
2771 M_LDR_INTERN(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2772 M_DSEG_LOAD(REG_ITMP2, disp);
2774 CODEGEN_CRITICAL_SECTION_START;
2776 M_LDR_INTERN(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
2777 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
2778 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2780 CODEGEN_CRITICAL_SECTION_END;
2782 M_SUB(REG_ITMP1, REG_ITMP1, REG_ITMP3);
2783 M_CMP(REG_ITMP1, REG_ITMP2);
2784 /* If d == REG_ITMP2, then it's destroyed */
2790 emit_label(cd, BRANCH_LABEL_5);
2793 if (super == NULL) {
2794 emit_label(cd, BRANCH_LABEL_1);
2795 emit_label(cd, BRANCH_LABEL_4);
2800 emit_store_dst(jd, iptr, d);
2803 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref */
2805 /* copy sizes to stack if necessary */
2807 MCODECHECK((iptr->s1.argcount << 1) + 64);
2809 for (s1 = iptr->s1.argcount; --s1 >= 0; ) {
2811 var = VAR(iptr->sx.s23.s2.args[s1]);
2813 /* copy SAVEDVAR sizes to stack */
2815 if (!(var->flags & PREALLOC)) {
2816 s2 = emit_load(jd, iptr, var, REG_ITMP1);
2817 M_STR(s2, REG_SP, s1 * 4);
2821 /* a0 = dimension count */
2823 assert(IS_IMM(iptr->s1.argcount));
2824 M_MOV_IMM(REG_A0, iptr->s1.argcount);
2826 /* is patcher function set? */
2828 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2829 disp = dseg_add_unique_address(cd, NULL);
2831 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
2832 iptr->sx.s23.s3.c.ref, disp);
2834 if (opt_showdisassemble)
2838 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2840 /* a1 = arraydescriptor */
2842 M_DSEG_LOAD(REG_A1, disp);
2844 /* a2 = pointer to dimensions = stack pointer */
2846 M_INTMOVE(REG_SP, REG_A2);
2848 /* call builtin_multianewarray here */
2850 disp = dseg_add_functionptr(cd, BUILTIN_multianewarray);
2851 M_DSEG_BRANCH(disp);
2855 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2858 /* check for exception before result assignment */
2860 emit_exception_check(cd, iptr);
2864 d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2865 M_INTMOVE(REG_RESULT, d);
2866 emit_store_dst(jd, iptr, d);
2869 case ICMD_CHECKNULL: /* ..., objectref ==> ..., objectref */
2871 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2872 emit_nullpointer_check(cd, iptr, s1);
2876 exceptions_throw_internalerror("Unknown ICMD %d during code generation",
2879 } /* the big switch */
2881 } /* for all instructions */
2883 } /* for all basic blocks */
2885 dseg_createlinenumbertable(cd);
2888 /* generate stubs */
2890 emit_patcher_traps(jd);
2891 REPLACEMENT_EMIT_STUBS(jd);
2893 /* everything's ok */
2899 /* codegen_emit_stub_compiler **************************************************
2901 Emits a stub routine which calls the compiler.
2903 *******************************************************************************/
2905 void codegen_emit_stub_compiler(jitdata *jd)
2910 /* get required compiler data */
2915 /* code for the stub */
2917 M_LDR_INTERN(REG_ITMP1, REG_PC, -(2 * 4 + 2 * SIZEOF_VOID_P));
2918 M_LDR_INTERN(REG_PC, REG_PC, -(3 * 4 + 3 * SIZEOF_VOID_P));
2922 /* codegen_emit_stub_builtin ***************************************************
2924 Emits a stub routine which calls a builtin function.
2926 *******************************************************************************/
2928 void codegen_emit_stub_builtin(jitdata *jd, builtintable_entry *bte)
2937 /* get required compiler data */
2942 /* set some variables */
2946 /* calculate stack frame size */
2948 cd->stackframesize =
2949 SIZEOF_VOID_P + /* return address */
2950 sizeof(stackframeinfo); /* stackframeinfo */
2952 /* align stack to 8-byte */
2954 cd->stackframesize = (cd->stackframesize + 4) & ~4;
2956 /* create method header */
2958 (void) dseg_add_unique_address(cd, code); /* CodeinfoPointer */
2959 (void) dseg_add_unique_s4(cd, cd->stackframesize); /* FrameSize */
2960 (void) dseg_add_unique_s4(cd, 0); /* IsSync */
2961 (void) dseg_add_unique_s4(cd, 0); /* IsLeaf */
2962 (void) dseg_add_unique_s4(cd, 0); /* IntSave */
2963 (void) dseg_add_unique_s4(cd, 0); /* FltSave */
2964 (void) dseg_addlinenumbertablesize(cd);
2965 (void) dseg_add_unique_s4(cd, 0); /* ExTableSize */
2967 /* generate stub code */
2969 M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize / 4 - 1);
2970 M_STMFD(1<<REG_LR, REG_SP);
2972 #if defined(ENABLE_GC_CACAO)
2973 /* Save callee saved integer registers in stackframeinfo (GC may
2974 need to recover them during a collection). */
2976 disp = cd->stackframesize - sizeof(stackframeinfo) +
2977 OFFSET(stackframeinfo, intregs);
2979 for (i = 0; i < INT_SAV_CNT; i++)
2980 M_STR_INTERN(abi_registers_integer_saved[i], REG_SP, disp + i * 4);
2983 /* Save integer and float argument registers (these are 4
2984 registers, stack is 8-byte aligned). */
2986 M_STMFD(BITMASK_ARGS, REG_SP);
2988 /* create builtin stackframe info */
2990 assert(IS_IMM(4*4 + cd->stackframesize));
2991 M_ADD_IMM(REG_A0, REG_SP, 4*4 + cd->stackframesize);
2992 M_MOV(REG_A1, REG_PV);
2993 M_ADD_IMM(REG_A2, REG_SP, 4*4 + cd->stackframesize);
2994 M_LDR_INTERN(REG_A3, REG_SP, 4*4);
2995 disp = dseg_add_functionptr(cd, codegen_stub_builtin_enter);
2996 M_DSEG_BRANCH(disp);
2998 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3001 /* Restore integer and float argument registers (these are 4
3002 registers, stack is 8-byte aligned). */
3004 M_LDMFD(BITMASK_ARGS, REG_SP);
3006 /* builtins are allowed to have 4 arguments max */
3008 assert(md->paramcount <= 4);
3009 for (i = 0; i < md->paramcount; i++) {
3010 assert(!IS_2_WORD_TYPE(md->paramtypes[i].type));
3013 /* call the builtin function */
3015 disp = dseg_add_functionptr(cd, bte->fp);
3016 M_DSEG_BRANCH(disp);
3020 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3023 /* save return value */
3025 assert(!IS_FLT_DBL_TYPE(md->returntype.type));
3026 M_STMFD(BITMASK_RESULT, REG_SP);
3028 /* remove builtin stackframe info */
3030 M_ADD_IMM(REG_A0, REG_SP, 2*4 + cd->stackframesize);
3031 disp = dseg_add_functionptr(cd, codegen_stub_builtin_exit);
3032 M_DSEG_BRANCH(disp);
3033 /*s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3034 M_RECOMPUTE_PV(s1);*/
3036 /* restore return value */
3038 M_LDMFD(BITMASK_RESULT, REG_SP);
3040 #if defined(ENABLE_GC_CACAO)
3041 /* Restore callee saved integer registers from stackframeinfo (GC
3042 might have modified them during a collection). */
3044 disp = cd->stackframesize - sizeof(stackframeinfo) +
3045 OFFSET(stackframeinfo, intregs);
3047 for (i = 0; i < INT_SAV_CNT; i++)
3048 M_LDR_INTERN(abi_registers_integer_saved[i], REG_SP, disp + i * 4);
3051 /* remove stackframe and return */
3053 M_LDMFD(1<<REG_LR, REG_SP);
3054 M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize / 4 - 1);
3055 M_MOV(REG_PC, REG_LR);
3059 /* codegen_emit_stub_native ****************************************************
3061 Emits a stub routine which calls a native method.
3063 *******************************************************************************/
3065 void codegen_emit_stub_native(jitdata *jd, methoddesc *nmd, functionptr f)
3074 s4 disp, funcdisp, s1, s2;
3076 /* get required compiler data */
3082 /* initialize variables */
3085 nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
3087 /* calculate stackframe size */
3089 cd->stackframesize =
3090 4 + /* return address */
3091 sizeof(stackframeinfo) + /* stackframeinfo */
3092 sizeof(localref_table) + /* localref_table */
3093 nmd->memuse * 4; /* stack arguments */
3095 /* align stack to 8-byte */
3097 cd->stackframesize = (cd->stackframesize + 4) & ~4;
3099 /* create method header */
3101 (void) dseg_add_unique_address(cd, code); /* CodeinfoPointer */
3102 (void) dseg_add_unique_s4(cd, cd->stackframesize); /* FrameSize */
3103 (void) dseg_add_unique_s4(cd, 0); /* IsSync */
3104 (void) dseg_add_unique_s4(cd, 0); /* IsLeaf */
3105 (void) dseg_add_unique_s4(cd, 0); /* IntSave */
3106 (void) dseg_add_unique_s4(cd, 0); /* FltSave */
3107 (void) dseg_addlinenumbertablesize(cd);
3108 (void) dseg_add_unique_s4(cd, 0); /* ExTableSize */
3110 /* generate stub code */
3112 M_STMFD(1<<REG_LR, REG_SP);
3113 M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize / 4 - 1);
3115 #if !defined(NDEBUG)
3116 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
3117 emit_verbosecall_enter(jd);
3120 /* get function address (this must happen before the stackframeinfo) */
3122 funcdisp = dseg_add_functionptr(cd, f);
3124 #if !defined(WITH_STATIC_CLASSPATH)
3126 patcher_add_patch_ref(jd, PATCHER_resolve_native_function, m, funcdisp);
3128 if (opt_showdisassemble)
3133 #if defined(ENABLE_GC_CACAO)
3134 /* Save callee saved integer registers in stackframeinfo (GC may
3135 need to recover them during a collection). */
3137 disp = cd->stackframesize - SIZEOF_VOID_P - sizeof(stackframeinfo) +
3138 OFFSET(stackframeinfo, intregs);
3140 for (i = 0; i < INT_SAV_CNT; i++)
3141 M_STR_INTERN(abi_registers_integer_saved[i], REG_SP, disp + i * 4);
3144 /* Save integer and float argument registers (these are 4
3145 registers, stack is 8-byte aligned). */
3147 M_STMFD(BITMASK_ARGS, REG_SP);
3148 /* TODO: floating point */
3150 /* create native stackframe info */
3152 assert(IS_IMM(4*4 + cd->stackframesize));
3153 M_ADD_IMM(REG_A0, REG_SP, 4*4 + cd->stackframesize - SIZEOF_VOID_P);
3154 M_MOV(REG_A1, REG_PV);
3155 M_ADD_IMM(REG_A2, REG_SP, 4*4 + cd->stackframesize);
3156 M_LDR_INTERN(REG_A3, REG_SP, 4*4 + cd->stackframesize - SIZEOF_VOID_P);
3157 disp = dseg_add_functionptr(cd, codegen_start_native_call);
3158 M_DSEG_BRANCH(disp);
3162 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3165 /* Restore integer and float argument registers (these are 4
3166 registers, stack is 8-byte aligned). */
3168 M_LDMFD(BITMASK_ARGS, REG_SP);
3169 /* TODO: floating point */
3171 /* copy or spill arguments to new locations */
3172 /* ATTENTION: the ARM has only integer argument registers! */
3174 for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3175 t = md->paramtypes[i].type;
3177 if (!md->params[i].inmemory) {
3178 s1 = md->params[i].regoff;
3179 s2 = nmd->params[j].regoff;
3181 if (!nmd->params[j].inmemory) {
3182 #if !defined(__ARM_EABI__)
3183 SPLIT_OPEN(t, s2, REG_ITMP1);
3186 if (IS_2_WORD_TYPE(t))
3191 #if !defined(__ARM_EABI__)
3192 SPLIT_STORE_AND_CLOSE(t, s2, 0);
3196 if (IS_2_WORD_TYPE(t))
3197 M_LST(s1, REG_SP, s2);
3199 M_IST(s1, REG_SP, s2);
3203 s1 = md->params[i].regoff + cd->stackframesize;
3204 s2 = nmd->params[j].regoff;
3206 if (IS_2_WORD_TYPE(t)) {
3207 M_LLD(REG_ITMP12_PACKED, REG_SP, s1);
3208 M_LST(REG_ITMP12_PACKED, REG_SP, s2);
3211 M_ILD(REG_ITMP1, REG_SP, s1);
3212 M_IST(REG_ITMP1, REG_SP, s2);
3217 /* put class into second argument register */
3219 if (m->flags & ACC_STATIC) {
3220 disp = dseg_add_address(cd, m->class);
3221 M_DSEG_LOAD(REG_A1, disp);
3224 /* put env into first argument register */
3226 disp = dseg_add_address(cd, _Jv_env);
3227 M_DSEG_LOAD(REG_A0, disp);
3229 /* do the native function call */
3231 M_DSEG_BRANCH(funcdisp);
3234 /* TODO: this is only needed because of the tracer ... do we
3237 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3240 #if !defined(__SOFTFP__)
3241 /* TODO: this is only a hack, since we use R0/R1 for float return! */
3242 /* this depends on gcc; it is independent from our ENABLE_SOFTFLOAT define */
3243 if (md->returntype.type != TYPE_VOID && IS_FLT_DBL_TYPE(md->returntype.type)) {
3244 #if 0 && !defined(NDEBUG)
3245 dolog("NATIVESTUB that returns float or double (%s.%s)", m->class->name->text, m->name->text);
3247 /* we cannot use this macro, since it is not defined in ENABLE_SOFTFLOAT */
3248 /* M_CAST_FLT_TO_INT_TYPED(md->returntype.type, REG_FRESULT, REG_RESULT_TYPED(md->returntype.type)); */
3249 if (IS_2_WORD_TYPE(md->returntype.type)) {
3250 DCD(0xed2d8102); /* stfd f0, [sp, #-8]! */
3251 M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
3253 DCD(0xed2d0101); /* stfs f0, [sp, #-4]!*/
3254 M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
3259 #if !defined(NDEBUG)
3260 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
3261 emit_verbosecall_exit(jd);
3264 /* remove native stackframe info */
3265 /* TODO: improve this store/load */
3267 M_STMFD(BITMASK_RESULT, REG_SP);
3269 M_ADD_IMM(REG_A0, REG_SP, 2*4 + cd->stackframesize - SIZEOF_VOID_P);
3270 disp = dseg_add_functionptr(cd, codegen_finish_native_call);
3271 M_DSEG_BRANCH(disp);
3272 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3275 M_MOV(REG_ITMP1_XPTR, REG_RESULT);
3276 M_LDMFD(BITMASK_RESULT, REG_SP);
3278 #if defined(ENABLE_GC_CACAO)
3279 /* restore callee saved int registers from stackframeinfo (GC might have */
3280 /* modified them during a collection). */
3282 disp = cd->stackframesize - SIZEOF_VOID_P - sizeof(stackframeinfo) +
3283 OFFSET(stackframeinfo, intregs);
3285 for (i = 0; i < INT_SAV_CNT; i++)
3286 M_LDR_INTERN(abi_registers_integer_saved[i], REG_SP, disp + i * 4);
3289 /* finish stub code, but do not yet return to caller */
3291 M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize / 4 - 1);
3292 M_LDMFD(1<<REG_LR, REG_SP);
3294 /* check for exception */
3296 M_TST(REG_ITMP1_XPTR, REG_ITMP1_XPTR);
3297 M_MOVEQ(REG_LR, REG_PC); /* if no exception, return to caller */
3299 /* handle exception here */
3301 M_SUB_IMM(REG_ITMP2_XPC, REG_LR, 4);/* move fault address into xpc */
3303 disp = dseg_add_functionptr(cd, asm_handle_nat_exception);
3304 M_DSEG_LOAD(REG_ITMP3, disp); /* load asm exception handler address */
3305 M_MOV(REG_PC, REG_ITMP3); /* jump to asm exception handler */
3307 /* generate patcher stubs */
3309 emit_patcher_traps(jd);
3313 /* asm_debug *******************************************************************
3317 *******************************************************************************/
3319 void asm_debug(int a1, int a2, int a3, int a4)
3321 printf("===> i am going to exit after this debugging message!\n");
3322 printf("got asm_debug(%p, %p, %p, %p)\n",(void*)a1,(void*)a2,(void*)a3,(void*)a4);
3323 vm_abort("leave you now");
3328 * These are local overrides for various environment variables in Emacs.
3329 * Please do not remove this and leave it at the end of the file, where
3330 * Emacs will automagically detect them.
3331 * ---------------------------------------------------------------------
3334 * indent-tabs-mode: t
3338 * vim:noexpandtab:sw=4:ts=4: