* src/vm/jit/arm/codegen.c: removed unused ICMD_GETSTATIC branch
[cacao.git] / src / vm / jit / arm / codegen.c
1 /* src/vm/jit/arm/codegen.c - machine code generator for Arm
2
3    Copyright (C) 1996-2011
4    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
5
6    This file is part of CACAO.
7
8    This program is free software; you can redistribute it and/or
9    modify it under the terms of the GNU General Public License as
10    published by the Free Software Foundation; either version 2, or (at
11    your option) any later version.
12
13    This program is distributed in the hope that it will be useful, but
14    WITHOUT ANY WARRANTY; without even the implied warranty of
15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16    General Public License for more details.
17
18    You should have received a copy of the GNU General Public License
19    along with this program; if not, write to the Free Software
20    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21    02110-1301, USA.
22
23 */
24
25
26 #include "config.h"
27
28 #include <assert.h>
29 #include <stdio.h>
30
31 #include "vm/types.h"
32
33 #include "md-abi.h"
34
35 #include "vm/jit/arm/arch.h"
36 #include "vm/jit/arm/codegen.h"
37
38 #include "mm/memory.hpp"
39
40 #include "native/localref.hpp"
41 #include "native/native.hpp"
42
43 #include "threads/lock.hpp"
44
45 #include "vm/jit/builtin.hpp"
46 #include "vm/exceptions.hpp"
47 #include "vm/global.h"
48 #include "vm/loader.hpp"
49 #include "vm/options.h"
50 #include "vm/vm.hpp"
51
52 #include "vm/jit/abi.h"
53 #include "vm/jit/asmpart.h"
54 #include "vm/jit/codegen-common.hpp"
55 #include "vm/jit/dseg.h"
56 #include "vm/jit/emit-common.hpp"
57 #include "vm/jit/jit.hpp"
58 #include "vm/jit/linenumbertable.hpp"
59 #include "vm/jit/methodheader.h"
60 #include "vm/jit/parse.hpp"
61 #include "vm/jit/patcher-common.hpp"
62 #include "vm/jit/reg.h"
63
64
65 /**
66  * Generates machine code for the method prolog.
67  */
68 void codegen_emit_prolog(jitdata* jd)
69 {
70         varinfo*    var;
71         methoddesc* md;
72         int32_t     s1;
73         int32_t     t, len;
74         int32_t     varindex;
75         int         i;
76
77         // Get required compiler data.
78         methodinfo*   m    = jd->m;
79         codeinfo*     code = jd->code;
80         codegendata*  cd   = jd->cd;
81         registerdata* rd   = jd->rd;
82
83         int32_t savedregs_num = 0;
84         uint32_t savedregs_bitmask = 0;
85
86         if (!code_is_leafmethod(code)) {
87                 savedregs_num++;
88                 savedregs_bitmask = (1<<REG_LR);
89         }
90
91         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
92                 savedregs_num++;
93                 savedregs_bitmask |= (1<<(rd->savintregs[i]));
94         }
95
96 #if !defined(NDEBUG)
97         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
98                 vm_abort("codegen_emit_prolog: Floating-point callee saved registers are not saved to stack");
99         }
100 #endif
101
102         /* save return address and used callee saved registers */
103
104         if (savedregs_bitmask != 0)
105                 M_STMFD(savedregs_bitmask, REG_SP);
106
107         /* create additional stack frame for spilled variables (if necessary) */
108
109         int32_t additional_bytes = (cd->stackframesize * 8 - savedregs_num * 4);
110
111         if (additional_bytes > 0)
112                 M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, additional_bytes / 4);
113
114         /* take arguments out of register or stack frame */
115
116         md = m->parseddesc;
117         for (i = 0, len = 0; i < md->paramcount; i++) {
118                 s1 = md->params[i].regoff;
119                 t = md->paramtypes[i].type;
120
121                 varindex = jd->local_map[len * 5 + t];
122
123                 len += (IS_2_WORD_TYPE(t)) ? 2 : 1;          /* 2 word type arguments */
124
125                 if (varindex == UNUSED)
126                         continue;
127
128                 var = VAR(varindex);
129
130                 /* ATTENTION: we use interger registers for all arguments (even float) */
131 #if !defined(ENABLE_SOFTFLOAT)
132                 if (IS_INT_LNG_TYPE(t)) {
133 #endif
134                         if (!md->params[i].inmemory) {
135                                 if (!(var->flags & INMEMORY)) {
136                                         if (IS_2_WORD_TYPE(t))
137                                                 M_LNGMOVE(s1, var->vv.regoff);
138                                         else
139                                                 M_INTMOVE(s1, var->vv.regoff);
140                                 }
141                                 else {
142                                         if (IS_2_WORD_TYPE(t))
143                                                 M_LST(s1, REG_SP, var->vv.regoff);
144                                         else
145                                                 M_IST(s1, REG_SP, var->vv.regoff);
146                                 }
147                         }
148                         else {                                   /* stack arguments       */
149                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
150                                         if (IS_2_WORD_TYPE(t))
151                                                 M_LLD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1);
152                                         else
153                                                 M_ILD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1);
154                                 }
155                                 else {                               /* stack arg -> spilled  */
156                                         /* Reuse Memory Position on Caller Stack */
157                                         var->vv.regoff = cd->stackframesize * 8 + s1;
158                                 }
159                         }
160 #if !defined(ENABLE_SOFTFLOAT)
161                 }
162                 else {
163                         if (!md->params[i].inmemory) {
164                                 if (!(var->flags & INMEMORY)) {
165                                         if (IS_2_WORD_TYPE(t))
166                                                 M_CAST_L2D(s1, var->vv.regoff);
167                                         else
168                                                 M_CAST_I2F(s1, var->vv.regoff);
169                                 }
170                                 else {
171                                         if (IS_2_WORD_TYPE(t))
172                                                 M_LST(s1, REG_SP, var->vv.regoff);
173                                         else
174                                                 M_IST(s1, REG_SP, var->vv.regoff);
175                                 }
176                         }
177                         else {
178                                 if (!(var->flags & INMEMORY)) {
179                                         if (IS_2_WORD_TYPE(t))
180                                                 M_DLD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1);
181                                         else
182                                                 M_FLD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1);
183                                 }
184                                 else {
185                                         /* Reuse Memory Position on Caller Stack */
186                                         var->vv.regoff = cd->stackframesize * 8 + s1;
187                                 }
188                         }
189                 }
190 #endif /* !defined(ENABLE_SOFTFLOAT) */
191         }
192 }
193
194
195 /**
196  * Generates machine code for the method epilog.
197  */
198 void codegen_emit_epilog(jitdata* jd)
199 {
200         int i;
201
202         // Get required compiler data.
203         codeinfo*     code = jd->code;
204         codegendata*  cd   = jd->cd;
205         registerdata* rd   = jd->rd;
206
207         int32_t savedregs_num = 0;
208         uint32_t savedregs_bitmask = 0;
209
210         if (!code_is_leafmethod(code)) {
211                 savedregs_num++;
212                 savedregs_bitmask = (1<<REG_LR);
213         }
214
215         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
216                 savedregs_num++;
217                 savedregs_bitmask |= (1<<(rd->savintregs[i]));
218         }
219
220         /* deallocate stackframe for spilled variables */
221
222         int32_t additional_bytes = (cd->stackframesize * 8 - savedregs_num * 4);
223
224         if (additional_bytes > 0)
225                 M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, additional_bytes / 4);
226
227         /* restore callee saved registers + do return */
228
229         if (savedregs_bitmask) {
230                 if (!code_is_leafmethod(code)) {
231                         savedregs_bitmask &= ~(1<<REG_LR);
232                         savedregs_bitmask |= (1<<REG_PC);
233                 }
234                 M_LDMFD(savedregs_bitmask, REG_SP);
235         }
236
237         /* if LR was not on stack, we need to return manually */
238
239         if (code_is_leafmethod(code))
240                 M_MOV(REG_PC, REG_LR);
241 }
242
243
244 /**
245  * Generates machine code for one ICMD.
246  */
247 void codegen_emit_instruction(jitdata* jd, instruction* iptr)
248 {
249         varinfo*            var;
250         builtintable_entry* bte;
251         methodinfo*         lm;             // Local methodinfo for ICMD_INVOKE*.
252         unresolved_method*  um;
253         fieldinfo*          fi;
254         unresolved_field*   uf;
255         int32_t             fieldtype;
256         int32_t             s1, s2, s3, d;
257         int32_t             disp;
258
259         // Get required compiler data.
260         codegendata*  cd   = jd->cd;
261
262         /* the big switch */
263         switch (iptr->opc) {
264
265                 /* constant operations ************************************************/
266
267                 case ICMD_ACONST:     /* ... ==> ..., constant                        */
268
269                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
270                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
271                                 disp = dseg_add_unique_address(cd, NULL);
272
273                                 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
274                                                     iptr->sx.val.c.ref, disp);
275
276                                 M_DSEG_LOAD(d, disp);
277                         }
278                         else {
279                                 ICONST(d, (u4) iptr->sx.val.anyptr);
280                         }
281                         emit_store_dst(jd, iptr, d);
282                         break;
283
284                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
285
286 #if defined(ENABLE_SOFTFLOAT)
287                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
288                         ICONST(d, iptr->sx.val.i);
289                         emit_store_dst(jd, iptr, d);
290 #else
291                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
292                         FCONST(d, iptr->sx.val.f);
293                         emit_store_dst(jd, iptr, d);
294 #endif
295                         break;
296
297                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
298
299 #if defined(ENABLE_SOFTFLOAT)
300                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
301                         LCONST(d, iptr->sx.val.l);
302                         emit_store_dst(jd, iptr, d);
303 #else
304                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
305                         DCONST(d, iptr->sx.val.d);
306                         emit_store_dst(jd, iptr, d);
307 #endif
308                         break;
309
310
311                 /* integer operations *************************************************/
312
313                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
314
315                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
316                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
317                         M_MOV(d, REG_LSL(s1, 24));
318                         M_MOV(d, REG_ASR(d, 24));
319                         emit_store_dst(jd, iptr, d);
320                         break;
321
322                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
323
324                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
325                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
326                         M_MOV(d, REG_LSL(s1, 16));
327                         M_MOV(d, REG_LSR(d, 16)); /* ATTENTION: char is unsigned */
328                         emit_store_dst(jd, iptr, d);
329                         break;
330
331                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
332
333                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
334                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
335                         M_MOV(d, REG_LSL(s1, 16));
336                         M_MOV(d, REG_ASR(d, 16));
337                         emit_store_dst(jd, iptr, d);
338                         break;
339
340                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
341
342                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
343                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
344                         M_INTMOVE(s1, GET_LOW_REG(d));
345                         M_MOV(GET_HIGH_REG(d), REG_ASR(s1, 31));
346                         emit_store_dst(jd, iptr, d);
347                         break;
348
349                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
350
351                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
352                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
353                         M_INTMOVE(s1, d);
354                         emit_store_dst(jd, iptr, d);
355                         break;
356
357                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
358
359                         s1 = emit_load_s1(jd, iptr, REG_ITMP1); 
360                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
361                         M_RSB_IMM(d, s1, 0);
362                         emit_store_dst(jd, iptr, d);
363                         break;
364
365                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
366
367                         s1 = emit_load_s1(jd, iptr, REG_ITMP12_PACKED);
368                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
369                         M_RSB_IMMS(GET_LOW_REG(d), GET_LOW_REG(s1), 0);
370                         M_RSC_IMM(GET_HIGH_REG(d), GET_HIGH_REG(s1), 0);
371                         emit_store_dst(jd, iptr, d);
372                         break;
373
374                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
375
376                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
377                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
378                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
379                         M_ADD(d, s1, s2);
380                         emit_store_dst(jd, iptr, d);
381                         break;
382
383                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
384
385                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
386                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
387                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
388                         M_ADD_S(GET_LOW_REG(d), s1, s2);
389                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
390                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
391                         M_ADC(GET_HIGH_REG(d), s1, s2);
392                         emit_store_dst(jd, iptr, d);
393                         break;
394
395                 case ICMD_IADDCONST:
396                 case ICMD_IINC:
397
398                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
399                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
400
401                         if (IS_IMM(iptr->sx.val.i)) {
402                                 M_ADD_IMM(d, s1, iptr->sx.val.i);
403                         } else if (IS_IMM(-iptr->sx.val.i)) {
404                                 M_SUB_IMM(d, s1, (-iptr->sx.val.i));
405                         } else {
406                                 ICONST(REG_ITMP3, iptr->sx.val.i);
407                                 M_ADD(d, s1, REG_ITMP3);
408                         }
409
410                         emit_store_dst(jd, iptr, d);
411                         break;
412
413                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
414                                       /* sx.val.l = constant                          */
415
416                         s3 = iptr->sx.val.l & 0xffffffff;
417                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
418                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
419                         if (IS_IMM(s3))
420                                 M_ADD_IMMS(GET_LOW_REG(d), s1, s3);
421                         else {
422                                 ICONST(REG_ITMP3, s3);
423                                 M_ADD_S(GET_LOW_REG(d), s1, REG_ITMP3);
424                         }
425                         s3 = iptr->sx.val.l >> 32;
426                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
427                         if (IS_IMM(s3))
428                                 M_ADC_IMM(GET_HIGH_REG(d), s1, s3);
429                         else {
430                                 ICONST(REG_ITMP3, s3);
431                                 M_ADC(GET_HIGH_REG(d), s1, REG_ITMP3);
432                         }
433                         emit_store_dst(jd, iptr, d);
434                         break;
435
436                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
437
438                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
439                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
440                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
441                         M_SUB(d, s1, s2);
442                         emit_store_dst(jd, iptr, d);
443                         break;
444
445                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
446
447                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
448                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
449                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
450                         M_SUB_S(GET_LOW_REG(d), s1, s2);
451                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
452                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
453                         M_SBC(GET_HIGH_REG(d), s1, s2);
454                         emit_store_dst(jd, iptr, d);
455                         break;
456
457                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
458                                       /* sx.val.i = constant                          */
459
460                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
461                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
462                         if (IS_IMM(iptr->sx.val.i))
463                                 M_SUB_IMM(d, s1, iptr->sx.val.i);
464                         else {
465                                 ICONST(REG_ITMP3, iptr->sx.val.i);
466                                 M_SUB(d, s1, REG_ITMP3);
467                         }
468                         emit_store_dst(jd, iptr, d);
469                         break;
470
471                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
472                                       /* sx.val.l = constant                          */
473
474                         s3 = iptr->sx.val.l & 0xffffffff;
475                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
476                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
477                         if (IS_IMM(s3))
478                                 M_SUB_IMMS(GET_LOW_REG(d), s1, s3);
479                         else {
480                                 ICONST(REG_ITMP3, s3);
481                                 M_SUB_S(GET_LOW_REG(d), s1, REG_ITMP3);
482                         }
483                         s3 = iptr->sx.val.l >> 32;
484                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
485                         if (IS_IMM(s3))
486                                 M_SBC_IMM(GET_HIGH_REG(d), s1, s3);
487                         else {
488                                 ICONST(REG_ITMP3, s3);
489                                 M_SBC(GET_HIGH_REG(d), s1, REG_ITMP3);
490                         }
491                         emit_store_dst(jd, iptr, d);
492                         break;
493
494                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
495
496                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
497                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
498                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
499                         M_MUL(d, s1, s2);
500                         emit_store_dst(jd, iptr, d);
501                         break;
502
503                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
504                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
505
506                         s1 = emit_load_s1(jd, iptr, REG_A0);
507                         s2 = emit_load_s2(jd, iptr, REG_A1);
508                         emit_arithmetic_check(cd, iptr, s2);
509
510                         /* move arguments into argument registers */
511                         M_INTMOVE(s1, REG_A0);
512                         M_INTMOVE(s2, REG_A1);
513
514                         /* call builtin function */
515                         bte = iptr->sx.s23.s3.bte;
516                         disp = dseg_add_functionptr(cd, bte->fp);
517                         M_DSEG_BRANCH(disp);
518
519                         /* recompute pv */
520                         emit_recompute_pv(cd);
521
522                         /* move result into destination register */
523                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
524                         M_INTMOVE(REG_RESULT, d);
525                         emit_store_dst(jd, iptr, d);
526                         break;
527
528                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
529                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
530
531                         /* move arguments into argument registers */
532
533                         s1 = emit_load_s1(jd, iptr, REG_A0_A1_PACKED);
534                         s2 = emit_load_s2(jd, iptr, REG_A2_A3_PACKED);
535                         /* XXX TODO: only do this if arithmetic check is really done! */
536                         M_ORR(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
537                         emit_arithmetic_check(cd, iptr, REG_ITMP3);
538
539                         M_LNGMOVE(s1, REG_A0_A1_PACKED);
540                         M_LNGMOVE(s2, REG_A2_A3_PACKED);
541
542                         /* call builtin function */
543                         bte = iptr->sx.s23.s3.bte;
544                         disp = dseg_add_functionptr(cd, bte->fp);
545                         M_DSEG_BRANCH(disp);
546
547                         /* recompute pv */
548                         emit_recompute_pv(cd);
549
550                         /* move result into destination register */
551                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT_PACKED);
552                         M_LNGMOVE(REG_RESULT_PACKED, d);
553                         emit_store_dst(jd, iptr, d);
554                         break;
555
556                 case ICMD_IMULPOW2:   /* ..., value  ==> ..., value * (2 ^ constant)  */
557                                       /* sx.val.i = constant                          */
558
559                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
560                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
561                         M_MOV(d, REG_LSL(s1, iptr->sx.val.i));
562                         emit_store_dst(jd, iptr, d);
563                         break;
564
565                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value / (2 ^ constant)  */
566                                       /* sx.val.i = constant                          */
567
568                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
569                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
570                         /* this rounds towards 0 as java likes it */
571                         M_MOV(REG_ITMP3, REG_ASR(s1, 31));
572                         M_ADD(REG_ITMP3, s1, REG_LSR(REG_ITMP3, 32 - iptr->sx.val.i));
573                         M_MOV(d, REG_ASR(REG_ITMP3, iptr->sx.val.i));
574                         /* this rounds towards nearest, not java style */
575                         /*M_MOV_S(d, REG_ASR(s1, iptr->sx.val.i));
576                         M_ADCMI_IMM(d, d, 0);*/
577                         emit_store_dst(jd, iptr, d);
578                         break;
579
580                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
581                                       /* sx.val.i = constant [ (2 ^ x) - 1 ]          */
582
583                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
584                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
585                         M_MOV_S(REG_ITMP1, s1);
586                         M_RSBMI_IMM(REG_ITMP1, REG_ITMP1, 0);
587                         if (IS_IMM(iptr->sx.val.i))
588                                 M_AND_IMM(REG_ITMP1, iptr->sx.val.i, d);
589                         else {
590                                 ICONST(REG_ITMP3, iptr->sx.val.i);
591                                 M_AND(REG_ITMP1, REG_ITMP3, d);
592                         }
593                         M_RSBMI_IMM(d, d, 0);
594                         emit_store_dst(jd, iptr, d);
595                         break;
596
597                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
598
599                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
600                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
601                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
602                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
603                         M_MOV(d, REG_LSL_REG(s1, REG_ITMP2));
604                         emit_store_dst(jd, iptr, d);
605                         break;
606
607                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
608
609                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
610                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
611                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
612                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
613                         M_MOV(d, REG_ASR_REG(s1, REG_ITMP2));
614                         emit_store_dst(jd, iptr, d);
615                         break;
616
617                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
618
619                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
620                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
621                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
622                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
623                         M_MOV(d, REG_LSR_REG(s1, REG_ITMP2));
624                         emit_store_dst(jd, iptr, d);
625                         break;
626
627                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
628                                       /* sx.val.i = constant                          */
629
630                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
631                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
632                         M_MOV(d, REG_LSL(s1, iptr->sx.val.i & 0x1f));
633                         emit_store_dst(jd, iptr, d);
634                         break;
635
636                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
637                                       /* sx.val.i = constant                          */
638
639                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
640                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
641                         /* we need to check for zero here because arm interprets it as SHR by 32 */
642                         if ((iptr->sx.val.i & 0x1f) == 0) {
643                                 M_INTMOVE(s1, d);
644                         } else {
645                                 M_MOV(d, REG_ASR(s1, iptr->sx.val.i & 0x1f));
646                         }
647                         emit_store_dst(jd, iptr, d);
648                         break;
649
650                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
651                                       /* sx.val.i = constant                          */
652
653                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
654                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
655                         /* we need to check for zero here because arm interprets it as SHR by 32 */
656                         if ((iptr->sx.val.i & 0x1f) == 0)
657                                 M_INTMOVE(s1, d);
658                         else
659                                 M_MOV(d, REG_LSR(s1, iptr->sx.val.i & 0x1f));
660                         emit_store_dst(jd, iptr, d);
661                         break;
662
663                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
664
665                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
666                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
667                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
668                         M_AND(s1, s2, d);
669                         emit_store_dst(jd, iptr, d);
670                         break;
671
672                 case ICMD_LAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
673
674                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
675                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
676                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
677                         M_AND(s1, s2, GET_LOW_REG(d));
678                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
679                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
680                         M_AND(s1, s2, GET_HIGH_REG(d));
681                         emit_store_dst(jd, iptr, d);
682                         break;
683
684                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
685
686                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
687                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
688                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
689                         M_ORR(s1, s2, d);
690                         emit_store_dst(jd, iptr, d);
691                         break;
692
693                 case ICMD_LOR:       /* ..., val1, val2  ==> ..., val1 | val2        */ 
694
695                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
696                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
697                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
698                         M_ORR(s1, s2, GET_LOW_REG(d));
699                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
700                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
701                         M_ORR(s1, s2, GET_HIGH_REG(d));
702                         emit_store_dst(jd, iptr, d);
703                         break;
704
705                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
706
707                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
708                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
709                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
710                         M_EOR(s1, s2, d);
711                         emit_store_dst(jd, iptr, d);
712                         break;
713
714                 case ICMD_LXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
715
716                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
717                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
718                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
719                         M_EOR(s1, s2, GET_LOW_REG(d));
720                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
721                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
722                         M_EOR(s1, s2, GET_HIGH_REG(d));
723                         emit_store_dst(jd, iptr, d);
724                         break;
725
726
727         /* floating operations ************************************************/
728
729 #if !defined(ENABLE_SOFTFLOAT)
730
731                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
732
733                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
734                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
735                         M_FNEG(s1, d);
736                         emit_store_dst(jd, iptr, d);
737                         break;
738
739                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
740
741                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
742                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
743                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
744                         M_FADD(s1, s2, d);
745                         emit_store_dst(jd, iptr, d);
746                         break;
747
748                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
749
750                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
751                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
752                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
753                         M_FSUB(s1, s2, d);
754                         emit_store_dst(jd, iptr, d);
755                         break;
756
757                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
758
759                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
760                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
761                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
762                         M_FMUL(s1, s2, d);
763                         emit_store_dst(jd, iptr, d);
764                         break;
765
766                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
767                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
768                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
769                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
770                         M_FDIV(s1, s2, d);
771                         emit_store_dst(jd, iptr, d);
772                         break;
773
774                 /* ATTENTION: Jave does not want IEEE behaviour in FREM, do
775                    not use this */
776
777 #if 0
778                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
779
780                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
781                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
782                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
783                         M_RMFS(d, s1, s2);
784                         emit_store_dst(jd, iptr, d);
785                         break;
786 #endif
787
788                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
789
790                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
791                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
792                         M_DNEG(s1, d);
793                         emit_store_dst(jd, iptr, d);
794                         break;
795
796                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
797
798                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
799                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
800                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
801                         M_DADD(s1, s2, d);
802                         emit_store_dst(jd, iptr, d);
803                         break;
804
805                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
806
807                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
808                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
809                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
810                         M_DSUB(s1, s2, d);
811                         emit_store_dst(jd, iptr, d);
812                         break;
813
814                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
815
816                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
817                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
818                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
819                         M_DMUL(s1, s2, d);
820                         emit_store_dst(jd, iptr, d);
821                         break;
822
823                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
824
825                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
826                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
827                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
828                         M_DDIV(s1, s2, d);
829                         emit_store_dst(jd, iptr, d);
830                         break;
831
832                 /* ATTENTION: Jave does not want IEEE behaviour in DREM, do
833                    not use this */
834
835 #if 0
836                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
837
838                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
839                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
840                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
841                         M_RMFD(d, s1, s2);
842                         emit_store_dst(jd, iptr, d);
843                         break;
844 #endif
845
846                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
847
848                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
849                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
850 #if defined(__VFP_FP__)
851                         M_FMSR(s1, d);
852                         M_CVTIF(d, d);
853 #else
854                         M_CVTIF(s1, d);
855 #endif
856                         emit_store_dst(jd, iptr, d);
857                         break;
858
859                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
860
861                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
862                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
863 #if defined(__VFP_FP__)
864                         M_FMSR(s1, d);
865                         M_CVTID(d, d);
866 #else
867                         M_CVTID(s1, d);
868 #endif
869                         emit_store_dst(jd, iptr, d);
870                         break;
871
872                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
873
874                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
875                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
876 #if defined(__VFP_FP__)
877                         M_CVTFI(s1, REG_FTMP2);
878                         M_FMRS(REG_FTMP2, d);
879 #else
880                         /* this uses round towards zero, as Java likes it */
881                         M_CVTFI(s1, d);
882                         /* this checks for NaN; to return zero as Java likes it */
883                         M_FCMP(s1, 0x8);
884                         M_MOVVS_IMM(0, d);
885 #endif
886                         emit_store_dst(jd, iptr, d);
887                         break;
888
889                 case ICMD_D2I:       /* ..., value  ==> ..., (int) value              */
890
891                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
892                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
893 #if defined(__VFP_FP__)
894                         M_CVTDI(s1, REG_FTMP2);
895                         M_FMRS(REG_FTMP2, d);
896 #else
897                         /* this uses round towards zero, as Java likes it */
898                         M_CVTDI(s1, d);
899                         /* this checks for NaN; to return zero as Java likes it */
900                         M_DCMP(s1, 0x8);
901                         M_MOVVS_IMM(0, d);
902 #endif
903                         emit_store_dst(jd, iptr, d);
904                         break;
905
906                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
907
908                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
909                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
910                         M_CVTDF(s1, d);
911                         emit_store_dst(jd, iptr, d);
912                         break;
913
914                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
915
916                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
917                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
918                         M_CVTFD(s1, d);
919                         emit_store_dst(jd, iptr, d);
920                         break;
921
922                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
923
924                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
925                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
926                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
927                         M_FCMP(s2, s1);
928                         M_MOV_IMM(d, 0);
929 #if defined(__VFP_FP__)
930                         M_FMSTAT; /* on VFP we need to transfer the flags */
931 #endif
932                         M_SUBGT_IMM(d, d, 1);
933                         M_ADDLT_IMM(d, d, 1);
934                         emit_store_dst(jd, iptr, d);
935                         break;
936
937                 case ICMD_DCMPG:      /* ..., val1, val2  ==> ..., val1 dcmpg val2    */
938
939                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
940                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
941                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
942                         M_DCMP(s2, s1);
943                         M_MOV_IMM(d, 0);
944 #if defined(__VFP_FP__)
945                         M_FMSTAT; /* on VFP we need to transfer the flags */
946 #endif
947                         M_SUBGT_IMM(d, d, 1);
948                         M_ADDLT_IMM(d, d, 1);
949                         emit_store_dst(jd, iptr, d);
950                         break;
951
952                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
953
954                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
955                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
956                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
957                         M_FCMP(s1, s2);
958                         M_MOV_IMM(d, 0);
959 #if defined(__VFP_FP__)
960                         M_FMSTAT; /* on VFP we need to transfer the flags */
961 #endif
962                         M_SUBLT_IMM(d, d, 1);
963                         M_ADDGT_IMM(d, d, 1);
964                         emit_store_dst(jd, iptr, d);
965                         break;
966
967                 case ICMD_DCMPL:      /* ..., val1, val2  ==> ..., val1 dcmpl val2    */
968
969                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
970                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
971                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
972                         M_DCMP(s1, s2);
973                         M_MOV_IMM(d, 0);
974 #if defined(__VFP_FP__)
975                         M_FMSTAT; /* on VFP we need to transfer the flags */
976 #endif
977                         M_SUBLT_IMM(d, d, 1);
978                         M_ADDGT_IMM(d, d, 1);
979                         emit_store_dst(jd, iptr, d);
980                         break;
981
982 #endif /* !defined(ENABLE_SOFTFLOAT) */
983
984
985                 /* memory operations **************************************************/
986
987                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
988
989                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
990                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
991                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
992                         /* implicit null-pointer check */
993                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
994                         M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
995                         M_LDRSB(d, REG_ITMP1, OFFSET(java_bytearray_t, data[0]));
996                         emit_store_dst(jd, iptr, d);
997                         break;
998
999                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1000
1001                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1002                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1003                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1004                         /* implicit null-pointer check */
1005                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1006                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1007                         M_LDRH(d, REG_ITMP1, OFFSET(java_chararray_t, data[0]));
1008                         emit_store_dst(jd, iptr, d);
1009                         break;
1010
1011                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1012
1013                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1014                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1015                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1016                         /* implicit null-pointer check */
1017                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1018                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1019                         M_LDRSH(d, REG_ITMP1, OFFSET(java_shortarray_t, data[0]));
1020                         emit_store_dst(jd, iptr, d);
1021                         break;
1022
1023                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1024
1025                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1026                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1027                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1028                         /* implicit null-pointer check */
1029                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1030                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1031                         M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_intarray_t, data[0]));
1032                         emit_store_dst(jd, iptr, d);
1033                         break;
1034
1035                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1036
1037                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1038                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1039                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1040                         /* implicit null-pointer check */
1041                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1042                         M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1043                         M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_longarray_t, data[0]));
1044                         emit_store_dst(jd, iptr, d);
1045                         break;
1046
1047                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1048
1049                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1050                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1051                         /* implicit null-pointer check */
1052                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1053                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1054 #if !defined(ENABLE_SOFTFLOAT)
1055                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1056                         M_FLD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray_t, data[0]));
1057 #else
1058                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1059                         M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray_t, data[0]));
1060 #endif
1061                         emit_store_dst(jd, iptr, d);
1062                         break;
1063
1064                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1065
1066                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1067                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1068                         /* implicit null-pointer check */
1069                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1070                         M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1071 #if !defined(ENABLE_SOFTFLOAT)
1072                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1073                         M_DLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray_t, data[0]));
1074 #else
1075                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1076                         M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray_t, data[0]));
1077 #endif
1078                         emit_store_dst(jd, iptr, d);
1079                         break;
1080
1081                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1082
1083                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1084                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1085                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1086                         /* implicit null-pointer check */
1087                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1088                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1089                         M_LDR_INTERN(d, REG_ITMP1, OFFSET(java_objectarray_t, data[0]));
1090                         emit_store_dst(jd, iptr, d);
1091                         break;
1092
1093                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1094
1095                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1096                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1097                         /* implicit null-pointer check */
1098                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1099                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1100                         M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
1101                         M_STRB(s3, REG_ITMP1, OFFSET(java_bytearray_t, data[0]));
1102                         break;
1103
1104                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1105
1106                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1107                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1108                         /* implicit null-pointer check */
1109                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1110                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1111                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1112                         M_STRH(s3, REG_ITMP1, OFFSET(java_chararray_t, data[0]));
1113                         break;
1114
1115                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1116
1117                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1118                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1119                         /* implicit null-pointer check */
1120                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1121                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1122                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1123                         M_STRH(s3, REG_ITMP1, OFFSET(java_shortarray_t, data[0]));
1124                         break;
1125
1126                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1127
1128                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1129                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1130                         /* implicit null-pointer check */
1131                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1132                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1133                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1134                         M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_intarray_t, data[0]));
1135                         break;
1136
1137                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1138
1139                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1140                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1141                         /* implicit null-pointer check */
1142                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1143                         M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1144                         s3 = emit_load_s3(jd, iptr, REG_ITMP12_PACKED);
1145                         M_LST_INTERN(s3, REG_ITMP3, OFFSET(java_longarray_t, data[0]));
1146                         break;
1147
1148                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1149
1150                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1151                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1152                         /* implicit null-pointer check */
1153                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1154                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1155 #if !defined(ENABLE_SOFTFLOAT)
1156                         s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1157                         M_FST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray_t, data[0]));
1158 #else
1159                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1160                         M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray_t, data[0]));
1161 #endif
1162                         break;
1163
1164                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1165
1166                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1167                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1168                         /* implicit null-pointer check */
1169                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1170                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 3)); /* REG_ITMP1 = s1 + 8 * s2 */
1171 #if !defined(ENABLE_SOFTFLOAT)
1172                         s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1173                         M_DST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray_t, data[0]));
1174 #else
1175                         s3 = emit_load_s3(jd, iptr, REG_ITMP23_PACKED);
1176                         M_LST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray_t, data[0]));
1177 #endif
1178                         break;
1179
1180                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1181
1182                         s1 = emit_load_s1(jd, iptr, REG_A0);
1183                         s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1184                         s3 = emit_load_s3(jd, iptr, REG_A1);
1185
1186                         /* implicit null-pointer check */
1187                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1188
1189                         /* move arguments to argument registers */
1190                         M_INTMOVE(s1, REG_A0);
1191                         M_INTMOVE(s3, REG_A1);
1192
1193                         /* call builtin function */
1194                         disp = dseg_add_functionptr(cd, BUILTIN_FAST_canstore);
1195                         M_DSEG_BRANCH(disp);
1196
1197                         /* recompute pv */
1198                         emit_recompute_pv(cd);
1199
1200                         /* check resturn value of builtin */
1201                         emit_arraystore_check(cd, iptr);
1202
1203                         /* finally store address into array */
1204                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1205                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1206                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1207                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1208                         M_STR_INTERN(s3, REG_ITMP1, OFFSET(java_objectarray_t, data[0]));
1209                         break;
1210
1211                 case ICMD_GETFIELD:   /* ..., objectref, value  ==> ...               */
1212
1213                         s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1214                         emit_nullpointer_check(cd, iptr, s1);
1215
1216
1217                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1218                                 uf        = iptr->sx.s23.s3.uf;
1219                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1220                                 disp      = 0;
1221                         }
1222                         else {
1223                                 fi        = iptr->sx.s23.s3.fmiref->p.field;
1224                                 fieldtype = fi->type;
1225                                 disp      = fi->offset;
1226                         }
1227
1228 #if !defined(ENABLE_SOFTFLOAT)
1229                         /* HACK: softnull checks on floats */
1230                         if (!INSTRUCTION_MUST_CHECK(iptr) && IS_FLT_DBL_TYPE(fieldtype))
1231                                 emit_nullpointer_check_force(cd, iptr, s1);
1232 #endif
1233
1234                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1235                                 /* XXX REMOVE ME */
1236                                 uf = iptr->sx.s23.s3.uf;
1237
1238                                 patcher_add_patch_ref(jd, PATCHER_get_putfield, uf, 0);
1239                         }
1240
1241                         switch (fieldtype) {
1242                         case TYPE_INT:
1243 #if defined(ENABLE_SOFTFLOAT)
1244                         case TYPE_FLT:
1245 #endif
1246                         case TYPE_ADR:
1247                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1248                                 M_ILD(d, s1, disp);
1249                                 break;
1250                         case TYPE_LNG:
1251 #if defined(ENABLE_SOFTFLOAT)
1252                         case TYPE_DBL:
1253 #endif
1254                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1255                                 M_LLD(d, s1, disp);
1256                                 break;
1257 #if !defined(ENABLE_SOFTFLOAT)
1258                         case TYPE_FLT:
1259                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1260                                 M_FLD(d, s1, disp);
1261                                 break;
1262                         case TYPE_DBL:
1263                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1264                                 M_DLD(d, s1, disp);
1265                                 break;
1266 #endif
1267                         default:
1268                                 assert(0);
1269                         }
1270                         emit_store_dst(jd, iptr, d);
1271                         break;
1272
1273                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
1274
1275                         s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1276                         emit_nullpointer_check(cd, iptr, s1);
1277
1278                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1279                                 uf        = iptr->sx.s23.s3.uf;
1280                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1281                                 disp      = 0;
1282                         }
1283                         else {
1284                                 fi        = iptr->sx.s23.s3.fmiref->p.field;
1285                                 fieldtype = fi->type;
1286                                 disp      = fi->offset;
1287                         }
1288
1289 #if !defined(ENABLE_SOFTFLOAT)
1290                         /* HACK: softnull checks on floats */
1291                         if (!INSTRUCTION_MUST_CHECK(iptr) && IS_FLT_DBL_TYPE(fieldtype))
1292                                 emit_nullpointer_check_force(cd, iptr, s1);
1293 #endif
1294
1295                         switch (fieldtype) {
1296                         case TYPE_INT:
1297 #if defined(ENABLE_SOFTFLOAT)
1298                         case TYPE_FLT:
1299 #endif
1300                         case TYPE_ADR:
1301                                 s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1302                                 break;
1303 #if defined(ENABLE_SOFTFLOAT)
1304                         case TYPE_DBL: /* fall through */
1305 #endif
1306                         case TYPE_LNG:
1307                                 s2 = emit_load_s2(jd, iptr, REG_ITMP12_PACKED);
1308                                 break;
1309 #if !defined(ENABLE_SOFTFLOAT)
1310                         case TYPE_FLT:
1311                         case TYPE_DBL:
1312                                 s2 = emit_load_s2(jd, iptr, REG_FTMP1);
1313                                 break;
1314 #endif
1315                         default:
1316                                 assert(0);
1317                         }
1318
1319                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1320                                 /* XXX REMOVE ME */
1321                                 uf = iptr->sx.s23.s3.uf;
1322
1323                                 patcher_add_patch_ref(jd, PATCHER_get_putfield, uf, 0);
1324                         }
1325
1326                         switch (fieldtype) {
1327                         case TYPE_INT:
1328 #if defined(ENABLE_SOFTFLOAT)
1329                         case TYPE_FLT:
1330 #endif
1331                         case TYPE_ADR:
1332                                 M_IST(s2, s1, disp);
1333                                 break;
1334                         case TYPE_LNG:
1335 #if defined(ENABLE_SOFTFLOAT)
1336                         case TYPE_DBL:
1337 #endif
1338                                 M_LST(s2, s1, disp);
1339                                 break;
1340 #if !defined(ENABLE_SOFTFLOAT)
1341                         case TYPE_FLT:
1342                                 M_FST(s2, s1, disp);
1343                                 break;
1344                         case TYPE_DBL:
1345                                 M_DST(s2, s1, disp);
1346                                 break;
1347 #endif
1348                         default:
1349                                 assert(0);
1350                         }
1351                         break;
1352
1353
1354                 /* branch operations **************************************************/
1355
1356                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
1357
1358                         disp = dseg_add_functionptr(cd, asm_handle_exception);
1359                         M_DSEG_LOAD(REG_ITMP3, disp);
1360                         M_MOV(REG_ITMP2_XPC, REG_PC);
1361                         M_MOV(REG_PC, REG_ITMP3);
1362                         M_NOP;              /* nop ensures that XPC is less than the end  */
1363                                             /* of basic block                             */
1364                         break;
1365
1366                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
1367
1368                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1369                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1370                         if (iptr->sx.val.l == 0) {
1371                                 M_ORR_S(s1, s2, REG_ITMP3);
1372                         }
1373                         else {
1374                                 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1375                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1376                                 M_CMP(s1, REG_ITMP3);*/
1377                                 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1378                                 M_CMPEQ(s2, REG_ITMP3);
1379                         }
1380                         emit_beq(cd, iptr->dst.block);
1381                         break;
1382
1383                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
1384
1385                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1386                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1387                         if (iptr->sx.val.l == 0) {
1388                                 /* if high word is less than zero, the whole long is too */
1389                                 M_CMP_IMM(s1, 0);
1390                                 emit_blt(cd, iptr->dst.block);
1391                         }
1392                         else {
1393                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1394                                 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1395                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1396                                 M_CMP(s1, REG_ITMP3);*/
1397                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1398                                 M_MOVGT_IMM(2, REG_ITMP1);
1399                                 M_MOVEQ_IMM(1, REG_ITMP1);
1400
1401                                 /* low compare: x=x-1(ifLO) */
1402                                 emit_icmp_imm(cd, s2, (iptr->sx.val.l & 0xffffffff));
1403                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1404                                 M_CMP(s2, REG_ITMP3);*/
1405                                 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1406
1407                                 /* branch if (x LT 1) */
1408                                 M_CMP_IMM(REG_ITMP1, 1);
1409                                 emit_blt(cd, iptr->dst.block);
1410                         }
1411                         break;
1412
1413                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
1414
1415                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1416                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1417                         if (iptr->sx.val.l == 0) {
1418                                 /* if high word is less than zero, the whole long is too  */
1419                                 M_CMP_IMM(s1, 0);
1420                                 emit_blt(cd, iptr->dst.block);
1421
1422                                 /* ... otherwise the low word has to be zero (tricky!) */
1423                                 M_CMPEQ_IMM(s2, 0);
1424                                 emit_beq(cd, iptr->dst.block);
1425                         }
1426                         else {
1427                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1428                                 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1429                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1430                                 M_CMP(s1, REG_ITMP3);*/
1431                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1432                                 M_MOVGT_IMM(2, REG_ITMP1);
1433                                 M_MOVEQ_IMM(1, REG_ITMP1);
1434
1435                                 /* low compare: x=x+1(ifHI) */
1436                                 emit_icmp_imm(cd, s2, (iptr->sx.val.l & 0xffffffff));
1437                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1438                                 M_CMP(s2, REG_ITMP3);*/
1439                                 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1440
1441                                 /* branch if (x LE 1) */
1442                                 M_CMP_IMM(REG_ITMP1, 1);
1443                                 emit_ble(cd, iptr->dst.block);
1444                         }
1445                         break;
1446
1447                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
1448
1449                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1450                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1451                         if (iptr->sx.val.l == 0) {
1452                                 /* if high word is greater or equal zero, the whole long is too */
1453                                 M_CMP_IMM(s1, 0);
1454                                 emit_bge(cd, iptr->dst.block);
1455                         }
1456                         else {
1457                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1458                                 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1459                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1460                                 M_CMP(s1, REG_ITMP3);*/
1461                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1462                                 M_MOVGT_IMM(2, REG_ITMP1);
1463                                 M_MOVEQ_IMM(1, REG_ITMP1);
1464
1465                                 /* low compare: x=x-1(ifLO) */
1466                                 emit_icmp_imm(cd, s2, (iptr->sx.val.l & 0xffffffff));
1467                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1468                                 M_CMP(s2, REG_ITMP3);*/
1469                                 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1470
1471                                 /* branch if (x GE 1) */
1472                                 M_CMP_IMM(REG_ITMP1, 1);
1473                                 emit_bge(cd, iptr->dst.block);
1474                         }
1475                         break;
1476
1477                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
1478
1479                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1480                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1481 #if 0
1482                         if (iptr->sx.val.l == 0) {
1483                                 /* if high word is greater than zero, the whole long is too */
1484                                 M_CMP_IMM(s1, 0);
1485                                 M_BGT(0);
1486                                 codegen_add_branch_ref(cd, iptr->dst.block);
1487
1488                                 /* ... or high was zero and low is non zero (tricky!) */
1489                                 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1490                                 M_MOVLT_IMM(1, REG_ITMP3);
1491                                 M_ORR_S(REG_ITMP3, s2, REG_ITMP3);
1492                                 M_BNE(0);
1493                                 codegen_add_branch_ref(cd, iptr->dst.block);
1494                         }
1495                         else {
1496 #endif
1497                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1498                                 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1499                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1500                                 M_CMP(s1, REG_ITMP3);*/
1501                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1502                                 M_MOVGT_IMM(2, REG_ITMP1);
1503                                 M_MOVEQ_IMM(1, REG_ITMP1);
1504
1505                                 /* low compare: x=x+1(ifHI) */
1506                                 emit_icmp_imm(cd, s2, (iptr->sx.val.l & 0xffffffff));
1507                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1508                                 M_CMP(s2, REG_ITMP3);*/
1509                                 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1510
1511                                 /* branch if (x GT 1) */
1512                                 M_CMP_IMM(REG_ITMP1, 1);
1513                                 emit_bgt(cd, iptr->dst.block);
1514 #if 0
1515                         }
1516 #endif
1517                         break;
1518
1519                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
1520
1521                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1522                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1523                         if (iptr->sx.val.l == 0) {
1524                                 M_ORR_S(s1, s2, REG_ITMP3);
1525                         }
1526                         else {
1527                                 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1528                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1529                                 M_CMP(s1, REG_ITMP3);*/
1530                                 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1531                                 M_CMPEQ(s2, REG_ITMP3);
1532                         }
1533                         emit_bne(cd, iptr->dst.block);
1534                         break;
1535                         
1536                 case ICMD_IF_LCMPEQ:    /* ..., value, value ==> ...                  */
1537                                         /* op1 = target JavaVM pc                     */
1538
1539                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1540                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1541                         M_CMP(s1, s2);
1542
1543                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1544                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1545                         M_CMPEQ(s1, s2);
1546
1547                         emit_beq(cd, iptr->dst.block);
1548                         break;
1549
1550                 case ICMD_IF_LCMPNE:    /* ..., value, value ==> ...                  */
1551                                         /* op1 = target JavaVM pc                     */
1552
1553                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1554                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1555                         M_CMP(s1, s2);
1556
1557                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1558                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1559                         M_CMPEQ(s1, s2);
1560
1561                         emit_bne(cd, iptr->dst.block);
1562                         break;
1563
1564                 case ICMD_IF_LCMPLT:    /* ..., value, value ==> ...                  */
1565                                         /* op1 = target JavaVM pc                     */
1566
1567                         /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1568                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1569                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1570                         M_CMP(s1, s2);
1571                         M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1572                         M_MOVGT_IMM(2, REG_ITMP3);
1573                         M_MOVEQ_IMM(1, REG_ITMP3);
1574
1575                         /* low compare: x=x-1(ifLO) */
1576                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1577                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1578                         M_CMP(s1, s2);
1579                         M_SUBLO_IMM(REG_ITMP3, REG_ITMP3, 1);
1580
1581                         /* branch if (x LT 1) */
1582                         M_CMP_IMM(REG_ITMP3, 1);
1583                         emit_blt(cd, iptr->dst.block);
1584                         break;
1585
1586                 case ICMD_IF_LCMPLE:    /* ..., value, value ==> ...                  */
1587                                         /* op1 = target JavaVM pc                     */
1588
1589                         /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1590                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1591                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1592                         M_CMP(s1, s2);
1593                         M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1594                         M_MOVGT_IMM(2, REG_ITMP3);
1595                         M_MOVEQ_IMM(1, REG_ITMP3);
1596
1597                         /* low compare: x=x-1(ifLO) */
1598                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1599                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1600                         M_CMP(s1, s2);
1601                         M_ADDHI_IMM(REG_ITMP3, REG_ITMP3, 1);
1602
1603                         /* branch if (x LE 1) */
1604                         M_CMP_IMM(REG_ITMP3, 1);
1605                         emit_ble(cd, iptr->dst.block);
1606                         break;
1607
1608                 case ICMD_IF_LCMPGT:    /* ..., value, value ==> ...                  */
1609                                         /* op1 = target JavaVM pc                     */
1610
1611                         /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1612                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1613                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1614                         M_CMP(s1, s2);
1615                         M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1616                         M_MOVGT_IMM(2, REG_ITMP3);
1617                         M_MOVEQ_IMM(1, REG_ITMP3);
1618
1619                         /* low compare: x=x-1(ifLO) */
1620                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1621                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1622                         M_CMP(s1, s2);
1623                         M_ADDHI_IMM(REG_ITMP3, REG_ITMP3, 1);
1624
1625                         /* branch if (x GT 1) */
1626                         M_CMP_IMM(REG_ITMP3, 1);
1627                         emit_bgt(cd, iptr->dst.block);
1628                         break;
1629
1630                 case ICMD_IF_LCMPGE:    /* ..., value, value ==> ...                  */
1631                                         /* op1 = target JavaVM pc                     */
1632
1633                         /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1634                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1635                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1636                         M_CMP(s1, s2);
1637                         M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1638                         M_MOVGT_IMM(2, REG_ITMP3);
1639                         M_MOVEQ_IMM(1, REG_ITMP3);
1640
1641                         /* low compare: x=x-1(ifLO) */
1642                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1643                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1644                         M_CMP(s1, s2);
1645                         M_SUBLO_IMM(REG_ITMP3, REG_ITMP3, 1);
1646
1647                         /* branch if (x GE 1) */
1648                         M_CMP_IMM(REG_ITMP3, 1);
1649                         emit_bge(cd, iptr->dst.block);
1650                         break;
1651
1652                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
1653                         {
1654                         s4 i, l;
1655                         branch_target_t *table;
1656
1657                         table = iptr->dst.table;
1658
1659                         l = iptr->sx.s23.s2.tablelow;
1660                         i = iptr->sx.s23.s3.tablehigh;
1661
1662                         /* calculate new index (index - low) */
1663                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1664                         if (l  == 0) {
1665                                 M_INTMOVE(s1, REG_ITMP1);
1666                         } else if (IS_IMM(l)) {
1667                                 M_SUB_IMM(REG_ITMP1, s1, l);
1668                         } else {
1669                                 ICONST(REG_ITMP2, l);
1670                                 M_SUB(REG_ITMP1, s1, REG_ITMP2);
1671                         }
1672
1673                         /* range check (index <= high-low) */
1674                         i = i - l + 1;
1675                         emit_icmp_imm(cd, REG_ITMP1, i-1);
1676                         emit_bugt(cd, table[0].block);
1677
1678                         /* build jump table top down and use address of lowest entry */
1679
1680                         table += i;
1681
1682                         while (--i >= 0) {
1683                                 dseg_add_target(cd, table->block);
1684                                 --table;
1685                         }
1686                         }
1687
1688                         /* length of dataseg after last dseg_add_target is used by load */
1689                         /* TODO: this loads from data-segment */
1690                         M_ADD(REG_ITMP2, REG_PV, REG_LSL(REG_ITMP1, 2));
1691                         M_LDR(REG_PC, REG_ITMP2, -(cd->dseglen));
1692                         break;
1693
1694                 case ICMD_BUILTIN:
1695                         bte = iptr->sx.s23.s3.bte;
1696                         if (bte->stub == NULL) {
1697                                 disp = dseg_add_functionptr(cd, bte->fp);
1698                         } else {
1699                                 disp = dseg_add_functionptr(cd, bte->stub);
1700                         }
1701
1702                         M_DSEG_LOAD(REG_PV, disp); /* pointer to built-in-function */
1703
1704                         /* generate the actual call */
1705
1706                         M_MOV(REG_LR, REG_PC);
1707                         M_MOV(REG_PC, REG_PV);
1708
1709 #if !defined(__SOFTFP__)
1710                         /* TODO: this is only a hack, since we use R0/R1 for float
1711                            return!  this depends on gcc; it is independent from
1712                            our ENABLE_SOFTFLOAT define */
1713                         if (d != TYPE_VOID && IS_FLT_DBL_TYPE(d)) {
1714 #if 0 && !defined(NDEBUG)
1715                                 dolog("BUILTIN that returns float or double (%s.%s)", m->clazz->name->text, m->name->text);
1716 #endif
1717                                 /* we cannot use this macro, since it is not defined
1718                                    in ENABLE_SOFTFLOAT M_CAST_FLT_TO_INT_TYPED(d,
1719                                    REG_FRESULT, REG_RESULT_TYPED(d)); */
1720                                 if (IS_2_WORD_TYPE(d)) {
1721                                         DCD(0xed2d8102); /* stfd    f0, [sp, #-8]! */
1722                                         M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
1723                                 } else {
1724                                         DCD(0xed2d0101); /* stfs    f0, [sp, #-4]!*/
1725                                         M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
1726                                 }
1727                         }
1728 #endif
1729                         break;
1730
1731                 case ICMD_INVOKESPECIAL:
1732                         emit_nullpointer_check(cd, iptr, REG_A0);
1733                         /* fall through */
1734
1735                 case ICMD_INVOKESTATIC:
1736                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1737                                 um = iptr->sx.s23.s3.um;
1738                                 disp = dseg_add_unique_address(cd, NULL);
1739
1740                                 patcher_add_patch_ref(jd, PATCHER_invokestatic_special,
1741                                                                         um, disp);
1742                         }
1743                         else {
1744                                 lm = iptr->sx.s23.s3.fmiref->p.method;
1745                                 disp = dseg_add_address(cd, lm->stubroutine);
1746                         }
1747
1748                         M_DSEG_LOAD(REG_PV, disp);            /* Pointer to method */
1749
1750                         /* generate the actual call */
1751
1752                         M_MOV(REG_LR, REG_PC);
1753                         M_MOV(REG_PC, REG_PV);
1754                         break;
1755
1756                 case ICMD_INVOKEVIRTUAL:
1757                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1758                                 um = iptr->sx.s23.s3.um;
1759                                 int32_t disp = dseg_add_unique_s4(cd, 0);
1760                                 patcher_add_patch_ref(jd, PATCHER_invokevirtual, um, disp);
1761
1762                                 // The following instruction MUST NOT change a0 because of the implicit NPE check.
1763                                 M_LDR_INTERN(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
1764
1765                                 // Sanity check.
1766                                 assert(REG_ITMP1 != REG_METHODPTR);
1767                                 assert(REG_ITMP2 == REG_METHODPTR);
1768
1769                                 M_DSEG_LOAD(REG_ITMP1, disp);
1770                                 M_ADD(REG_METHODPTR, REG_METHODPTR, REG_ITMP1);
1771
1772                                 // This must be a load with displacement,
1773                                 // otherwise the JIT method address patching does
1774                                 // not work anymore (see md_jit_method_patch_address).
1775                                 M_LDR_INTERN(REG_PV, REG_METHODPTR, 0);
1776                         }
1777                         else {
1778                                 lm = iptr->sx.s23.s3.fmiref->p.method;
1779                                 s1 = OFFSET(vftbl_t, table[0]) + sizeof(methodptr) * lm->vftblindex;
1780
1781                                 // The following instruction MUST NOT change a0 because of the implicit NPE check.
1782                                 M_LDR_INTERN(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
1783                                 M_LDR(REG_PV, REG_METHODPTR, s1);
1784                         }
1785
1786                         // Generate the actual call.
1787                         M_MOV(REG_LR, REG_PC);
1788                         M_MOV(REG_PC, REG_PV);
1789                         break;
1790
1791                 case ICMD_INVOKEINTERFACE:
1792                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1793                                 um = iptr->sx.s23.s3.um;
1794                                 int32_t disp  = dseg_add_unique_s4(cd, 0);
1795                                 int32_t disp2 = dseg_add_unique_s4(cd, 0);
1796
1797                                 // XXX We need two displacements.
1798                                 assert(disp2 == disp - 4);
1799                                 patcher_add_patch_ref(jd, PATCHER_invokeinterface, um, disp);
1800
1801                                 // The following instruction MUST NOT change a0 because of the implicit NPE check.
1802                                 M_LDR_INTERN(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
1803
1804                                 // Sanity check.
1805                                 assert(REG_ITMP1 != REG_METHODPTR);
1806                                 assert(REG_ITMP2 == REG_METHODPTR);
1807                                 assert(REG_ITMP3 != REG_METHODPTR);
1808
1809                                 M_DSEG_LOAD(REG_ITMP1, disp);
1810                                 M_LDR_REG(REG_METHODPTR, REG_METHODPTR, REG_ITMP1);
1811
1812                                 M_DSEG_LOAD(REG_ITMP3, disp2);
1813                                 M_ADD(REG_METHODPTR, REG_METHODPTR, REG_ITMP3);
1814
1815                                 // This must be a load with displacement,
1816                                 // otherwise the JIT method address patching does
1817                                 // not work anymore (see md_jit_method_patch_address).
1818                                 M_LDR_INTERN(REG_PV, REG_METHODPTR, 0);
1819                         }
1820                         else {
1821                                 lm = iptr->sx.s23.s3.fmiref->p.method;
1822                                 s1 = OFFSET(vftbl_t, interfacetable[0]) - sizeof(methodptr*) * lm->clazz->index;
1823                                 s2 = sizeof(methodptr) * (lm - lm->clazz->methods);
1824
1825                                 // The following instruction MUST NOT change a0 because of the implicit NPE check.
1826                                 M_LDR_INTERN(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
1827                                 M_LDR(REG_METHODPTR, REG_METHODPTR, s1);
1828                                 M_LDR(REG_PV, REG_METHODPTR, s2);
1829                         }
1830
1831                         // Generate the actual call.
1832                         M_MOV(REG_LR, REG_PC);
1833                         M_MOV(REG_PC, REG_PV);
1834                         break;
1835
1836                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
1837
1838                         if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
1839                                 /* object type cast-check */
1840
1841                         classinfo *super;
1842                         s4         superindex;
1843
1844                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1845                                 super      = NULL;
1846                                 superindex = 0;
1847                         }
1848                         else {
1849                                 super      = iptr->sx.s23.s3.c.cls;
1850                                 superindex = super->index;
1851                         }
1852
1853                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1854
1855                         /* if class is not resolved, check which code to call */
1856
1857                         if (super == NULL) {
1858                                 M_TST(s1, s1);
1859                                 emit_label_beq(cd, BRANCH_LABEL_1);
1860
1861                                 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
1862                                 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_flags,
1863                                                     iptr->sx.s23.s3.c.ref, disp);
1864
1865                                 M_DSEG_LOAD(REG_ITMP2, disp);
1866                                 disp = dseg_add_s4(cd, ACC_INTERFACE);
1867                                 M_DSEG_LOAD(REG_ITMP3, disp);
1868                                 M_TST(REG_ITMP2, REG_ITMP3);
1869                                 emit_label_beq(cd, BRANCH_LABEL_2);
1870                         }
1871
1872                         /* interface checkcast code */
1873
1874                         if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
1875                                 if ((super == NULL) || !IS_IMM(superindex)) {
1876                                         disp = dseg_add_unique_s4(cd, superindex);
1877                                 }
1878                                 if (super == NULL) {
1879                                         patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_index,
1880                                                             iptr->sx.s23.s3.c.ref, disp);
1881                                 }
1882                                 else {
1883                                         M_TST(s1, s1);
1884                                         emit_label_beq(cd, BRANCH_LABEL_3);
1885                                 }
1886
1887                                 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_object_t, vftbl));
1888                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
1889
1890                                 /* we put unresolved or non-immediate superindices onto dseg */
1891                                 if ((super == NULL) || !IS_IMM(superindex)) {
1892                                         /* disp was computed before we added the patcher */
1893                                         M_DSEG_LOAD(REG_ITMP2, disp);
1894                                         M_CMP(REG_ITMP3, REG_ITMP2);
1895                                 } else {
1896                                         assert(IS_IMM(superindex));
1897                                         M_CMP_IMM(REG_ITMP3, superindex);
1898                                 }
1899
1900                                 emit_classcast_check(cd, iptr, BRANCH_LE, REG_ITMP3, s1);
1901
1902                                 /* if we loaded the superindex out of the dseg above, we do
1903                                    things differently here! */
1904                                 if ((super == NULL) || !IS_IMM(superindex)) {
1905
1906                                         M_LDR_INTERN(REG_ITMP3, s1, OFFSET(java_object_t, vftbl));
1907
1908                                         /* this assumes something */
1909                                         assert(OFFSET(vftbl_t, interfacetable[0]) == 0);
1910
1911                                         /* this does: REG_ITMP3 - superindex * sizeof(methodptr*) */
1912                                         assert(sizeof(methodptr*) == 4);
1913                                         M_SUB(REG_ITMP2, REG_ITMP3, REG_LSL(REG_ITMP2, 2));
1914
1915                                         s2 = 0;
1916
1917                                 } else {
1918
1919                                         s2 = OFFSET(vftbl_t, interfacetable[0]) -
1920                                                                 superindex * sizeof(methodptr*);
1921
1922                                 }
1923
1924                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, s2);
1925                                 M_TST(REG_ITMP3, REG_ITMP3);
1926                                 emit_classcast_check(cd, iptr, BRANCH_EQ, REG_ITMP3, s1);
1927
1928                                 if (super == NULL)
1929                                         emit_label_br(cd, BRANCH_LABEL_4);
1930                                 else
1931                                         emit_label(cd, BRANCH_LABEL_3);
1932                         }
1933
1934                         /* class checkcast code */
1935
1936                         if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
1937                                 if (super == NULL) {
1938                                         emit_label(cd, BRANCH_LABEL_2);
1939
1940                                         disp = dseg_add_unique_address(cd, NULL);
1941
1942                                         patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_vftbl,
1943                                                             iptr->sx.s23.s3.c.ref,
1944                                                                                 disp);
1945                                 }
1946                                 else {
1947                                         disp = dseg_add_address(cd, super->vftbl);
1948
1949                                         M_TST(s1, s1);
1950                                         emit_label_beq(cd, BRANCH_LABEL_5);
1951                                 }
1952
1953                                 // The following code checks whether object s is a subtype of class t.
1954                                 // Represents the following semantic:
1955                                 //    if (!fast_subtype_check(s->vftbl, t->vftbl)) throw;
1956
1957                                 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_object_t, vftbl));
1958                                 M_DSEG_LOAD(REG_ITMP3, disp);
1959
1960                                 if (super == NULL || super->vftbl->subtype_depth >= DISPLAY_SIZE) {
1961                                         // Represents the following semantic:
1962                                         //    if (*(s->vftbl + t->vftbl->subtype_offset) == t->vftbl) good;
1963                                         // Preconditions:
1964                                         //    REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
1965                                         M_LDR_INTERN(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
1966                                         M_LDR_REG(REG_ITMP1, REG_ITMP2, REG_ITMP1);
1967                                         M_CMP(REG_ITMP1, REG_ITMP3);
1968                                         emit_load_s1(jd, iptr, REG_ITMP1);  /* reload s1, might have been destroyed */
1969                                         emit_label_beq(cd, BRANCH_LABEL_6);  /* good */
1970
1971                                         // Represents the following semantic:
1972                                         //    if (t->vftbl->subtype_offset != OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE])) throw;
1973                                         // Preconditions:
1974                                         //    REG_ITMP3==t->vftbl;
1975                                         if (super == NULL) {
1976                                                 M_LDR_INTERN(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
1977                                                 M_CMP_IMM(REG_ITMP1, OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE]));
1978                                                 emit_load_s1(jd, iptr, REG_ITMP1);  /* reload s1, might have been destroyed */
1979                                                 emit_classcast_check(cd, iptr, BRANCH_NE, 0, s1);  /* throw */
1980                                         }
1981
1982                                         // Represents the following semantic:
1983                                         //    if (s->vftbl->subtype_depth < t->vftbl->subtype_depth) throw;
1984                                         // Preconditions:
1985                                         //    REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
1986                                         M_LDR_INTERN(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, subtype_depth));
1987                                         M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, subtype_depth));
1988                                         M_CMP(REG_ITMP1, REG_ITMP3);
1989                                         emit_load_s1(jd, iptr, REG_ITMP1);  /* reload s1, might have been destroyed */
1990                                         emit_classcast_check(cd, iptr, BRANCH_LT, 0, s1);  /* throw */
1991
1992                                         // Represents the following semantic:
1993                                         //    if (s->vftbl->subtype_overflow[t->vftbl->subtype_depth - DISPLAY_SIZE] != t->vftbl) throw;
1994                                         // Preconditions:
1995                                         //    REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl->subtype_depth;
1996                                         M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, subtype_overflow));
1997                                         M_ADD(REG_ITMP2, REG_ITMP2, REG_LSL(REG_ITMP3, 2));  /* REG_ITMP2 = REG_ITMP2 + 4 * REG_ITMP3 */
1998                                         M_LDR_INTERN(REG_ITMP2, REG_ITMP2, -DISPLAY_SIZE * SIZEOF_VOID_P);
1999                                         M_DSEG_LOAD(REG_ITMP3, disp);  /* reload REG_ITMP3, was destroyed */
2000                                         M_CMP(REG_ITMP2, REG_ITMP3);
2001                                         emit_classcast_check(cd, iptr, BRANCH_NE, 0, s1);  /* throw */
2002
2003                                         emit_label(cd, BRANCH_LABEL_6);
2004                                 }
2005                                 else {
2006                                         // Represents the following semantic:
2007                                         //    if (*(s->vftbl + t->vftbl->subtype_offset) != t->vftbl) throw;
2008                                         // Preconditions:
2009                                         //    REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2010                                         M_ALD(REG_ITMP2, REG_ITMP2, super->vftbl->subtype_offset);
2011                                         M_CMP(REG_ITMP2, REG_ITMP3);
2012                                         emit_classcast_check(cd, iptr, BRANCH_NE, 0, s1);
2013                                 }
2014
2015                                 if (super != NULL)
2016                                         emit_label(cd, BRANCH_LABEL_5);
2017                         }
2018
2019                         if (super == NULL) {
2020                                 emit_label(cd, BRANCH_LABEL_1);
2021                                 emit_label(cd, BRANCH_LABEL_4);
2022                         }
2023
2024                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
2025                         }
2026                         else {
2027                                 /* array type cast-check */
2028
2029                                 s1 = emit_load_s1(jd, iptr, REG_A0);
2030                                 M_INTMOVE(s1, REG_A0);
2031
2032                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2033                                         disp = dseg_add_unique_address(cd, NULL);
2034
2035                                         patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
2036                                                                                 iptr->sx.s23.s3.c.ref,
2037                                                                                 disp);
2038                                 }
2039                                 else
2040                                         disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2041
2042                                 M_DSEG_LOAD(REG_A1, disp);
2043                                 disp = dseg_add_functionptr(cd, BUILTIN_arraycheckcast);
2044                                 M_DSEG_BRANCH(disp);
2045
2046                                 emit_recompute_pv(cd);
2047
2048                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2049                                 M_TST(REG_RESULT, REG_RESULT);
2050                                 emit_classcast_check(cd, iptr, BRANCH_EQ, REG_RESULT, s1);
2051
2052                                 d = codegen_reg_of_dst(jd, iptr, s1);
2053                         }
2054
2055                         M_INTMOVE(s1, d);
2056                         emit_store_dst(jd, iptr, d);
2057                         break;
2058
2059                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
2060
2061                         {
2062                         classinfo *super;
2063                         s4         superindex;
2064
2065                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2066                                 super      = NULL;
2067                                 superindex = 0;
2068                         }
2069                         else {
2070                                 super      = iptr->sx.s23.s3.c.cls;
2071                                 superindex = super->index;
2072                         }
2073
2074                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2075                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2076
2077                         if (s1 == d) {
2078                                 M_MOV(REG_ITMP1, s1);
2079                                 s1 = REG_ITMP1;
2080                         }
2081
2082                         /* if class is not resolved, check which code to call */
2083
2084                         if (super == NULL) {
2085                                 M_EOR(d, d, d);
2086
2087                                 M_TST(s1, s1);
2088                                 emit_label_beq(cd, BRANCH_LABEL_1);
2089
2090                                 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
2091                                 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_flags,
2092                                                     iptr->sx.s23.s3.c.ref, disp);
2093
2094                                 M_DSEG_LOAD(REG_ITMP2, disp);
2095                                 disp = dseg_add_s4(cd, ACC_INTERFACE);
2096                                 M_DSEG_LOAD(REG_ITMP3, disp);
2097                                 M_TST(REG_ITMP2, REG_ITMP3);
2098                                 emit_label_beq(cd, BRANCH_LABEL_2);
2099                         }
2100
2101                         /* interface checkcast code */
2102
2103                         if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2104                                 if ((super == NULL) || !IS_IMM(superindex)) {
2105                                         disp = dseg_add_unique_s4(cd, superindex);
2106                                 }
2107                                 if (super == NULL) {
2108                                         /* If d == REG_ITMP2, then it's destroyed in check
2109                                            code above.  */
2110                                         if (d == REG_ITMP2)
2111                                                 M_EOR(d, d, d);
2112
2113                                         patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_index,
2114                                                             iptr->sx.s23.s3.c.ref, disp);
2115                                 }
2116                                 else {
2117                                         M_EOR(d, d, d);
2118                                         M_TST(s1, s1);
2119                                         emit_label_beq(cd, BRANCH_LABEL_3);
2120                                 }
2121
2122                                 M_LDR_INTERN(REG_ITMP1, s1, OFFSET(java_object_t, vftbl));
2123                                 M_LDR_INTERN(REG_ITMP3,
2124                                                          REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
2125
2126                                 /* we put unresolved or non-immediate superindices onto dseg
2127                                    and do things slightly different */
2128                                 if ((super == NULL) || !IS_IMM(superindex)) {
2129                                         /* disp was computed before we added the patcher */
2130                                         M_DSEG_LOAD(REG_ITMP2, disp);
2131                                         M_CMP(REG_ITMP3, REG_ITMP2);
2132
2133                                         if (d == REG_ITMP2) {
2134                                                 M_EORLE(d, d, d);
2135                                                 M_BLE(4);
2136                                         } else {
2137                                                 M_BLE(3);
2138                                         }
2139
2140                                         /* this assumes something */
2141                                         assert(OFFSET(vftbl_t, interfacetable[0]) == 0);
2142
2143                                         /* this does: REG_ITMP3 - superindex * sizeof(methodptr*) */
2144                                         assert(sizeof(methodptr*) == 4);
2145                                         M_SUB(REG_ITMP1, REG_ITMP1, REG_LSL(REG_ITMP2, 2));
2146
2147                                         if (d == REG_ITMP2) {
2148                                                 M_EOR(d, d, d);
2149                                         }
2150
2151                                         s2 = 0;
2152
2153                                 } else {
2154                                         assert(IS_IMM(superindex));
2155                                         M_CMP_IMM(REG_ITMP3, superindex);
2156
2157                                         M_BLE(2);
2158
2159                                         s2 = OFFSET(vftbl_t, interfacetable[0]) -
2160                                                 superindex * sizeof(methodptr*);
2161
2162                                 }
2163
2164                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP1, s2);
2165                                 M_TST(REG_ITMP3, REG_ITMP3);
2166                                 M_MOVNE_IMM(1, d);
2167
2168                                 if (super == NULL)
2169                                         emit_label_br(cd, BRANCH_LABEL_4);
2170                                 else
2171                                         emit_label(cd, BRANCH_LABEL_3);
2172                         }
2173
2174                         /* class checkcast code */
2175
2176                         if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2177                                 if (super == NULL) {
2178                                         emit_label(cd, BRANCH_LABEL_2);
2179
2180                                         disp = dseg_add_unique_address(cd, NULL);
2181
2182                                         patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_vftbl,
2183                                                             iptr->sx.s23.s3.c.ref, disp);
2184                                 }
2185                                 else {
2186                                         disp = dseg_add_address(cd, super->vftbl);
2187
2188                                         M_EOR(d, d, d);
2189                                         M_TST(s1, s1);
2190                                         emit_label_beq(cd, BRANCH_LABEL_5);
2191                                 }
2192
2193                                 // The following code checks whether object s is a subtype of class t.
2194                                 // Represents the following semantic:
2195                                 //    fast_subtype_check(s->vftbl, t->vftbl));
2196
2197                                 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_object_t, vftbl));
2198                                 M_DSEG_LOAD(REG_ITMP3, disp);
2199
2200                                 if (super == NULL || super->vftbl->subtype_depth >= DISPLAY_SIZE) {
2201                                         // Represents the following semantic:
2202                                         //    if (*(s->vftbl + t->vftbl->subtype_offset) == t->vftbl) true;
2203                                         // Preconditions:
2204                                         //    REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2205                                         M_LDR_INTERN(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
2206                                         M_LDR_REG(REG_ITMP1, REG_ITMP2, REG_ITMP1);
2207                                         M_CMP(REG_ITMP1, REG_ITMP3);
2208                                         emit_label_beq(cd, BRANCH_LABEL_6);  /* true */
2209
2210                                         // Represents the following semantic:
2211                                         //    if (t->vftbl->subtype_offset != OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE])) false;
2212                                         // Preconditions:
2213                                         //    REG_ITMP3==t->vftbl;
2214                                         if (super == NULL) {
2215                                                 M_LDR_INTERN(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
2216                                                 M_CMP_IMM(REG_ITMP1, OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE]));
2217                                                 emit_label_bne(cd, BRANCH_LABEL_7);  /* false */
2218                                         }
2219
2220                                         // Represents the following semantic:
2221                                         //    if (s->vftbl->subtype_depth < t->vftbl->subtype_depth) false;
2222                                         // Preconditions:
2223                                         //    REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2224                                         M_LDR_INTERN(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, subtype_depth));
2225                                         M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, subtype_depth));
2226                                         M_CMP(REG_ITMP1, REG_ITMP3);
2227                                         emit_label_blt(cd, BRANCH_LABEL_8);  /* false */
2228
2229                                         // Represents the following semantic:
2230                                         //    if (s->vftbl->subtype_overflow[t->vftbl->subtype_depth - DISPLAY_SIZE] != t->vftbl) false;
2231                                         // Preconditions:
2232                                         //    REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl->subtype_depth;
2233                                         M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, subtype_overflow));
2234                                         M_ADD(REG_ITMP2, REG_ITMP2, REG_LSL(REG_ITMP3, 2));  /* REG_ITMP2 = REG_ITMP2 + 4 * REG_ITMP3 */
2235                                         M_LDR_INTERN(REG_ITMP2, REG_ITMP2, -DISPLAY_SIZE * SIZEOF_VOID_P);
2236                                         M_DSEG_LOAD(REG_ITMP3, disp);  /* reload REG_ITMP3, was destroyed */
2237                                         M_CMP(REG_ITMP2, REG_ITMP3);
2238
2239                                         emit_label(cd, BRANCH_LABEL_6);
2240                                         if (super == NULL)
2241                                                 emit_label(cd, BRANCH_LABEL_7);
2242                                         emit_label(cd, BRANCH_LABEL_8);
2243
2244                                         /* If d == REG_ITMP2, then it's destroyed */
2245                                         if (d == REG_ITMP2)
2246                                                 M_EOR(d, d, d);
2247                                         M_MOVEQ_IMM(1, d);
2248                                 }
2249                                 else {
2250                                         // Represents the following semantic:
2251                                         //    *(s->vftbl + t->vftbl->subtype_offset) == t->vftbl;
2252                                         // Preconditions:
2253                                         //    REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2254                                         M_ALD(REG_ITMP2, REG_ITMP2, super->vftbl->subtype_offset);
2255                                         M_CMP(REG_ITMP2, REG_ITMP3);
2256                                         /* If d == REG_ITMP2, then it's destroyed */
2257                                         if (d == REG_ITMP2)
2258                                                 M_EOR(d, d, d);
2259                                         M_MOVEQ_IMM(1, d);
2260                                 }
2261
2262                                 if (super != NULL)
2263                                         emit_label(cd, BRANCH_LABEL_5);
2264                         }
2265
2266                         if (super == NULL) {
2267                                 emit_label(cd, BRANCH_LABEL_1);
2268                                 emit_label(cd, BRANCH_LABEL_4);
2269                         }
2270
2271                         }
2272
2273                         emit_store_dst(jd, iptr, d);
2274                         break;
2275
2276                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
2277
2278                         /* copy sizes to stack if necessary  */
2279
2280                         MCODECHECK((iptr->s1.argcount << 1) + 64);
2281
2282                         for (s1 = iptr->s1.argcount; --s1 >= 0; ) {
2283
2284                                 var = VAR(iptr->sx.s23.s2.args[s1]);
2285         
2286                                 /* copy SAVEDVAR sizes to stack */
2287
2288                                 if (!(var->flags & PREALLOC)) {
2289                                         s2 = emit_load(jd, iptr, var, REG_ITMP1);
2290                                         M_STR(s2, REG_SP, s1 * 4);
2291                                 }
2292                         }
2293
2294                         /* a0 = dimension count */
2295
2296                         assert(IS_IMM(iptr->s1.argcount));
2297                         M_MOV_IMM(REG_A0, iptr->s1.argcount);
2298
2299                         /* is patcher function set? */
2300
2301                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2302                                 disp = dseg_add_unique_address(cd, NULL);
2303
2304                                 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
2305                                                                         iptr->sx.s23.s3.c.ref, disp);
2306                         }
2307                         else
2308                                 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2309
2310                         /* a1 = arraydescriptor */
2311
2312                         M_DSEG_LOAD(REG_A1, disp);
2313
2314                         /* a2 = pointer to dimensions = stack pointer */
2315
2316                         M_INTMOVE(REG_SP, REG_A2);
2317
2318                         /* call builtin_multianewarray here */
2319
2320                         disp = dseg_add_functionptr(cd, BUILTIN_multianewarray);
2321                         M_DSEG_BRANCH(disp);
2322
2323                         /* recompute pv */
2324
2325                         emit_recompute_pv(cd);
2326
2327                         /* check for exception before result assignment */
2328
2329                         emit_exception_check(cd, iptr);
2330
2331                         /* get arrayref */
2332
2333                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2334                         M_INTMOVE(REG_RESULT, d);
2335                         emit_store_dst(jd, iptr, d);
2336                         break;
2337
2338                 default:
2339                         vm_abort("Unknown ICMD %d during code generation", iptr->opc);
2340         } /* the big switch */
2341 }
2342
2343
2344 /* codegen_emit_stub_native ****************************************************
2345
2346    Emits a stub routine which calls a native method.
2347
2348 *******************************************************************************/
2349
2350 void codegen_emit_stub_native(jitdata *jd, methoddesc *nmd, functionptr f, int skipparams)
2351 {
2352         methodinfo  *m;
2353         codeinfo    *code;
2354         codegendata *cd;
2355         methoddesc  *md;
2356         s4           i, j;
2357         s4           t;
2358         int          s1, s2;
2359         int          disp;
2360
2361         /* get required compiler data */
2362
2363         m    = jd->m;
2364         code = jd->code;
2365         cd   = jd->cd;
2366
2367         /* initialize variables */
2368
2369         md = m->parseddesc;
2370
2371         /* calculate stackframe size */
2372
2373         cd->stackframesize =
2374                 1 +                                                /* return address  */
2375                 sizeof(stackframeinfo_t) / SIZEOF_VOID_P +         /* stackframeinfo  */
2376                 sizeof(localref_table) / SIZEOF_VOID_P +           /* localref_table  */
2377                 nmd->memuse;                                       /* stack arguments */
2378
2379         /* align stack to 8-byte */
2380
2381         cd->stackframesize = (cd->stackframesize + 1) & ~1;
2382
2383         /* create method header */
2384
2385         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
2386         (void) dseg_add_unique_s4(cd, cd->stackframesize);     /* FrameSize       */
2387         (void) dseg_add_unique_s4(cd, 0);                      /* IsLeaf          */
2388         (void) dseg_add_unique_s4(cd, 0);                      /* IntSave         */
2389         (void) dseg_add_unique_s4(cd, 0);                      /* FltSave         */
2390
2391         /* generate stub code */
2392
2393         M_STMFD(1<<REG_LR, REG_SP);
2394         M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize * 2 - 1);
2395
2396 #if defined(ENABLE_GC_CACAO)
2397         /* Save callee saved integer registers in stackframeinfo (GC may
2398            need to recover them during a collection). */
2399
2400         disp = cd->stackframesize - SIZEOF_VOID_P - sizeof(stackframeinfo_t) +
2401                 OFFSET(stackframeinfo_t, intregs);
2402
2403         for (i = 0; i < INT_SAV_CNT; i++)
2404                 M_STR_INTERN(abi_registers_integer_saved[i], REG_SP, disp + i * 4);
2405 #endif
2406
2407         /* Save integer and float argument registers (these are 4
2408            registers, stack is 8-byte aligned). */
2409
2410         M_STMFD(BITMASK_ARGS, REG_SP);
2411         /* TODO: floating point */
2412
2413         /* create native stackframe info */
2414
2415         M_ADD_IMM(REG_A0, REG_SP, 4*4);
2416         M_MOV(REG_A1, REG_PV);
2417         disp = dseg_add_functionptr(cd, codegen_start_native_call);
2418         M_DSEG_BRANCH(disp);
2419
2420         /* recompute pv */
2421
2422         emit_recompute_pv(cd);
2423
2424         /* remember class argument */
2425
2426         if (m->flags & ACC_STATIC)
2427                 M_MOV(REG_ITMP3, REG_RESULT);
2428
2429         /* Restore integer and float argument registers (these are 4
2430            registers, stack is 8-byte aligned). */
2431
2432         M_LDMFD(BITMASK_ARGS, REG_SP);
2433         /* TODO: floating point */
2434
2435         /* copy or spill arguments to new locations */
2436         /* ATTENTION: the ARM has only integer argument registers! */
2437
2438         for (i = md->paramcount - 1, j = i + skipparams; i >= 0; i--, j--) {
2439                 t = md->paramtypes[i].type;
2440
2441                 if (!md->params[i].inmemory) {
2442                         s1 = md->params[i].regoff;
2443                         s2 = nmd->params[j].regoff;
2444
2445                         if (!nmd->params[j].inmemory) {
2446 #if !defined(__ARM_EABI__)
2447                                 SPLIT_OPEN(t, s2, REG_ITMP1);
2448 #endif
2449
2450                                 if (IS_2_WORD_TYPE(t))
2451                                         M_LNGMOVE(s1, s2);
2452                                 else
2453                                         M_INTMOVE(s1, s2);
2454
2455 #if !defined(__ARM_EABI__)
2456                                 SPLIT_STORE_AND_CLOSE(t, s2, 0);
2457 #endif
2458                         }
2459                         else {
2460                                 if (IS_2_WORD_TYPE(t))
2461                                         M_LST(s1, REG_SP, s2);
2462                                 else
2463                                         M_IST(s1, REG_SP, s2);
2464                         }
2465                 }
2466                 else {
2467                         s1 = md->params[i].regoff + cd->stackframesize * 8;
2468                         s2 = nmd->params[j].regoff;
2469
2470                         if (IS_2_WORD_TYPE(t)) {
2471                                 M_LLD(REG_ITMP12_PACKED, REG_SP, s1);
2472                                 M_LST(REG_ITMP12_PACKED, REG_SP, s2);
2473                         }
2474                         else {
2475                                 M_ILD(REG_ITMP1, REG_SP, s1);
2476                                 M_IST(REG_ITMP1, REG_SP, s2);
2477                         }
2478                 }
2479         }
2480
2481         /* Handle native Java methods. */
2482
2483         if (m->flags & ACC_NATIVE) {
2484                 /* put class into second argument register */
2485
2486                 if (m->flags & ACC_STATIC)
2487                         M_MOV(REG_A1, REG_ITMP3);
2488
2489                 /* put env into first argument register */
2490
2491                 disp = dseg_add_address(cd, VM_get_jnienv());
2492                 M_DSEG_LOAD(REG_A0, disp);
2493         }
2494
2495         /* Call the native function. */
2496
2497         disp = dseg_add_functionptr(cd, f);
2498         M_DSEG_BRANCH(disp);
2499
2500         /* recompute pv */
2501         /* TODO: this is only needed because of the tracer ... do we
2502            really need it? */
2503
2504         emit_recompute_pv(cd);
2505
2506 #if !defined(__SOFTFP__)
2507         /* TODO: this is only a hack, since we use R0/R1 for float return! */
2508         /* this depends on gcc; it is independent from our ENABLE_SOFTFLOAT define */
2509         if (md->returntype.type != TYPE_VOID && IS_FLT_DBL_TYPE(md->returntype.type)) {
2510 #if 0 && !defined(NDEBUG)
2511                 dolog("NATIVESTUB that returns float or double (%s.%s)", m->clazz->name->text, m->name->text);
2512 #endif
2513                 /* we cannot use this macro, since it is not defined in ENABLE_SOFTFLOAT */
2514                 /* M_CAST_FLT_TO_INT_TYPED(md->returntype.type, REG_FRESULT, REG_RESULT_TYPED(md->returntype.type)); */
2515                 if (IS_2_WORD_TYPE(md->returntype.type)) {
2516                         DCD(0xed2d8102); /* stfd    f0, [sp, #-8]! */
2517                         M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
2518                 } else {
2519                         DCD(0xed2d0101); /* stfs    f0, [sp, #-4]!*/
2520                         M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
2521                 }
2522         }
2523 #endif
2524
2525         /* remove native stackframe info */
2526         /* TODO: improve this store/load */
2527
2528         M_STMFD(BITMASK_RESULT, REG_SP);
2529
2530         M_ADD_IMM(REG_A0, REG_SP, 2*4);
2531         M_MOV(REG_A1, REG_PV);
2532         disp = dseg_add_functionptr(cd, codegen_finish_native_call);
2533         M_DSEG_BRANCH(disp);
2534         emit_recompute_pv(cd);
2535
2536         M_MOV(REG_ITMP1_XPTR, REG_RESULT);
2537         M_LDMFD(BITMASK_RESULT, REG_SP);
2538
2539 #if defined(ENABLE_GC_CACAO)
2540         /* restore callee saved int registers from stackframeinfo (GC might have  */
2541         /* modified them during a collection).                                    */
2542
2543         disp = cd->stackframesize - SIZEOF_VOID_P - sizeof(stackframeinfo_t) +
2544                 OFFSET(stackframeinfo_t, intregs);
2545
2546         for (i = 0; i < INT_SAV_CNT; i++)
2547                 M_LDR_INTERN(abi_registers_integer_saved[i], REG_SP, disp + i * 4);
2548 #endif
2549
2550         /* finish stub code, but do not yet return to caller */
2551
2552         M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize * 2 - 1);
2553         M_LDMFD(1<<REG_LR, REG_SP);
2554
2555         /* check for exception */
2556
2557         M_TST(REG_ITMP1_XPTR, REG_ITMP1_XPTR);
2558         M_MOVEQ(REG_LR, REG_PC);            /* if no exception, return to caller  */
2559
2560         /* handle exception here */
2561
2562         M_SUB_IMM(REG_ITMP2_XPC, REG_LR, 4);/* move fault address into xpc        */
2563
2564         disp = dseg_add_functionptr(cd, asm_handle_nat_exception);
2565         M_DSEG_LOAD(REG_ITMP3, disp);       /* load asm exception handler address */
2566         M_MOV(REG_PC, REG_ITMP3);           /* jump to asm exception handler      */
2567 }
2568
2569
2570 /* asm_debug *******************************************************************
2571
2572    Lazy debugger!
2573
2574 *******************************************************************************/
2575
2576 void asm_debug(int a1, int a2, int a3, int a4)
2577 {
2578         printf("===> i am going to exit after this debugging message!\n");
2579         printf("got asm_debug(%p, %p, %p, %p)\n",(void*)a1,(void*)a2,(void*)a3,(void*)a4);
2580         vm_abort("leave you now");
2581 }
2582
2583
2584 /*
2585  * These are local overrides for various environment variables in Emacs.
2586  * Please do not remove this and leave it at the end of the file, where
2587  * Emacs will automagically detect them.
2588  * ---------------------------------------------------------------------
2589  * Local variables:
2590  * mode: c
2591  * indent-tabs-mode: t
2592  * c-basic-offset: 4
2593  * tab-width: 4
2594  * End:
2595  * vim:noexpandtab:sw=4:ts=4:
2596  */