1 /* src/vm/jit/arm/codegen.c - machine code generator for Arm
3 Copyright (C) 1996-2011
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
35 #include "vm/jit/arm/arch.h"
36 #include "vm/jit/arm/codegen.h"
38 #include "mm/memory.hpp"
40 #include "native/localref.hpp"
41 #include "native/native.hpp"
43 #include "threads/lock.hpp"
45 #include "vm/jit/builtin.hpp"
46 #include "vm/exceptions.hpp"
47 #include "vm/global.h"
48 #include "vm/loader.hpp"
49 #include "vm/options.h"
52 #include "vm/jit/abi.h"
53 #include "vm/jit/asmpart.h"
54 #include "vm/jit/codegen-common.hpp"
55 #include "vm/jit/dseg.h"
56 #include "vm/jit/emit-common.hpp"
57 #include "vm/jit/jit.hpp"
58 #include "vm/jit/linenumbertable.hpp"
59 #include "vm/jit/methodheader.h"
60 #include "vm/jit/parse.hpp"
61 #include "vm/jit/patcher-common.hpp"
62 #include "vm/jit/reg.h"
66 * Generates machine code for the method prolog.
68 void codegen_emit_prolog(jitdata* jd)
77 // Get required compiler data.
78 methodinfo* m = jd->m;
79 codeinfo* code = jd->code;
80 codegendata* cd = jd->cd;
81 registerdata* rd = jd->rd;
83 int32_t savedregs_num = 0;
84 uint32_t savedregs_bitmask = 0;
86 if (!code_is_leafmethod(code)) {
88 savedregs_bitmask = (1<<REG_LR);
91 for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
93 savedregs_bitmask |= (1<<(rd->savintregs[i]));
97 for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
98 vm_abort("codegen_emit_prolog: Floating-point callee saved registers are not saved to stack");
102 /* save return address and used callee saved registers */
104 if (savedregs_bitmask != 0)
105 M_STMFD(savedregs_bitmask, REG_SP);
107 /* create additional stack frame for spilled variables (if necessary) */
109 int32_t additional_bytes = (cd->stackframesize * 8 - savedregs_num * 4);
111 if (additional_bytes > 0)
112 M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, additional_bytes / 4);
114 /* take arguments out of register or stack frame */
117 for (i = 0, len = 0; i < md->paramcount; i++) {
118 s1 = md->params[i].regoff;
119 t = md->paramtypes[i].type;
121 varindex = jd->local_map[len * 5 + t];
123 len += (IS_2_WORD_TYPE(t)) ? 2 : 1; /* 2 word type arguments */
125 if (varindex == UNUSED)
130 /* ATTENTION: we use interger registers for all arguments (even float) */
131 #if !defined(ENABLE_SOFTFLOAT)
132 if (IS_INT_LNG_TYPE(t)) {
134 if (!md->params[i].inmemory) {
135 if (!(var->flags & INMEMORY)) {
136 if (IS_2_WORD_TYPE(t))
137 M_LNGMOVE(s1, var->vv.regoff);
139 M_INTMOVE(s1, var->vv.regoff);
142 if (IS_2_WORD_TYPE(t))
143 M_LST(s1, REG_SP, var->vv.regoff);
145 M_IST(s1, REG_SP, var->vv.regoff);
148 else { /* stack arguments */
149 if (!(var->flags & INMEMORY)) { /* stack arg -> register */
150 if (IS_2_WORD_TYPE(t))
151 M_LLD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1);
153 M_ILD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1);
155 else { /* stack arg -> spilled */
156 /* Reuse Memory Position on Caller Stack */
157 var->vv.regoff = cd->stackframesize * 8 + s1;
160 #if !defined(ENABLE_SOFTFLOAT)
163 if (!md->params[i].inmemory) {
164 if (!(var->flags & INMEMORY)) {
165 if (IS_2_WORD_TYPE(t))
166 M_CAST_L2D(s1, var->vv.regoff);
168 M_CAST_I2F(s1, var->vv.regoff);
171 if (IS_2_WORD_TYPE(t))
172 M_LST(s1, REG_SP, var->vv.regoff);
174 M_IST(s1, REG_SP, var->vv.regoff);
178 if (!(var->flags & INMEMORY)) {
179 if (IS_2_WORD_TYPE(t))
180 M_DLD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1);
182 M_FLD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1);
185 /* Reuse Memory Position on Caller Stack */
186 var->vv.regoff = cd->stackframesize * 8 + s1;
190 #endif /* !defined(ENABLE_SOFTFLOAT) */
196 * Generates machine code for the method epilog.
198 void codegen_emit_epilog(jitdata* jd)
202 // Get required compiler data.
203 codeinfo* code = jd->code;
204 codegendata* cd = jd->cd;
205 registerdata* rd = jd->rd;
207 int32_t savedregs_num = 0;
208 uint32_t savedregs_bitmask = 0;
210 if (!code_is_leafmethod(code)) {
212 savedregs_bitmask = (1<<REG_LR);
215 for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
217 savedregs_bitmask |= (1<<(rd->savintregs[i]));
220 /* deallocate stackframe for spilled variables */
222 int32_t additional_bytes = (cd->stackframesize * 8 - savedregs_num * 4);
224 if (additional_bytes > 0)
225 M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, additional_bytes / 4);
227 /* restore callee saved registers + do return */
229 if (savedregs_bitmask) {
230 if (!code_is_leafmethod(code)) {
231 savedregs_bitmask &= ~(1<<REG_LR);
232 savedregs_bitmask |= (1<<REG_PC);
234 M_LDMFD(savedregs_bitmask, REG_SP);
237 /* if LR was not on stack, we need to return manually */
239 if (code_is_leafmethod(code))
240 M_MOV(REG_PC, REG_LR);
245 * Generates machine code for one ICMD.
247 void codegen_emit_instruction(jitdata* jd, instruction* iptr)
250 builtintable_entry* bte;
251 methodinfo* lm; // Local methodinfo for ICMD_INVOKE*.
252 unresolved_method* um;
254 unresolved_field* uf;
256 int32_t s1, s2, s3, d;
259 // Get required compiler data.
260 codegendata* cd = jd->cd;
265 /* constant operations ************************************************/
267 case ICMD_ACONST: /* ... ==> ..., constant */
269 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
270 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
271 disp = dseg_add_unique_address(cd, NULL);
273 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
274 iptr->sx.val.c.ref, disp);
276 M_DSEG_LOAD(d, disp);
279 ICONST(d, (u4) iptr->sx.val.anyptr);
281 emit_store_dst(jd, iptr, d);
284 case ICMD_FCONST: /* ... ==> ..., constant */
286 #if defined(ENABLE_SOFTFLOAT)
287 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
288 ICONST(d, iptr->sx.val.i);
289 emit_store_dst(jd, iptr, d);
291 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
292 FCONST(d, iptr->sx.val.f);
293 emit_store_dst(jd, iptr, d);
297 case ICMD_DCONST: /* ... ==> ..., constant */
299 #if defined(ENABLE_SOFTFLOAT)
300 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
301 LCONST(d, iptr->sx.val.l);
302 emit_store_dst(jd, iptr, d);
304 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
305 DCONST(d, iptr->sx.val.d);
306 emit_store_dst(jd, iptr, d);
311 /* integer operations *************************************************/
313 case ICMD_INT2BYTE: /* ..., value ==> ..., value */
315 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
316 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
317 M_MOV(d, REG_LSL(s1, 24));
318 M_MOV(d, REG_ASR(d, 24));
319 emit_store_dst(jd, iptr, d);
322 case ICMD_INT2CHAR: /* ..., value ==> ..., value */
324 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
325 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
326 M_MOV(d, REG_LSL(s1, 16));
327 M_MOV(d, REG_LSR(d, 16)); /* ATTENTION: char is unsigned */
328 emit_store_dst(jd, iptr, d);
331 case ICMD_INT2SHORT: /* ..., value ==> ..., value */
333 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
334 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
335 M_MOV(d, REG_LSL(s1, 16));
336 M_MOV(d, REG_ASR(d, 16));
337 emit_store_dst(jd, iptr, d);
340 case ICMD_I2L: /* ..., value ==> ..., value */
342 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
343 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
344 M_INTMOVE(s1, GET_LOW_REG(d));
345 M_MOV(GET_HIGH_REG(d), REG_ASR(s1, 31));
346 emit_store_dst(jd, iptr, d);
349 case ICMD_L2I: /* ..., value ==> ..., value */
351 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
352 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
354 emit_store_dst(jd, iptr, d);
357 case ICMD_INEG: /* ..., value ==> ..., - value */
359 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
360 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
362 emit_store_dst(jd, iptr, d);
365 case ICMD_LNEG: /* ..., value ==> ..., - value */
367 s1 = emit_load_s1(jd, iptr, REG_ITMP12_PACKED);
368 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
369 M_RSB_IMMS(GET_LOW_REG(d), GET_LOW_REG(s1), 0);
370 M_RSC_IMM(GET_HIGH_REG(d), GET_HIGH_REG(s1), 0);
371 emit_store_dst(jd, iptr, d);
374 case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */
376 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
377 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
378 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
380 emit_store_dst(jd, iptr, d);
383 case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */
385 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
386 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
387 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
388 M_ADD_S(GET_LOW_REG(d), s1, s2);
389 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
390 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
391 M_ADC(GET_HIGH_REG(d), s1, s2);
392 emit_store_dst(jd, iptr, d);
398 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
399 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
401 if (IS_IMM(iptr->sx.val.i)) {
402 M_ADD_IMM(d, s1, iptr->sx.val.i);
403 } else if (IS_IMM(-iptr->sx.val.i)) {
404 M_SUB_IMM(d, s1, (-iptr->sx.val.i));
406 ICONST(REG_ITMP3, iptr->sx.val.i);
407 M_ADD(d, s1, REG_ITMP3);
410 emit_store_dst(jd, iptr, d);
413 case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */
414 /* sx.val.l = constant */
416 s3 = iptr->sx.val.l & 0xffffffff;
417 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
418 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
420 M_ADD_IMMS(GET_LOW_REG(d), s1, s3);
422 ICONST(REG_ITMP3, s3);
423 M_ADD_S(GET_LOW_REG(d), s1, REG_ITMP3);
425 s3 = iptr->sx.val.l >> 32;
426 s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
428 M_ADC_IMM(GET_HIGH_REG(d), s1, s3);
430 ICONST(REG_ITMP3, s3);
431 M_ADC(GET_HIGH_REG(d), s1, REG_ITMP3);
433 emit_store_dst(jd, iptr, d);
436 case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */
438 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
439 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
440 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
442 emit_store_dst(jd, iptr, d);
445 case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
447 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
448 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
449 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
450 M_SUB_S(GET_LOW_REG(d), s1, s2);
451 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
452 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
453 M_SBC(GET_HIGH_REG(d), s1, s2);
454 emit_store_dst(jd, iptr, d);
457 case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */
458 /* sx.val.i = constant */
460 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
461 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
462 if (IS_IMM(iptr->sx.val.i))
463 M_SUB_IMM(d, s1, iptr->sx.val.i);
465 ICONST(REG_ITMP3, iptr->sx.val.i);
466 M_SUB(d, s1, REG_ITMP3);
468 emit_store_dst(jd, iptr, d);
471 case ICMD_LSUBCONST: /* ..., value ==> ..., value - constant */
472 /* sx.val.l = constant */
474 s3 = iptr->sx.val.l & 0xffffffff;
475 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
476 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
478 M_SUB_IMMS(GET_LOW_REG(d), s1, s3);
480 ICONST(REG_ITMP3, s3);
481 M_SUB_S(GET_LOW_REG(d), s1, REG_ITMP3);
483 s3 = iptr->sx.val.l >> 32;
484 s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
486 M_SBC_IMM(GET_HIGH_REG(d), s1, s3);
488 ICONST(REG_ITMP3, s3);
489 M_SBC(GET_HIGH_REG(d), s1, REG_ITMP3);
491 emit_store_dst(jd, iptr, d);
494 case ICMD_IMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
496 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
497 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
498 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
500 emit_store_dst(jd, iptr, d);
503 case ICMD_IDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
504 case ICMD_IREM: /* ..., val1, val2 ==> ..., val1 % val2 */
506 s1 = emit_load_s1(jd, iptr, REG_A0);
507 s2 = emit_load_s2(jd, iptr, REG_A1);
508 emit_arithmetic_check(cd, iptr, s2);
510 /* move arguments into argument registers */
511 M_INTMOVE(s1, REG_A0);
512 M_INTMOVE(s2, REG_A1);
514 /* call builtin function */
515 bte = iptr->sx.s23.s3.bte;
516 disp = dseg_add_functionptr(cd, bte->fp);
520 emit_recompute_pv(cd);
522 /* move result into destination register */
523 d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
524 M_INTMOVE(REG_RESULT, d);
525 emit_store_dst(jd, iptr, d);
528 case ICMD_LDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
529 case ICMD_LREM: /* ..., val1, val2 ==> ..., val1 % val2 */
531 /* move arguments into argument registers */
533 s1 = emit_load_s1(jd, iptr, REG_A0_A1_PACKED);
534 s2 = emit_load_s2(jd, iptr, REG_A2_A3_PACKED);
535 /* XXX TODO: only do this if arithmetic check is really done! */
536 M_ORR(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
537 emit_arithmetic_check(cd, iptr, REG_ITMP3);
539 M_LNGMOVE(s1, REG_A0_A1_PACKED);
540 M_LNGMOVE(s2, REG_A2_A3_PACKED);
542 /* call builtin function */
543 bte = iptr->sx.s23.s3.bte;
544 disp = dseg_add_functionptr(cd, bte->fp);
548 emit_recompute_pv(cd);
550 /* move result into destination register */
551 d = codegen_reg_of_dst(jd, iptr, REG_RESULT_PACKED);
552 M_LNGMOVE(REG_RESULT_PACKED, d);
553 emit_store_dst(jd, iptr, d);
556 case ICMD_IMULPOW2: /* ..., value ==> ..., value * (2 ^ constant) */
557 /* sx.val.i = constant */
559 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
560 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
561 M_MOV(d, REG_LSL(s1, iptr->sx.val.i));
562 emit_store_dst(jd, iptr, d);
565 case ICMD_IDIVPOW2: /* ..., value ==> ..., value / (2 ^ constant) */
566 /* sx.val.i = constant */
568 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
569 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
570 /* this rounds towards 0 as java likes it */
571 M_MOV(REG_ITMP3, REG_ASR(s1, 31));
572 M_ADD(REG_ITMP3, s1, REG_LSR(REG_ITMP3, 32 - iptr->sx.val.i));
573 M_MOV(d, REG_ASR(REG_ITMP3, iptr->sx.val.i));
574 /* this rounds towards nearest, not java style */
575 /*M_MOV_S(d, REG_ASR(s1, iptr->sx.val.i));
576 M_ADCMI_IMM(d, d, 0);*/
577 emit_store_dst(jd, iptr, d);
580 case ICMD_IREMPOW2: /* ..., value ==> ..., value % constant */
581 /* sx.val.i = constant [ (2 ^ x) - 1 ] */
583 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
584 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
585 M_MOV_S(REG_ITMP1, s1);
586 M_RSBMI_IMM(REG_ITMP1, REG_ITMP1, 0);
587 if (IS_IMM(iptr->sx.val.i))
588 M_AND_IMM(REG_ITMP1, iptr->sx.val.i, d);
590 ICONST(REG_ITMP3, iptr->sx.val.i);
591 M_AND(REG_ITMP1, REG_ITMP3, d);
593 M_RSBMI_IMM(d, d, 0);
594 emit_store_dst(jd, iptr, d);
597 case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */
599 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
600 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
601 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
602 M_AND_IMM(s2, 0x1f, REG_ITMP2);
603 M_MOV(d, REG_LSL_REG(s1, REG_ITMP2));
604 emit_store_dst(jd, iptr, d);
607 case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
609 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
610 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
611 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
612 M_AND_IMM(s2, 0x1f, REG_ITMP2);
613 M_MOV(d, REG_ASR_REG(s1, REG_ITMP2));
614 emit_store_dst(jd, iptr, d);
617 case ICMD_IUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
619 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
620 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
621 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
622 M_AND_IMM(s2, 0x1f, REG_ITMP2);
623 M_MOV(d, REG_LSR_REG(s1, REG_ITMP2));
624 emit_store_dst(jd, iptr, d);
627 case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */
628 /* sx.val.i = constant */
630 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
631 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
632 M_MOV(d, REG_LSL(s1, iptr->sx.val.i & 0x1f));
633 emit_store_dst(jd, iptr, d);
636 case ICMD_ISHRCONST: /* ..., value ==> ..., value >> constant */
637 /* sx.val.i = constant */
639 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
640 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
641 /* we need to check for zero here because arm interprets it as SHR by 32 */
642 if ((iptr->sx.val.i & 0x1f) == 0) {
645 M_MOV(d, REG_ASR(s1, iptr->sx.val.i & 0x1f));
647 emit_store_dst(jd, iptr, d);
650 case ICMD_IUSHRCONST: /* ..., value ==> ..., value >>> constant */
651 /* sx.val.i = constant */
653 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
654 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
655 /* we need to check for zero here because arm interprets it as SHR by 32 */
656 if ((iptr->sx.val.i & 0x1f) == 0)
659 M_MOV(d, REG_LSR(s1, iptr->sx.val.i & 0x1f));
660 emit_store_dst(jd, iptr, d);
663 case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */
665 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
666 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
667 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
669 emit_store_dst(jd, iptr, d);
672 case ICMD_LAND: /* ..., val1, val2 ==> ..., val1 & val2 */
674 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
675 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
676 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
677 M_AND(s1, s2, GET_LOW_REG(d));
678 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
679 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
680 M_AND(s1, s2, GET_HIGH_REG(d));
681 emit_store_dst(jd, iptr, d);
684 case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */
686 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
687 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
688 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
690 emit_store_dst(jd, iptr, d);
693 case ICMD_LOR: /* ..., val1, val2 ==> ..., val1 | val2 */
695 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
696 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
697 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
698 M_ORR(s1, s2, GET_LOW_REG(d));
699 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
700 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
701 M_ORR(s1, s2, GET_HIGH_REG(d));
702 emit_store_dst(jd, iptr, d);
705 case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
707 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
708 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
709 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
711 emit_store_dst(jd, iptr, d);
714 case ICMD_LXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
716 s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
717 s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
718 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
719 M_EOR(s1, s2, GET_LOW_REG(d));
720 s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
721 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
722 M_EOR(s1, s2, GET_HIGH_REG(d));
723 emit_store_dst(jd, iptr, d);
727 /* floating operations ************************************************/
729 #if !defined(ENABLE_SOFTFLOAT)
731 case ICMD_FNEG: /* ..., value ==> ..., - value */
733 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
734 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
736 emit_store_dst(jd, iptr, d);
739 case ICMD_FADD: /* ..., val1, val2 ==> ..., val1 + val2 */
741 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
742 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
743 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
745 emit_store_dst(jd, iptr, d);
748 case ICMD_FSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
750 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
751 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
752 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
754 emit_store_dst(jd, iptr, d);
757 case ICMD_FMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
759 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
760 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
761 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
763 emit_store_dst(jd, iptr, d);
766 case ICMD_FDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
767 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
768 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
769 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
771 emit_store_dst(jd, iptr, d);
774 /* ATTENTION: Jave does not want IEEE behaviour in FREM, do
778 case ICMD_FREM: /* ..., val1, val2 ==> ..., val1 % val2 */
780 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
781 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
782 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
784 emit_store_dst(jd, iptr, d);
788 case ICMD_DNEG: /* ..., value ==> ..., - value */
790 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
791 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
793 emit_store_dst(jd, iptr, d);
796 case ICMD_DADD: /* ..., val1, val2 ==> ..., val1 + val2 */
798 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
799 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
800 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
802 emit_store_dst(jd, iptr, d);
805 case ICMD_DSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
807 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
808 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
809 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
811 emit_store_dst(jd, iptr, d);
814 case ICMD_DMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
816 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
817 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
818 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
820 emit_store_dst(jd, iptr, d);
823 case ICMD_DDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
825 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
826 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
827 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
829 emit_store_dst(jd, iptr, d);
832 /* ATTENTION: Jave does not want IEEE behaviour in DREM, do
836 case ICMD_DREM: /* ..., val1, val2 ==> ..., val1 % val2 */
838 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
839 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
840 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
842 emit_store_dst(jd, iptr, d);
846 case ICMD_I2F: /* ..., value ==> ..., (float) value */
848 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
849 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
850 #if defined(__VFP_FP__)
856 emit_store_dst(jd, iptr, d);
859 case ICMD_I2D: /* ..., value ==> ..., (double) value */
861 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
862 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
863 #if defined(__VFP_FP__)
869 emit_store_dst(jd, iptr, d);
872 case ICMD_F2I: /* ..., value ==> ..., (int) value */
874 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
875 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
876 #if defined(__VFP_FP__)
877 M_CVTFI(s1, REG_FTMP2);
878 M_FMRS(REG_FTMP2, d);
880 /* this uses round towards zero, as Java likes it */
882 /* this checks for NaN; to return zero as Java likes it */
886 emit_store_dst(jd, iptr, d);
889 case ICMD_D2I: /* ..., value ==> ..., (int) value */
891 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
892 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
893 #if defined(__VFP_FP__)
894 M_CVTDI(s1, REG_FTMP2);
895 M_FMRS(REG_FTMP2, d);
897 /* this uses round towards zero, as Java likes it */
899 /* this checks for NaN; to return zero as Java likes it */
903 emit_store_dst(jd, iptr, d);
906 case ICMD_D2F: /* ..., value ==> ..., (float) value */
908 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
909 d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
911 emit_store_dst(jd, iptr, d);
914 case ICMD_F2D: /* ..., value ==> ..., (double) value */
916 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
917 d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
919 emit_store_dst(jd, iptr, d);
922 case ICMD_FCMPG: /* ..., val1, val2 ==> ..., val1 fcmpg val2 */
924 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
925 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
926 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
929 #if defined(__VFP_FP__)
930 M_FMSTAT; /* on VFP we need to transfer the flags */
932 M_SUBGT_IMM(d, d, 1);
933 M_ADDLT_IMM(d, d, 1);
934 emit_store_dst(jd, iptr, d);
937 case ICMD_DCMPG: /* ..., val1, val2 ==> ..., val1 dcmpg val2 */
939 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
940 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
941 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
944 #if defined(__VFP_FP__)
945 M_FMSTAT; /* on VFP we need to transfer the flags */
947 M_SUBGT_IMM(d, d, 1);
948 M_ADDLT_IMM(d, d, 1);
949 emit_store_dst(jd, iptr, d);
952 case ICMD_FCMPL: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
954 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
955 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
956 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
959 #if defined(__VFP_FP__)
960 M_FMSTAT; /* on VFP we need to transfer the flags */
962 M_SUBLT_IMM(d, d, 1);
963 M_ADDGT_IMM(d, d, 1);
964 emit_store_dst(jd, iptr, d);
967 case ICMD_DCMPL: /* ..., val1, val2 ==> ..., val1 dcmpl val2 */
969 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
970 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
971 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
974 #if defined(__VFP_FP__)
975 M_FMSTAT; /* on VFP we need to transfer the flags */
977 M_SUBLT_IMM(d, d, 1);
978 M_ADDGT_IMM(d, d, 1);
979 emit_store_dst(jd, iptr, d);
982 #endif /* !defined(ENABLE_SOFTFLOAT) */
985 /* memory operations **************************************************/
987 case ICMD_BALOAD: /* ..., arrayref, index ==> ..., value */
989 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
990 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
991 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
992 /* implicit null-pointer check */
993 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
994 M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
995 M_LDRSB(d, REG_ITMP1, OFFSET(java_bytearray_t, data[0]));
996 emit_store_dst(jd, iptr, d);
999 case ICMD_CALOAD: /* ..., arrayref, index ==> ..., value */
1001 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1002 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1003 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1004 /* implicit null-pointer check */
1005 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1006 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1007 M_LDRH(d, REG_ITMP1, OFFSET(java_chararray_t, data[0]));
1008 emit_store_dst(jd, iptr, d);
1011 case ICMD_SALOAD: /* ..., arrayref, index ==> ..., value */
1013 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1014 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1015 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1016 /* implicit null-pointer check */
1017 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1018 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1019 M_LDRSH(d, REG_ITMP1, OFFSET(java_shortarray_t, data[0]));
1020 emit_store_dst(jd, iptr, d);
1023 case ICMD_IALOAD: /* ..., arrayref, index ==> ..., value */
1025 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1026 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1027 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1028 /* implicit null-pointer check */
1029 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1030 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1031 M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_intarray_t, data[0]));
1032 emit_store_dst(jd, iptr, d);
1035 case ICMD_LALOAD: /* ..., arrayref, index ==> ..., value */
1037 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1038 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1039 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1040 /* implicit null-pointer check */
1041 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1042 M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1043 M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_longarray_t, data[0]));
1044 emit_store_dst(jd, iptr, d);
1047 case ICMD_FALOAD: /* ..., arrayref, index ==> ..., value */
1049 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1050 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1051 /* implicit null-pointer check */
1052 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1053 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1054 #if !defined(ENABLE_SOFTFLOAT)
1055 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1056 M_FLD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray_t, data[0]));
1058 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1059 M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray_t, data[0]));
1061 emit_store_dst(jd, iptr, d);
1064 case ICMD_DALOAD: /* ..., arrayref, index ==> ..., value */
1066 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1067 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1068 /* implicit null-pointer check */
1069 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1070 M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1071 #if !defined(ENABLE_SOFTFLOAT)
1072 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1073 M_DLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray_t, data[0]));
1075 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1076 M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray_t, data[0]));
1078 emit_store_dst(jd, iptr, d);
1081 case ICMD_AALOAD: /* ..., arrayref, index ==> ..., value */
1083 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1084 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1085 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1086 /* implicit null-pointer check */
1087 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1088 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1089 M_LDR_INTERN(d, REG_ITMP1, OFFSET(java_objectarray_t, data[0]));
1090 emit_store_dst(jd, iptr, d);
1093 case ICMD_BASTORE: /* ..., arrayref, index, value ==> ... */
1095 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1096 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1097 /* implicit null-pointer check */
1098 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1099 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1100 M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
1101 M_STRB(s3, REG_ITMP1, OFFSET(java_bytearray_t, data[0]));
1104 case ICMD_CASTORE: /* ..., arrayref, index, value ==> ... */
1106 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1107 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1108 /* implicit null-pointer check */
1109 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1110 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1111 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1112 M_STRH(s3, REG_ITMP1, OFFSET(java_chararray_t, data[0]));
1115 case ICMD_SASTORE: /* ..., arrayref, index, value ==> ... */
1117 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1118 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1119 /* implicit null-pointer check */
1120 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1121 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1122 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1123 M_STRH(s3, REG_ITMP1, OFFSET(java_shortarray_t, data[0]));
1126 case ICMD_IASTORE: /* ..., arrayref, index, value ==> ... */
1128 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1129 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1130 /* implicit null-pointer check */
1131 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1132 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1133 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1134 M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_intarray_t, data[0]));
1137 case ICMD_LASTORE: /* ..., arrayref, index, value ==> ... */
1139 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1140 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1141 /* implicit null-pointer check */
1142 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1143 M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1144 s3 = emit_load_s3(jd, iptr, REG_ITMP12_PACKED);
1145 M_LST_INTERN(s3, REG_ITMP3, OFFSET(java_longarray_t, data[0]));
1148 case ICMD_FASTORE: /* ..., arrayref, index, value ==> ... */
1150 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1151 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1152 /* implicit null-pointer check */
1153 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1154 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1155 #if !defined(ENABLE_SOFTFLOAT)
1156 s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1157 M_FST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray_t, data[0]));
1159 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1160 M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray_t, data[0]));
1164 case ICMD_DASTORE: /* ..., arrayref, index, value ==> ... */
1166 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1167 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1168 /* implicit null-pointer check */
1169 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1170 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 3)); /* REG_ITMP1 = s1 + 8 * s2 */
1171 #if !defined(ENABLE_SOFTFLOAT)
1172 s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1173 M_DST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray_t, data[0]));
1175 s3 = emit_load_s3(jd, iptr, REG_ITMP23_PACKED);
1176 M_LST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray_t, data[0]));
1180 case ICMD_AASTORE: /* ..., arrayref, index, value ==> ... */
1182 s1 = emit_load_s1(jd, iptr, REG_A0);
1183 s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1184 s3 = emit_load_s3(jd, iptr, REG_A1);
1186 /* implicit null-pointer check */
1187 emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1189 /* move arguments to argument registers */
1190 M_INTMOVE(s1, REG_A0);
1191 M_INTMOVE(s3, REG_A1);
1193 /* call builtin function */
1194 disp = dseg_add_functionptr(cd, BUILTIN_FAST_canstore);
1195 M_DSEG_BRANCH(disp);
1198 emit_recompute_pv(cd);
1200 /* check resturn value of builtin */
1201 emit_arraystore_check(cd, iptr);
1203 /* finally store address into array */
1204 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1205 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1206 s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1207 M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1208 M_STR_INTERN(s3, REG_ITMP1, OFFSET(java_objectarray_t, data[0]));
1211 case ICMD_GETFIELD: /* ..., objectref, value ==> ... */
1213 s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1214 emit_nullpointer_check(cd, iptr, s1);
1217 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1218 uf = iptr->sx.s23.s3.uf;
1219 fieldtype = uf->fieldref->parseddesc.fd->type;
1223 fi = iptr->sx.s23.s3.fmiref->p.field;
1224 fieldtype = fi->type;
1228 #if !defined(ENABLE_SOFTFLOAT)
1229 /* HACK: softnull checks on floats */
1230 if (!INSTRUCTION_MUST_CHECK(iptr) && IS_FLT_DBL_TYPE(fieldtype))
1231 emit_nullpointer_check_force(cd, iptr, s1);
1234 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1236 uf = iptr->sx.s23.s3.uf;
1238 patcher_add_patch_ref(jd, PATCHER_get_putfield, uf, 0);
1241 switch (fieldtype) {
1243 #if defined(ENABLE_SOFTFLOAT)
1247 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1251 #if defined(ENABLE_SOFTFLOAT)
1254 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1257 #if !defined(ENABLE_SOFTFLOAT)
1259 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1263 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1270 emit_store_dst(jd, iptr, d);
1273 case ICMD_PUTFIELD: /* ..., objectref, value ==> ... */
1275 s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1276 emit_nullpointer_check(cd, iptr, s1);
1278 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1279 uf = iptr->sx.s23.s3.uf;
1280 fieldtype = uf->fieldref->parseddesc.fd->type;
1284 fi = iptr->sx.s23.s3.fmiref->p.field;
1285 fieldtype = fi->type;
1289 #if !defined(ENABLE_SOFTFLOAT)
1290 /* HACK: softnull checks on floats */
1291 if (!INSTRUCTION_MUST_CHECK(iptr) && IS_FLT_DBL_TYPE(fieldtype))
1292 emit_nullpointer_check_force(cd, iptr, s1);
1295 switch (fieldtype) {
1297 #if defined(ENABLE_SOFTFLOAT)
1301 s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1303 #if defined(ENABLE_SOFTFLOAT)
1304 case TYPE_DBL: /* fall through */
1307 s2 = emit_load_s2(jd, iptr, REG_ITMP12_PACKED);
1309 #if !defined(ENABLE_SOFTFLOAT)
1312 s2 = emit_load_s2(jd, iptr, REG_FTMP1);
1319 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1321 uf = iptr->sx.s23.s3.uf;
1323 patcher_add_patch_ref(jd, PATCHER_get_putfield, uf, 0);
1326 switch (fieldtype) {
1328 #if defined(ENABLE_SOFTFLOAT)
1332 M_IST(s2, s1, disp);
1335 #if defined(ENABLE_SOFTFLOAT)
1338 M_LST(s2, s1, disp);
1340 #if !defined(ENABLE_SOFTFLOAT)
1342 M_FST(s2, s1, disp);
1345 M_DST(s2, s1, disp);
1354 /* branch operations **************************************************/
1356 case ICMD_ATHROW: /* ..., objectref ==> ... (, objectref) */
1358 disp = dseg_add_functionptr(cd, asm_handle_exception);
1359 M_DSEG_LOAD(REG_ITMP3, disp);
1360 M_MOV(REG_ITMP2_XPC, REG_PC);
1361 M_MOV(REG_PC, REG_ITMP3);
1362 M_NOP; /* nop ensures that XPC is less than the end */
1363 /* of basic block */
1366 case ICMD_IF_LEQ: /* ..., value ==> ... */
1368 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1369 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1370 if (iptr->sx.val.l == 0) {
1371 M_ORR_S(s1, s2, REG_ITMP3);
1374 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1375 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1376 M_CMP(s1, REG_ITMP3);*/
1377 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1378 M_CMPEQ(s2, REG_ITMP3);
1380 emit_beq(cd, iptr->dst.block);
1383 case ICMD_IF_LLT: /* ..., value ==> ... */
1385 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1386 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1387 if (iptr->sx.val.l == 0) {
1388 /* if high word is less than zero, the whole long is too */
1390 emit_blt(cd, iptr->dst.block);
1393 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1394 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1395 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1396 M_CMP(s1, REG_ITMP3);*/
1397 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1398 M_MOVGT_IMM(2, REG_ITMP1);
1399 M_MOVEQ_IMM(1, REG_ITMP1);
1401 /* low compare: x=x-1(ifLO) */
1402 emit_icmp_imm(cd, s2, (iptr->sx.val.l & 0xffffffff));
1403 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1404 M_CMP(s2, REG_ITMP3);*/
1405 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1407 /* branch if (x LT 1) */
1408 M_CMP_IMM(REG_ITMP1, 1);
1409 emit_blt(cd, iptr->dst.block);
1413 case ICMD_IF_LLE: /* ..., value ==> ... */
1415 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1416 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1417 if (iptr->sx.val.l == 0) {
1418 /* if high word is less than zero, the whole long is too */
1420 emit_blt(cd, iptr->dst.block);
1422 /* ... otherwise the low word has to be zero (tricky!) */
1424 emit_beq(cd, iptr->dst.block);
1427 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1428 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1429 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1430 M_CMP(s1, REG_ITMP3);*/
1431 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1432 M_MOVGT_IMM(2, REG_ITMP1);
1433 M_MOVEQ_IMM(1, REG_ITMP1);
1435 /* low compare: x=x+1(ifHI) */
1436 emit_icmp_imm(cd, s2, (iptr->sx.val.l & 0xffffffff));
1437 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1438 M_CMP(s2, REG_ITMP3);*/
1439 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1441 /* branch if (x LE 1) */
1442 M_CMP_IMM(REG_ITMP1, 1);
1443 emit_ble(cd, iptr->dst.block);
1447 case ICMD_IF_LGE: /* ..., value ==> ... */
1449 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1450 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1451 if (iptr->sx.val.l == 0) {
1452 /* if high word is greater or equal zero, the whole long is too */
1454 emit_bge(cd, iptr->dst.block);
1457 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1458 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1459 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1460 M_CMP(s1, REG_ITMP3);*/
1461 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1462 M_MOVGT_IMM(2, REG_ITMP1);
1463 M_MOVEQ_IMM(1, REG_ITMP1);
1465 /* low compare: x=x-1(ifLO) */
1466 emit_icmp_imm(cd, s2, (iptr->sx.val.l & 0xffffffff));
1467 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1468 M_CMP(s2, REG_ITMP3);*/
1469 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1471 /* branch if (x GE 1) */
1472 M_CMP_IMM(REG_ITMP1, 1);
1473 emit_bge(cd, iptr->dst.block);
1477 case ICMD_IF_LGT: /* ..., value ==> ... */
1479 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1480 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1482 if (iptr->sx.val.l == 0) {
1483 /* if high word is greater than zero, the whole long is too */
1486 codegen_add_branch_ref(cd, iptr->dst.block);
1488 /* ... or high was zero and low is non zero (tricky!) */
1489 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1490 M_MOVLT_IMM(1, REG_ITMP3);
1491 M_ORR_S(REG_ITMP3, s2, REG_ITMP3);
1493 codegen_add_branch_ref(cd, iptr->dst.block);
1497 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1498 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1499 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1500 M_CMP(s1, REG_ITMP3);*/
1501 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1502 M_MOVGT_IMM(2, REG_ITMP1);
1503 M_MOVEQ_IMM(1, REG_ITMP1);
1505 /* low compare: x=x+1(ifHI) */
1506 emit_icmp_imm(cd, s2, (iptr->sx.val.l & 0xffffffff));
1507 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1508 M_CMP(s2, REG_ITMP3);*/
1509 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1511 /* branch if (x GT 1) */
1512 M_CMP_IMM(REG_ITMP1, 1);
1513 emit_bgt(cd, iptr->dst.block);
1519 case ICMD_IF_LNE: /* ..., value ==> ... */
1521 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1522 s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1523 if (iptr->sx.val.l == 0) {
1524 M_ORR_S(s1, s2, REG_ITMP3);
1527 emit_icmp_imm(cd, s1, (iptr->sx.val.l >> 32));
1528 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1529 M_CMP(s1, REG_ITMP3);*/
1530 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1531 M_CMPEQ(s2, REG_ITMP3);
1533 emit_bne(cd, iptr->dst.block);
1536 case ICMD_IF_LCMPEQ: /* ..., value, value ==> ... */
1537 /* op1 = target JavaVM pc */
1539 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1540 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1543 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1544 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1547 emit_beq(cd, iptr->dst.block);
1550 case ICMD_IF_LCMPNE: /* ..., value, value ==> ... */
1551 /* op1 = target JavaVM pc */
1553 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1554 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1557 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1558 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1561 emit_bne(cd, iptr->dst.block);
1564 case ICMD_IF_LCMPLT: /* ..., value, value ==> ... */
1565 /* op1 = target JavaVM pc */
1567 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1568 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1569 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1571 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1572 M_MOVGT_IMM(2, REG_ITMP3);
1573 M_MOVEQ_IMM(1, REG_ITMP3);
1575 /* low compare: x=x-1(ifLO) */
1576 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1577 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1579 M_SUBLO_IMM(REG_ITMP3, REG_ITMP3, 1);
1581 /* branch if (x LT 1) */
1582 M_CMP_IMM(REG_ITMP3, 1);
1583 emit_blt(cd, iptr->dst.block);
1586 case ICMD_IF_LCMPLE: /* ..., value, value ==> ... */
1587 /* op1 = target JavaVM pc */
1589 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1590 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1591 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1593 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1594 M_MOVGT_IMM(2, REG_ITMP3);
1595 M_MOVEQ_IMM(1, REG_ITMP3);
1597 /* low compare: x=x-1(ifLO) */
1598 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1599 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1601 M_ADDHI_IMM(REG_ITMP3, REG_ITMP3, 1);
1603 /* branch if (x LE 1) */
1604 M_CMP_IMM(REG_ITMP3, 1);
1605 emit_ble(cd, iptr->dst.block);
1608 case ICMD_IF_LCMPGT: /* ..., value, value ==> ... */
1609 /* op1 = target JavaVM pc */
1611 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1612 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1613 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1615 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1616 M_MOVGT_IMM(2, REG_ITMP3);
1617 M_MOVEQ_IMM(1, REG_ITMP3);
1619 /* low compare: x=x-1(ifLO) */
1620 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1621 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1623 M_ADDHI_IMM(REG_ITMP3, REG_ITMP3, 1);
1625 /* branch if (x GT 1) */
1626 M_CMP_IMM(REG_ITMP3, 1);
1627 emit_bgt(cd, iptr->dst.block);
1630 case ICMD_IF_LCMPGE: /* ..., value, value ==> ... */
1631 /* op1 = target JavaVM pc */
1633 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1634 s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1635 s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1637 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1638 M_MOVGT_IMM(2, REG_ITMP3);
1639 M_MOVEQ_IMM(1, REG_ITMP3);
1641 /* low compare: x=x-1(ifLO) */
1642 s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1643 s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1645 M_SUBLO_IMM(REG_ITMP3, REG_ITMP3, 1);
1647 /* branch if (x GE 1) */
1648 M_CMP_IMM(REG_ITMP3, 1);
1649 emit_bge(cd, iptr->dst.block);
1652 case ICMD_TABLESWITCH: /* ..., index ==> ... */
1655 branch_target_t *table;
1657 table = iptr->dst.table;
1659 l = iptr->sx.s23.s2.tablelow;
1660 i = iptr->sx.s23.s3.tablehigh;
1662 /* calculate new index (index - low) */
1663 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1665 M_INTMOVE(s1, REG_ITMP1);
1666 } else if (IS_IMM(l)) {
1667 M_SUB_IMM(REG_ITMP1, s1, l);
1669 ICONST(REG_ITMP2, l);
1670 M_SUB(REG_ITMP1, s1, REG_ITMP2);
1673 /* range check (index <= high-low) */
1675 emit_icmp_imm(cd, REG_ITMP1, i-1);
1676 emit_bugt(cd, table[0].block);
1678 /* build jump table top down and use address of lowest entry */
1683 dseg_add_target(cd, table->block);
1688 /* length of dataseg after last dseg_add_target is used by load */
1689 /* TODO: this loads from data-segment */
1690 M_ADD(REG_ITMP2, REG_PV, REG_LSL(REG_ITMP1, 2));
1691 M_LDR(REG_PC, REG_ITMP2, -(cd->dseglen));
1695 bte = iptr->sx.s23.s3.bte;
1696 if (bte->stub == NULL) {
1697 disp = dseg_add_functionptr(cd, bte->fp);
1699 disp = dseg_add_functionptr(cd, bte->stub);
1702 M_DSEG_LOAD(REG_PV, disp); /* pointer to built-in-function */
1704 /* generate the actual call */
1706 M_MOV(REG_LR, REG_PC);
1707 M_MOV(REG_PC, REG_PV);
1709 #if !defined(__SOFTFP__)
1710 /* TODO: this is only a hack, since we use R0/R1 for float
1711 return! this depends on gcc; it is independent from
1712 our ENABLE_SOFTFLOAT define */
1713 if (d != TYPE_VOID && IS_FLT_DBL_TYPE(d)) {
1714 #if 0 && !defined(NDEBUG)
1715 dolog("BUILTIN that returns float or double (%s.%s)", m->clazz->name->text, m->name->text);
1717 /* we cannot use this macro, since it is not defined
1718 in ENABLE_SOFTFLOAT M_CAST_FLT_TO_INT_TYPED(d,
1719 REG_FRESULT, REG_RESULT_TYPED(d)); */
1720 if (IS_2_WORD_TYPE(d)) {
1721 DCD(0xed2d8102); /* stfd f0, [sp, #-8]! */
1722 M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
1724 DCD(0xed2d0101); /* stfs f0, [sp, #-4]!*/
1725 M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
1731 case ICMD_INVOKESPECIAL:
1732 emit_nullpointer_check(cd, iptr, REG_A0);
1735 case ICMD_INVOKESTATIC:
1736 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1737 um = iptr->sx.s23.s3.um;
1738 disp = dseg_add_unique_address(cd, NULL);
1740 patcher_add_patch_ref(jd, PATCHER_invokestatic_special,
1744 lm = iptr->sx.s23.s3.fmiref->p.method;
1745 disp = dseg_add_address(cd, lm->stubroutine);
1748 M_DSEG_LOAD(REG_PV, disp); /* Pointer to method */
1750 /* generate the actual call */
1752 M_MOV(REG_LR, REG_PC);
1753 M_MOV(REG_PC, REG_PV);
1756 case ICMD_INVOKEVIRTUAL:
1757 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1758 um = iptr->sx.s23.s3.um;
1759 int32_t disp = dseg_add_unique_s4(cd, 0);
1760 patcher_add_patch_ref(jd, PATCHER_invokevirtual, um, disp);
1762 // The following instruction MUST NOT change a0 because of the implicit NPE check.
1763 M_LDR_INTERN(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
1766 assert(REG_ITMP1 != REG_METHODPTR);
1767 assert(REG_ITMP2 == REG_METHODPTR);
1769 M_DSEG_LOAD(REG_ITMP1, disp);
1770 M_ADD(REG_METHODPTR, REG_METHODPTR, REG_ITMP1);
1772 // This must be a load with displacement,
1773 // otherwise the JIT method address patching does
1774 // not work anymore (see md_jit_method_patch_address).
1775 M_LDR_INTERN(REG_PV, REG_METHODPTR, 0);
1778 lm = iptr->sx.s23.s3.fmiref->p.method;
1779 s1 = OFFSET(vftbl_t, table[0]) + sizeof(methodptr) * lm->vftblindex;
1781 // The following instruction MUST NOT change a0 because of the implicit NPE check.
1782 M_LDR_INTERN(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
1783 M_LDR(REG_PV, REG_METHODPTR, s1);
1786 // Generate the actual call.
1787 M_MOV(REG_LR, REG_PC);
1788 M_MOV(REG_PC, REG_PV);
1791 case ICMD_INVOKEINTERFACE:
1792 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1793 um = iptr->sx.s23.s3.um;
1794 int32_t disp = dseg_add_unique_s4(cd, 0);
1795 int32_t disp2 = dseg_add_unique_s4(cd, 0);
1797 // XXX We need two displacements.
1798 assert(disp2 == disp - 4);
1799 patcher_add_patch_ref(jd, PATCHER_invokeinterface, um, disp);
1801 // The following instruction MUST NOT change a0 because of the implicit NPE check.
1802 M_LDR_INTERN(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
1805 assert(REG_ITMP1 != REG_METHODPTR);
1806 assert(REG_ITMP2 == REG_METHODPTR);
1807 assert(REG_ITMP3 != REG_METHODPTR);
1809 M_DSEG_LOAD(REG_ITMP1, disp);
1810 M_LDR_REG(REG_METHODPTR, REG_METHODPTR, REG_ITMP1);
1812 M_DSEG_LOAD(REG_ITMP3, disp2);
1813 M_ADD(REG_METHODPTR, REG_METHODPTR, REG_ITMP3);
1815 // This must be a load with displacement,
1816 // otherwise the JIT method address patching does
1817 // not work anymore (see md_jit_method_patch_address).
1818 M_LDR_INTERN(REG_PV, REG_METHODPTR, 0);
1821 lm = iptr->sx.s23.s3.fmiref->p.method;
1822 s1 = OFFSET(vftbl_t, interfacetable[0]) - sizeof(methodptr*) * lm->clazz->index;
1823 s2 = sizeof(methodptr) * (lm - lm->clazz->methods);
1825 // The following instruction MUST NOT change a0 because of the implicit NPE check.
1826 M_LDR_INTERN(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
1827 M_LDR(REG_METHODPTR, REG_METHODPTR, s1);
1828 M_LDR(REG_PV, REG_METHODPTR, s2);
1831 // Generate the actual call.
1832 M_MOV(REG_LR, REG_PC);
1833 M_MOV(REG_PC, REG_PV);
1836 case ICMD_CHECKCAST: /* ..., objectref ==> ..., objectref */
1838 if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
1839 /* object type cast-check */
1844 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1849 super = iptr->sx.s23.s3.c.cls;
1850 superindex = super->index;
1853 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1855 /* if class is not resolved, check which code to call */
1857 if (super == NULL) {
1859 emit_label_beq(cd, BRANCH_LABEL_1);
1861 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
1862 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_flags,
1863 iptr->sx.s23.s3.c.ref, disp);
1865 M_DSEG_LOAD(REG_ITMP2, disp);
1866 disp = dseg_add_s4(cd, ACC_INTERFACE);
1867 M_DSEG_LOAD(REG_ITMP3, disp);
1868 M_TST(REG_ITMP2, REG_ITMP3);
1869 emit_label_beq(cd, BRANCH_LABEL_2);
1872 /* interface checkcast code */
1874 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
1875 if ((super == NULL) || !IS_IMM(superindex)) {
1876 disp = dseg_add_unique_s4(cd, superindex);
1878 if (super == NULL) {
1879 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_index,
1880 iptr->sx.s23.s3.c.ref, disp);
1884 emit_label_beq(cd, BRANCH_LABEL_3);
1887 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_object_t, vftbl));
1888 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
1890 /* we put unresolved or non-immediate superindices onto dseg */
1891 if ((super == NULL) || !IS_IMM(superindex)) {
1892 /* disp was computed before we added the patcher */
1893 M_DSEG_LOAD(REG_ITMP2, disp);
1894 M_CMP(REG_ITMP3, REG_ITMP2);
1896 assert(IS_IMM(superindex));
1897 M_CMP_IMM(REG_ITMP3, superindex);
1900 emit_classcast_check(cd, iptr, BRANCH_LE, REG_ITMP3, s1);
1902 /* if we loaded the superindex out of the dseg above, we do
1903 things differently here! */
1904 if ((super == NULL) || !IS_IMM(superindex)) {
1906 M_LDR_INTERN(REG_ITMP3, s1, OFFSET(java_object_t, vftbl));
1908 /* this assumes something */
1909 assert(OFFSET(vftbl_t, interfacetable[0]) == 0);
1911 /* this does: REG_ITMP3 - superindex * sizeof(methodptr*) */
1912 assert(sizeof(methodptr*) == 4);
1913 M_SUB(REG_ITMP2, REG_ITMP3, REG_LSL(REG_ITMP2, 2));
1919 s2 = OFFSET(vftbl_t, interfacetable[0]) -
1920 superindex * sizeof(methodptr*);
1924 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, s2);
1925 M_TST(REG_ITMP3, REG_ITMP3);
1926 emit_classcast_check(cd, iptr, BRANCH_EQ, REG_ITMP3, s1);
1929 emit_label_br(cd, BRANCH_LABEL_4);
1931 emit_label(cd, BRANCH_LABEL_3);
1934 /* class checkcast code */
1936 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
1937 if (super == NULL) {
1938 emit_label(cd, BRANCH_LABEL_2);
1940 disp = dseg_add_unique_address(cd, NULL);
1942 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_vftbl,
1943 iptr->sx.s23.s3.c.ref,
1947 disp = dseg_add_address(cd, super->vftbl);
1950 emit_label_beq(cd, BRANCH_LABEL_5);
1953 // The following code checks whether object s is a subtype of class t.
1954 // Represents the following semantic:
1955 // if (!fast_subtype_check(s->vftbl, t->vftbl)) throw;
1957 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_object_t, vftbl));
1958 M_DSEG_LOAD(REG_ITMP3, disp);
1960 if (super == NULL || super->vftbl->subtype_depth >= DISPLAY_SIZE) {
1961 // Represents the following semantic:
1962 // if (*(s->vftbl + t->vftbl->subtype_offset) == t->vftbl) good;
1964 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
1965 M_LDR_INTERN(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
1966 M_LDR_REG(REG_ITMP1, REG_ITMP2, REG_ITMP1);
1967 M_CMP(REG_ITMP1, REG_ITMP3);
1968 emit_load_s1(jd, iptr, REG_ITMP1); /* reload s1, might have been destroyed */
1969 emit_label_beq(cd, BRANCH_LABEL_6); /* good */
1971 // Represents the following semantic:
1972 // if (t->vftbl->subtype_offset != OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE])) throw;
1974 // REG_ITMP3==t->vftbl;
1975 if (super == NULL) {
1976 M_LDR_INTERN(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
1977 M_CMP_IMM(REG_ITMP1, OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE]));
1978 emit_load_s1(jd, iptr, REG_ITMP1); /* reload s1, might have been destroyed */
1979 emit_classcast_check(cd, iptr, BRANCH_NE, 0, s1); /* throw */
1982 // Represents the following semantic:
1983 // if (s->vftbl->subtype_depth < t->vftbl->subtype_depth) throw;
1985 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
1986 M_LDR_INTERN(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, subtype_depth));
1987 M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, subtype_depth));
1988 M_CMP(REG_ITMP1, REG_ITMP3);
1989 emit_load_s1(jd, iptr, REG_ITMP1); /* reload s1, might have been destroyed */
1990 emit_classcast_check(cd, iptr, BRANCH_LT, 0, s1); /* throw */
1992 // Represents the following semantic:
1993 // if (s->vftbl->subtype_overflow[t->vftbl->subtype_depth - DISPLAY_SIZE] != t->vftbl) throw;
1995 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl->subtype_depth;
1996 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, subtype_overflow));
1997 M_ADD(REG_ITMP2, REG_ITMP2, REG_LSL(REG_ITMP3, 2)); /* REG_ITMP2 = REG_ITMP2 + 4 * REG_ITMP3 */
1998 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, -DISPLAY_SIZE * SIZEOF_VOID_P);
1999 M_DSEG_LOAD(REG_ITMP3, disp); /* reload REG_ITMP3, was destroyed */
2000 M_CMP(REG_ITMP2, REG_ITMP3);
2001 emit_classcast_check(cd, iptr, BRANCH_NE, 0, s1); /* throw */
2003 emit_label(cd, BRANCH_LABEL_6);
2006 // Represents the following semantic:
2007 // if (*(s->vftbl + t->vftbl->subtype_offset) != t->vftbl) throw;
2009 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2010 M_ALD(REG_ITMP2, REG_ITMP2, super->vftbl->subtype_offset);
2011 M_CMP(REG_ITMP2, REG_ITMP3);
2012 emit_classcast_check(cd, iptr, BRANCH_NE, 0, s1);
2016 emit_label(cd, BRANCH_LABEL_5);
2019 if (super == NULL) {
2020 emit_label(cd, BRANCH_LABEL_1);
2021 emit_label(cd, BRANCH_LABEL_4);
2024 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
2027 /* array type cast-check */
2029 s1 = emit_load_s1(jd, iptr, REG_A0);
2030 M_INTMOVE(s1, REG_A0);
2032 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2033 disp = dseg_add_unique_address(cd, NULL);
2035 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
2036 iptr->sx.s23.s3.c.ref,
2040 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2042 M_DSEG_LOAD(REG_A1, disp);
2043 disp = dseg_add_functionptr(cd, BUILTIN_arraycheckcast);
2044 M_DSEG_BRANCH(disp);
2046 emit_recompute_pv(cd);
2048 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2049 M_TST(REG_RESULT, REG_RESULT);
2050 emit_classcast_check(cd, iptr, BRANCH_EQ, REG_RESULT, s1);
2052 d = codegen_reg_of_dst(jd, iptr, s1);
2056 emit_store_dst(jd, iptr, d);
2059 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult */
2065 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2070 super = iptr->sx.s23.s3.c.cls;
2071 superindex = super->index;
2074 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2075 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2078 M_MOV(REG_ITMP1, s1);
2082 /* if class is not resolved, check which code to call */
2084 if (super == NULL) {
2088 emit_label_beq(cd, BRANCH_LABEL_1);
2090 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
2091 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_flags,
2092 iptr->sx.s23.s3.c.ref, disp);
2094 M_DSEG_LOAD(REG_ITMP2, disp);
2095 disp = dseg_add_s4(cd, ACC_INTERFACE);
2096 M_DSEG_LOAD(REG_ITMP3, disp);
2097 M_TST(REG_ITMP2, REG_ITMP3);
2098 emit_label_beq(cd, BRANCH_LABEL_2);
2101 /* interface checkcast code */
2103 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2104 if ((super == NULL) || !IS_IMM(superindex)) {
2105 disp = dseg_add_unique_s4(cd, superindex);
2107 if (super == NULL) {
2108 /* If d == REG_ITMP2, then it's destroyed in check
2113 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_index,
2114 iptr->sx.s23.s3.c.ref, disp);
2119 emit_label_beq(cd, BRANCH_LABEL_3);
2122 M_LDR_INTERN(REG_ITMP1, s1, OFFSET(java_object_t, vftbl));
2123 M_LDR_INTERN(REG_ITMP3,
2124 REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
2126 /* we put unresolved or non-immediate superindices onto dseg
2127 and do things slightly different */
2128 if ((super == NULL) || !IS_IMM(superindex)) {
2129 /* disp was computed before we added the patcher */
2130 M_DSEG_LOAD(REG_ITMP2, disp);
2131 M_CMP(REG_ITMP3, REG_ITMP2);
2133 if (d == REG_ITMP2) {
2140 /* this assumes something */
2141 assert(OFFSET(vftbl_t, interfacetable[0]) == 0);
2143 /* this does: REG_ITMP3 - superindex * sizeof(methodptr*) */
2144 assert(sizeof(methodptr*) == 4);
2145 M_SUB(REG_ITMP1, REG_ITMP1, REG_LSL(REG_ITMP2, 2));
2147 if (d == REG_ITMP2) {
2154 assert(IS_IMM(superindex));
2155 M_CMP_IMM(REG_ITMP3, superindex);
2159 s2 = OFFSET(vftbl_t, interfacetable[0]) -
2160 superindex * sizeof(methodptr*);
2164 M_LDR_INTERN(REG_ITMP3, REG_ITMP1, s2);
2165 M_TST(REG_ITMP3, REG_ITMP3);
2169 emit_label_br(cd, BRANCH_LABEL_4);
2171 emit_label(cd, BRANCH_LABEL_3);
2174 /* class checkcast code */
2176 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2177 if (super == NULL) {
2178 emit_label(cd, BRANCH_LABEL_2);
2180 disp = dseg_add_unique_address(cd, NULL);
2182 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_vftbl,
2183 iptr->sx.s23.s3.c.ref, disp);
2186 disp = dseg_add_address(cd, super->vftbl);
2190 emit_label_beq(cd, BRANCH_LABEL_5);
2193 // The following code checks whether object s is a subtype of class t.
2194 // Represents the following semantic:
2195 // fast_subtype_check(s->vftbl, t->vftbl));
2197 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_object_t, vftbl));
2198 M_DSEG_LOAD(REG_ITMP3, disp);
2200 if (super == NULL || super->vftbl->subtype_depth >= DISPLAY_SIZE) {
2201 // Represents the following semantic:
2202 // if (*(s->vftbl + t->vftbl->subtype_offset) == t->vftbl) true;
2204 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2205 M_LDR_INTERN(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
2206 M_LDR_REG(REG_ITMP1, REG_ITMP2, REG_ITMP1);
2207 M_CMP(REG_ITMP1, REG_ITMP3);
2208 emit_label_beq(cd, BRANCH_LABEL_6); /* true */
2210 // Represents the following semantic:
2211 // if (t->vftbl->subtype_offset != OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE])) false;
2213 // REG_ITMP3==t->vftbl;
2214 if (super == NULL) {
2215 M_LDR_INTERN(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
2216 M_CMP_IMM(REG_ITMP1, OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE]));
2217 emit_label_bne(cd, BRANCH_LABEL_7); /* false */
2220 // Represents the following semantic:
2221 // if (s->vftbl->subtype_depth < t->vftbl->subtype_depth) false;
2223 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2224 M_LDR_INTERN(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, subtype_depth));
2225 M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, subtype_depth));
2226 M_CMP(REG_ITMP1, REG_ITMP3);
2227 emit_label_blt(cd, BRANCH_LABEL_8); /* false */
2229 // Represents the following semantic:
2230 // if (s->vftbl->subtype_overflow[t->vftbl->subtype_depth - DISPLAY_SIZE] != t->vftbl) false;
2232 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl->subtype_depth;
2233 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, subtype_overflow));
2234 M_ADD(REG_ITMP2, REG_ITMP2, REG_LSL(REG_ITMP3, 2)); /* REG_ITMP2 = REG_ITMP2 + 4 * REG_ITMP3 */
2235 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, -DISPLAY_SIZE * SIZEOF_VOID_P);
2236 M_DSEG_LOAD(REG_ITMP3, disp); /* reload REG_ITMP3, was destroyed */
2237 M_CMP(REG_ITMP2, REG_ITMP3);
2239 emit_label(cd, BRANCH_LABEL_6);
2241 emit_label(cd, BRANCH_LABEL_7);
2242 emit_label(cd, BRANCH_LABEL_8);
2244 /* If d == REG_ITMP2, then it's destroyed */
2250 // Represents the following semantic:
2251 // *(s->vftbl + t->vftbl->subtype_offset) == t->vftbl;
2253 // REG_ITMP2==s->vftbl; REG_ITMP3==t->vftbl;
2254 M_ALD(REG_ITMP2, REG_ITMP2, super->vftbl->subtype_offset);
2255 M_CMP(REG_ITMP2, REG_ITMP3);
2256 /* If d == REG_ITMP2, then it's destroyed */
2263 emit_label(cd, BRANCH_LABEL_5);
2266 if (super == NULL) {
2267 emit_label(cd, BRANCH_LABEL_1);
2268 emit_label(cd, BRANCH_LABEL_4);
2273 emit_store_dst(jd, iptr, d);
2276 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref */
2278 /* copy sizes to stack if necessary */
2280 MCODECHECK((iptr->s1.argcount << 1) + 64);
2282 for (s1 = iptr->s1.argcount; --s1 >= 0; ) {
2284 var = VAR(iptr->sx.s23.s2.args[s1]);
2286 /* copy SAVEDVAR sizes to stack */
2288 if (!(var->flags & PREALLOC)) {
2289 s2 = emit_load(jd, iptr, var, REG_ITMP1);
2290 M_STR(s2, REG_SP, s1 * 4);
2294 /* a0 = dimension count */
2296 assert(IS_IMM(iptr->s1.argcount));
2297 M_MOV_IMM(REG_A0, iptr->s1.argcount);
2299 /* is patcher function set? */
2301 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2302 disp = dseg_add_unique_address(cd, NULL);
2304 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
2305 iptr->sx.s23.s3.c.ref, disp);
2308 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2310 /* a1 = arraydescriptor */
2312 M_DSEG_LOAD(REG_A1, disp);
2314 /* a2 = pointer to dimensions = stack pointer */
2316 M_INTMOVE(REG_SP, REG_A2);
2318 /* call builtin_multianewarray here */
2320 disp = dseg_add_functionptr(cd, BUILTIN_multianewarray);
2321 M_DSEG_BRANCH(disp);
2325 emit_recompute_pv(cd);
2327 /* check for exception before result assignment */
2329 emit_exception_check(cd, iptr);
2333 d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2334 M_INTMOVE(REG_RESULT, d);
2335 emit_store_dst(jd, iptr, d);
2339 vm_abort("Unknown ICMD %d during code generation", iptr->opc);
2340 } /* the big switch */
2344 /* codegen_emit_stub_native ****************************************************
2346 Emits a stub routine which calls a native method.
2348 *******************************************************************************/
2350 void codegen_emit_stub_native(jitdata *jd, methoddesc *nmd, functionptr f, int skipparams)
2361 /* get required compiler data */
2367 /* initialize variables */
2371 /* calculate stackframe size */
2373 cd->stackframesize =
2374 1 + /* return address */
2375 sizeof(stackframeinfo_t) / SIZEOF_VOID_P + /* stackframeinfo */
2376 sizeof(localref_table) / SIZEOF_VOID_P + /* localref_table */
2377 nmd->memuse; /* stack arguments */
2379 /* align stack to 8-byte */
2381 cd->stackframesize = (cd->stackframesize + 1) & ~1;
2383 /* create method header */
2385 (void) dseg_add_unique_address(cd, code); /* CodeinfoPointer */
2386 (void) dseg_add_unique_s4(cd, cd->stackframesize); /* FrameSize */
2387 (void) dseg_add_unique_s4(cd, 0); /* IsLeaf */
2388 (void) dseg_add_unique_s4(cd, 0); /* IntSave */
2389 (void) dseg_add_unique_s4(cd, 0); /* FltSave */
2391 /* generate stub code */
2393 M_STMFD(1<<REG_LR, REG_SP);
2394 M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize * 2 - 1);
2396 #if defined(ENABLE_GC_CACAO)
2397 /* Save callee saved integer registers in stackframeinfo (GC may
2398 need to recover them during a collection). */
2400 disp = cd->stackframesize - SIZEOF_VOID_P - sizeof(stackframeinfo_t) +
2401 OFFSET(stackframeinfo_t, intregs);
2403 for (i = 0; i < INT_SAV_CNT; i++)
2404 M_STR_INTERN(abi_registers_integer_saved[i], REG_SP, disp + i * 4);
2407 /* Save integer and float argument registers (these are 4
2408 registers, stack is 8-byte aligned). */
2410 M_STMFD(BITMASK_ARGS, REG_SP);
2411 /* TODO: floating point */
2413 /* create native stackframe info */
2415 M_ADD_IMM(REG_A0, REG_SP, 4*4);
2416 M_MOV(REG_A1, REG_PV);
2417 disp = dseg_add_functionptr(cd, codegen_start_native_call);
2418 M_DSEG_BRANCH(disp);
2422 emit_recompute_pv(cd);
2424 /* remember class argument */
2426 if (m->flags & ACC_STATIC)
2427 M_MOV(REG_ITMP3, REG_RESULT);
2429 /* Restore integer and float argument registers (these are 4
2430 registers, stack is 8-byte aligned). */
2432 M_LDMFD(BITMASK_ARGS, REG_SP);
2433 /* TODO: floating point */
2435 /* copy or spill arguments to new locations */
2436 /* ATTENTION: the ARM has only integer argument registers! */
2438 for (i = md->paramcount - 1, j = i + skipparams; i >= 0; i--, j--) {
2439 t = md->paramtypes[i].type;
2441 if (!md->params[i].inmemory) {
2442 s1 = md->params[i].regoff;
2443 s2 = nmd->params[j].regoff;
2445 if (!nmd->params[j].inmemory) {
2446 #if !defined(__ARM_EABI__)
2447 SPLIT_OPEN(t, s2, REG_ITMP1);
2450 if (IS_2_WORD_TYPE(t))
2455 #if !defined(__ARM_EABI__)
2456 SPLIT_STORE_AND_CLOSE(t, s2, 0);
2460 if (IS_2_WORD_TYPE(t))
2461 M_LST(s1, REG_SP, s2);
2463 M_IST(s1, REG_SP, s2);
2467 s1 = md->params[i].regoff + cd->stackframesize * 8;
2468 s2 = nmd->params[j].regoff;
2470 if (IS_2_WORD_TYPE(t)) {
2471 M_LLD(REG_ITMP12_PACKED, REG_SP, s1);
2472 M_LST(REG_ITMP12_PACKED, REG_SP, s2);
2475 M_ILD(REG_ITMP1, REG_SP, s1);
2476 M_IST(REG_ITMP1, REG_SP, s2);
2481 /* Handle native Java methods. */
2483 if (m->flags & ACC_NATIVE) {
2484 /* put class into second argument register */
2486 if (m->flags & ACC_STATIC)
2487 M_MOV(REG_A1, REG_ITMP3);
2489 /* put env into first argument register */
2491 disp = dseg_add_address(cd, VM_get_jnienv());
2492 M_DSEG_LOAD(REG_A0, disp);
2495 /* Call the native function. */
2497 disp = dseg_add_functionptr(cd, f);
2498 M_DSEG_BRANCH(disp);
2501 /* TODO: this is only needed because of the tracer ... do we
2504 emit_recompute_pv(cd);
2506 #if !defined(__SOFTFP__)
2507 /* TODO: this is only a hack, since we use R0/R1 for float return! */
2508 /* this depends on gcc; it is independent from our ENABLE_SOFTFLOAT define */
2509 if (md->returntype.type != TYPE_VOID && IS_FLT_DBL_TYPE(md->returntype.type)) {
2510 #if 0 && !defined(NDEBUG)
2511 dolog("NATIVESTUB that returns float or double (%s.%s)", m->clazz->name->text, m->name->text);
2513 /* we cannot use this macro, since it is not defined in ENABLE_SOFTFLOAT */
2514 /* M_CAST_FLT_TO_INT_TYPED(md->returntype.type, REG_FRESULT, REG_RESULT_TYPED(md->returntype.type)); */
2515 if (IS_2_WORD_TYPE(md->returntype.type)) {
2516 DCD(0xed2d8102); /* stfd f0, [sp, #-8]! */
2517 M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
2519 DCD(0xed2d0101); /* stfs f0, [sp, #-4]!*/
2520 M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
2525 /* remove native stackframe info */
2526 /* TODO: improve this store/load */
2528 M_STMFD(BITMASK_RESULT, REG_SP);
2530 M_ADD_IMM(REG_A0, REG_SP, 2*4);
2531 M_MOV(REG_A1, REG_PV);
2532 disp = dseg_add_functionptr(cd, codegen_finish_native_call);
2533 M_DSEG_BRANCH(disp);
2534 emit_recompute_pv(cd);
2536 M_MOV(REG_ITMP1_XPTR, REG_RESULT);
2537 M_LDMFD(BITMASK_RESULT, REG_SP);
2539 #if defined(ENABLE_GC_CACAO)
2540 /* restore callee saved int registers from stackframeinfo (GC might have */
2541 /* modified them during a collection). */
2543 disp = cd->stackframesize - SIZEOF_VOID_P - sizeof(stackframeinfo_t) +
2544 OFFSET(stackframeinfo_t, intregs);
2546 for (i = 0; i < INT_SAV_CNT; i++)
2547 M_LDR_INTERN(abi_registers_integer_saved[i], REG_SP, disp + i * 4);
2550 /* finish stub code, but do not yet return to caller */
2552 M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize * 2 - 1);
2553 M_LDMFD(1<<REG_LR, REG_SP);
2555 /* check for exception */
2557 M_TST(REG_ITMP1_XPTR, REG_ITMP1_XPTR);
2558 M_MOVEQ(REG_LR, REG_PC); /* if no exception, return to caller */
2560 /* handle exception here */
2562 M_SUB_IMM(REG_ITMP2_XPC, REG_LR, 4);/* move fault address into xpc */
2564 disp = dseg_add_functionptr(cd, asm_handle_nat_exception);
2565 M_DSEG_LOAD(REG_ITMP3, disp); /* load asm exception handler address */
2566 M_MOV(REG_PC, REG_ITMP3); /* jump to asm exception handler */
2570 /* asm_debug *******************************************************************
2574 *******************************************************************************/
2576 void asm_debug(int a1, int a2, int a3, int a4)
2578 printf("===> i am going to exit after this debugging message!\n");
2579 printf("got asm_debug(%p, %p, %p, %p)\n",(void*)a1,(void*)a2,(void*)a3,(void*)a4);
2580 vm_abort("leave you now");
2585 * These are local overrides for various environment variables in Emacs.
2586 * Please do not remove this and leave it at the end of the file, where
2587 * Emacs will automagically detect them.
2588 * ---------------------------------------------------------------------
2591 * indent-tabs-mode: t
2595 * vim:noexpandtab:sw=4:ts=4: