1 /* src/vm/jit/alpha/emit.c - Alpha code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
36 #include "vm/jit/alpha/codegen.h"
38 #include "mm/memory.h"
40 #include "threads/lock-common.h"
42 #include "vm/builtin.h"
43 #include "vm/exceptions.h"
45 #include "vm/jit/abi.h"
46 #include "vm/jit/abi-asm.h"
47 #include "vm/jit/asmpart.h"
48 #include "vm/jit/dseg.h"
49 #include "vm/jit/emit-common.h"
50 #include "vm/jit/jit.h"
51 #include "vm/jit/patcher-common.h"
52 #include "vm/jit/replace.h"
54 #include "vmcore/options.h"
57 /* emit_load *******************************************************************
59 Emits a possible load of an operand.
61 *******************************************************************************/
63 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
69 /* get required compiler data */
73 if (IS_INMEMORY(src->flags)) {
76 disp = src->vv.regoff;
82 M_LLD(tempreg, REG_SP, disp);
86 M_DLD(tempreg, REG_SP, disp);
89 vm_abort("emit_load: unknown type %d", src->type);
101 /* emit_store ******************************************************************
103 Emit a possible store for the given variable.
105 *******************************************************************************/
107 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
112 /* get required compiler data */
116 if (IS_INMEMORY(dst->flags)) {
119 disp = dst->vv.regoff;
125 M_LST(d, REG_SP, disp);
129 M_DST(d, REG_SP, disp);
132 vm_abort("emit_store: unknown type %d", dst->type);
138 /* emit_copy *******************************************************************
140 Generates a register/memory to register/memory copy.
142 *******************************************************************************/
144 void emit_copy(jitdata *jd, instruction *iptr)
151 /* get required compiler data */
155 /* get source and destination variables */
157 src = VAROP(iptr->s1);
158 dst = VAROP(iptr->dst);
160 if ((src->vv.regoff != dst->vv.regoff) ||
161 ((src->flags ^ dst->flags) & INMEMORY)) {
163 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
164 /* emit nothing, as the value won't be used anyway */
168 /* If one of the variables resides in memory, we can eliminate
169 the register move from/to the temporary register with the
170 order of getting the destination register and the load. */
172 if (IS_INMEMORY(src->flags)) {
173 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
174 s1 = emit_load(jd, iptr, src, d);
177 s1 = emit_load(jd, iptr, src, REG_IFTMP);
178 d = codegen_reg_of_var(iptr->opc, dst, s1);
193 vm_abort("emit_copy: unknown type %d", src->type);
197 emit_store(jd, iptr, dst, d);
202 /* emit_iconst *****************************************************************
206 *******************************************************************************/
208 void emit_iconst(codegendata *cd, s4 d, s4 value)
212 if ((value >= -32768) && (value <= 32767))
213 M_LDA_INTERN(d, REG_ZERO, value);
215 disp = dseg_add_s4(cd, value);
216 M_ILD(d, REG_PV, disp);
221 /* emit_lconst *****************************************************************
225 *******************************************************************************/
227 void emit_lconst(codegendata *cd, s4 d, s8 value)
231 if ((value >= -32768) && (value <= 32767))
232 M_LDA_INTERN(d, REG_ZERO, value);
234 disp = dseg_add_s8(cd, value);
235 M_LLD(d, REG_PV, disp);
240 /* emit_branch *****************************************************************
242 Emits the code for conditional and unconditional branchs.
244 *******************************************************************************/
246 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
251 /* calculate the different displacements */
253 checkdisp = (disp - 4);
254 branchdisp = (disp - 4) >> 2;
256 /* check which branch to generate */
258 if (condition == BRANCH_UNCONDITIONAL) {
259 /* check displacement for overflow */
261 if ((checkdisp < (s4) 0xffe00000) || (checkdisp > (s4) 0x001fffff)) {
262 /* if the long-branches flag isn't set yet, do it */
264 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
265 log_println("setting error");
266 cd->flags |= (CODEGENDATA_FLAG_ERROR |
267 CODEGENDATA_FLAG_LONGBRANCHES);
270 vm_abort("emit_branch: emit unconditional long-branch code");
277 /* and displacement for overflow */
279 if ((checkdisp < (s4) 0xffe00000) || (checkdisp > (s4) 0x001fffff)) {
280 /* if the long-branches flag isn't set yet, do it */
282 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
283 log_println("setting error");
284 cd->flags |= (CODEGENDATA_FLAG_ERROR |
285 CODEGENDATA_FLAG_LONGBRANCHES);
288 vm_abort("emit_branch: emit conditional long-branch code");
293 M_BEQZ(reg, branchdisp);
296 M_BNEZ(reg, branchdisp);
299 M_BLTZ(reg, branchdisp);
302 M_BGEZ(reg, branchdisp);
305 M_BGTZ(reg, branchdisp);
308 M_BLEZ(reg, branchdisp);
311 vm_abort("emit_branch: unknown condition %d", condition);
318 /* emit_arithmetic_check *******************************************************
320 Emit an ArithmeticException check.
322 *******************************************************************************/
324 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
326 if (INSTRUCTION_MUST_CHECK(iptr)) {
328 /* Destination register must not be REG_ZERO, because then no
329 SIGSEGV is thrown. */
330 M_ALD_INTERN(reg, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
335 /* emit_arrayindexoutofbounds_check ********************************************
337 Emit an ArrayIndexOutOfBoundsException check.
339 *******************************************************************************/
341 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
343 if (INSTRUCTION_MUST_CHECK(iptr)) {
344 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
345 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);
346 M_BNEZ(REG_ITMP3, 1);
347 M_ALD_INTERN(s2, REG_ZERO, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
352 /* emit_classcast_check ********************************************************
354 Emit a ClassCastException check.
356 *******************************************************************************/
358 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
360 if (INSTRUCTION_MUST_CHECK(iptr)) {
369 vm_abort("emit_classcast_check: unknown condition %d", condition);
371 M_ALD_INTERN(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
376 /* emit_nullpointer_check ******************************************************
378 Emit a NullPointerException check.
380 *******************************************************************************/
382 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
384 if (INSTRUCTION_MUST_CHECK(iptr)) {
386 /* Destination register must not be REG_ZERO, because then no
387 SIGSEGV is thrown. */
388 M_ALD_INTERN(reg, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
393 /* emit_exception_check ********************************************************
395 Emit an Exception check.
397 *******************************************************************************/
399 void emit_exception_check(codegendata *cd, instruction *iptr)
401 if (INSTRUCTION_MUST_CHECK(iptr)) {
402 M_BNEZ(REG_RESULT, 1);
403 /* Destination register must not be REG_ZERO, because then no
404 SIGSEGV is thrown. */
405 M_ALD_INTERN(REG_RESULT, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
410 /* emit_trap *******************************************************************
412 Emit a trap instruction and return the original machine code.
414 *******************************************************************************/
416 uint32_t emit_trap(codegendata *cd)
420 /* Get machine code which is patched back in later. The
421 trap is 1 instruction word long. */
423 mcode = *((u4 *) cd->mcodeptr);
425 /* Destination register must not be REG_ZERO, because then no
426 SIGSEGV is thrown. */
427 M_ALD_INTERN(REG_RESULT, REG_ZERO, EXCEPTION_HARDWARE_PATCHER);
433 /* emit_verbosecall_enter ******************************************************
435 Generates the code for the call trace.
437 *******************************************************************************/
440 void emit_verbosecall_enter(jitdata *jd)
449 /* get required compiler data */
457 /* mark trace code */
461 M_LDA(REG_SP, REG_SP, -((ARG_CNT + TMP_CNT + 2) * 8));
462 M_AST(REG_RA, REG_SP, 1 * 8);
464 /* save argument registers */
466 for (i = 0; i < INT_ARG_CNT; i++)
467 M_LST(abi_registers_integer_argument[i], REG_SP, (2 + i) * 8);
469 for (i = 0; i < FLT_ARG_CNT; i++)
470 M_DST(abi_registers_float_argument[i], REG_SP, (2 + INT_ARG_CNT + i) * 8);
472 /* save temporary registers for leaf methods */
474 if (jd->isleafmethod) {
475 for (i = 0; i < INT_TMP_CNT; i++)
476 M_LST(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
478 for (i = 0; i < FLT_TMP_CNT; i++)
479 M_DST(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
482 /* load float arguments into integer registers */
484 for (i = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
485 t = md->paramtypes[i].type;
487 if (IS_FLT_DBL_TYPE(t)) {
488 if (IS_2_WORD_TYPE(t)) {
489 M_DST(abi_registers_float_argument[i], REG_SP, 0 * 8);
490 M_LLD(abi_registers_integer_argument[i], REG_SP, 0 * 8);
493 M_FST(abi_registers_float_argument[i], REG_SP, 0 * 8);
494 M_ILD(abi_registers_integer_argument[i], REG_SP, 0 * 8);
499 disp = dseg_add_address(cd, m);
500 M_ALD(REG_ITMP1, REG_PV, disp);
501 M_AST(REG_ITMP1, REG_SP, 0 * 8);
502 disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
503 M_ALD(REG_PV, REG_PV, disp);
504 M_JSR(REG_RA, REG_PV);
505 disp = (s4) (cd->mcodeptr - cd->mcodebase);
506 M_LDA(REG_PV, REG_RA, -disp);
507 M_ALD(REG_RA, REG_SP, 1 * 8);
509 /* restore argument registers */
511 for (i = 0; i < INT_ARG_CNT; i++)
512 M_LLD(abi_registers_integer_argument[i], REG_SP, (2 + i) * 8);
514 for (i = 0; i < FLT_ARG_CNT; i++)
515 M_DLD(abi_registers_float_argument[i], REG_SP, (2 + INT_ARG_CNT + i) * 8);
517 /* restore temporary registers for leaf methods */
519 if (jd->isleafmethod) {
520 for (i = 0; i < INT_TMP_CNT; i++)
521 M_LLD(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
523 for (i = 0; i < FLT_TMP_CNT; i++)
524 M_DLD(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
527 M_LDA(REG_SP, REG_SP, (ARG_CNT + TMP_CNT + 2) * 8);
529 /* mark trace code */
533 #endif /* !defined(NDEBUG) */
536 /* emit_verbosecall_exit *******************************************************
538 Generates the code for the call trace.
540 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
542 *******************************************************************************/
545 void emit_verbosecall_exit(jitdata *jd)
552 /* get required compiler data */
558 /* mark trace code */
562 M_ASUB_IMM(REG_SP, 4 * 8, REG_SP);
563 M_AST(REG_RA, REG_SP, 0 * 8);
565 M_LST(REG_RESULT, REG_SP, 1 * 8);
566 M_DST(REG_FRESULT, REG_SP, 2 * 8);
568 M_MOV(REG_RESULT, REG_A0);
569 M_FMOV(REG_FRESULT, REG_FA1);
570 M_FMOV(REG_FRESULT, REG_FA2);
572 disp = dseg_add_address(cd, m);
573 M_ALD(REG_A3, REG_PV, disp);
575 disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
576 M_ALD(REG_PV, REG_PV, disp);
577 M_JSR(REG_RA, REG_PV);
578 disp = (cd->mcodeptr - cd->mcodebase);
579 M_LDA(REG_PV, REG_RA, -disp);
581 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
582 M_LLD(REG_RESULT, REG_SP, 1 * 8);
584 M_ALD(REG_RA, REG_SP, 0 * 8);
585 M_AADD_IMM(REG_SP, 4 * 8, REG_SP);
587 /* mark trace code */
591 #endif /* !defined(NDEBUG) */
595 * These are local overrides for various environment variables in Emacs.
596 * Please do not remove this and leave it at the end of the file, where
597 * Emacs will automagically detect them.
598 * ---------------------------------------------------------------------
601 * indent-tabs-mode: t
605 * vim:noexpandtab:sw=4:ts=4: