src/vm/jit/alpha/codegen.c

   1 /* vm/jit/alpha/codegen.c - machine code generator for alpha
   2
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
   4    Institut f. Computersprachen, TU Wien
   5    R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
   6    S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
   7    J. Wenninger
   8
   9    This file is part of CACAO.
  10
  11    This program is free software; you can redistribute it and/or
  12    modify it under the terms of the GNU General Public License as
  13    published by the Free Software Foundation; either version 2, or (at
  14    your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful, but
  17    WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19    General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  24    02111-1307, USA.
  25
  26    Contact: cacao@complang.tuwien.ac.at
  27
  28    Authors: Andreas Krall
  29             Reinhard Grafl
  30
  31    Changes: Joseph Wenninger
  32
  33    $Id: codegen.c 1694 2004-12-06 12:30:59Z twisti $
  34
  35 */
  36
  37
  38 #include <stdio.h>
  39 #include <signal.h>
  40
  41 #include "vm/jit/alpha/arch.h"
  42 #include "native/native.h"
  43 #include "vm/builtin.h"
  44 #include "vm/global.h"
  45 #include "vm/loader.h"
  46 #include "vm/tables.h"
  47 #include "vm/jit/asmpart.h"
  48 #include "vm/jit/jit.h"
  49 #ifdef LSRA
  50 #include "vm/jit/lsra.h"
  51 #endif
  52 #include "vm/jit/parse.h"
  53 #include "vm/jit/reg.h"
  54 #include "vm/jit/alpha/codegen.h"
  55 #include "vm/jit/alpha/types.h"
  56 #include "vm/jit/alpha/asmoffsets.h"
  57
  58
  59 /* *****************************************************************************
  60
  61 Datatypes and Register Allocations:
  62 -----------------------------------
  63
  64 On 64-bit-machines (like the Alpha) all operands are stored in the
  65 registers in a 64-bit form, even when the correspondig JavaVM  operands
  66 only need 32 bits. This is done by a canonical representation:
  67
  68 32-bit integers are allways stored as sign-extended 64-bit values (this
  69 approach is directly supported by the Alpha architecture and is very easy
  70 to implement).
  71
  72 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  73 expanding the exponent and mantissa with zeroes. (also supported by the
  74 architecture)
  75
  76
  77 Stackframes:
  78
  79 The calling conventions and the layout of the stack is  explained in detail
  80 in the documention file: calling.doc
  81
  82 *******************************************************************************/
  83
  84
  85 /* register descripton - array ************************************************/
  86
  87 /* #define REG_RES   0         reserved register for OS or code generator     */
  88 /* #define REG_RET   1         return value register                          */
  89 /* #define REG_EXC   2         exception value register (only old jit)        */
  90 /* #define REG_SAV   3         (callee) saved register                        */
  91 /* #define REG_TMP   4         scratch temporary register (caller saved)      */
  92 /* #define REG_ARG   5         argument register (caller saved)               */
  93
  94 /* #define REG_END   -1        last entry in tables */
  95
  96 int nregdescint[] = {
  97         REG_RET, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
  98         REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
  99         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
 100         REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
 101         REG_END };
 102
 103 /* for use of reserved registers, see comment above */
 104
 105 int nregdescfloat[] = {
 106         REG_RET, REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
 107         REG_SAV, REG_SAV, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 108         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
 109         REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES,
 110         REG_END };
 111
 112
 113 /* Include independent code generation stuff -- include after register        */
 114 /* descriptions to avoid extern definitions.                                  */
 115
 116 #include "vm/jit/codegen.inc"
 117 #include "vm/jit/reg.inc"
 118 #ifdef LSRA
 119 #include "vm/jit/lsra.inc"
 120 #endif
 121
 122
 123 /* NullPointerException handlers and exception handling initialisation        */
 124
 125 typedef struct sigctx_struct {
 126         long          sc_onstack;           /* sigstack state to restore          */
 127         long          sc_mask;              /* signal mask to restore             */
 128         long          sc_pc;                /* pc at time of signal               */
 129         long          sc_ps;                /* psl to retore                      */
 130         long          sc_regs[32];          /* processor regs 0 to 31             */
 131         long          sc_ownedfp;           /* fp has been used                   */
 132         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 133         unsigned long sc_fpcr;              /* floating point control register    */
 134         unsigned long sc_fp_control;        /* software fpcr                      */
 135                                             /* rest is unused                     */
 136         unsigned long sc_reserved1, sc_reserved2;
 137         unsigned long sc_ssize;
 138         char          *sc_sbase;
 139         unsigned long sc_traparg_a0;
 140         unsigned long sc_traparg_a1;
 141         unsigned long sc_traparg_a2;
 142         unsigned long sc_fp_trap_pc;
 143         unsigned long sc_fp_trigger_sum;
 144         unsigned long sc_fp_trigger_inst;
 145         unsigned long sc_retcode[2];
 146 } sigctx_struct;
 147
 148
 149 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
 150 void thread_restartcriticalsection(ucontext_t *uc)
 151 {
 152         void *critical;
 153         if ((critical = thread_checkcritical((void*) uc->uc_mcontext.sc_pc)) != NULL)
 154                 uc->uc_mcontext.sc_pc = (u8) critical;
 155 }
 156 #endif
 157
 158 /* NullPointerException signal handler for hardware null pointer check */
 159
 160 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 161 {
 162         sigset_t nsig;
 163         int      instr;
 164         long     faultaddr;
 165         java_objectheader *xptr;
 166
 167         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 168
 169         instr = *((int*)(sigctx->sc_pc));
 170         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 171
 172         if (faultaddr == 0) {
 173                 /* reinstall handler */
 174                 signal(sig, (functionptr) catch_NullPointerException);
 175                 sigemptyset(&nsig);
 176                 sigaddset(&nsig, sig);
 177                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 178
 179                 /*xptr = new_nullpointerexception();
 180                 sigctx->sc_regs[REG_ITMP1_XPTR] = (u8) xptr;*/
 181
 182                 sigctx->sc_regs[REG_ITMP1_XPTR]=string_java_lang_NullPointerException;
 183                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 184                 /*sigctx->sc_pc = (u8) asm_handle_exception;*/
 185                 sigctx->sc_pc = (u8) asm_throw_and_handle_exception;
 186                 return;
 187
 188         } else {
 189                 faultaddr += (long) ((instr << 16) >> 16);
 190                 fprintf(stderr, "faulting address: 0x%016lx\n", faultaddr);
 191                 panic("Stack overflow");
 192         }
 193 }
 194
 195
 196 #ifdef __osf__
 197
 198 void init_exceptions(void)
 199 {
 200
 201 #else /* Linux */
 202
 203 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 204         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 205         Digital Unix this is done automatically.
 206 */
 207
 208 #include <asm/fpu.h>
 209
 210 extern unsigned long ieee_get_fp_control();
 211 extern void ieee_set_fp_control(unsigned long fp_control);
 212
 213 void init_exceptions(void)
 214 {
 215 /* initialize floating point control */
 216
 217 ieee_set_fp_control(ieee_get_fp_control()
 218                     & ~IEEE_TRAP_ENABLE_INV
 219                     & ~IEEE_TRAP_ENABLE_DZE
 220 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 221                     & ~IEEE_TRAP_ENABLE_OVF);
 222 #endif
 223
 224         /* install signal handlers we need to convert to exceptions */
 225
 226         if (!checknull) {
 227 #if defined(SIGSEGV)
 228                 signal(SIGSEGV, (functionptr) catch_NullPointerException);
 229 #endif
 230
 231 #if defined(SIGBUS)
 232                 signal(SIGBUS, (functionptr) catch_NullPointerException);
 233 #endif
 234         }
 235 }
 236
 237
 238 /* function gen_mcode **********************************************************
 239
 240         generates machine code
 241
 242 *******************************************************************************/
 243
 244 void codegen(methodinfo *m, codegendata *cd, registerdata *rd)
 245 {
 246         s4 len, s1, s2, s3, d;
 247         s4 a;
 248         s4 parentargs_base;
 249         s4             *mcodeptr;
 250         stackptr        src;
 251         varinfo        *var;
 252         basicblock     *bptr;
 253         instruction    *iptr;
 254         exceptiontable *ex;
 255         u2 currentline=0;
 256         {
 257         s4 i, p, pa, t, l;
 258         s4 savedregs_num;
 259
 260         savedregs_num = (m->isleafmethod) ? 0 : 1;        /* space to save the RA */
 261
 262         /* space to save used callee saved registers */
 263
 264         savedregs_num += (rd->savintregcnt - rd->maxsavintreguse);
 265         savedregs_num += (rd->savfltregcnt - rd->maxsavfltreguse);
 266
 267         parentargs_base = rd->maxmemuse + savedregs_num;
 268
 269 #if defined(USE_THREADS)           /* space to save argument of monitor_enter */
 270
 271         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 272                 parentargs_base++;
 273
 274 #endif
 275
 276         /* create method header */
 277
 278         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
 279         (void) dseg_adds4(cd, parentargs_base * 8);             /* FrameSize      */
 280
 281 #if defined(USE_THREADS)
 282
 283         /* IsSync contains the offset relative to the stack pointer for the
 284            argument of monitor_exit used in the exception handler. Since the
 285            offset could be zero and give a wrong meaning of the flag it is
 286            offset by one.
 287         */
 288
 289         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 290                 (void) dseg_adds4(cd, (rd->maxmemuse + 1) * 8);     /* IsSync         */
 291         else
 292
 293 #endif
 294
 295         (void) dseg_adds4(cd, 0);                               /* IsSync         */
 296
 297         (void) dseg_adds4(cd, m->isleafmethod);                 /* IsLeaf         */
 298         (void) dseg_adds4(cd, rd->savintregcnt - rd->maxsavintreguse);/* IntSave  */
 299         (void) dseg_adds4(cd, rd->savfltregcnt - rd->maxsavfltreguse);/* FltSave  */
 300
 301         dseg_addlinenumbertablesize(cd);
 302
 303         (void) dseg_adds4(cd, cd->exceptiontablelength);        /* ExTableSize    */
 304
 305         /* create exception table */
 306
 307         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 308                 dseg_addtarget(cd, ex->start);
 309                 dseg_addtarget(cd, ex->end);
 310                 dseg_addtarget(cd, ex->handler);
 311                 (void) dseg_addaddress(cd, ex->catchtype);
 312         }
 313
 314         /* initialize mcode variables */
 315
 316         mcodeptr = (s4 *) cd->mcodebase;
 317         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
 318         MCODECHECK(128 + m->paramcount);
 319
 320         /* create stack frame (if necessary) */
 321
 322         if (parentargs_base) {
 323                 M_LDA(REG_SP, REG_SP, -parentargs_base * 8);
 324         }
 325
 326         /* save return address and used callee saved registers */
 327
 328         p = parentargs_base;
 329         if (!m->isleafmethod) {
 330                 p--; M_AST(REG_RA, REG_SP, p * 8);
 331         }
 332         for (i = rd->savintregcnt - 1; i >= rd->maxsavintreguse; i--) {
 333                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
 334         }
 335         for (i = rd->savfltregcnt - 1; i >= rd->maxsavfltreguse; i--) {
 336                 p--; M_DST(rd->savfltregs[i], REG_SP, p * 8);
 337         }
 338
 339         /* save monitorenter argument */
 340
 341 #if defined(USE_THREADS)
 342         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 343                 if (m->flags & ACC_STATIC) {
 344                         p = dseg_addaddress(cd, m->class);
 345                         M_ALD(REG_ITMP1, REG_PV, p);
 346                         M_AST(REG_ITMP1, REG_SP, rd->maxmemuse * 8);
 347
 348                 } else {
 349                         M_AST(rd->argintregs[0], REG_SP, rd->maxmemuse * 8);
 350                 }
 351         }
 352 #endif
 353
 354         /* copy argument registers to stack and call trace function with pointer
 355            to arguments on stack.
 356         */
 357
 358         if (runverbose) {
 359                 s4 disp;
 360                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
 361                 M_AST(REG_RA, REG_SP, 1 * 8);
 362
 363                 /* save integer argument registers */
 364                 for (p = 0; /* p < m->paramcount && */ p < INT_ARG_CNT; p++) {
 365                         M_LST(rd->argintregs[p], REG_SP,  (2 + p) * 8);
 366                 }
 367
 368                 /* save and copy float arguments into integer registers */
 369                 for (p = 0; /* p < m->paramcount && */ p < FLT_ARG_CNT; p++) {
 370                         t = m->paramtypes[p];
 371
 372                         if (IS_FLT_DBL_TYPE(t)) {
 373                                 if (IS_2_WORD_TYPE(t)) {
 374                                         M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 375
 376                                 } else {
 377                                         M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 378                                 }
 379
 380                                 M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 381
 382                         } else {
 383                                 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 384                         }
 385                 }
 386
 387                 p = dseg_addaddress(cd, m);
 388                 M_ALD(REG_ITMP1, REG_PV, p);
 389                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
 390                 p = dseg_addaddress(cd, (void *) builtin_trace_args);
 391                 M_ALD(REG_PV, REG_PV, p);
 392                 M_JSR(REG_RA, REG_PV);
 393                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 394                 M_LDA(REG_PV, REG_RA, disp);
 395                 M_ALD(REG_RA, REG_SP, 1 * 8);
 396
 397                 for (p = 0; /* p < mparamcount && */ p < INT_ARG_CNT; p++) {
 398                         M_LLD(rd->argintregs[p], REG_SP,  (2 + p) * 8);
 399                 }
 400
 401                 for (p = 0; /* p < mparamcount && */ p < FLT_ARG_CNT; p++) {
 402                         t = m->paramtypes[p];
 403
 404                         if (IS_FLT_DBL_TYPE(t)) {
 405                                 if (IS_2_WORD_TYPE(t)) {
 406                                         M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 407
 408                                 } else {
 409                                         M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 410                                 }
 411
 412                         } else {
 413                                 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 414                         }
 415                 }
 416
 417                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
 418         }
 419
 420         /* take arguments out of register or stack frame */
 421
 422         for (p = 0, l = 0; p < m->paramcount; p++) {
 423                 t = m->paramtypes[p];
 424                 var = &(rd->locals[l][t]);
 425                 l++;
 426                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 427                         l++;
 428                 if (var->type < 0)
 429                         continue;
 430                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 431                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 432                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 433                                         M_INTMOVE(rd->argintregs[p], var->regoff);
 434                                 } else {                             /* reg arg -> spilled    */
 435                                         M_LST(rd->argintregs[p], REG_SP, 8 * var->regoff);
 436                                 }
 437
 438                         } else {                                 /* stack arguments       */
 439                                 pa = p - INT_ARG_CNT;
 440                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 441                                         M_LLD(var->regoff, REG_SP, 8 * (parentargs_base + pa));
 442
 443                                 } else {                             /* stack arg -> spilled  */
 444                                         M_LLD(REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 445                                         M_LST(REG_ITMP1, REG_SP, 8 * var->regoff);
 446                                 }
 447                         }
 448
 449                 } else {                                     /* floating args         */
 450                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 451                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 452                                         M_FLTMOVE(rd->argfltregs[p], var->regoff);
 453
 454                                 } else {                                         /* reg arg -> spilled    */
 455                                         M_DST(rd->argfltregs[p], REG_SP, 8 * var->regoff);
 456                                 }
 457
 458                         } else {                                 /* stack arguments       */
 459                                 pa = p - FLT_ARG_CNT;
 460                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 461                                         M_DLD(var->regoff, REG_SP, 8 * (parentargs_base + pa) );
 462
 463                                 } else {                             /* stack-arg -> spilled  */
 464                                         M_DLD(REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 465                                         M_DST(REG_FTMP1, REG_SP, 8 * var->regoff);
 466                                 }
 467                         }
 468                 }
 469         } /* end for */
 470
 471         /* call monitorenter function */
 472
 473 #if defined(USE_THREADS)
 474         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 475                 s4 disp;
 476                 s8 func_enter = (m->flags & ACC_STATIC) ?
 477                         (s8) builtin_staticmonitorenter : (s8) builtin_monitorenter;
 478                 p = dseg_addaddress(cd, (void*) func_enter);
 479                 M_ALD(REG_PV, REG_PV, p);
 480                 M_ALD(rd->argintregs[0], REG_SP, rd->maxmemuse * 8);
 481                 M_JSR(REG_RA, REG_PV);
 482                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 483                 M_LDA(REG_PV, REG_RA, disp);
 484         }
 485 #endif
 486         }
 487
 488         /* end of header generation */
 489
 490         /* walk through all basic blocks */
 491         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 492
 493                 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 494
 495                 if (bptr->flags >= BBREACHED) {
 496
 497                 /* branch resolving */
 498
 499                 {
 500                 branchref *brefs;
 501                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 502                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 503                                           brefs->branchpos, bptr->mpc);
 504                         }
 505                 }
 506
 507                 /* copy interface registers to their destination */
 508
 509                 src = bptr->instack;
 510                 len = bptr->indepth;
 511                 MCODECHECK(64+len);
 512 #ifdef LSRA
 513                 if (opt_lsra) {
 514                 while (src != NULL) {
 515                         len--;
 516                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 517                                         /*                              d = reg_of_var(m, src, REG_ITMP1); */
 518                                         if (!(src->flags & INMEMORY))
 519                                                 d= src->regoff;
 520                                         else
 521                                                 d=REG_ITMP1;
 522                                         M_INTMOVE(REG_ITMP1, d);
 523                                         store_reg_to_var_int(src, d);
 524                                 }
 525                                 src = src->prev;
 526                         }
 527                 } else {
 528 #endif
 529                         while (src != NULL) {
 530                                 len--;
 531                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 532                                 d = reg_of_var(rd, src, REG_ITMP1);
 533                                 M_INTMOVE(REG_ITMP1, d);
 534                                 store_reg_to_var_int(src, d);
 535                                 }
 536                         else {
 537                                 d = reg_of_var(rd, src, REG_IFTMP);
 538                                 if ((src->varkind != STACKVAR)) {
 539                                         s2 = src->type;
 540                                         if (IS_FLT_DBL_TYPE(s2)) {
 541                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 542                                                         s1 = rd->interfaces[len][s2].regoff;
 543                                                         M_FLTMOVE(s1,d);
 544                                                         }
 545                                                 else {
 546                                                         M_DLD(d, REG_SP, 8 * rd->interfaces[len][s2].regoff);
 547                                                         }
 548                                                 store_reg_to_var_flt(src, d);
 549                                                 }
 550                                         else {
 551                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 552                                                         s1 = rd->interfaces[len][s2].regoff;
 553                                                         M_INTMOVE(s1,d);
 554                                                         }
 555                                                 else {
 556                                                         M_LLD(d, REG_SP, 8 * rd->interfaces[len][s2].regoff);
 557                                                         }
 558                                                 store_reg_to_var_int(src, d);
 559                                                 }
 560                                         }
 561                                 }
 562                         src = src->prev;
 563                         }
 564 #ifdef LSRA
 565                 }
 566 #endif
 567
 568                 /* walk through all instructions */
 569
 570                 src = bptr->instack;
 571                 len = bptr->icount;
 572                 for (iptr = bptr->iinstr;
 573                     len > 0;
 574                     src = iptr->dst, len--, iptr++) {
 575
 576                 if (iptr->line!=currentline) {
 577                         dseg_addlinenumber(cd,iptr->line,mcodeptr);
 578                         currentline=iptr->line;
 579                 }
 580
 581         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 582         switch (iptr->opc) {
 583
 584                 case ICMD_NOP:        /* ...  ==> ...                                 */
 585                         break;
 586
 587                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 588
 589                         var_to_reg_int(s1, src, REG_ITMP1);
 590                         M_BEQZ(s1, 0);
 591                         codegen_addxnullrefs(cd, mcodeptr);
 592                         break;
 593
 594                 /* constant operations ************************************************/
 595
 596                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 597                                       /* op1 = 0, val.i = constant                    */
 598
 599                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 600                         ICONST(d, iptr->val.i);
 601                         store_reg_to_var_int(iptr->dst, d);
 602                         break;
 603
 604                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 605                                       /* op1 = 0, val.l = constant                    */
 606
 607                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 608                         LCONST(d, iptr->val.l);
 609                         store_reg_to_var_int(iptr->dst, d);
 610                         break;
 611
 612                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 613                                       /* op1 = 0, val.f = constant                    */
 614
 615                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 616                         a = dseg_addfloat(cd, iptr->val.f);
 617                         M_FLD(d, REG_PV, a);
 618                         store_reg_to_var_flt(iptr->dst, d);
 619                         break;
 620
 621                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 622                                       /* op1 = 0, val.d = constant                    */
 623
 624                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 625                         a = dseg_adddouble(cd, iptr->val.d);
 626                         M_DLD(d, REG_PV, a);
 627                         store_reg_to_var_flt(iptr->dst, d);
 628                         break;
 629
 630                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 631                                       /* op1 = 0, val.a = constant                    */
 632
 633                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 634                         if (iptr->val.a) {
 635                                 a = dseg_addaddress(cd, iptr->val.a);
 636                                 M_ALD(d, REG_PV, a);
 637                         } else {
 638                                 M_INTMOVE(REG_ZERO, d);
 639                         }
 640                         store_reg_to_var_int(iptr->dst, d);
 641                         break;
 642
 643
 644                 /* load/store operations **********************************************/
 645
 646                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 647                 case ICMD_LLOAD:      /* op1 = local variable                         */
 648                 case ICMD_ALOAD:
 649
 650                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 651                         if ((iptr->dst->varkind == LOCALVAR) &&
 652                             (iptr->dst->varnum == iptr->op1))
 653                                 break;
 654                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 655                         if (var->flags & INMEMORY)
 656                                 M_LLD(d, REG_SP, 8 * var->regoff);
 657                         else
 658                                 {M_INTMOVE(var->regoff,d);}
 659                         store_reg_to_var_int(iptr->dst, d);
 660                         break;
 661
 662                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 663                 case ICMD_DLOAD:      /* op1 = local variable                         */
 664
 665                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 666                         if ((iptr->dst->varkind == LOCALVAR) &&
 667                             (iptr->dst->varnum == iptr->op1))
 668                                 break;
 669                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 670                         if (var->flags & INMEMORY)
 671                                 M_DLD(d, REG_SP, 8 * var->regoff);
 672                         else
 673                                 {M_FLTMOVE(var->regoff,d);}
 674                         store_reg_to_var_flt(iptr->dst, d);
 675                         break;
 676
 677
 678                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 679                 case ICMD_LSTORE:     /* op1 = local variable                         */
 680                 case ICMD_ASTORE:
 681
 682                         if ((src->varkind == LOCALVAR) &&
 683                             (src->varnum == iptr->op1))
 684                                 break;
 685                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 686                         if (var->flags & INMEMORY) {
 687                                 var_to_reg_int(s1, src, REG_ITMP1);
 688                                 M_LST(s1, REG_SP, 8 * var->regoff);
 689                                 }
 690                         else {
 691                                 var_to_reg_int(s1, src, var->regoff);
 692                                 M_INTMOVE(s1, var->regoff);
 693                                 }
 694                         break;
 695
 696                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 697                 case ICMD_DSTORE:     /* op1 = local variable                         */
 698
 699                         if ((src->varkind == LOCALVAR) &&
 700                             (src->varnum == iptr->op1))
 701                                 break;
 702                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 703                         if (var->flags & INMEMORY) {
 704                                 var_to_reg_flt(s1, src, REG_FTMP1);
 705                                 M_DST(s1, REG_SP, 8 * var->regoff);
 706                                 }
 707                         else {
 708                                 var_to_reg_flt(s1, src, var->regoff);
 709                                 M_FLTMOVE(s1, var->regoff);
 710                                 }
 711                         break;
 712
 713
 714                 /* pop/dup/swap operations ********************************************/
 715
 716                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 717
 718                 case ICMD_POP:        /* ..., value  ==> ...                          */
 719                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 720                         break;
 721
 722                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 723                         M_COPY(src, iptr->dst);
 724                         break;
 725
 726                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 727
 728                         M_COPY(src,       iptr->dst);
 729                         M_COPY(src->prev, iptr->dst->prev);
 730                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 731                         break;
 732
 733                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 734
 735                         M_COPY(src,             iptr->dst);
 736                         M_COPY(src->prev,       iptr->dst->prev);
 737                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 738                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 739                         break;
 740
 741                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 742
 743                         M_COPY(src,       iptr->dst);
 744                         M_COPY(src->prev, iptr->dst->prev);
 745                         break;
 746
 747                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 748
 749                         M_COPY(src,             iptr->dst);
 750                         M_COPY(src->prev,       iptr->dst->prev);
 751                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 752                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 753                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 754                         break;
 755
 756                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 757
 758                         M_COPY(src,                   iptr->dst);
 759                         M_COPY(src->prev,             iptr->dst->prev);
 760                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 761                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 762                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 763                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 764                         break;
 765
 766                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 767
 768                         M_COPY(src,       iptr->dst->prev);
 769                         M_COPY(src->prev, iptr->dst);
 770                         break;
 771
 772
 773                 /* integer operations *************************************************/
 774
 775                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 776
 777                         var_to_reg_int(s1, src, REG_ITMP1);
 778                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 779                         M_ISUB(REG_ZERO, s1, d);
 780                         store_reg_to_var_int(iptr->dst, d);
 781                         break;
 782
 783                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 784
 785                         var_to_reg_int(s1, src, REG_ITMP1);
 786                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 787                         M_LSUB(REG_ZERO, s1, d);
 788                         store_reg_to_var_int(iptr->dst, d);
 789                         break;
 790
 791                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 792
 793                         var_to_reg_int(s1, src, REG_ITMP1);
 794                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 795                         M_INTMOVE(s1, d);
 796                         store_reg_to_var_int(iptr->dst, d);
 797                         break;
 798
 799                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 800
 801                         var_to_reg_int(s1, src, REG_ITMP1);
 802                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 803                         M_IADD(s1, REG_ZERO, d );
 804                         store_reg_to_var_int(iptr->dst, d);
 805                         break;
 806
 807                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 808
 809                         var_to_reg_int(s1, src, REG_ITMP1);
 810                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 811                         if (has_ext_instr_set) {
 812                                 M_BSEXT(s1, d);
 813                                 }
 814                         else {
 815                                 M_SLL_IMM(s1, 56, d);
 816                                 M_SRA_IMM( d, 56, d);
 817                                 }
 818                         store_reg_to_var_int(iptr->dst, d);
 819                         break;
 820
 821                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 822
 823                         var_to_reg_int(s1, src, REG_ITMP1);
 824                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 825             M_CZEXT(s1, d);
 826                         store_reg_to_var_int(iptr->dst, d);
 827                         break;
 828
 829                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 830
 831                         var_to_reg_int(s1, src, REG_ITMP1);
 832                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 833                         if (has_ext_instr_set) {
 834                                 M_SSEXT(s1, d);
 835                                 }
 836                         else {
 837                                 M_SLL_IMM(s1, 48, d);
 838                                 M_SRA_IMM( d, 48, d);
 839                                 }
 840                         store_reg_to_var_int(iptr->dst, d);
 841                         break;
 842
 843
 844                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 845
 846                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 847                         var_to_reg_int(s2, src, REG_ITMP2);
 848                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 849                         M_IADD(s1, s2, d);
 850                         store_reg_to_var_int(iptr->dst, d);
 851                         break;
 852
 853                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 854                                       /* val.i = constant                             */
 855
 856                         var_to_reg_int(s1, src, REG_ITMP1);
 857                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 858                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 859                                 M_IADD_IMM(s1, iptr->val.i, d);
 860                                 }
 861                         else {
 862                                 ICONST(REG_ITMP2, iptr->val.i);
 863                                 M_IADD(s1, REG_ITMP2, d);
 864                                 }
 865                         store_reg_to_var_int(iptr->dst, d);
 866                         break;
 867
 868                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 869
 870                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 871                         var_to_reg_int(s2, src, REG_ITMP2);
 872                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 873                         M_LADD(s1, s2, d);
 874                         store_reg_to_var_int(iptr->dst, d);
 875                         break;
 876
 877                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 878                                       /* val.l = constant                             */
 879
 880                         var_to_reg_int(s1, src, REG_ITMP1);
 881                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 882                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 883                                 M_LADD_IMM(s1, iptr->val.l, d);
 884                                 }
 885                         else {
 886                                 LCONST(REG_ITMP2, iptr->val.l);
 887                                 M_LADD(s1, REG_ITMP2, d);
 888                                 }
 889                         store_reg_to_var_int(iptr->dst, d);
 890                         break;
 891
 892                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 893
 894                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 895                         var_to_reg_int(s2, src, REG_ITMP2);
 896                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 897                         M_ISUB(s1, s2, d);
 898                         store_reg_to_var_int(iptr->dst, d);
 899                         break;
 900
 901                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 902                                       /* val.i = constant                             */
 903
 904                         var_to_reg_int(s1, src, REG_ITMP1);
 905                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 906                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 907                                 M_ISUB_IMM(s1, iptr->val.i, d);
 908                                 }
 909                         else {
 910                                 ICONST(REG_ITMP2, iptr->val.i);
 911                                 M_ISUB(s1, REG_ITMP2, d);
 912                                 }
 913                         store_reg_to_var_int(iptr->dst, d);
 914                         break;
 915
 916                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 917
 918                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 919                         var_to_reg_int(s2, src, REG_ITMP2);
 920                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 921                         M_LSUB(s1, s2, d);
 922                         store_reg_to_var_int(iptr->dst, d);
 923                         break;
 924
 925                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 926                                       /* val.l = constant                             */
 927
 928                         var_to_reg_int(s1, src, REG_ITMP1);
 929                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 930                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 931                                 M_LSUB_IMM(s1, iptr->val.l, d);
 932                                 }
 933                         else {
 934                                 LCONST(REG_ITMP2, iptr->val.l);
 935                                 M_LSUB(s1, REG_ITMP2, d);
 936                                 }
 937                         store_reg_to_var_int(iptr->dst, d);
 938                         break;
 939
 940                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 941
 942                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 943                         var_to_reg_int(s2, src, REG_ITMP2);
 944                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 945                         M_IMUL(s1, s2, d);
 946                         store_reg_to_var_int(iptr->dst, d);
 947                         break;
 948
 949                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 950                                       /* val.i = constant                             */
 951
 952                         var_to_reg_int(s1, src, REG_ITMP1);
 953                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 954                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 955                                 M_IMUL_IMM(s1, iptr->val.i, d);
 956                                 }
 957                         else {
 958                                 ICONST(REG_ITMP2, iptr->val.i);
 959                                 M_IMUL(s1, REG_ITMP2, d);
 960                                 }
 961                         store_reg_to_var_int(iptr->dst, d);
 962                         break;
 963
 964                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 965
 966                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 967                         var_to_reg_int(s2, src, REG_ITMP2);
 968                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 969                         M_LMUL (s1, s2, d);
 970                         store_reg_to_var_int(iptr->dst, d);
 971                         break;
 972
 973                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 974                                       /* val.l = constant                             */
 975
 976                         var_to_reg_int(s1, src, REG_ITMP1);
 977                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 978                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 979                                 M_LMUL_IMM(s1, iptr->val.l, d);
 980                                 }
 981                         else {
 982                                 LCONST(REG_ITMP2, iptr->val.l);
 983                                 M_LMUL(s1, REG_ITMP2, d);
 984                                 }
 985                         store_reg_to_var_int(iptr->dst, d);
 986                         break;
 987
 988                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 989                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 990
 991                         var_to_reg_int(s1, src, REG_ITMP1);
 992                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 993                         if (iptr->val.i <= 15) {
 994                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
 995                                 M_CMOVGE(s1, s1, REG_ITMP2);
 996                                 }
 997                         else {
 998                                 M_SRA_IMM(s1, 63, REG_ITMP2);
 999                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1000                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
1001                                 }
1002                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
1003                         store_reg_to_var_int(iptr->dst, d);
1004                         break;
1005
1006                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1007
1008                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1009                         var_to_reg_int(s2, src, REG_ITMP2);
1010                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1011                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1012                         M_SLL(s1, REG_ITMP3, d);
1013                         M_IADD(d, REG_ZERO, d);
1014                         store_reg_to_var_int(iptr->dst, d);
1015                         break;
1016
1017                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1018                                       /* val.i = constant                             */
1019
1020                         var_to_reg_int(s1, src, REG_ITMP1);
1021                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1022                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1023                         M_IADD(d, REG_ZERO, d);
1024                         store_reg_to_var_int(iptr->dst, d);
1025                         break;
1026
1027                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1028
1029                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1030                         var_to_reg_int(s2, src, REG_ITMP2);
1031                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1032                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1033                         M_SRA(s1, REG_ITMP3, d);
1034                         store_reg_to_var_int(iptr->dst, d);
1035                         break;
1036
1037                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1038                                       /* val.i = constant                             */
1039
1040                         var_to_reg_int(s1, src, REG_ITMP1);
1041                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1042                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1043                         store_reg_to_var_int(iptr->dst, d);
1044                         break;
1045
1046                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1047
1048                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1049                         var_to_reg_int(s2, src, REG_ITMP2);
1050                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1051                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1052             M_IZEXT(s1, d);
1053                         M_SRL(d, REG_ITMP2, d);
1054                         M_IADD(d, REG_ZERO, d);
1055                         store_reg_to_var_int(iptr->dst, d);
1056                         break;
1057
1058                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1059                                       /* val.i = constant                             */
1060
1061                         var_to_reg_int(s1, src, REG_ITMP1);
1062                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1063             M_IZEXT(s1, d);
1064                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1065                         M_IADD(d, REG_ZERO, d);
1066                         store_reg_to_var_int(iptr->dst, d);
1067                         break;
1068
1069                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1070
1071                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1072                         var_to_reg_int(s2, src, REG_ITMP2);
1073                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1074                         M_SLL(s1, s2, d);
1075                         store_reg_to_var_int(iptr->dst, d);
1076                         break;
1077
1078                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1079                                       /* val.i = constant                             */
1080
1081                         var_to_reg_int(s1, src, REG_ITMP1);
1082                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1083                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1084                         store_reg_to_var_int(iptr->dst, d);
1085                         break;
1086
1087                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1088
1089                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1090                         var_to_reg_int(s2, src, REG_ITMP2);
1091                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1092                         M_SRA(s1, s2, d);
1093                         store_reg_to_var_int(iptr->dst, d);
1094                         break;
1095
1096                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1097                                       /* val.i = constant                             */
1098
1099                         var_to_reg_int(s1, src, REG_ITMP1);
1100                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1101                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1102                         store_reg_to_var_int(iptr->dst, d);
1103                         break;
1104
1105                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1106
1107                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1108                         var_to_reg_int(s2, src, REG_ITMP2);
1109                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1110                         M_SRL(s1, s2, d);
1111                         store_reg_to_var_int(iptr->dst, d);
1112                         break;
1113
1114                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1115                                       /* val.i = constant                             */
1116
1117                         var_to_reg_int(s1, src, REG_ITMP1);
1118                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1119                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1120                         store_reg_to_var_int(iptr->dst, d);
1121                         break;
1122
1123                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1124                 case ICMD_LAND:
1125
1126                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1127                         var_to_reg_int(s2, src, REG_ITMP2);
1128                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1129                         M_AND(s1, s2, d);
1130                         store_reg_to_var_int(iptr->dst, d);
1131                         break;
1132
1133                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1134                                       /* val.i = constant                             */
1135
1136                         var_to_reg_int(s1, src, REG_ITMP1);
1137                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1138                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1139                                 M_AND_IMM(s1, iptr->val.i, d);
1140                                 }
1141                         else if (iptr->val.i == 0xffff) {
1142                                 M_CZEXT(s1, d);
1143                                 }
1144                         else if (iptr->val.i == 0xffffff) {
1145                                 M_ZAPNOT_IMM(s1, 0x07, d);
1146                                 }
1147                         else {
1148                                 ICONST(REG_ITMP2, iptr->val.i);
1149                                 M_AND(s1, REG_ITMP2, d);
1150                                 }
1151                         store_reg_to_var_int(iptr->dst, d);
1152                         break;
1153
1154                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1155                                       /* val.i = constant                             */
1156
1157                         var_to_reg_int(s1, src, REG_ITMP1);
1158                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1159                         if (s1 == d) {
1160                                 M_MOV(s1, REG_ITMP1);
1161                                 s1 = REG_ITMP1;
1162                                 }
1163                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1164                                 M_AND_IMM(s1, iptr->val.i, d);
1165                                 M_BGEZ(s1, 3);
1166                                 M_ISUB(REG_ZERO, s1, d);
1167                                 M_AND_IMM(d, iptr->val.i, d);
1168                                 }
1169                         else if (iptr->val.i == 0xffff) {
1170                                 M_CZEXT(s1, d);
1171                                 M_BGEZ(s1, 3);
1172                                 M_ISUB(REG_ZERO, s1, d);
1173                                 M_CZEXT(d, d);
1174                                 }
1175                         else if (iptr->val.i == 0xffffff) {
1176                                 M_ZAPNOT_IMM(s1, 0x07, d);
1177                                 M_BGEZ(s1, 3);
1178                                 M_ISUB(REG_ZERO, s1, d);
1179                                 M_ZAPNOT_IMM(d, 0x07, d);
1180                                 }
1181                         else {
1182                                 ICONST(REG_ITMP2, iptr->val.i);
1183                                 M_AND(s1, REG_ITMP2, d);
1184                                 M_BGEZ(s1, 3);
1185                                 M_ISUB(REG_ZERO, s1, d);
1186                                 M_AND(d, REG_ITMP2, d);
1187                                 }
1188                         M_ISUB(REG_ZERO, d, d);
1189                         store_reg_to_var_int(iptr->dst, d);
1190                         break;
1191
1192                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1193                                       /* val.l = constant                             */
1194
1195                         var_to_reg_int(s1, src, REG_ITMP1);
1196                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1197                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1198                                 M_AND_IMM(s1, iptr->val.l, d);
1199                                 }
1200                         else if (iptr->val.l == 0xffffL) {
1201                                 M_CZEXT(s1, d);
1202                                 }
1203                         else if (iptr->val.l == 0xffffffL) {
1204                                 M_ZAPNOT_IMM(s1, 0x07, d);
1205                                 }
1206                         else if (iptr->val.l == 0xffffffffL) {
1207                                 M_IZEXT(s1, d);
1208                                 }
1209                         else if (iptr->val.l == 0xffffffffffL) {
1210                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1211                                 }
1212                         else if (iptr->val.l == 0xffffffffffffL) {
1213                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1214                                 }
1215                         else if (iptr->val.l == 0xffffffffffffffL) {
1216                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1217                                 }
1218                         else {
1219                                 LCONST(REG_ITMP2, iptr->val.l);
1220                                 M_AND(s1, REG_ITMP2, d);
1221                                 }
1222                         store_reg_to_var_int(iptr->dst, d);
1223                         break;
1224
1225                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1226                                       /* val.l = constant                             */
1227
1228                         var_to_reg_int(s1, src, REG_ITMP1);
1229                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1230                         if (s1 == d) {
1231                                 M_MOV(s1, REG_ITMP1);
1232                                 s1 = REG_ITMP1;
1233                                 }
1234                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1235                                 M_AND_IMM(s1, iptr->val.l, d);
1236                                 M_BGEZ(s1, 3);
1237                                 M_LSUB(REG_ZERO, s1, d);
1238                                 M_AND_IMM(d, iptr->val.l, d);
1239                                 }
1240                         else if (iptr->val.l == 0xffffL) {
1241                                 M_CZEXT(s1, d);
1242                                 M_BGEZ(s1, 3);
1243                                 M_LSUB(REG_ZERO, s1, d);
1244                                 M_CZEXT(d, d);
1245                                 }
1246                         else if (iptr->val.l == 0xffffffL) {
1247                                 M_ZAPNOT_IMM(s1, 0x07, d);
1248                                 M_BGEZ(s1, 3);
1249                                 M_LSUB(REG_ZERO, s1, d);
1250                                 M_ZAPNOT_IMM(d, 0x07, d);
1251                                 }
1252                         else if (iptr->val.l == 0xffffffffL) {
1253                                 M_IZEXT(s1, d);
1254                                 M_BGEZ(s1, 3);
1255                                 M_LSUB(REG_ZERO, s1, d);
1256                                 M_IZEXT(d, d);
1257                                 }
1258                         else if (iptr->val.l == 0xffffffffffL) {
1259                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1260                                 M_BGEZ(s1, 3);
1261                                 M_LSUB(REG_ZERO, s1, d);
1262                                 M_ZAPNOT_IMM(d, 0x1f, d);
1263                                 }
1264                         else if (iptr->val.l == 0xffffffffffffL) {
1265                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1266                                 M_BGEZ(s1, 3);
1267                                 M_LSUB(REG_ZERO, s1, d);
1268                                 M_ZAPNOT_IMM(d, 0x3f, d);
1269                                 }
1270                         else if (iptr->val.l == 0xffffffffffffffL) {
1271                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1272                                 M_BGEZ(s1, 3);
1273                                 M_LSUB(REG_ZERO, s1, d);
1274                                 M_ZAPNOT_IMM(d, 0x7f, d);
1275                                 }
1276                         else {
1277                                 LCONST(REG_ITMP2, iptr->val.l);
1278                                 M_AND(s1, REG_ITMP2, d);
1279                                 M_BGEZ(s1, 3);
1280                                 M_LSUB(REG_ZERO, s1, d);
1281                                 M_AND(d, REG_ITMP2, d);
1282                                 }
1283                         M_LSUB(REG_ZERO, d, d);
1284                         store_reg_to_var_int(iptr->dst, d);
1285                         break;
1286
1287                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1288                 case ICMD_LOR:
1289
1290                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1291                         var_to_reg_int(s2, src, REG_ITMP2);
1292                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1293                         M_OR( s1,s2, d);
1294                         store_reg_to_var_int(iptr->dst, d);
1295                         break;
1296
1297                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1298                                       /* val.i = constant                             */
1299
1300                         var_to_reg_int(s1, src, REG_ITMP1);
1301                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1302                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1303                                 M_OR_IMM(s1, iptr->val.i, d);
1304                                 }
1305                         else {
1306                                 ICONST(REG_ITMP2, iptr->val.i);
1307                                 M_OR(s1, REG_ITMP2, d);
1308                                 }
1309                         store_reg_to_var_int(iptr->dst, d);
1310                         break;
1311
1312                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1313                                       /* val.l = constant                             */
1314
1315                         var_to_reg_int(s1, src, REG_ITMP1);
1316                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1317                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1318                                 M_OR_IMM(s1, iptr->val.l, d);
1319                                 }
1320                         else {
1321                                 LCONST(REG_ITMP2, iptr->val.l);
1322                                 M_OR(s1, REG_ITMP2, d);
1323                                 }
1324                         store_reg_to_var_int(iptr->dst, d);
1325                         break;
1326
1327                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1328                 case ICMD_LXOR:
1329
1330                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1331                         var_to_reg_int(s2, src, REG_ITMP2);
1332                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1333                         M_XOR(s1, s2, d);
1334                         store_reg_to_var_int(iptr->dst, d);
1335                         break;
1336
1337                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1338                                       /* val.i = constant                             */
1339
1340                         var_to_reg_int(s1, src, REG_ITMP1);
1341                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1342                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1343                                 M_XOR_IMM(s1, iptr->val.i, d);
1344                                 }
1345                         else {
1346                                 ICONST(REG_ITMP2, iptr->val.i);
1347                                 M_XOR(s1, REG_ITMP2, d);
1348                                 }
1349                         store_reg_to_var_int(iptr->dst, d);
1350                         break;
1351
1352                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1353                                       /* val.l = constant                             */
1354
1355                         var_to_reg_int(s1, src, REG_ITMP1);
1356                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1357                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1358                                 M_XOR_IMM(s1, iptr->val.l, d);
1359                                 }
1360                         else {
1361                                 LCONST(REG_ITMP2, iptr->val.l);
1362                                 M_XOR(s1, REG_ITMP2, d);
1363                                 }
1364                         store_reg_to_var_int(iptr->dst, d);
1365                         break;
1366
1367
1368                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1369
1370                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1371                         var_to_reg_int(s2, src, REG_ITMP2);
1372                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1373                         M_CMPLT(s1, s2, REG_ITMP3);
1374                         M_CMPLT(s2, s1, REG_ITMP1);
1375                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1376                         store_reg_to_var_int(iptr->dst, d);
1377                         break;
1378
1379
1380                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1381                                       /* op1 = variable, val.i = constant             */
1382
1383                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1384                         if (var->flags & INMEMORY) {
1385                                 s1 = REG_ITMP1;
1386                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1387                                 }
1388                         else
1389                                 s1 = var->regoff;
1390                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1391                                 M_IADD_IMM(s1, iptr->val.i, s1);
1392                                 }
1393                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1394                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1395                                 }
1396                         else {
1397                                 M_LDA (s1, s1, iptr->val.i);
1398                                 M_IADD(s1, REG_ZERO, s1);
1399                                 }
1400                         if (var->flags & INMEMORY)
1401                                 M_LST(s1, REG_SP, 8 * var->regoff);
1402                         break;
1403
1404
1405                 /* floating operations ************************************************/
1406
1407                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1408
1409                         var_to_reg_flt(s1, src, REG_FTMP1);
1410                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1411                         M_FMOVN(s1, d);
1412                         store_reg_to_var_flt(iptr->dst, d);
1413                         break;
1414
1415                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1416
1417                         var_to_reg_flt(s1, src, REG_FTMP1);
1418                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1419                         M_FMOVN(s1, d);
1420                         store_reg_to_var_flt(iptr->dst, d);
1421                         break;
1422
1423                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1424
1425                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1426                         var_to_reg_flt(s2, src, REG_FTMP2);
1427                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1428                         if (opt_noieee) {
1429                                 M_FADD(s1, s2, d);
1430                                 }
1431                         else {
1432                                 if (d == s1 || d == s2) {
1433                                         M_FADDS(s1, s2, REG_FTMP3);
1434                                         M_TRAPB;
1435                                         M_FMOV(REG_FTMP3, d);
1436                                         }
1437                                 else {
1438                                         M_FADDS(s1, s2, d);
1439                                         M_TRAPB;
1440                                         }
1441                                 }
1442                         store_reg_to_var_flt(iptr->dst, d);
1443                         break;
1444
1445                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1446
1447                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1448                         var_to_reg_flt(s2, src, REG_FTMP2);
1449                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1450                         if (opt_noieee) {
1451                                 M_DADD(s1, s2, d);
1452                                 }
1453                         else {
1454                                 if (d == s1 || d == s2) {
1455                                         M_DADDS(s1, s2, REG_FTMP3);
1456                                         M_TRAPB;
1457                                         M_FMOV(REG_FTMP3, d);
1458                                         }
1459                                 else {
1460                                         M_DADDS(s1, s2, d);
1461                                         M_TRAPB;
1462                                         }
1463                                 }
1464                         store_reg_to_var_flt(iptr->dst, d);
1465                         break;
1466
1467                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1468
1469                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1470                         var_to_reg_flt(s2, src, REG_FTMP2);
1471                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1472                         if (opt_noieee) {
1473                                 M_FSUB(s1, s2, d);
1474                                 }
1475                         else {
1476                                 if (d == s1 || d == s2) {
1477                                         M_FSUBS(s1, s2, REG_FTMP3);
1478                                         M_TRAPB;
1479                                         M_FMOV(REG_FTMP3, d);
1480                                         }
1481                                 else {
1482                                         M_FSUBS(s1, s2, d);
1483                                         M_TRAPB;
1484                                         }
1485                                 }
1486                         store_reg_to_var_flt(iptr->dst, d);
1487                         break;
1488
1489                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1490
1491                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1492                         var_to_reg_flt(s2, src, REG_FTMP2);
1493                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1494                         if (opt_noieee) {
1495                                 M_DSUB(s1, s2, d);
1496                                 }
1497                         else {
1498                                 if (d == s1 || d == s2) {
1499                                         M_DSUBS(s1, s2, REG_FTMP3);
1500                                         M_TRAPB;
1501                                         M_FMOV(REG_FTMP3, d);
1502                                         }
1503                                 else {
1504                                         M_DSUBS(s1, s2, d);
1505                                         M_TRAPB;
1506                                         }
1507                                 }
1508                         store_reg_to_var_flt(iptr->dst, d);
1509                         break;
1510
1511                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1512
1513                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1514                         var_to_reg_flt(s2, src, REG_FTMP2);
1515                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1516                         if (opt_noieee) {
1517                                 M_FMUL(s1, s2, d);
1518                                 }
1519                         else {
1520                                 if (d == s1 || d == s2) {
1521                                         M_FMULS(s1, s2, REG_FTMP3);
1522                                         M_TRAPB;
1523                                         M_FMOV(REG_FTMP3, d);
1524                                         }
1525                                 else {
1526                                         M_FMULS(s1, s2, d);
1527                                         M_TRAPB;
1528                                         }
1529                                 }
1530                         store_reg_to_var_flt(iptr->dst, d);
1531                         break;
1532
1533                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1534
1535                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1536                         var_to_reg_flt(s2, src, REG_FTMP2);
1537                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1538                         if (opt_noieee) {
1539                                 M_DMUL(s1, s2, d);
1540                                 }
1541                         else {
1542                                 if (d == s1 || d == s2) {
1543                                         M_DMULS(s1, s2, REG_FTMP3);
1544                                         M_TRAPB;
1545                                         M_FMOV(REG_FTMP3, d);
1546                                         }
1547                                 else {
1548                                         M_DMULS(s1, s2, d);
1549                                         M_TRAPB;
1550                                         }
1551                                 }
1552                         store_reg_to_var_flt(iptr->dst, d);
1553                         break;
1554
1555                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1556
1557                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1558                         var_to_reg_flt(s2, src, REG_FTMP2);
1559                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1560                         if (opt_noieee) {
1561                                 M_FDIV(s1, s2, d);
1562                                 }
1563                         else {
1564                                 if (d == s1 || d == s2) {
1565                                         M_FDIVS(s1, s2, REG_FTMP3);
1566                                         M_TRAPB;
1567                                         M_FMOV(REG_FTMP3, d);
1568                                         }
1569                                 else {
1570                                         M_FDIVS(s1, s2, d);
1571                                         M_TRAPB;
1572                                         }
1573                                 }
1574                         store_reg_to_var_flt(iptr->dst, d);
1575                         break;
1576
1577                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1578
1579                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1580                         var_to_reg_flt(s2, src, REG_FTMP2);
1581                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1582                         if (opt_noieee) {
1583                                 M_DDIV(s1, s2, d);
1584                                 }
1585                         else {
1586                                 if (d == s1 || d == s2) {
1587                                         M_DDIVS(s1, s2, REG_FTMP3);
1588                                         M_TRAPB;
1589                                         M_FMOV(REG_FTMP3, d);
1590                                         }
1591                                 else {
1592                                         M_DDIVS(s1, s2, d);
1593                                         M_TRAPB;
1594                                         }
1595                                 }
1596                         store_reg_to_var_flt(iptr->dst, d);
1597                         break;
1598
1599                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1600                 case ICMD_L2F:
1601                         var_to_reg_int(s1, src, REG_ITMP1);
1602                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1603                         a = dseg_adddouble(cd, 0.0);
1604                         M_LST (s1, REG_PV, a);
1605                         M_DLD (d, REG_PV, a);
1606                         M_CVTLF(d, d);
1607                         store_reg_to_var_flt(iptr->dst, d);
1608                         break;
1609
1610                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1611                 case ICMD_L2D:
1612                         var_to_reg_int(s1, src, REG_ITMP1);
1613                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1614                         a = dseg_adddouble(cd, 0.0);
1615                         M_LST (s1, REG_PV, a);
1616                         M_DLD (d, REG_PV, a);
1617                         M_CVTLD(d, d);
1618                         store_reg_to_var_flt(iptr->dst, d);
1619                         break;
1620
1621                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1622                 case ICMD_D2I:
1623                         var_to_reg_flt(s1, src, REG_FTMP1);
1624                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1625                         a = dseg_adddouble(cd, 0.0);
1626                         M_CVTDL_C(s1, REG_FTMP2);
1627                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1628                         M_DST (REG_FTMP3, REG_PV, a);
1629                         M_ILD (d, REG_PV, a);
1630                         store_reg_to_var_int(iptr->dst, d);
1631                         break;
1632
1633                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1634                 case ICMD_D2L:
1635                         var_to_reg_flt(s1, src, REG_FTMP1);
1636                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1637                         a = dseg_adddouble(cd, 0.0);
1638                         M_CVTDL_C(s1, REG_FTMP2);
1639                         M_DST (REG_FTMP2, REG_PV, a);
1640                         M_LLD (d, REG_PV, a);
1641                         store_reg_to_var_int(iptr->dst, d);
1642                         break;
1643
1644                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1645
1646                         var_to_reg_flt(s1, src, REG_FTMP1);
1647                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1648                         M_CVTFDS(s1, d);
1649                         M_TRAPB;
1650                         store_reg_to_var_flt(iptr->dst, d);
1651                         break;
1652
1653                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1654
1655                         var_to_reg_flt(s1, src, REG_FTMP1);
1656                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1657                         if (opt_noieee) {
1658                                 M_CVTDF(s1, d);
1659                                 }
1660                         else {
1661                                 M_CVTDFS(s1, d);
1662                                 M_TRAPB;
1663                                 }
1664                         store_reg_to_var_flt(iptr->dst, d);
1665                         break;
1666
1667                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1668                 case ICMD_DCMPL:
1669                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1670                         var_to_reg_flt(s2, src, REG_FTMP2);
1671                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1672                         if (opt_noieee) {
1673                                 M_LSUB_IMM(REG_ZERO, 1, d);
1674                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1675                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1676                                 M_CLR   (d);
1677                                 M_FCMPLT(s2, s1, REG_FTMP3);
1678                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1679                                 M_LADD_IMM(REG_ZERO, 1, d);
1680                                 }
1681                         else {
1682                                 M_LSUB_IMM(REG_ZERO, 1, d);
1683                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1684                                 M_TRAPB;
1685                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1686                                 M_CLR   (d);
1687                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1688                                 M_TRAPB;
1689                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1690                                 M_LADD_IMM(REG_ZERO, 1, d);
1691                                 }
1692                         store_reg_to_var_int(iptr->dst, d);
1693                         break;
1694
1695                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1696                 case ICMD_DCMPG:
1697                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1698                         var_to_reg_flt(s2, src, REG_FTMP2);
1699                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1700                         if (opt_noieee) {
1701                                 M_LADD_IMM(REG_ZERO, 1, d);
1702                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1703                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1704                                 M_CLR   (d);
1705                                 M_FCMPLT(s1, s2, REG_FTMP3);
1706                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1707                                 M_LSUB_IMM(REG_ZERO, 1, d);
1708                                 }
1709                         else {
1710                                 M_LADD_IMM(REG_ZERO, 1, d);
1711                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1712                                 M_TRAPB;
1713                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1714                                 M_CLR   (d);
1715                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1716                                 M_TRAPB;
1717                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1718                                 M_LSUB_IMM(REG_ZERO, 1, d);
1719                                 }
1720                         store_reg_to_var_int(iptr->dst, d);
1721                         break;
1722
1723
1724                 /* memory operations **************************************************/
1725
1726                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1727
1728                         var_to_reg_int(s1, src, REG_ITMP1);
1729                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1730                         gen_nullptr_check(s1);
1731                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1732                         store_reg_to_var_int(iptr->dst, d);
1733                         break;
1734
1735                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1736
1737                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1738                         var_to_reg_int(s2, src, REG_ITMP2);
1739                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1740                         if (iptr->op1 == 0) {
1741                                 gen_nullptr_check(s1);
1742                                 gen_bound_check;
1743                                 }
1744                         M_SAADDQ(s2, s1, REG_ITMP1);
1745                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1746                         store_reg_to_var_int(iptr->dst, d);
1747                         break;
1748
1749                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1750
1751                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1752                         var_to_reg_int(s2, src, REG_ITMP2);
1753                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1754                         if (iptr->op1 == 0) {
1755                                 gen_nullptr_check(s1);
1756                                 gen_bound_check;
1757                                 }
1758                         M_S8ADDQ(s2, s1, REG_ITMP1);
1759                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1760                         store_reg_to_var_int(iptr->dst, d);
1761                         break;
1762
1763                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1764
1765                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1766                         var_to_reg_int(s2, src, REG_ITMP2);
1767                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1768                         if (iptr->op1 == 0) {
1769                                 gen_nullptr_check(s1);
1770                                 gen_bound_check;
1771                                 }
1772
1773                         M_S4ADDQ(s2, s1, REG_ITMP1);
1774                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1775                         store_reg_to_var_int(iptr->dst, d);
1776                         break;
1777
1778                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1779
1780                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1781                         var_to_reg_int(s2, src, REG_ITMP2);
1782                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1783                         if (iptr->op1 == 0) {
1784                                 gen_nullptr_check(s1);
1785                                 gen_bound_check;
1786                                 }
1787                         M_S4ADDQ(s2, s1, REG_ITMP1);
1788                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1789                         store_reg_to_var_flt(iptr->dst, d);
1790                         break;
1791
1792                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1793
1794                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1795                         var_to_reg_int(s2, src, REG_ITMP2);
1796                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1797                         if (iptr->op1 == 0) {
1798                                 gen_nullptr_check(s1);
1799                                 gen_bound_check;
1800                                 }
1801                         M_S8ADDQ(s2, s1, REG_ITMP1);
1802                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1803                         store_reg_to_var_flt(iptr->dst, d);
1804                         break;
1805
1806                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1807
1808                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1809                         var_to_reg_int(s2, src, REG_ITMP2);
1810                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1811                         if (iptr->op1 == 0) {
1812                                 gen_nullptr_check(s1);
1813                                 gen_bound_check;
1814                                 }
1815                         if (has_ext_instr_set) {
1816                                 M_LADD(s2, s1, REG_ITMP1);
1817                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1818                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1819                                 }
1820                         else {
1821                                 M_LADD (s2, s1, REG_ITMP1);
1822                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1823                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1824                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1825                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1826                                 }
1827                         store_reg_to_var_int(iptr->dst, d);
1828                         break;
1829
1830                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1831
1832                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1833                         var_to_reg_int(s2, src, REG_ITMP2);
1834                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1835                         if (iptr->op1 == 0) {
1836                                 gen_nullptr_check(s1);
1837                                 gen_bound_check;
1838                                 }
1839                         if (has_ext_instr_set) {
1840                                 M_LADD(s2, s1, REG_ITMP1);
1841                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1842                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1843                                 M_SSEXT(d, d);
1844                                 }
1845                         else {
1846                                 M_LADD(s2, s1, REG_ITMP1);
1847                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1848                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1849                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1850                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1851                                 M_SRA_IMM(d, 48, d);
1852                                 }
1853                         store_reg_to_var_int(iptr->dst, d);
1854                         break;
1855
1856                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1857
1858                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1859                         var_to_reg_int(s2, src, REG_ITMP2);
1860                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1861                         if (iptr->op1 == 0) {
1862                                 gen_nullptr_check(s1);
1863                                 gen_bound_check;
1864                                 }
1865                         if (has_ext_instr_set) {
1866                                 M_LADD   (s2, s1, REG_ITMP1);
1867                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1868                                 M_BSEXT  (d, d);
1869                                 }
1870                         else {
1871                                 M_LADD(s2, s1, REG_ITMP1);
1872                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1873                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1874                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1875                                 M_SRA_IMM(d, 56, d);
1876                                 }
1877                         store_reg_to_var_int(iptr->dst, d);
1878                         break;
1879
1880
1881                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1882
1883                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1884                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1885                         if (iptr->op1 == 0) {
1886                                 gen_nullptr_check(s1);
1887                                 gen_bound_check;
1888                                 }
1889                         var_to_reg_int(s3, src, REG_ITMP3);
1890                         M_SAADDQ(s2, s1, REG_ITMP1);
1891                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1892                         break;
1893
1894                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1895
1896                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1897                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1898                         if (iptr->op1 == 0) {
1899                                 gen_nullptr_check(s1);
1900                                 gen_bound_check;
1901                                 }
1902                         var_to_reg_int(s3, src, REG_ITMP3);
1903                         M_S8ADDQ(s2, s1, REG_ITMP1);
1904                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1905                         break;
1906
1907                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1908
1909                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1910                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1911                         if (iptr->op1 == 0) {
1912                                 gen_nullptr_check(s1);
1913                                 gen_bound_check;
1914                                 }
1915
1916                         var_to_reg_int(s3, src, REG_ITMP3);
1917                         M_S4ADDQ(s2, s1, REG_ITMP1);
1918                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1919                         break;
1920
1921                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1922
1923                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1924                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1925                         if (iptr->op1 == 0) {
1926                                 gen_nullptr_check(s1);
1927                                 gen_bound_check;
1928                                 }
1929                         var_to_reg_flt(s3, src, REG_FTMP3);
1930                         M_S4ADDQ(s2, s1, REG_ITMP1);
1931                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1932                         break;
1933
1934                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1935
1936                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1937                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1938                         if (iptr->op1 == 0) {
1939                                 gen_nullptr_check(s1);
1940                                 gen_bound_check;
1941                                 }
1942                         var_to_reg_flt(s3, src, REG_FTMP3);
1943                         M_S8ADDQ(s2, s1, REG_ITMP1);
1944                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1945                         break;
1946
1947                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1948
1949                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1950                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1951                         if (iptr->op1 == 0) {
1952                                 gen_nullptr_check(s1);
1953                                 gen_bound_check;
1954                                 }
1955                         var_to_reg_int(s3, src, REG_ITMP3);
1956                         if (has_ext_instr_set) {
1957                                 M_LADD(s2, s1, REG_ITMP1);
1958                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1959                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1960                                 }
1961                         else {
1962                                 M_LADD (s2, s1, REG_ITMP1);
1963                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1964                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1965                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1966                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1967                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1968                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1969                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1970                                 }
1971                         break;
1972
1973                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1974
1975                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1976                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1977                         if (iptr->op1 == 0) {
1978                                 gen_nullptr_check(s1);
1979                                 gen_bound_check;
1980                                 }
1981                         var_to_reg_int(s3, src, REG_ITMP3);
1982                         if (has_ext_instr_set) {
1983                                 M_LADD(s2, s1, REG_ITMP1);
1984                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1985                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1986                                 }
1987                         else {
1988                                 M_LADD (s2, s1, REG_ITMP1);
1989                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1990                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1991                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1992                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1993                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1994                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1995                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1996                                 }
1997                         break;
1998
1999                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2000
2001                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2002                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2003                         if (iptr->op1 == 0) {
2004                                 gen_nullptr_check(s1);
2005                                 gen_bound_check;
2006                                 }
2007                         var_to_reg_int(s3, src, REG_ITMP3);
2008                         if (has_ext_instr_set) {
2009                                 M_LADD(s2, s1, REG_ITMP1);
2010                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2011                                 }
2012                         else {
2013                                 M_LADD (s2, s1, REG_ITMP1);
2014                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2015                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2016                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
2017                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2018                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2019                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2020                                 }
2021                         break;
2022
2023
2024                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
2025
2026                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2027                         var_to_reg_int(s2, src, REG_ITMP2);
2028                         if (iptr->op1 == 0) {
2029                                 gen_nullptr_check(s1);
2030                                 gen_bound_check;
2031                         }
2032                         M_S4ADDQ(s2, s1, REG_ITMP1);
2033                         M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
2034                         break;
2035
2036                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
2037
2038                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2039                         var_to_reg_int(s2, src, REG_ITMP2);
2040                         if (iptr->op1 == 0) {
2041                                 gen_nullptr_check(s1);
2042                                 gen_bound_check;
2043                         }
2044                         M_S8ADDQ(s2, s1, REG_ITMP1);
2045                         M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
2046                         break;
2047
2048                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
2049
2050                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2051                         var_to_reg_int(s2, src, REG_ITMP2);
2052                         if (iptr->op1 == 0) {
2053                                 gen_nullptr_check(s1);
2054                                 gen_bound_check;
2055                         }
2056                         M_SAADDQ(s2, s1, REG_ITMP1);
2057                         M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2058                         break;
2059
2060                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
2061
2062                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2063                         var_to_reg_int(s2, src, REG_ITMP2);
2064                         if (iptr->op1 == 0) {
2065                                 gen_nullptr_check(s1);
2066                                 gen_bound_check;
2067                         }
2068                         if (has_ext_instr_set) {
2069                                 M_LADD(s2, s1, REG_ITMP1);
2070                                 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2071
2072                         } else {
2073                                 M_LADD(s2, s1, REG_ITMP1);
2074                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2075                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2076                                 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2077                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2078                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2079                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2080                         }
2081                         break;
2082
2083                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
2084
2085                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2086                         var_to_reg_int(s2, src, REG_ITMP2);
2087                         if (iptr->op1 == 0) {
2088                                 gen_nullptr_check(s1);
2089                                 gen_bound_check;
2090                         }
2091                         if (has_ext_instr_set) {
2092                                 M_LADD(s2, s1, REG_ITMP1);
2093                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2094                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
2095
2096                         } else {
2097                                 M_LADD(s2, s1, REG_ITMP1);
2098                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2099                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2100                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2101                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2102                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2103                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2104                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2105                         }
2106                         break;
2107
2108                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
2109
2110                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2111                         var_to_reg_int(s2, src, REG_ITMP2);
2112                         if (iptr->op1 == 0) {
2113                                 gen_nullptr_check(s1);
2114                                 gen_bound_check;
2115                         }
2116                         if (has_ext_instr_set) {
2117                                 M_LADD(s2, s1, REG_ITMP1);
2118                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2119                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2120
2121                         } else {
2122                                 M_LADD(s2, s1, REG_ITMP1);
2123                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2124                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2125                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2126                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2127                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2128                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2129                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2130                         }
2131                         break;
2132
2133
2134                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2135                                       /* op1 = type, val.a = field address            */
2136
2137                         /* If the static fields' class is not yet initialized, we do it   */
2138                         /* now. The call code is generated later.                         */
2139                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2140                                 codegen_addclinitref(cd, mcodeptr, ((fieldinfo *) iptr->val.a)->class);
2141
2142                                 /* This is just for debugging purposes. Is very difficult to  */
2143                                 /* read patched code. Here we patch the following 2 nop's     */
2144                                 /* so that the real code keeps untouched.                     */
2145                                 if (showdisassemble) {
2146                                         M_NOP;
2147                                 }
2148                         }
2149
2150                         a = dseg_addaddress(cd, &(((fieldinfo *)(iptr->val.a))->value));
2151                         M_ALD(REG_ITMP1, REG_PV, a);
2152                         switch (iptr->op1) {
2153                                 case TYPE_INT:
2154                                         var_to_reg_int(s2, src, REG_ITMP2);
2155                                         M_IST(s2, REG_ITMP1, 0);
2156                                         break;
2157                                 case TYPE_LNG:
2158                                         var_to_reg_int(s2, src, REG_ITMP2);
2159                                         M_LST(s2, REG_ITMP1, 0);
2160                                         break;
2161                                 case TYPE_ADR:
2162                                         var_to_reg_int(s2, src, REG_ITMP2);
2163                                         M_AST(s2, REG_ITMP1, 0);
2164                                         break;
2165                                 case TYPE_FLT:
2166                                         var_to_reg_flt(s2, src, REG_FTMP2);
2167                                         M_FST(s2, REG_ITMP1, 0);
2168                                         break;
2169                                 case TYPE_DBL:
2170                                         var_to_reg_flt(s2, src, REG_FTMP2);
2171                                         M_DST(s2, REG_ITMP1, 0);
2172                                         break;
2173                                 default: panic ("internal error");
2174                                 }
2175                         break;
2176
2177                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2178                                       /* op1 = type, val.a = field address            */
2179
2180                         /* if class isn't yet initialized, do it */
2181                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2182                                 codegen_addclinitref(cd, mcodeptr, ((fieldinfo *) iptr->val.a)->class);
2183
2184                                 /* This is just for debugging purposes. Is very difficult to  */
2185                                 /* read patched code. Here we patch the following 2 nop's     */
2186                                 /* so that the real code keeps untouched.                     */
2187                                 if (showdisassemble) {
2188                                         M_NOP;
2189                                 }
2190                         }
2191
2192                         a = dseg_addaddress(cd, &(((fieldinfo *) iptr->val.a)->value));
2193                         M_ALD(REG_ITMP1, REG_PV, a);
2194                         switch (iptr->op1) {
2195                                 case TYPE_INT:
2196                                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2197                                         M_ILD(d, REG_ITMP1, 0);
2198                                         store_reg_to_var_int(iptr->dst, d);
2199                                         break;
2200                                 case TYPE_LNG:
2201                                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2202                                         M_LLD(d, REG_ITMP1, 0);
2203                                         store_reg_to_var_int(iptr->dst, d);
2204                                         break;
2205                                 case TYPE_ADR:
2206                                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2207                                         M_ALD(d, REG_ITMP1, 0);
2208                                         store_reg_to_var_int(iptr->dst, d);
2209                                         break;
2210                                 case TYPE_FLT:
2211                                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2212                                         M_FLD(d, REG_ITMP1, 0);
2213                                         store_reg_to_var_flt(iptr->dst, d);
2214                                         break;
2215                                 case TYPE_DBL:
2216                                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2217                                         M_DLD(d, REG_ITMP1, 0);
2218                                         store_reg_to_var_flt(iptr->dst, d);
2219                                         break;
2220                                 default: panic ("internal error");
2221                                 }
2222                         break;
2223
2224
2225                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2226                                       /* op1 = type, val.i = field offset             */
2227
2228                         a = ((fieldinfo *) iptr->val.a)->offset;
2229                         switch (iptr->op1) {
2230                                 case TYPE_INT:
2231                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2232                                         var_to_reg_int(s2, src, REG_ITMP2);
2233                                         gen_nullptr_check(s1);
2234                                         M_IST(s2, s1, a);
2235                                         break;
2236                                 case TYPE_LNG:
2237                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2238                                         var_to_reg_int(s2, src, REG_ITMP2);
2239                                         gen_nullptr_check(s1);
2240                                         M_LST(s2, s1, a);
2241                                         break;
2242                                 case TYPE_ADR:
2243                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2244                                         var_to_reg_int(s2, src, REG_ITMP2);
2245                                         gen_nullptr_check(s1);
2246                                         M_AST(s2, s1, a);
2247                                         break;
2248                                 case TYPE_FLT:
2249                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2250                                         var_to_reg_flt(s2, src, REG_FTMP2);
2251                                         gen_nullptr_check(s1);
2252                                         M_FST(s2, s1, a);
2253                                         break;
2254                                 case TYPE_DBL:
2255                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2256                                         var_to_reg_flt(s2, src, REG_FTMP2);
2257                                         gen_nullptr_check(s1);
2258                                         M_DST(s2, s1, a);
2259                                         break;
2260                                 default: panic ("internal error");
2261                                 }
2262                         break;
2263
2264                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2265                                       /* op1 = type, val.i = field offset             */
2266
2267                         a = ((fieldinfo *)(iptr->val.a))->offset;
2268                         switch (iptr->op1) {
2269                                 case TYPE_INT:
2270                                         var_to_reg_int(s1, src, REG_ITMP1);
2271                                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2272                                         gen_nullptr_check(s1);
2273                                         M_ILD(d, s1, a);
2274                                         store_reg_to_var_int(iptr->dst, d);
2275                                         break;
2276                                 case TYPE_LNG:
2277                                         var_to_reg_int(s1, src, REG_ITMP1);
2278                                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2279                                         gen_nullptr_check(s1);
2280                                         M_LLD(d, s1, a);
2281                                         store_reg_to_var_int(iptr->dst, d);
2282                                         break;
2283                                 case TYPE_ADR:
2284                                         var_to_reg_int(s1, src, REG_ITMP1);
2285                                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2286                                         gen_nullptr_check(s1);
2287                                         M_ALD(d, s1, a);
2288                                         store_reg_to_var_int(iptr->dst, d);
2289                                         break;
2290                                 case TYPE_FLT:
2291                                         var_to_reg_int(s1, src, REG_ITMP1);
2292                                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2293                                         gen_nullptr_check(s1);
2294                                         M_FLD(d, s1, a);
2295                                         store_reg_to_var_flt(iptr->dst, d);
2296                                         break;
2297                                 case TYPE_DBL:
2298                                         var_to_reg_int(s1, src, REG_ITMP1);
2299                                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2300                                         gen_nullptr_check(s1);
2301                                         M_DLD(d, s1, a);
2302                                         store_reg_to_var_flt(iptr->dst, d);
2303                                         break;
2304                                 default: panic ("internal error");
2305                                 }
2306                         break;
2307
2308
2309                 /* branch operations **************************************************/
2310
2311 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2312
2313                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2314
2315                         var_to_reg_int(s1, src, REG_ITMP1);
2316                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2317                         a = dseg_addaddress(cd, asm_handle_exception);
2318                         M_ALD(REG_ITMP2, REG_PV, a);
2319                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2320                         M_NOP;              /* nop ensures that XPC is less than the end */
2321                                             /* of basic block                            */
2322                         ALIGNCODENOP;
2323                         break;
2324
2325                 case ICMD_GOTO:         /* ... ==> ...                                */
2326                                         /* op1 = target JavaVM pc                     */
2327                         M_BR(0);
2328                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2329                         ALIGNCODENOP;
2330                         break;
2331
2332                 case ICMD_JSR:          /* ... ==> ...                                */
2333                                         /* op1 = target JavaVM pc                     */
2334
2335                         M_BSR(REG_ITMP1, 0);
2336                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2337                         break;
2338
2339                 case ICMD_RET:          /* ... ==> ...                                */
2340                                         /* op1 = local variable                       */
2341
2342                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2343                         if (var->flags & INMEMORY) {
2344                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2345                                 M_RET(REG_ZERO, REG_ITMP1);
2346                                 }
2347                         else
2348                                 M_RET(REG_ZERO, var->regoff);
2349                         ALIGNCODENOP;
2350                         break;
2351
2352                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2353                                         /* op1 = target JavaVM pc                     */
2354
2355                         var_to_reg_int(s1, src, REG_ITMP1);
2356                         M_BEQZ(s1, 0);
2357                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2358                         break;
2359
2360                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2361                                         /* op1 = target JavaVM pc                     */
2362
2363                         var_to_reg_int(s1, src, REG_ITMP1);
2364                         M_BNEZ(s1, 0);
2365                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2366                         break;
2367
2368                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2369                                         /* op1 = target JavaVM pc, val.i = constant   */
2370
2371                         var_to_reg_int(s1, src, REG_ITMP1);
2372                         if (iptr->val.i == 0) {
2373                                 M_BEQZ(s1, 0);
2374                                 }
2375                         else {
2376                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2377                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2378                                         }
2379                                 else {
2380                                         ICONST(REG_ITMP2, iptr->val.i);
2381                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2382                                         }
2383                                 M_BNEZ(REG_ITMP1, 0);
2384                                 }
2385                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2386                         break;
2387
2388                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2389                                         /* op1 = target JavaVM pc, val.i = constant   */
2390
2391                         var_to_reg_int(s1, src, REG_ITMP1);
2392                         if (iptr->val.i == 0) {
2393                                 M_BLTZ(s1, 0);
2394                                 }
2395                         else {
2396                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2397                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2398                                         }
2399                                 else {
2400                                         ICONST(REG_ITMP2, iptr->val.i);
2401                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2402                                         }
2403                                 M_BNEZ(REG_ITMP1, 0);
2404                                 }
2405                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2406                         break;
2407
2408                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2409                                         /* op1 = target JavaVM pc, val.i = constant   */
2410
2411                         var_to_reg_int(s1, src, REG_ITMP1);
2412                         if (iptr->val.i == 0) {
2413                                 M_BLEZ(s1, 0);
2414                                 }
2415                         else {
2416                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2417                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2418                                         }
2419                                 else {
2420                                         ICONST(REG_ITMP2, iptr->val.i);
2421                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2422                                         }
2423                                 M_BNEZ(REG_ITMP1, 0);
2424                                 }
2425                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2426                         break;
2427
2428                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2429                                         /* op1 = target JavaVM pc, val.i = constant   */
2430
2431                         var_to_reg_int(s1, src, REG_ITMP1);
2432                         if (iptr->val.i == 0) {
2433                                 M_BNEZ(s1, 0);
2434                                 }
2435                         else {
2436                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2437                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2438                                         }
2439                                 else {
2440                                         ICONST(REG_ITMP2, iptr->val.i);
2441                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2442                                         }
2443                                 M_BEQZ(REG_ITMP1, 0);
2444                                 }
2445                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2446                         break;
2447
2448                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2449                                         /* op1 = target JavaVM pc, val.i = constant   */
2450
2451                         var_to_reg_int(s1, src, REG_ITMP1);
2452                         if (iptr->val.i == 0) {
2453                                 M_BGTZ(s1, 0);
2454                                 }
2455                         else {
2456                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2457                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2458                                         }
2459                                 else {
2460                                         ICONST(REG_ITMP2, iptr->val.i);
2461                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2462                                         }
2463                                 M_BEQZ(REG_ITMP1, 0);
2464                                 }
2465                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2466                         break;
2467
2468                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2469                                         /* op1 = target JavaVM pc, val.i = constant   */
2470
2471                         var_to_reg_int(s1, src, REG_ITMP1);
2472                         if (iptr->val.i == 0) {
2473                                 M_BGEZ(s1, 0);
2474                                 }
2475                         else {
2476                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2477                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2478                                         }
2479                                 else {
2480                                         ICONST(REG_ITMP2, iptr->val.i);
2481                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2482                                         }
2483                                 M_BEQZ(REG_ITMP1, 0);
2484                                 }
2485                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2486                         break;
2487
2488                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2489                                         /* op1 = target JavaVM pc, val.l = constant   */
2490
2491                         var_to_reg_int(s1, src, REG_ITMP1);
2492                         if (iptr->val.l == 0) {
2493                                 M_BEQZ(s1, 0);
2494                                 }
2495                         else {
2496                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2497                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2498                                         }
2499                                 else {
2500                                         LCONST(REG_ITMP2, iptr->val.l);
2501                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2502                                         }
2503                                 M_BNEZ(REG_ITMP1, 0);
2504                                 }
2505                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2506                         break;
2507
2508                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2509                                         /* op1 = target JavaVM pc, val.l = constant   */
2510
2511                         var_to_reg_int(s1, src, REG_ITMP1);
2512                         if (iptr->val.l == 0) {
2513                                 M_BLTZ(s1, 0);
2514                                 }
2515                         else {
2516                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2517                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2518                                         }
2519                                 else {
2520                                         LCONST(REG_ITMP2, iptr->val.l);
2521                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2522                                         }
2523                                 M_BNEZ(REG_ITMP1, 0);
2524                                 }
2525                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2526                         break;
2527
2528                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2529                                         /* op1 = target JavaVM pc, val.l = constant   */
2530
2531                         var_to_reg_int(s1, src, REG_ITMP1);
2532                         if (iptr->val.l == 0) {
2533                                 M_BLEZ(s1, 0);
2534                                 }
2535                         else {
2536                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2537                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2538                                         }
2539                                 else {
2540                                         LCONST(REG_ITMP2, iptr->val.l);
2541                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2542                                         }
2543                                 M_BNEZ(REG_ITMP1, 0);
2544                                 }
2545                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2546                         break;
2547
2548                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2549                                         /* op1 = target JavaVM pc, val.l = constant   */
2550
2551                         var_to_reg_int(s1, src, REG_ITMP1);
2552                         if (iptr->val.l == 0) {
2553                                 M_BNEZ(s1, 0);
2554                                 }
2555                         else {
2556                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2557                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2558                                         }
2559                                 else {
2560                                         LCONST(REG_ITMP2, iptr->val.l);
2561                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2562                                         }
2563                                 M_BEQZ(REG_ITMP1, 0);
2564                                 }
2565                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2566                         break;
2567
2568                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2569                                         /* op1 = target JavaVM pc, val.l = constant   */
2570
2571                         var_to_reg_int(s1, src, REG_ITMP1);
2572                         if (iptr->val.l == 0) {
2573                                 M_BGTZ(s1, 0);
2574                                 }
2575                         else {
2576                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2577                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2578                                         }
2579                                 else {
2580                                         LCONST(REG_ITMP2, iptr->val.l);
2581                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2582                                         }
2583                                 M_BEQZ(REG_ITMP1, 0);
2584                                 }
2585                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2586                         break;
2587
2588                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2589                                         /* op1 = target JavaVM pc, val.l = constant   */
2590
2591                         var_to_reg_int(s1, src, REG_ITMP1);
2592                         if (iptr->val.l == 0) {
2593                                 M_BGEZ(s1, 0);
2594                                 }
2595                         else {
2596                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2597                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2598                                         }
2599                                 else {
2600                                         LCONST(REG_ITMP2, iptr->val.l);
2601                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2602                                         }
2603                                 M_BEQZ(REG_ITMP1, 0);
2604                                 }
2605                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2606                         break;
2607
2608                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2609                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2610                 case ICMD_IF_ACMPEQ:
2611
2612                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2613                         var_to_reg_int(s2, src, REG_ITMP2);
2614                         M_CMPEQ(s1, s2, REG_ITMP1);
2615                         M_BNEZ(REG_ITMP1, 0);
2616                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2617                         break;
2618
2619                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2620                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2621                 case ICMD_IF_ACMPNE:
2622
2623                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2624                         var_to_reg_int(s2, src, REG_ITMP2);
2625                         M_CMPEQ(s1, s2, REG_ITMP1);
2626                         M_BEQZ(REG_ITMP1, 0);
2627                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2628                         break;
2629
2630                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2631                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2632
2633                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2634                         var_to_reg_int(s2, src, REG_ITMP2);
2635                         M_CMPLT(s1, s2, REG_ITMP1);
2636                         M_BNEZ(REG_ITMP1, 0);
2637                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2638                         break;
2639
2640                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2641                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2642
2643                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2644                         var_to_reg_int(s2, src, REG_ITMP2);
2645                         M_CMPLE(s1, s2, REG_ITMP1);
2646                         M_BEQZ(REG_ITMP1, 0);
2647                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2648                         break;
2649
2650                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2651                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2652
2653                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2654                         var_to_reg_int(s2, src, REG_ITMP2);
2655                         M_CMPLE(s1, s2, REG_ITMP1);
2656                         M_BNEZ(REG_ITMP1, 0);
2657                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2658                         break;
2659
2660                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2661                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2662
2663                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2664                         var_to_reg_int(s2, src, REG_ITMP2);
2665                         M_CMPLT(s1, s2, REG_ITMP1);
2666                         M_BEQZ(REG_ITMP1, 0);
2667                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2668                         break;
2669
2670                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2671
2672                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2673                         break;
2674
2675                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2676                                         /* val.i = constant                           */
2677
2678                         var_to_reg_int(s1, src, REG_ITMP1);
2679                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2680                         s3 = iptr->val.i;
2681                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2682                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2683                                         M_CMPEQ(s1, REG_ZERO, d);
2684                                         store_reg_to_var_int(iptr->dst, d);
2685                                         break;
2686                                         }
2687                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2688                                         M_CMPEQ(s1, REG_ZERO, d);
2689                                         M_XOR_IMM(d, 1, d);
2690                                         store_reg_to_var_int(iptr->dst, d);
2691                                         break;
2692                                         }
2693                                 if (s1 == d) {
2694                                         M_MOV(s1, REG_ITMP1);
2695                                         s1 = REG_ITMP1;
2696                                         }
2697                                 ICONST(d, iptr[1].val.i);
2698                                 }
2699                         if ((s3 >= 0) && (s3 <= 255)) {
2700                                 M_CMOVEQ_IMM(s1, s3, d);
2701                                 }
2702                         else {
2703                                 ICONST(REG_ITMP2, s3);
2704                                 M_CMOVEQ(s1, REG_ITMP2, d);
2705                                 }
2706                         store_reg_to_var_int(iptr->dst, d);
2707                         break;
2708
2709                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2710                                         /* val.i = constant                           */
2711
2712                         var_to_reg_int(s1, src, REG_ITMP1);
2713                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2714                         s3 = iptr->val.i;
2715                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2716                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2717                                         M_CMPEQ(s1, REG_ZERO, d);
2718                                         store_reg_to_var_int(iptr->dst, d);
2719                                         break;
2720                                         }
2721                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2722                                         M_CMPEQ(s1, REG_ZERO, d);
2723                                         M_XOR_IMM(d, 1, d);
2724                                         store_reg_to_var_int(iptr->dst, d);
2725                                         break;
2726                                         }
2727                                 if (s1 == d) {
2728                                         M_MOV(s1, REG_ITMP1);
2729                                         s1 = REG_ITMP1;
2730                                         }
2731                                 ICONST(d, iptr[1].val.i);
2732                                 }
2733                         if ((s3 >= 0) && (s3 <= 255)) {
2734                                 M_CMOVNE_IMM(s1, s3, d);
2735                                 }
2736                         else {
2737                                 ICONST(REG_ITMP2, s3);
2738                                 M_CMOVNE(s1, REG_ITMP2, d);
2739                                 }
2740                         store_reg_to_var_int(iptr->dst, d);
2741                         break;
2742
2743                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2744                                         /* val.i = constant                           */
2745
2746                         var_to_reg_int(s1, src, REG_ITMP1);
2747                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2748                         s3 = iptr->val.i;
2749                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2750                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2751                                         M_CMPLT(s1, REG_ZERO, d);
2752                                         store_reg_to_var_int(iptr->dst, d);
2753                                         break;
2754                                         }
2755                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2756                                         M_CMPLE(REG_ZERO, s1, d);
2757                                         store_reg_to_var_int(iptr->dst, d);
2758                                         break;
2759                                         }
2760                                 if (s1 == d) {
2761                                         M_MOV(s1, REG_ITMP1);
2762                                         s1 = REG_ITMP1;
2763                                         }
2764                                 ICONST(d, iptr[1].val.i);
2765                                 }
2766                         if ((s3 >= 0) && (s3 <= 255)) {
2767                                 M_CMOVLT_IMM(s1, s3, d);
2768                                 }
2769                         else {
2770                                 ICONST(REG_ITMP2, s3);
2771                                 M_CMOVLT(s1, REG_ITMP2, d);
2772                                 }
2773                         store_reg_to_var_int(iptr->dst, d);
2774                         break;
2775
2776                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2777                                         /* val.i = constant                           */
2778
2779                         var_to_reg_int(s1, src, REG_ITMP1);
2780                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2781                         s3 = iptr->val.i;
2782                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2783                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2784                                         M_CMPLE(REG_ZERO, s1, d);
2785                                         store_reg_to_var_int(iptr->dst, d);
2786                                         break;
2787                                         }
2788                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2789                                         M_CMPLT(s1, REG_ZERO, d);
2790                                         store_reg_to_var_int(iptr->dst, d);
2791                                         break;
2792                                         }
2793                                 if (s1 == d) {
2794                                         M_MOV(s1, REG_ITMP1);
2795                                         s1 = REG_ITMP1;
2796                                         }
2797                                 ICONST(d, iptr[1].val.i);
2798                                 }
2799                         if ((s3 >= 0) && (s3 <= 255)) {
2800                                 M_CMOVGE_IMM(s1, s3, d);
2801                                 }
2802                         else {
2803                                 ICONST(REG_ITMP2, s3);
2804                                 M_CMOVGE(s1, REG_ITMP2, d);
2805                                 }
2806                         store_reg_to_var_int(iptr->dst, d);
2807                         break;
2808
2809                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2810                                         /* val.i = constant                           */
2811
2812                         var_to_reg_int(s1, src, REG_ITMP1);
2813                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2814                         s3 = iptr->val.i;
2815                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2816                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2817                                         M_CMPLT(REG_ZERO, s1, d);
2818                                         store_reg_to_var_int(iptr->dst, d);
2819                                         break;
2820                                         }
2821                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2822                                         M_CMPLE(s1, REG_ZERO, d);
2823                                         store_reg_to_var_int(iptr->dst, d);
2824                                         break;
2825                                         }
2826                                 if (s1 == d) {
2827                                         M_MOV(s1, REG_ITMP1);
2828                                         s1 = REG_ITMP1;
2829                                         }
2830                                 ICONST(d, iptr[1].val.i);
2831                                 }
2832                         if ((s3 >= 0) && (s3 <= 255)) {
2833                                 M_CMOVGT_IMM(s1, s3, d);
2834                                 }
2835                         else {
2836                                 ICONST(REG_ITMP2, s3);
2837                                 M_CMOVGT(s1, REG_ITMP2, d);
2838                                 }
2839                         store_reg_to_var_int(iptr->dst, d);
2840                         break;
2841
2842                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2843                                         /* val.i = constant                           */
2844
2845                         var_to_reg_int(s1, src, REG_ITMP1);
2846                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2847                         s3 = iptr->val.i;
2848                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2849                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2850                                         M_CMPLE(s1, REG_ZERO, d);
2851                                         store_reg_to_var_int(iptr->dst, d);
2852                                         break;
2853                                         }
2854                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2855                                         M_CMPLT(REG_ZERO, s1, d);
2856                                         store_reg_to_var_int(iptr->dst, d);
2857                                         break;
2858                                         }
2859                                 if (s1 == d) {
2860                                         M_MOV(s1, REG_ITMP1);
2861                                         s1 = REG_ITMP1;
2862                                         }
2863                                 ICONST(d, iptr[1].val.i);
2864                                 }
2865                         if ((s3 >= 0) && (s3 <= 255)) {
2866                                 M_CMOVLE_IMM(s1, s3, d);
2867                                 }
2868                         else {
2869                                 ICONST(REG_ITMP2, s3);
2870                                 M_CMOVLE(s1, REG_ITMP2, d);
2871                                 }
2872                         store_reg_to_var_int(iptr->dst, d);
2873                         break;
2874
2875
2876                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2877                 case ICMD_LRETURN:
2878                 case ICMD_ARETURN:
2879
2880                         var_to_reg_int(s1, src, REG_RESULT);
2881                         M_INTMOVE(s1, REG_RESULT);
2882
2883 #if defined(USE_THREADS)
2884                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2885                                 s4 disp;
2886                                 a = dseg_addaddress(cd, (void *) (builtin_monitorexit));
2887                                 M_ALD(REG_PV, REG_PV, a);
2888                                 M_ALD(rd->argintregs[0], REG_SP, rd->maxmemuse * 8);
2889                                 M_LST(REG_RESULT, REG_SP, rd->maxmemuse * 8);
2890                                 M_JSR(REG_RA, REG_PV);
2891                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2892                                 M_LDA(REG_PV, REG_RA, disp);
2893                                 M_LLD(REG_RESULT, REG_SP, rd->maxmemuse * 8);
2894                         }
2895 #endif
2896
2897                         goto nowperformreturn;
2898
2899                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2900                 case ICMD_DRETURN:
2901
2902                         var_to_reg_flt(s1, src, REG_FRESULT);
2903                         M_FLTMOVE(s1, REG_FRESULT);
2904
2905 #if defined(USE_THREADS)
2906                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2907                                 s4 disp;
2908                                 a = dseg_addaddress(cd, (void *) (builtin_monitorexit));
2909                                 M_ALD(REG_PV, REG_PV, a);
2910                                 M_ALD(rd->argintregs[0], REG_SP, rd->maxmemuse * 8);
2911                                 M_DST(REG_FRESULT, REG_SP, rd->maxmemuse * 8);
2912                                 M_JSR(REG_RA, REG_PV);
2913                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2914                                 M_LDA(REG_PV, REG_RA, disp);
2915                                 M_DLD(REG_FRESULT, REG_SP, rd->maxmemuse * 8);
2916                         }
2917 #endif
2918
2919                         goto nowperformreturn;
2920
2921                 case ICMD_RETURN:      /* ...  ==> ...                                */
2922
2923 #if defined(USE_THREADS)
2924                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2925                                 s4 disp;
2926                                 a = dseg_addaddress(cd, (void *) (builtin_monitorexit));
2927                                 M_ALD(REG_PV, REG_PV, a);
2928                                 M_ALD(rd->argintregs[0], REG_SP, rd->maxmemuse * 8);
2929                                 M_JSR(REG_RA, REG_PV);
2930                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2931                                 M_LDA(REG_PV, REG_RA, disp);
2932                         }
2933 #endif
2934
2935 nowperformreturn:
2936                         {
2937                         s4 i, p;
2938
2939                         p = parentargs_base;
2940
2941                         /* restore return address                                         */
2942
2943                         if (!m->isleafmethod) {
2944                                 p--; M_LLD(REG_RA, REG_SP, p * 8);
2945                         }
2946
2947                         /* restore saved registers                                        */
2948
2949                         for (i = rd->savintregcnt - 1; i >= rd->maxsavintreguse; i--) {
2950                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
2951                         }
2952                         for (i = rd->savfltregcnt - 1; i >= rd->maxsavfltreguse; i--) {
2953                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
2954                         }
2955
2956                         /* deallocate stack                                               */
2957
2958                         if (parentargs_base) {
2959                                 M_LDA(REG_SP, REG_SP, parentargs_base * 8);
2960                         }
2961
2962                         /* call trace function */
2963
2964                         if (runverbose) {
2965                                 M_LDA(REG_SP, REG_SP, -3 * 8);
2966                                 M_AST(REG_RA, REG_SP, 0 * 8);
2967                                 M_LST(REG_RESULT, REG_SP, 1 * 8);
2968                                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
2969                                 a = dseg_addaddress(cd, m);
2970                                 M_ALD(rd->argintregs[0], REG_PV, a);
2971                                 M_MOV(REG_RESULT, rd->argintregs[1]);
2972                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[2]);
2973                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[3]);
2974                                 a = dseg_addaddress(cd, (void *) builtin_displaymethodstop);
2975                                 M_ALD(REG_PV, REG_PV, a);
2976                                 M_JSR(REG_RA, REG_PV);
2977                                 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2978                                 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
2979                                 else {
2980                                         s4 ml = -s1, mh = 0;
2981                                         while (ml < -32768) { ml += 65536; mh--; }
2982                                         M_LDA(REG_PV, REG_RA, ml);
2983                                         M_LDAH(REG_PV, REG_PV, mh);
2984                                 }
2985                                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
2986                                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
2987                                 M_ALD(REG_RA, REG_SP, 0 * 8);
2988                                 M_LDA(REG_SP, REG_SP, 3 * 8);
2989                         }
2990
2991                         M_RET(REG_ZERO, REG_RA);
2992                         ALIGNCODENOP;
2993                         }
2994                         break;
2995
2996
2997                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2998                         {
2999                         s4 i, l, *s4ptr;
3000                         void **tptr;
3001
3002                         tptr = (void **) iptr->target;
3003
3004                         s4ptr = iptr->val.a;
3005                         l = s4ptr[1];                          /* low     */
3006                         i = s4ptr[2];                          /* high    */
3007
3008                         var_to_reg_int(s1, src, REG_ITMP1);
3009                         if (l == 0)
3010                                 {M_INTMOVE(s1, REG_ITMP1);}
3011                         else if (l <= 32768) {
3012                                 M_LDA(REG_ITMP1, s1, -l);
3013                                 }
3014                         else {
3015                                 ICONST(REG_ITMP2, l);
3016                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3017                                 }
3018                         i = i - l + 1;
3019
3020                         /* range check */
3021
3022                         if (i <= 256)
3023                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3024                         else {
3025                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3026                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3027                                 }
3028                         M_BEQZ(REG_ITMP2, 0);
3029
3030
3031                         /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3032                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3033
3034                         /* build jump table top down and use address of lowest entry */
3035
3036                         /* s4ptr += 3 + i; */
3037                         tptr += i;
3038
3039                         while (--i >= 0) {
3040                                 /* dseg_addtarget(cd, BlockPtrOfPC(*--s4ptr)); */
3041                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
3042                                 --tptr;
3043                                 }
3044                         }
3045
3046                         /* length of dataseg after last dseg_addtarget is used by load */
3047
3048                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3049                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
3050                         M_JMP(REG_ZERO, REG_ITMP2);
3051                         ALIGNCODENOP;
3052                         break;
3053
3054
3055                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3056                         {
3057                         s4 i, l, val, *s4ptr;
3058                         void **tptr;
3059
3060                         tptr = (void **) iptr->target;
3061
3062                         s4ptr = iptr->val.a;
3063                         l = s4ptr[0];                          /* default  */
3064                         i = s4ptr[1];                          /* count    */
3065
3066                         MCODECHECK((i<<2)+8);
3067                         var_to_reg_int(s1, src, REG_ITMP1);
3068                         while (--i >= 0) {
3069                                 s4ptr += 2;
3070                                 ++tptr;
3071
3072                                 val = s4ptr[0];
3073                                 if ((val >= 0) && (val <= 255)) {
3074                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3075                                         }
3076                                 else {
3077                                         if ((val >= -32768) && (val <= 32767)) {
3078                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3079                                                 }
3080                                         else {
3081                                                 a = dseg_adds4(cd, val);
3082                                                 M_ILD(REG_ITMP2, REG_PV, a);
3083                                                 }
3084                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3085                                         }
3086                                 M_BNEZ(REG_ITMP2, 0);
3087                                 /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3088                                 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3089                                 }
3090
3091                         M_BR(0);
3092                         /* codegen_addreference(cd, BlockPtrOfPC(l), mcodeptr); */
3093
3094                         tptr = (void **) iptr->target;
3095                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3096
3097                         ALIGNCODENOP;
3098                         break;
3099                         }
3100
3101
3102                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3103                                         /* op1 = return type, val.a = function pointer*/
3104                         s3 = 3;
3105                         goto gen_method;
3106
3107                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3108                                         /* op1 = return type, val.a = function pointer*/
3109                         s3 = 2;
3110                         goto gen_method;
3111
3112                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3113                                         /* op1 = return type, val.a = function pointer*/
3114                         s3 = 1;
3115                         goto gen_method;
3116
3117                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3118                                         /* op1 = arg count, val.a = method pointer    */
3119
3120                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3121                                         /* op1 = arg count, val.a = method pointer    */
3122
3123                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3124                                         /* op1 = arg count, val.a = method pointer    */
3125
3126                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3127                                         /* op1 = arg count, val.a = method pointer    */
3128
3129                         s3 = iptr->op1;
3130
3131 gen_method: {
3132                         methodinfo *lm;
3133
3134                         MCODECHECK((s3 << 1) + 64);
3135
3136                         /* copy arguments to registers or stack location                  */
3137
3138                         for (; --s3 >= 0; src = src->prev) {
3139                                 if (src->varkind == ARGVAR)
3140                                         continue;
3141                                 if (IS_INT_LNG_TYPE(src->type)) {
3142                                         if (s3 < INT_ARG_CNT) {
3143                                                 s1 = rd->argintregs[s3];
3144                                                 var_to_reg_int(d, src, s1);
3145                                                 M_INTMOVE(d, s1);
3146
3147                                         } else {
3148                                                 var_to_reg_int(d, src, REG_ITMP1);
3149                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3150                                         }
3151
3152                                 } else {
3153                                         if (s3 < FLT_ARG_CNT) {
3154                                                 s1 = rd->argfltregs[s3];
3155                                                 var_to_reg_flt(d, src, s1);
3156                                                 M_FLTMOVE(d, s1);
3157
3158                                         } else {
3159                                                 var_to_reg_flt(d, src, REG_FTMP1);
3160                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3161                                         }
3162                                 }
3163                         } /* end of for */
3164
3165                         lm = iptr->val.a;
3166                         switch (iptr->opc) {
3167                         case ICMD_BUILTIN3:
3168                         case ICMD_BUILTIN2:
3169                         case ICMD_BUILTIN1:
3170                                 a = dseg_addaddress(cd, (void *) lm);
3171                                 d = iptr->op1;
3172
3173                                 M_ALD(REG_PV, REG_PV, a);     /* Pointer to built-in-function */
3174                                 break;
3175
3176                         case ICMD_INVOKESTATIC:
3177                         case ICMD_INVOKESPECIAL:
3178                                 a = dseg_addaddress(cd, lm->stubroutine);
3179                                 d = lm->returntype;
3180
3181                                 M_ALD(REG_PV, REG_PV, a);            /* method pointer in r27 */
3182                                 break;
3183
3184                         case ICMD_INVOKEVIRTUAL:
3185                                 d = lm->returntype;
3186
3187                                 gen_nullptr_check(rd->argintregs[0]);
3188                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3189                                           OFFSET(java_objectheader, vftbl));
3190                                 M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl_t, table[0]) +
3191                                           sizeof(methodptr) * lm->vftblindex);
3192                                 break;
3193
3194                         case ICMD_INVOKEINTERFACE:
3195                                 d = lm->returntype;
3196
3197                                 gen_nullptr_check(rd->argintregs[0]);
3198                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3199                                           OFFSET(java_objectheader, vftbl));
3200                                 M_ALD(REG_METHODPTR, REG_METHODPTR,
3201                                           OFFSET(vftbl_t, interfacetable[0]) -
3202                                           sizeof(methodptr*) * lm->class->index);
3203                                 M_ALD(REG_PV, REG_METHODPTR,
3204                                           sizeof(methodptr) * (lm - lm->class->methods));
3205                                 break;
3206                         }
3207
3208                         M_JSR(REG_RA, REG_PV);
3209
3210                         /* recompute pv */
3211
3212                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3213                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3214                         else {
3215                                 s4 ml = -s1, mh = 0;
3216                                 while (ml < -32768) { ml += 65536; mh--; }
3217                                 M_LDA(REG_PV, REG_RA, ml);
3218                                 M_LDAH(REG_PV, REG_PV, mh);
3219                         }
3220
3221                         /* d contains return type */
3222
3223                         if (d != TYPE_VOID) {
3224                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3225                                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3226                                         M_INTMOVE(REG_RESULT, s1);
3227                                         store_reg_to_var_int(iptr->dst, s1);
3228
3229                                 } else {
3230                                         s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
3231                                         M_FLTMOVE(REG_FRESULT, s1);
3232                                         store_reg_to_var_flt(iptr->dst, s1);
3233                                 }
3234                         }
3235                         }
3236                         break;
3237
3238
3239                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3240
3241                                       /* op1:   0 == array, 1 == class                */
3242                                       /* val.a: (classinfo*) superclass               */
3243
3244 /*          superclass is an interface:
3245  *
3246  *          return (sub != NULL) &&
3247  *                 (sub->vftbl->interfacetablelength > super->index) &&
3248  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3249  *
3250  *          superclass is a class:
3251  *
3252  *          return ((sub != NULL) && (0
3253  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3254  *                  super->vftbl->diffvall));
3255  */
3256
3257                         {
3258                         classinfo *super = (classinfo*) iptr->val.a;
3259
3260 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3261                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3262 #endif
3263                         var_to_reg_int(s1, src, REG_ITMP1);
3264                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
3265                         if (s1 == d) {
3266                                 M_MOV(s1, REG_ITMP1);
3267                                 s1 = REG_ITMP1;
3268                                 }
3269                         M_CLR(d);
3270                         if (iptr->op1) {                               /* class/interface */
3271                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3272                                         M_BEQZ(s1, 6);
3273                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3274                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3275                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3276                                         M_BLEZ(REG_ITMP2, 2);
3277                                         M_ALD(REG_ITMP1, REG_ITMP1,
3278                                               OFFSET(vftbl_t, interfacetable[0]) -
3279                                               super->index * sizeof(methodptr*));
3280                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3281                                         }
3282                                 else {                                     /* class           */
3283 /*
3284                                         s2 = super->vftbl->diffval;
3285                                         M_BEQZ(s1, 4 + (s2 > 255));
3286                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3287                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3288                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3289                                         if (s2 <= 255)
3290                                                 M_CMPULE_IMM(REG_ITMP1, s2, d);
3291                                         else {
3292                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3293                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3294                                                 }
3295 */
3296                                         M_BEQZ(s1, 7);
3297                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3298                                         a = dseg_addaddress(cd, (void*) super->vftbl);
3299                                         M_ALD(REG_ITMP2, REG_PV, a);
3300 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3301                                         codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3302 #endif
3303                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3304                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3305                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3306 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3307                                         codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3308 #endif
3309                                         M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3310                                         M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3311                                         }
3312                                 }
3313                         else
3314                                 panic ("internal error: no inlined array instanceof");
3315                         }
3316                         store_reg_to_var_int(iptr->dst, d);
3317                         break;
3318
3319                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3320
3321                                       /* op1:   0 == array, 1 == class                */
3322                                       /* val.a: (classinfo*) superclass               */
3323
3324 /*          superclass is an interface:
3325  *
3326  *          OK if ((sub == NULL) ||
3327  *                 (sub->vftbl->interfacetablelength > super->index) &&
3328  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3329  *
3330  *          superclass is a class:
3331  *
3332  *          OK if ((sub == NULL) || (0
3333  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3334  *                 super->vftbl->diffvall));
3335  */
3336
3337                         {
3338                         classinfo *super = (classinfo *) iptr->val.a;
3339
3340 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3341                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3342 #endif
3343                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
3344                         var_to_reg_int(s1, src, d);
3345                         if (iptr->op1) {                               /* class/interface */
3346                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3347                                         M_BEQZ(s1, 6);
3348                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3349                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3350                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3351                                         M_BLEZ(REG_ITMP2, 0);
3352                                         codegen_addxcastrefs(cd, mcodeptr);
3353                                         M_ALD(REG_ITMP2, REG_ITMP1,
3354                                               OFFSET(vftbl_t, interfacetable[0]) -
3355                                               super->index * sizeof(methodptr*));
3356                                         M_BEQZ(REG_ITMP2, 0);
3357                                         codegen_addxcastrefs(cd, mcodeptr);
3358                                         }
3359                                 else {                                     /* class           */
3360 /*
3361                                         s2 = super->vftbl->diffval;
3362                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3363                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3364                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3365                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3366                                         if (s2 == 0) {
3367                                                 M_BNEZ(REG_ITMP1, 0);
3368                                                 }
3369                                         else if (s2 <= 255) {
3370                                                 M_CMPULE_IMM(REG_ITMP1, s2, REG_ITMP2);
3371                                                 M_BEQZ(REG_ITMP2, 0);
3372                                                 }
3373                                         else {
3374                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3375                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3376                                                 M_BEQZ(REG_ITMP2, 0);
3377                                                 }
3378 */
3379                                         M_BEQZ(s1, 8 + (d == REG_ITMP3));
3380                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3381                                         a = dseg_addaddress(cd, (void *) super->vftbl);
3382                                         M_ALD(REG_ITMP2, REG_PV, a);
3383 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3384                                         codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3385 #endif
3386                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3387                                         if (d != REG_ITMP3) {
3388                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3389                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3390 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3391                                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3392 #endif
3393                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3394                                                 }
3395                                         else {
3396                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3397                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3398                                                 M_ALD(REG_ITMP2, REG_PV, a);
3399                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3400 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3401                                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3402 #endif
3403                                                 }
3404                                         M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3405                                         M_BEQZ(REG_ITMP2, 0);
3406                                         codegen_addxcastrefs(cd, mcodeptr);
3407                                         }
3408                                 }
3409                         else
3410                                 panic ("internal error: no inlined array checkcast");
3411                         }
3412                         M_INTMOVE(s1, d);
3413                         store_reg_to_var_int(iptr->dst, d);
3414                         break;
3415
3416                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3417
3418                         var_to_reg_int(s1, src, REG_ITMP1);
3419                         M_BLTZ(s1, 0);
3420                         codegen_addxcheckarefs(cd, mcodeptr);
3421                         break;
3422
3423                 case ICMD_CHECKEXCEPTION:    /* ... ==> ...                           */
3424
3425                         M_BEQZ(REG_RESULT, 0);
3426                         codegen_addxexceptionrefs(cd, mcodeptr);
3427                         break;
3428
3429                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3430                                       /* op1 = dimension, val.a = array descriptor    */
3431
3432                         /* check for negative sizes and copy sizes to stack if necessary  */
3433
3434                         MCODECHECK((iptr->op1 << 1) + 64);
3435
3436                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3437                                 var_to_reg_int(s2, src, REG_ITMP1);
3438                                 M_BLTZ(s2, 0);
3439                                 codegen_addxcheckarefs(cd, mcodeptr);
3440
3441                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3442
3443                                 if (src->varkind != ARGVAR) {
3444                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3445                                 }
3446                         }
3447
3448                         /* a0 = dimension count */
3449
3450                         ICONST(rd->argintregs[0], iptr->op1);
3451
3452                         /* a1 = arraydescriptor */
3453
3454                         a = dseg_addaddress(cd, iptr->val.a);
3455                         M_ALD(rd->argintregs[1], REG_PV, a);
3456
3457                         /* a2 = pointer to dimensions = stack pointer */
3458
3459                         M_INTMOVE(REG_SP, rd->argintregs[2]);
3460
3461                         a = dseg_addaddress(cd, (void *) builtin_nmultianewarray);
3462                         M_ALD(REG_PV, REG_PV, a);
3463                         M_JSR(REG_RA, REG_PV);
3464                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3465                         if (s1 <= 32768)
3466                                 M_LDA(REG_PV, REG_RA, -s1);
3467                         else {
3468                                 s4 ml = -s1, mh = 0;
3469                                 while (ml < -32768) { ml += 65536; mh--; }
3470                                 M_LDA(REG_PV, REG_RA, ml);
3471                                 M_LDAH(REG_PV, REG_PV, mh);
3472                         }
3473                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3474                         M_INTMOVE(REG_RESULT, s1);
3475                         store_reg_to_var_int(iptr->dst, s1);
3476                         break;
3477
3478                 case ICMD_INLINE_START:
3479                 case ICMD_INLINE_END:
3480                         break;
3481
3482                 default: error ("Unknown pseudo command: %d", iptr->opc);
3483
3484
3485
3486         } /* switch */
3487
3488         } /* for instruction */
3489
3490         /* copy values to interface registers */
3491
3492         src = bptr->outstack;
3493         len = bptr->outdepth;
3494         MCODECHECK(64+len);
3495 #ifdef LSRA
3496         if (!opt_lsra)
3497 #endif
3498         while (src) {
3499                 len--;
3500                 if ((src->varkind != STACKVAR)) {
3501                         s2 = src->type;
3502                         if (IS_FLT_DBL_TYPE(s2)) {
3503                                 var_to_reg_flt(s1, src, REG_FTMP1);
3504                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3505                                         M_FLTMOVE(s1,rd->interfaces[len][s2].regoff);
3506                                         }
3507                                 else {
3508                                         M_DST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3509                                         }
3510                                 }
3511                         else {
3512                                 var_to_reg_int(s1, src, REG_ITMP1);
3513                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3514                                         M_INTMOVE(s1,rd->interfaces[len][s2].regoff);
3515                                         }
3516                                 else {
3517                                         M_LST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3518                                         }
3519                                 }
3520                         }
3521                 src = src->prev;
3522                 }
3523         } /* if (bptr -> flags >= BBREACHED) */
3524         } /* for basic block */
3525
3526         codegen_createlinenumbertable(cd);
3527
3528         {
3529         /* generate bound check stubs */
3530
3531         s4 *xcodeptr = NULL;
3532         branchref *bref;
3533
3534         for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3535                 gen_resolvebranch((u1*) cd->mcodebase + bref->branchpos,
3536                                   bref->branchpos,
3537                                                   (u1*) mcodeptr - cd->mcodebase);
3538
3539                 MCODECHECK(8);
3540
3541                 /* move index register into REG_ITMP1 */
3542                 M_MOV(bref->reg, REG_ITMP1);
3543                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3544
3545                 if (xcodeptr != NULL) {
3546                         M_BR(xcodeptr - mcodeptr - 1);
3547
3548                 } else {
3549                         xcodeptr = mcodeptr;
3550
3551                         a = dseg_addaddress(cd, asm_throw_and_handle_arrayindexoutofbounds_exception);
3552                         M_ALD(REG_PV, REG_PV, a);
3553
3554                         M_JSR(REG_RA, REG_PV);
3555
3556                         /* recompute pv */
3557                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3558                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3559                         else {
3560                                 s4 ml = -s1, mh = 0;
3561                                 while (ml < -32768) { ml += 65536; mh--; }
3562                                 M_LDA(REG_PV, REG_RA, ml);
3563                                 M_LDAH(REG_PV, REG_PV, mh);
3564                         }
3565                 }
3566         }
3567
3568         /* generate negative array size check stubs */
3569
3570         xcodeptr = NULL;
3571
3572         for (bref = cd->xcheckarefs; bref != NULL; bref = bref->next) {
3573                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3574                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3575                                                           bref->branchpos,
3576                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3577                         continue;
3578                 }
3579
3580                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3581                                   bref->branchpos,
3582                                                   (u1 *) mcodeptr - cd->mcodebase);
3583
3584                 MCODECHECK(8);
3585
3586                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3587
3588                 if (xcodeptr != NULL) {
3589                         M_BR(xcodeptr - mcodeptr - 1);
3590
3591                 } else {
3592                         xcodeptr = mcodeptr;
3593
3594
3595                         a = dseg_addaddress(cd, string_java_lang_NegativeArraySizeException);
3596                         M_ALD(REG_ITMP1_XPTR,REG_PV,a);
3597
3598                         a = dseg_addaddress(cd, asm_throw_and_handle_nat_exception);
3599                         M_ALD(REG_PV, REG_PV, a);
3600
3601                         M_JSR(REG_RA, REG_PV);
3602
3603                         /* recompute pv */
3604                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3605                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3606                         else {
3607                                 s4 ml = -s1, mh = 0;
3608                                 while (ml < -32768) { ml += 65536; mh--; }
3609                                 M_LDA(REG_PV, REG_RA, ml);
3610                                 M_LDAH(REG_PV, REG_PV, mh);
3611                         }
3612
3613
3614                 }
3615         }
3616
3617         /* generate cast check stubs */
3618
3619         xcodeptr = NULL;
3620
3621         for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3622                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3623                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3624                                                           bref->branchpos,
3625                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3626                         continue;
3627                 }
3628
3629                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3630                                   bref->branchpos,
3631                                                   (u1 *) mcodeptr - cd->mcodebase);
3632
3633                 MCODECHECK(8);
3634
3635                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3636
3637                 if (xcodeptr != NULL) {
3638                         M_BR(xcodeptr - mcodeptr - 1);
3639
3640                 } else {
3641                         xcodeptr = mcodeptr;
3642
3643                         a = dseg_addaddress(cd, string_java_lang_ClassCastException);
3644                         M_ALD(REG_ITMP1_XPTR,REG_PV,a);
3645
3646                         a = dseg_addaddress(cd, asm_throw_and_handle_nat_exception);
3647                         M_ALD(REG_PV, REG_PV, a);
3648
3649                         M_JSR(REG_RA, REG_PV);
3650
3651                         /* recompute pv */
3652                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3653                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3654                         else {
3655                                 s4 ml = -s1, mh = 0;
3656                                 while (ml < -32768) { ml += 65536; mh--; }
3657                                 M_LDA(REG_PV, REG_RA, ml);
3658                                 M_LDAH(REG_PV, REG_PV, mh);
3659                         }
3660
3661                 }
3662         }
3663
3664         /* generate exception check stubs */
3665
3666         xcodeptr = NULL;
3667
3668         for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
3669                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3670                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3671                                                           bref->branchpos,
3672                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3673                         continue;
3674                 }
3675
3676                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3677                                   bref->branchpos,
3678                                                   (u1 *) mcodeptr - cd->mcodebase);
3679
3680                 MCODECHECK(8);
3681
3682                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3683
3684                 if (xcodeptr != NULL) {
3685                         M_BR(xcodeptr - mcodeptr - 1);
3686
3687                 } else {
3688                         xcodeptr = mcodeptr;
3689
3690 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3691                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3692                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3693
3694                         a = dseg_addaddress(cd, &builtin_get_exceptionptrptr);
3695                         M_ALD(REG_PV, REG_PV, a);
3696                         M_JSR(REG_RA, REG_PV);
3697
3698                         /* recompute pv */
3699                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3700                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3701                         else {
3702                                 s4 ml = -s1, mh = 0;
3703                                 while (ml < -32768) { ml += 65536; mh--; }
3704                                 M_LDA(REG_PV, REG_RA, ml);
3705                                 M_LDAH(REG_PV, REG_PV, mh);
3706                         }
3707
3708                         M_ALD(REG_ITMP1_XPTR, REG_RESULT, 0);
3709                         M_AST(REG_ZERO, REG_RESULT, 0);
3710
3711                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3712                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3713 #else
3714                         a = dseg_addaddress(cd, &_exceptionptr);
3715                         M_ALD(REG_ITMP3, REG_PV, a);
3716                         M_ALD(REG_ITMP1_XPTR, REG_ITMP3, 0);
3717                         M_AST(REG_ZERO, REG_ITMP3, 0);
3718 #endif
3719
3720                         a = dseg_addaddress(cd, asm_refillin_and_handle_exception);
3721                         M_ALD(REG_PV, REG_PV, a);
3722
3723                         M_JMP(REG_RA, REG_PV);
3724
3725                         /* recompute pv */
3726                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3727                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3728                         else {
3729                                 s4 ml = -s1, mh = 0;
3730                                 while (ml < -32768) { ml += 65536; mh--; }
3731                                 M_LDA(REG_PV, REG_RA, ml);
3732                                 M_LDAH(REG_PV, REG_PV, mh);
3733                         }
3734
3735                 }
3736         }
3737
3738         /* generate null pointer check stubs */
3739
3740         xcodeptr = NULL;
3741
3742         for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
3743                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3744                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3745                                                           bref->branchpos,
3746                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3747                         continue;
3748                 }
3749
3750                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3751                                   bref->branchpos,
3752                                                   (u1 *) mcodeptr - cd->mcodebase);
3753
3754                 MCODECHECK(8);
3755
3756                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3757
3758                 if (xcodeptr != NULL) {
3759                         M_BR(xcodeptr - mcodeptr - 1);
3760
3761                 } else {
3762                         xcodeptr = mcodeptr;
3763
3764                         a = dseg_addaddress(cd, string_java_lang_NullPointerException);
3765                         M_ALD(REG_ITMP1_XPTR,REG_PV,a);
3766
3767                         a = dseg_addaddress(cd, asm_throw_and_handle_nat_exception);
3768                         M_ALD(REG_PV, REG_PV, a);
3769
3770                         M_JSR(REG_RA, REG_PV);
3771
3772                         /* recompute pv */
3773                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3774                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3775                         else {
3776                                 s4 ml = -s1, mh = 0;
3777                                 while (ml < -32768) { ml += 65536; mh--; }
3778                                 M_LDA(REG_PV, REG_RA, ml);
3779                                 M_LDAH(REG_PV, REG_PV, mh);
3780                         }
3781
3782                 }
3783         }
3784
3785         /* generate put/getstatic stub call code */
3786
3787         {
3788                 clinitref   *cref;
3789                 u4           mcode;
3790                 s4          *tmpmcodeptr;
3791
3792                 for (cref = cd->clinitrefs; cref != NULL; cref = cref->next) {
3793                         /* Get machine code which is patched back in later. The call is   */
3794                         /* 1 instruction word long.                                       */
3795                         xcodeptr = (s4 *) (cd->mcodebase + cref->branchpos);
3796                         mcode = *xcodeptr;
3797
3798                         /* patch in the call to call the following code (done at compile  */
3799                         /* time)                                                          */
3800
3801                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
3802                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
3803
3804                         M_BSR(REG_RA, tmpmcodeptr - (xcodeptr + 1));
3805
3806                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
3807
3808                         MCODECHECK(6);
3809
3810                         /* move class pointer into REG_ITMP2                              */
3811                         a = dseg_addaddress(cd, cref->class);
3812                         M_ALD(REG_ITMP1, REG_PV, a);
3813
3814                         /* move machine code onto stack                                   */
3815                         a = dseg_adds4(cd, mcode);
3816                         M_ILD(REG_ITMP3, REG_PV, a);
3817                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3818                         M_IST(REG_ITMP3, REG_SP, 0);
3819
3820                         a = dseg_addaddress(cd, asm_check_clinit);
3821                         M_ALD(REG_ITMP2, REG_PV, a);
3822                         M_JMP(REG_ZERO, REG_ITMP2);
3823                 }
3824         }
3825         }
3826
3827         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
3828 }
3829
3830
3831 /* function createcompilerstub *************************************************
3832
3833         creates a stub routine which calls the compiler
3834
3835 *******************************************************************************/
3836
3837 #define COMPSTUBSIZE    3
3838
3839 u1 *createcompilerstub(methodinfo *m)
3840 {
3841         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
3842         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
3843
3844                                             /* code for the stub                  */
3845         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
3846         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
3847                                                in reg 0 is used as method pointer */
3848         s[1] = (u8) m;                      /* literals to be adressed            */
3849         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3850
3851 #if defined(STATISTICS)
3852         if (opt_stat)
3853                 count_cstub_len += COMPSTUBSIZE * 8;
3854 #endif
3855
3856         return (u1 *) s;
3857 }
3858
3859
3860 /* function removecompilerstub *************************************************
3861
3862      deletes a compilerstub from memory  (simply by freeing it)
3863
3864 *******************************************************************************/
3865
3866 void removecompilerstub(u1 *stub)
3867 {
3868         CFREE(stub, COMPSTUBSIZE * 8);
3869 }
3870
3871
3872 /* function: createnativestub **************************************************
3873
3874         creates a stub routine which calls a native method
3875
3876 *******************************************************************************/
3877
3878
3879 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3880 #define NATIVESTUB_STACK          8/*ra,native result, oldThreadspecificHeadValue, addressOfThreadspecificHead, method, 0,0,ra*/
3881 #define NATIVESTUB_THREAD_EXTRA    (6 + 20) /*20 for additional frame creation*/
3882 #define NATIVESTUB_STACKTRACE_OFFSET   1
3883 #else
3884 #define NATIVESTUB_STACK          7/*ra,oldThreadspecificHeadValue, addressOfThreadspecificHead, method, 0,0,ra*/
3885 #define NATIVESTUB_THREAD_EXTRA    (1 + 20) /*20 for additional frame creation*/
3886 #define NATIVESTUB_STACKTRACE_OFFSET   0
3887 #endif
3888
3889 #define NATIVESTUB_SIZE           (44 + NATIVESTUB_THREAD_EXTRA - 1)
3890 #define NATIVESTUB_STATIC_SIZE         5
3891 #define NATIVESTUB_VERBOSE_SIZE        (39 + 13)
3892 #define NATIVESTUB_OFFSET         11
3893
3894 #if 0
3895 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3896 #define NATIVESTUB_STACK           2
3897 #define NATIVESTUB_THREAD_EXTRA    6
3898 #else
3899 #define NATIVESTUB_STACK           1
3900 #define NATIVESTUB_THREAD_EXTRA    1
3901 #endif
3902
3903 #define NATIVESTUB_SIZE            (44 + NATIVESTUB_THREAD_EXTRA - 1)
3904 #define NATIVESTUB_STATIC_SIZE     4
3905 #define NATIVESTUB_VERBOSE_SIZE    (39 + 13)
3906 #define NATIVESTUB_OFFSET          10
3907 #endif
3908
3909 u1 *createnativestub(functionptr f, methodinfo *m)
3910 {
3911         u8 *s;                              /* memory pointer to hold the stub    */
3912         u8 *cs;
3913         s4 *mcodeptr;                       /* code generation pointer            */
3914         s4 stackframesize = 0;              /* size of stackframe if needed       */
3915         s4 disp;
3916         s4 stubsize;
3917         codegendata  *cd;
3918         registerdata *rd;
3919         t_inlining_globals *id;
3920         s4 dumpsize;
3921
3922         /* mark start of dump memory area */
3923
3924         dumpsize = dump_size();
3925
3926         /* setup registers before using it */
3927
3928         cd = DNEW(codegendata);
3929         rd = DNEW(registerdata);
3930         id = DNEW(t_inlining_globals);
3931
3932         inlining_setup(m, id);
3933         reg_setup(m, rd, id);
3934
3935         descriptor2types(m);                /* set paramcount and paramtypes      */
3936
3937         stubsize = NATIVESTUB_SIZE;         /* calculate nativestub size          */
3938
3939         if ((m->flags & ACC_STATIC) && !m->class->initialized)
3940                 stubsize += NATIVESTUB_STATIC_SIZE;
3941
3942         if (runverbose)
3943                 stubsize += NATIVESTUB_VERBOSE_SIZE;
3944
3945         s = CNEW(u8, stubsize);             /* memory to hold the stub            */
3946         cs = s + NATIVESTUB_OFFSET;
3947         mcodeptr = (s4 *) cs;               /* code generation pointer            */
3948
3949         /* set some required varibles which are normally set by codegen_setup     */
3950         cd->mcodebase = (u1 *) mcodeptr;
3951         cd->clinitrefs = NULL;
3952
3953         *(cs-1)  = (u8) f;                  /* address of native method           */
3954 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3955         *(cs-2)  = (u8) &builtin_get_exceptionptrptr;
3956 #else
3957         *(cs-2)  = (u8) (&_exceptionptr);   /* address of exceptionptr            */
3958 #endif
3959         *(cs-3)  = (u8) asm_handle_nat_exception; /* addr of asm exception handler*/
3960         *(cs-4)  = (u8) (&env);             /* addr of jni_environement           */
3961         *(cs-5)  = (u8) builtin_trace_args;
3962         *(cs-6)  = (u8) m;
3963         *(cs-7)  = (u8) builtin_displaymethodstop;
3964         *(cs-8)  = (u8) m->class;
3965         *(cs-9)  = (u8) asm_check_clinit;
3966         *(cs-10) = (u8) &builtin_asm_get_stackframeinfo;
3967         *(cs-11) = (u8) NULL;               /* filled with machine code           */
3968
3969         M_LDA(REG_SP, REG_SP, -NATIVESTUB_STACK * 8);     /* build up stackframe  */
3970         M_AST(REG_RA, REG_SP, 0 * 8);       /* store return address               */
3971
3972         M_AST(REG_RA, REG_SP, (6+NATIVESTUB_STACKTRACE_OFFSET) * 8);       /* store return address  in stackinfo helper*/
3973
3974         /* if function is static, check for initialized */
3975
3976         if (m->flags & ACC_STATIC) {
3977         /* if class isn't yet initialized, do it */
3978                 if (!m->class->initialized) {
3979                         codegen_addclinitref(cd, mcodeptr, m->class);
3980                 }
3981         }
3982
3983         /* max. 39 +9 instructions */
3984         {
3985                 s4 p;
3986                 s4 t;
3987                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
3988                 M_AST(REG_RA, REG_SP, 1 * 8);
3989
3990                 /* save integer argument registers */
3991                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
3992                         M_LST(rd->argintregs[p], REG_SP, (2 + p) * 8);
3993                 }
3994
3995                 /* save and copy float arguments into integer registers */
3996                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
3997                         t = m->paramtypes[p];
3998
3999                         if (IS_FLT_DBL_TYPE(t)) {
4000                                 if (IS_2_WORD_TYPE(t)) {
4001                                         M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4002                                         M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4003
4004                                 } else {
4005                                         M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4006                                         M_ILD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4007                                 }
4008
4009                         } else {
4010                                 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4011                         }
4012                 }
4013
4014                 if (runverbose) {
4015                         M_ALD(REG_ITMP1, REG_PV, -6 * 8);
4016                         M_AST(REG_ITMP1, REG_SP, 0 * 8);
4017                         M_ALD(REG_PV, REG_PV, -5 * 8);
4018                         M_JSR(REG_RA, REG_PV);
4019                         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4020                         M_LDA(REG_PV, REG_RA, disp);
4021                 }
4022
4023
4024 /*stack info */
4025                 M_ALD(REG_PV, REG_PV, -10 * 8);      /* builtin_asm_get_stackframeinfo        */
4026                 M_JSR(REG_RA, REG_PV);
4027                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4028                 M_LDA(REG_PV, REG_RA, disp);
4029
4030 #if 0
4031                 M_MOV(REG_RESULT,REG_ITMP3);
4032                 M_LST(REG_RESULT,REG_ITMP3,0);
4033 #endif
4034                 M_LST(REG_RESULT,REG_SP, ((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8)+(2+NATIVESTUB_STACKTRACE_OFFSET)*8);/*save adress of pointer*/
4035                 M_LLD(REG_ITMP3,REG_RESULT,0); /* get pointer*/
4036                 M_LST(REG_ITMP3,REG_SP,(1+NATIVESTUB_STACKTRACE_OFFSET)*8+((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8)); /*save old value*/
4037                 M_LDA(REG_ITMP3,REG_SP,(1+NATIVESTUB_STACKTRACE_OFFSET)*8+((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8)); /*calculate new value*/
4038                 M_LLD(REG_ITMP2,REG_ITMP3,8);
4039                 M_LST(REG_ITMP3,REG_ITMP2,0); /*store new value*/
4040                 M_LLD(REG_ITMP2,REG_PV,-6*8);
4041                 M_LST(REG_ITMP2,REG_SP,(3+NATIVESTUB_STACKTRACE_OFFSET)*8+((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
4042                 M_LST(REG_ZERO,REG_SP,(4+NATIVESTUB_STACKTRACE_OFFSET)*8+((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
4043                 M_LST(REG_ZERO,REG_SP,(5+NATIVESTUB_STACKTRACE_OFFSET)*8+((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
4044 /*stack info -end */
4045
4046
4047                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
4048                         M_LLD(rd->argintregs[p], REG_SP, (2 + p) * 8);
4049                 }
4050
4051                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
4052                         t = m->paramtypes[p];
4053
4054                         if (IS_FLT_DBL_TYPE(t)) {
4055                                 if (IS_2_WORD_TYPE(t)) {
4056                                         M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4057
4058                                 } else {
4059                                         M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4060                                 }
4061
4062                         } else {
4063                                 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4064                         }
4065                 }
4066
4067                 M_ALD(REG_RA, REG_SP, 1 * 8);
4068                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
4069         }
4070
4071         /* save argument registers on stack -- if we have to */
4072         if ((m->flags & ACC_STATIC && m->paramcount > (INT_ARG_CNT - 2)) || m->paramcount > (INT_ARG_CNT - 1)) {
4073                 s4 i;
4074                 s4 paramshiftcnt = (m->flags & ACC_STATIC) ? 2 : 1;
4075                 s4 stackparamcnt = (m->paramcount > INT_ARG_CNT) ? m->paramcount - INT_ARG_CNT : 0;
4076
4077                 stackframesize = stackparamcnt + paramshiftcnt;
4078
4079                 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4080
4081                 /* copy stack arguments into new stack frame -- if any */
4082                 for (i = 0; i < stackparamcnt; i++) {
4083                         M_LLD(REG_ITMP1, REG_SP, (stackparamcnt + 1 + i) * 8);
4084                         M_LST(REG_ITMP1, REG_SP, (paramshiftcnt + i) * 8);
4085                 }
4086
4087                 if (m->flags & ACC_STATIC) {
4088                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4089                                 M_DST(rd->argfltregs[5], REG_SP, 1 * 8);
4090                         } else {
4091                                 M_LST(rd->argintregs[5], REG_SP, 1 * 8);
4092                         }
4093
4094                         if (IS_FLT_DBL_TYPE(m->paramtypes[4])) {
4095                                 M_DST(rd->argfltregs[4], REG_SP, 0 * 8);
4096                         } else {
4097                                 M_LST(rd->argintregs[4], REG_SP, 0 * 8);
4098                         }
4099
4100                 } else {
4101                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4102                                 M_DST(rd->argfltregs[5], REG_SP, 0 * 8);
4103                         } else {
4104                                 M_LST(rd->argintregs[5], REG_SP, 0 * 8);
4105                         }
4106                 }
4107         }
4108
4109         if (m->flags & ACC_STATIC) {
4110                 M_MOV(rd->argintregs[3], rd->argintregs[5]);
4111                 M_MOV(rd->argintregs[2], rd->argintregs[4]);
4112                 M_MOV(rd->argintregs[1], rd->argintregs[3]);
4113                 M_MOV(rd->argintregs[0], rd->argintregs[2]);
4114                 M_FMOV(rd->argfltregs[3], rd->argfltregs[5]);
4115                 M_FMOV(rd->argfltregs[2], rd->argfltregs[4]);
4116                 M_FMOV(rd->argfltregs[1], rd->argfltregs[3]);
4117                 M_FMOV(rd->argfltregs[0], rd->argfltregs[2]);
4118
4119                 /* put class into second argument register */
4120                 M_ALD(rd->argintregs[1], REG_PV, -8 * 8);
4121
4122         } else {
4123                 M_MOV(rd->argintregs[4], rd->argintregs[5]);
4124                 M_MOV(rd->argintregs[3], rd->argintregs[4]);
4125                 M_MOV(rd->argintregs[2], rd->argintregs[3]);
4126                 M_MOV(rd->argintregs[1], rd->argintregs[2]);
4127                 M_MOV(rd->argintregs[0], rd->argintregs[1]);
4128                 M_FMOV(rd->argfltregs[4], rd->argfltregs[5]);
4129                 M_FMOV(rd->argfltregs[3], rd->argfltregs[4]);
4130                 M_FMOV(rd->argfltregs[2], rd->argfltregs[3]);
4131                 M_FMOV(rd->argfltregs[1], rd->argfltregs[2]);
4132                 M_FMOV(rd->argfltregs[0], rd->argfltregs[1]);
4133         }
4134
4135         /* put env into first argument register */
4136         M_ALD(rd->argintregs[0], REG_PV, -4 * 8);
4137
4138         M_ALD(REG_PV, REG_PV, -1 * 8);      /* load adress of native method       */
4139         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4140         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4141         M_LDA(REG_PV, REG_RA, disp);        /* recompute pv from ra               */
4142
4143         /* remove stackframe if there is one */
4144         if (stackframesize) {
4145                 M_LDA(REG_SP, REG_SP, stackframesize * 8);
4146         }
4147
4148         /* 13 instructions */
4149         if (runverbose) {
4150                 M_LDA(REG_SP, REG_SP, -2 * 8);
4151                 M_ALD(rd->argintregs[0], REG_PV, -6 * 8); /* load method adress       */
4152                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4153                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4154                 M_MOV(REG_RESULT, rd->argintregs[1]);
4155                 M_FMOV(REG_FRESULT, rd->argfltregs[2]);
4156                 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
4157                 M_ALD(REG_PV, REG_PV, -7 * 8);  /* builtin_displaymethodstop          */
4158                 M_JSR(REG_RA, REG_PV);
4159                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4160                 M_LDA(REG_PV, REG_RA, disp);
4161                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4162                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4163                 M_LDA(REG_SP, REG_SP, 2 * 8);
4164         }
4165
4166         M_LLD(REG_ITMP3,REG_SP,(2+NATIVESTUB_STACKTRACE_OFFSET)*8); /*get address of stacktrace helper pointer*/
4167         M_LLD(REG_ITMP1,REG_SP,(1+NATIVESTUB_STACKTRACE_OFFSET)*8); /*get old value*/
4168         M_LST(REG_ITMP1,REG_ITMP3,0); /*set old value*/
4169
4170 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4171         if (IS_FLT_DBL_TYPE(m->returntype))
4172                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4173         else
4174                 M_AST(REG_RESULT, REG_SP, 1 * 8);
4175         M_ALD(REG_PV, REG_PV, -2 * 8);      /* builtin_get_exceptionptrptr        */
4176         M_JSR(REG_RA, REG_PV);
4177         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4178         M_LDA(REG_PV, REG_RA, disp);
4179         M_MOV(REG_RESULT, REG_ITMP3);
4180         if (IS_FLT_DBL_TYPE(m->returntype))
4181                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4182         else
4183                 M_ALD(REG_RESULT, REG_SP, 1 * 8);
4184 #else
4185         M_ALD(REG_ITMP3, REG_PV, -2 * 8);   /* get address of exceptionptr        */
4186 #endif
4187         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4188         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4189
4190         M_ALD(REG_RA, REG_SP, 0 * 8);       /* load return address                */
4191         M_LDA(REG_SP, REG_SP, NATIVESTUB_STACK * 8); /* remove stackframe         */
4192         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4193
4194         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4195
4196         M_ALD(REG_RA, REG_SP, 0 * 8);       /* load return address                */
4197         M_LDA(REG_SP, REG_SP, NATIVESTUB_STACK * 8); /* remove stackframe         */
4198         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4199         M_ALD(REG_ITMP3, REG_PV, -3 * 8);   /* load asm exception handler address */
4200         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4201
4202         /* generate put/getstatic stub call code */
4203
4204         {
4205                 s4          *xcodeptr;
4206                 clinitref   *cref;
4207                 s4          *tmpmcodeptr;
4208
4209                 /* there can only be one clinit ref entry                             */
4210                 cref = cd->clinitrefs;
4211
4212                 if (cref) {
4213                         /* Get machine code which is patched back in later. The call is   */
4214                         /* 1 instruction word long.                                       */
4215                         xcodeptr = (s4 *) (cd->mcodebase + cref->branchpos);
4216                         *(cs-11) = (u4) *xcodeptr;
4217
4218                         /* patch in the call to call the following code (done at compile  */
4219                         /* time)                                                          */
4220
4221                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4222                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4223
4224                         M_BSR(REG_RA, tmpmcodeptr - (xcodeptr + 1));
4225
4226                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4227
4228                         /* move class pointer into REG_ITMP2                              */
4229                         M_ALD(REG_ITMP1, REG_PV, -8 * 8);     /* class                    */
4230
4231                         /* move machine code into REG_ITMP3                               */
4232                         M_ILD(REG_ITMP3, REG_PV, -11 * 8);    /* machine code             */
4233                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
4234                         M_IST(REG_ITMP3, REG_SP, 0);
4235
4236                         M_ALD(REG_ITMP2, REG_PV, -9 * 8);     /* asm_check_clinit         */
4237                         M_JMP(REG_ZERO, REG_ITMP2);
4238                 }
4239         }
4240
4241 #if 0
4242         dolog_plain("stubsize: %d (for %d params)\n", (int) (mcodeptr - (s4*) s), m->paramcount);
4243 #endif
4244
4245 #if defined(STATISTICS)
4246         if (opt_stat)
4247                 count_nstub_len += NATIVESTUB_SIZE * 8;
4248 #endif
4249
4250         /* release dump area */
4251
4252         dump_release(dumpsize);
4253
4254         return (u1 *) (s + NATIVESTUB_OFFSET);
4255 }
4256
4257
4258 /* function: removenativestub **************************************************
4259
4260     removes a previously created native-stub from memory
4261
4262 *******************************************************************************/
4263
4264 void removenativestub(u1 *stub)
4265 {
4266         CFREE((u8 *) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
4267 }
4268
4269
4270 /*
4271  * These are local overrides for various environment variables in Emacs.
4272  * Please do not remove this and leave it at the end of the file, where
4273  * Emacs will automagically detect them.
4274  * ---------------------------------------------------------------------
4275  * Local variables:
4276  * mode: c
4277  * indent-tabs-mode: t
4278  * c-basic-offset: 4
4279  * tab-width: 4
4280  * End:
4281  */