src/vm/jit/alpha/codegen.c

   1 /* jit/alpha/codegen.c - machine code generator for alpha
   2
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
   4    Institut f. Computersprachen, TU Wien
   5    R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
   6    S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
   7    J. Wenninger
   8
   9    This file is part of CACAO.
  10
  11    This program is free software; you can redistribute it and/or
  12    modify it under the terms of the GNU General Public License as
  13    published by the Free Software Foundation; either version 2, or (at
  14    your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful, but
  17    WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19    General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  24    02111-1307, USA.
  25
  26    Contact: cacao@complang.tuwien.ac.at
  27
  28    Authors: Andreas Krall
  29             Reinhard Grafl
  30
  31    $Id: codegen.c 948 2004-03-07 22:12:28Z twisti $
  32
  33 */
  34
  35
  36 #include <stdio.h>
  37 #include <signal.h>
  38 #include "types.h"
  39 #include "main.h"
  40 #include "codegen.h"
  41 #include "jit.h"
  42 #include "parse.h"
  43 #include "reg.h"
  44 #include "builtin.h"
  45 #include "asmpart.h"
  46 #include "jni.h"
  47 #include "loader.h"
  48 #include "tables.h"
  49 #include "native.h"
  50 #include "main.h"
  51
  52 /* include independent code generation stuff */
  53 #include "codegen.inc"
  54 #include "reg.inc"
  55
  56
  57 /* *****************************************************************************
  58
  59 Datatypes and Register Allocations:
  60 -----------------------------------
  61
  62 On 64-bit-machines (like the Alpha) all operands are stored in the
  63 registers in a 64-bit form, even when the correspondig JavaVM  operands
  64 only need 32 bits. This is done by a canonical representation:
  65
  66 32-bit integers are allways stored as sign-extended 64-bit values (this
  67 approach is directly supported by the Alpha architecture and is very easy
  68 to implement).
  69
  70 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  71 expanding the exponent and mantissa with zeroes. (also supported by the
  72 architecture)
  73
  74
  75 Stackframes:
  76
  77 The calling conventions and the layout of the stack is  explained in detail
  78 in the documention file: calling.doc
  79
  80 *******************************************************************************/
  81
  82
  83 /* register descripton - array ************************************************/
  84
  85 /* #define REG_RES   0         reserved register for OS or code generator     */
  86 /* #define REG_RET   1         return value register                          */
  87 /* #define REG_EXC   2         exception value register (only old jit)        */
  88 /* #define REG_SAV   3         (callee) saved register                        */
  89 /* #define REG_TMP   4         scratch temporary register (caller saved)      */
  90 /* #define REG_ARG   5         argument register (caller saved)               */
  91
  92 /* #define REG_END   -1        last entry in tables */
  93
  94 int nregdescint[] = {
  95         REG_RET, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
  96         REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
  97         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
  98         REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
  99         REG_END };
 100
 101 /* for use of reserved registers, see comment above */
 102
 103 int nregdescfloat[] = {
 104         REG_RET, REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
 105         REG_SAV, REG_SAV, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 106         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
 107         REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES,
 108         REG_END };
 109
 110 /* for use of reserved registers, see comment above */
 111
 112
 113 /* parameter allocation mode */
 114
 115 int nreg_parammode = PARAMMODE_NUMBERED;
 116
 117    /* parameter-registers will be allocated by assigning the
 118       1. parameter:   int/float-reg 16
 119       2. parameter:   int/float-reg 17
 120       3. parameter:   int/float-reg 18 ....
 121    */
 122
 123
 124 /* stackframe-infos ***********************************************************/
 125
 126 int parentargs_base; /* offset in stackframe for the parameter from the caller*/
 127
 128 /* -> see file 'calling.doc' */
 129
 130
 131 /* additional functions and macros to generate code ***************************/
 132
 133 /* #define BlockPtrOfPC(pc)        block+block_index[pc] */
 134 #define BlockPtrOfPC(pc)  ((basicblock *) iptr->target)
 135
 136
 137 #ifdef STATISTICS
 138 #define COUNT_SPILLS count_spills++
 139 #else
 140 #define COUNT_SPILLS
 141 #endif
 142
 143
 144 /* gen_nullptr_check(objreg) */
 145
 146 #define gen_nullptr_check(objreg) \
 147     if (checknull) { \
 148         M_BEQZ((objreg), 0); \
 149         codegen_addxnullrefs(mcodeptr); \
 150     }
 151
 152
 153 /* MCODECHECK(icnt) */
 154
 155 #define MCODECHECK(icnt) \
 156         if((mcodeptr + (icnt)) > mcodeend) mcodeptr = codegen_increase((u1*) mcodeptr)
 157
 158 /* M_INTMOVE:
 159      generates an integer-move from register a to b.
 160      if a and b are the same int-register, no code will be generated.
 161 */
 162
 163 #define M_INTMOVE(a,b) if (a != b) { M_MOV(a, b); }
 164
 165
 166 /* M_FLTMOVE:
 167     generates a floating-point-move from register a to b.
 168     if a and b are the same float-register, no code will be generated
 169 */
 170
 171 #define M_FLTMOVE(a,b) if (a != b) { M_FMOV(a, b); }
 172
 173
 174 /* var_to_reg_xxx:
 175     this function generates code to fetch data from a pseudo-register
 176     into a real register.
 177     If the pseudo-register has actually been assigned to a real
 178     register, no code will be emitted, since following operations
 179     can use this register directly.
 180
 181     v: pseudoregister to be fetched from
 182     tempregnum: temporary register to be used if v is actually spilled to ram
 183
 184     return: the register number, where the operand can be found after
 185             fetching (this wil be either tempregnum or the register
 186             number allready given to v)
 187 */
 188
 189 #define var_to_reg_int(regnr,v,tempnr) { \
 190         if ((v)->flags & INMEMORY) \
 191                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 192         else regnr=(v)->regoff; \
 193 }
 194
 195
 196 #define var_to_reg_flt(regnr,v,tempnr) { \
 197         if ((v)->flags & INMEMORY) \
 198                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 199         else regnr=(v)->regoff; \
 200 }
 201
 202
 203 /* reg_of_var:
 204     This function determines a register, to which the result of an operation
 205     should go, when it is ultimatively intended to store the result in
 206     pseudoregister v.
 207     If v is assigned to an actual register, this register will be returned.
 208     Otherwise (when v is spilled) this function returns tempregnum.
 209     If not already done, regoff and flags are set in the stack location.
 210 */
 211
 212 static int reg_of_var(stackptr v, int tempregnum)
 213 {
 214         varinfo      *var;
 215
 216         switch (v->varkind) {
 217                 case TEMPVAR:
 218                         if (!(v->flags & INMEMORY))
 219                                 return(v->regoff);
 220                         break;
 221                 case STACKVAR:
 222                         var = &(interfaces[v->varnum][v->type]);
 223                         v->regoff = var->regoff;
 224                         if (!(var->flags & INMEMORY))
 225                                 return(var->regoff);
 226                         break;
 227                 case LOCALVAR:
 228                         var = &(locals[v->varnum][v->type]);
 229                         v->regoff = var->regoff;
 230                         if (!(var->flags & INMEMORY))
 231                                 return(var->regoff);
 232                         break;
 233                 case ARGVAR:
 234                         v->regoff = v->varnum;
 235                         if (IS_FLT_DBL_TYPE(v->type)) {
 236                                 if (v->varnum < fltreg_argnum) {
 237                                         v->regoff = argfltregs[v->varnum];
 238                                         return(argfltregs[v->varnum]);
 239                                         }
 240                                 }
 241                         else
 242                                 if (v->varnum < intreg_argnum) {
 243                                         v->regoff = argintregs[v->varnum];
 244                                         return(argintregs[v->varnum]);
 245                                         }
 246                         v->regoff -= intreg_argnum;
 247                         break;
 248                 }
 249         v->flags |= INMEMORY;
 250         return tempregnum;
 251 }
 252
 253
 254 /* store_reg_to_var_xxx:
 255     This function generates the code to store the result of an operation
 256     back into a spilled pseudo-variable.
 257     If the pseudo-variable has not been spilled in the first place, this
 258     function will generate nothing.
 259
 260     v ............ Pseudovariable
 261     tempregnum ... Number of the temporary registers as returned by
 262                    reg_of_var.
 263 */
 264
 265 #define store_reg_to_var_int(sptr, tempregnum) {       \
 266         if ((sptr)->flags & INMEMORY) {                    \
 267                 COUNT_SPILLS;                                  \
 268                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 269                 }                                              \
 270         }
 271
 272 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 273         if ((sptr)->flags & INMEMORY) {                    \
 274                 COUNT_SPILLS;                                  \
 275                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 276                 }                                              \
 277         }
 278
 279
 280 /* NullPointerException handlers and exception handling initialisation        */
 281
 282 typedef struct sigctx_struct {
 283
 284         long          sc_onstack;           /* sigstack state to restore          */
 285         long          sc_mask;              /* signal mask to restore             */
 286         long          sc_pc;                /* pc at time of signal               */
 287         long          sc_ps;                /* psl to retore                      */
 288         long          sc_regs[32];          /* processor regs 0 to 31             */
 289         long          sc_ownedfp;           /* fp has been used                   */
 290         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 291         unsigned long sc_fpcr;              /* floating point control register    */
 292         unsigned long sc_fp_control;        /* software fpcr                      */
 293                                             /* rest is unused                     */
 294         unsigned long sc_reserved1, sc_reserved2;
 295         unsigned long sc_ssize;
 296         char          *sc_sbase;
 297         unsigned long sc_traparg_a0;
 298         unsigned long sc_traparg_a1;
 299         unsigned long sc_traparg_a2;
 300         unsigned long sc_fp_trap_pc;
 301         unsigned long sc_fp_trigger_sum;
 302         unsigned long sc_fp_trigger_inst;
 303         unsigned long sc_retcode[2];
 304 } sigctx_struct;
 305
 306
 307 /* NullPointerException signal handler for hardware null pointer check */
 308
 309 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 310 {
 311         sigset_t nsig;
 312         int      instr;
 313         long     faultaddr;
 314
 315         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 316
 317         instr = *((int*)(sigctx->sc_pc));
 318         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 319
 320         if (faultaddr == 0) {
 321                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 322                 sigemptyset(&nsig);
 323                 sigaddset(&nsig, sig);
 324                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 325
 326                 if (!proto_java_lang_NullPointerException) {
 327                         proto_java_lang_NullPointerException =
 328                                 new_exception(string_java_lang_NullPointerException);
 329                 }
 330
 331                 sigctx->sc_regs[REG_ITMP1_XPTR] =
 332                                             (long) proto_java_lang_NullPointerException;
 333                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 334                 sigctx->sc_pc = (long) asm_handle_exception;
 335                 return;
 336
 337         } else {
 338                 faultaddr += (long) ((instr << 16) >> 16);
 339                 fprintf(stderr, "faulting address: 0x%16lx\n", faultaddr);
 340                 panic("Stack overflow");
 341         }
 342 }
 343
 344
 345 #ifdef __osf__
 346
 347 void init_exceptions(void)
 348 {
 349
 350 #else /* Linux */
 351
 352 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 353         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 354         Digital Unix this is done automatically.
 355 */
 356
 357 #include <asm/fpu.h>
 358
 359 extern unsigned long ieee_get_fp_control();
 360 extern void ieee_set_fp_control(unsigned long fp_control);
 361
 362 void init_exceptions(void)
 363 {
 364 /* initialize floating point control */
 365
 366 ieee_set_fp_control(ieee_get_fp_control()
 367                     & ~IEEE_TRAP_ENABLE_INV
 368                     & ~IEEE_TRAP_ENABLE_DZE
 369 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 370                     & ~IEEE_TRAP_ENABLE_OVF);
 371 #endif
 372
 373         /* install signal handlers we need to convert to exceptions */
 374
 375         if (!checknull) {
 376 #if defined(SIGSEGV)
 377                 signal(SIGSEGV, (void*) catch_NullPointerException);
 378 #endif
 379
 380 #if defined(SIGBUS)
 381                 signal(SIGBUS, (void*) catch_NullPointerException);
 382 #endif
 383         }
 384 }
 385
 386
 387 /* function gen_mcode **********************************************************
 388
 389         generates machine code
 390
 391 *******************************************************************************/
 392
 393 void codegen()
 394 {
 395         int  len, s1, s2, s3, d;
 396         s4   a;
 397         s4          *mcodeptr;
 398         stackptr    src;
 399         varinfo     *var;
 400         basicblock  *bptr;
 401         instruction *iptr;
 402         xtable *ex;
 403
 404         {
 405         int p, pa, t, l, r;
 406
 407         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 408
 409         /* space to save used callee saved registers */
 410
 411         savedregs_num += (savintregcnt - maxsavintreguse);
 412         savedregs_num += (savfltregcnt - maxsavfltreguse);
 413
 414         parentargs_base = maxmemuse + savedregs_num;
 415
 416 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 417
 418         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 419                 parentargs_base++;
 420
 421 #endif
 422
 423         /* create method header */
 424
 425         (void) dseg_addaddress(method);                         /* MethodPointer  */
 426         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 427
 428 #ifdef USE_THREADS
 429
 430         /* IsSync contains the offset relative to the stack pointer for the
 431            argument of monitor_exit used in the exception handler. Since the
 432            offset could be zero and give a wrong meaning of the flag it is
 433            offset by one.
 434         */
 435
 436         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 437                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 438         else
 439
 440 #endif
 441
 442         (void) dseg_adds4(0);                                   /* IsSync         */
 443
 444         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 445         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 446         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 447         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 448
 449         /* create exception table */
 450
 451         for (ex = extable; ex != NULL; ex = ex->down) {
 452
 453 #ifdef LOOP_DEBUG
 454                 if (ex->start != NULL)
 455                         printf("adding start - %d - ", ex->start->debug_nr);
 456                 else {
 457                         printf("PANIC - start is NULL");
 458                         exit(-1);
 459                 }
 460 #endif
 461
 462                 dseg_addtarget(ex->start);
 463
 464 #ifdef LOOP_DEBUG
 465                 if (ex->end != NULL)
 466                         printf("adding end - %d - ", ex->end->debug_nr);
 467                 else {
 468                         printf("PANIC - end is NULL");
 469                         exit(-1);
 470                 }
 471 #endif
 472
 473                 dseg_addtarget(ex->end);
 474
 475 #ifdef LOOP_DEBUG
 476                 if (ex->handler != NULL)
 477                         printf("adding handler - %d\n", ex->handler->debug_nr);
 478                 else {
 479                         printf("PANIC - handler is NULL");
 480                         exit(-1);
 481                 }
 482 #endif
 483
 484                 dseg_addtarget(ex->handler);
 485
 486                 (void) dseg_addaddress(ex->catchtype);
 487                 }
 488
 489         /* initialize mcode variables */
 490
 491         mcodeptr = (s4*) mcodebase;
 492         mcodeend = (s4*) (mcodebase + mcodesize);
 493         MCODECHECK(128 + mparamcount);
 494
 495         /* create stack frame (if necessary) */
 496
 497         if (parentargs_base)
 498                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 499
 500         /* save return address and used callee saved registers */
 501
 502         p = parentargs_base;
 503         if (!isleafmethod)
 504                 {p--;  M_AST (REG_RA, REG_SP, 8*p);}
 505         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 506                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 507         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 508                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 509
 510         /* save monitorenter argument */
 511
 512 #ifdef USE_THREADS
 513         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 514                 if (method->flags & ACC_STATIC) {
 515                         p = dseg_addaddress (class);
 516                         M_ALD(REG_ITMP1, REG_PV, p);
 517                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 518                         }
 519                 else {
 520                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 521                         }
 522                 }
 523 #endif
 524
 525         /* copy argument registers to stack and call trace function with pointer
 526            to arguments on stack.
 527         */
 528
 529         if (runverbose) {
 530                 int disp;
 531                 M_LDA(REG_SP, REG_SP, -(14 * 8));
 532                 M_AST(REG_RA, REG_SP, 1 * 8);
 533
 534                 /* save integer argument registers */
 535                 for (p = 0; p < mparamcount && p < INT_ARG_CNT; p++) {
 536                         M_LST(argintregs[p], REG_SP,  (2 + p) * 8);
 537                 }
 538
 539                 /* save and copy float arguments into integer registers */
 540                 for (p = 0; p < mparamcount && p < FLT_ARG_CNT; p++) {
 541                         t = mparamtypes[p];
 542
 543                         if (IS_FLT_DBL_TYPE(t)) {
 544                                 if (IS_2_WORD_TYPE(t)) {
 545                                         M_DST(argfltregs[p], REG_SP, (8 + p) * 8);
 546                                 } else {
 547                                         M_FST(argfltregs[p], REG_SP, (8 + p) * 8);
 548                                 }
 549
 550                                 M_LLD(argintregs[p], REG_SP, (8 + p) * 8);
 551
 552                         } else {
 553                                 M_DST(argfltregs[p], REG_SP, (8 + p) * 8);
 554                         }
 555                 }
 556
 557                 p = dseg_addaddress(method);
 558                 M_ALD(REG_ITMP1, REG_PV, p);
 559                 M_AST(REG_ITMP1, REG_SP, 0);
 560                 p = dseg_addaddress((void *) builtin_trace_args);
 561                 M_ALD(REG_PV, REG_PV, p);
 562                 M_JSR(REG_RA, REG_PV);
 563                 disp = -(int)((u1 *) mcodeptr - mcodebase);
 564                 M_LDA(REG_PV, REG_RA, disp);
 565                 M_ALD(REG_RA, REG_SP, 1 * 8);
 566
 567                 for (p = 0; p < mparamcount && p < INT_ARG_CNT; p++) {
 568                         M_LLD(argintregs[p], REG_SP,  (2 + p) * 8);
 569                 }
 570
 571                 for (p = 0; p < mparamcount && p < FLT_ARG_CNT; p++) {
 572                         t = mparamtypes[p];
 573
 574                         if (IS_FLT_DBL_TYPE(t)) {
 575                                 if (IS_2_WORD_TYPE(t)) {
 576                                         M_DLD(argfltregs[p], REG_SP, (8 + p) * 8);
 577                                 } else {
 578                                         M_FLD(argfltregs[p], REG_SP, (8 + p) * 8);
 579                                 }
 580                         } else {
 581                                 M_DLD(argfltregs[p], REG_SP, (8 + p) * 8);
 582                         }
 583                 }
 584
 585                 M_LDA (REG_SP, REG_SP, 14 * 8);
 586         }
 587
 588         /* take arguments out of register or stack frame */
 589
 590         for (p = 0, l = 0; p < mparamcount; p++) {
 591                 t = mparamtypes[p];
 592                 var = &(locals[l][t]);
 593                 l++;
 594                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 595                         l++;
 596                 if (var->type < 0)
 597                         continue;
 598                 r = var->regoff;
 599                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 600                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 601                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 602                                         {M_INTMOVE (argintregs[p], r);}
 603                                 else                                 /* reg arg -> spilled    */
 604                                         M_LST (argintregs[p], REG_SP, 8 * r);
 605                                 }
 606                         else {                                   /* stack arguments       */
 607                                 pa = p - INT_ARG_CNT;
 608                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 609                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 610                                 else {                               /* stack arg -> spilled  */
 611                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 612                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 613                                         }
 614                                 }
 615                         }
 616                 else {                                       /* floating args         */
 617                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 618                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 619                                         {M_FLTMOVE (argfltregs[p], r);}
 620                                 else                                             /* reg arg -> spilled    */
 621                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 622                                 }
 623                         else {                                   /* stack arguments       */
 624                                 pa = p - FLT_ARG_CNT;
 625                                 if (!(var->flags & INMEMORY))        /* stack-arg -> register */
 626                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 627                                 else {                               /* stack-arg -> spilled  */
 628                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 629                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 630                                         }
 631                                 }
 632                         }
 633                 }  /* end for */
 634
 635         /* call trace function */
 636
 637 #if 0
 638         if (runverbose && !isleafmethod) {
 639                 M_LDA (REG_SP, REG_SP, -8);
 640                 p = dseg_addaddress (method);
 641                 M_ALD(REG_ITMP1, REG_PV, p);
 642                 M_AST(REG_ITMP1, REG_SP, 0);
 643                 p = dseg_addaddress ((void*) (builtin_trace_args));
 644                 M_ALD(REG_PV, REG_PV, p);
 645                 M_JSR(REG_RA, REG_PV);
 646                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 647                 M_LDA(REG_SP, REG_SP, 8);
 648                 }
 649 #endif
 650
 651         /* call monitorenter function */
 652
 653 #ifdef USE_THREADS
 654         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 655                 int disp;
 656                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 657                 M_ALD(REG_PV, REG_PV, p);
 658                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 659                 M_JSR(REG_RA, REG_PV);
 660                 disp = -(int)((u1*) mcodeptr - mcodebase);
 661                 M_LDA(REG_PV, REG_RA, disp);
 662                 }
 663 #endif
 664         }
 665
 666         /* end of header generation */
 667
 668         /* walk through all basic blocks */
 669         for (bptr = block; bptr != NULL; bptr = bptr->next) {
 670
 671                 bptr->mpc = (int)((u1*) mcodeptr - mcodebase);
 672
 673                 if (bptr->flags >= BBREACHED) {
 674
 675                 /* branch resolving */
 676
 677                 {
 678                 branchref *brefs;
 679                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 680                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 681                                           brefs->branchpos, bptr->mpc);
 682                         }
 683                 }
 684
 685                 /* copy interface registers to their destination */
 686
 687                 src = bptr->instack;
 688                 len = bptr->indepth;
 689                 MCODECHECK(64+len);
 690                 while (src != NULL) {
 691                         len--;
 692                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 693                                 d = reg_of_var(src, REG_ITMP1);
 694                                 M_INTMOVE(REG_ITMP1, d);
 695                                 store_reg_to_var_int(src, d);
 696                                 }
 697                         else {
 698                                 d = reg_of_var(src, REG_IFTMP);
 699                                 if ((src->varkind != STACKVAR)) {
 700                                         s2 = src->type;
 701                                         if (IS_FLT_DBL_TYPE(s2)) {
 702                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 703                                                         s1 = interfaces[len][s2].regoff;
 704                                                         M_FLTMOVE(s1,d);
 705                                                         }
 706                                                 else {
 707                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 708                                                         }
 709                                                 store_reg_to_var_flt(src, d);
 710                                                 }
 711                                         else {
 712                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 713                                                         s1 = interfaces[len][s2].regoff;
 714                                                         M_INTMOVE(s1,d);
 715                                                         }
 716                                                 else {
 717                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 718                                                         }
 719                                                 store_reg_to_var_int(src, d);
 720                                                 }
 721                                         }
 722                                 }
 723                         src = src->prev;
 724                         }
 725
 726                 /* walk through all instructions */
 727
 728                 src = bptr->instack;
 729                 len = bptr->icount;
 730                 for (iptr = bptr->iinstr;
 731                     len > 0;
 732                     src = iptr->dst, len--, iptr++) {
 733
 734         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 735         switch (iptr->opc) {
 736
 737                 case ICMD_NOP:        /* ...  ==> ...                                 */
 738                         break;
 739
 740                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 741
 742                         var_to_reg_int(s1, src, REG_ITMP1);
 743                         M_BEQZ(s1, 0);
 744                         codegen_addxnullrefs(mcodeptr);
 745                         break;
 746
 747                 /* constant operations ************************************************/
 748
 749 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 750                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 751
 752 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 753                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 754
 755                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 756                                       /* op1 = 0, val.i = constant                    */
 757
 758                         d = reg_of_var(iptr->dst, REG_ITMP1);
 759                         ICONST(d, iptr->val.i);
 760                         store_reg_to_var_int(iptr->dst, d);
 761                         break;
 762
 763                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 764                                       /* op1 = 0, val.l = constant                    */
 765
 766                         d = reg_of_var(iptr->dst, REG_ITMP1);
 767                         LCONST(d, iptr->val.l);
 768                         store_reg_to_var_int(iptr->dst, d);
 769                         break;
 770
 771                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 772                                       /* op1 = 0, val.f = constant                    */
 773
 774                         d = reg_of_var(iptr->dst, REG_FTMP1);
 775                         a = dseg_addfloat(iptr->val.f);
 776                         M_FLD(d, REG_PV, a);
 777                         store_reg_to_var_flt(iptr->dst, d);
 778                         break;
 779
 780                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 781                                       /* op1 = 0, val.d = constant                    */
 782
 783                         d = reg_of_var(iptr->dst, REG_FTMP1);
 784                         a = dseg_adddouble(iptr->val.d);
 785                         M_DLD(d, REG_PV, a);
 786                         store_reg_to_var_flt(iptr->dst, d);
 787                         break;
 788
 789                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 790                                       /* op1 = 0, val.a = constant                    */
 791
 792                         d = reg_of_var(iptr->dst, REG_ITMP1);
 793                         if (iptr->val.a) {
 794                                 a = dseg_addaddress (iptr->val.a);
 795                                 M_ALD(d, REG_PV, a);
 796                                 }
 797                         else {
 798                                 M_INTMOVE(REG_ZERO, d);
 799                                 }
 800                         store_reg_to_var_int(iptr->dst, d);
 801                         break;
 802
 803
 804                 /* load/store operations **********************************************/
 805
 806                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 807                 case ICMD_LLOAD:      /* op1 = local variable                         */
 808                 case ICMD_ALOAD:
 809
 810                         d = reg_of_var(iptr->dst, REG_ITMP1);
 811                         if ((iptr->dst->varkind == LOCALVAR) &&
 812                             (iptr->dst->varnum == iptr->op1))
 813                                 break;
 814                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 815                         if (var->flags & INMEMORY)
 816                                 M_LLD(d, REG_SP, 8 * var->regoff);
 817                         else
 818                                 {M_INTMOVE(var->regoff,d);}
 819                         store_reg_to_var_int(iptr->dst, d);
 820                         break;
 821
 822                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 823                 case ICMD_DLOAD:      /* op1 = local variable                         */
 824
 825                         d = reg_of_var(iptr->dst, REG_FTMP1);
 826                         if ((iptr->dst->varkind == LOCALVAR) &&
 827                             (iptr->dst->varnum == iptr->op1))
 828                                 break;
 829                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 830                         if (var->flags & INMEMORY)
 831                                 M_DLD(d, REG_SP, 8 * var->regoff);
 832                         else
 833                                 {M_FLTMOVE(var->regoff,d);}
 834                         store_reg_to_var_flt(iptr->dst, d);
 835                         break;
 836
 837
 838                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 839                 case ICMD_LSTORE:     /* op1 = local variable                         */
 840                 case ICMD_ASTORE:
 841
 842                         if ((src->varkind == LOCALVAR) &&
 843                             (src->varnum == iptr->op1))
 844                                 break;
 845                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 846                         if (var->flags & INMEMORY) {
 847                                 var_to_reg_int(s1, src, REG_ITMP1);
 848                                 M_LST(s1, REG_SP, 8 * var->regoff);
 849                                 }
 850                         else {
 851                                 var_to_reg_int(s1, src, var->regoff);
 852                                 M_INTMOVE(s1, var->regoff);
 853                                 }
 854                         break;
 855
 856                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 857                 case ICMD_DSTORE:     /* op1 = local variable                         */
 858
 859                         if ((src->varkind == LOCALVAR) &&
 860                             (src->varnum == iptr->op1))
 861                                 break;
 862                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 863                         if (var->flags & INMEMORY) {
 864                                 var_to_reg_flt(s1, src, REG_FTMP1);
 865                                 M_DST(s1, REG_SP, 8 * var->regoff);
 866                                 }
 867                         else {
 868                                 var_to_reg_flt(s1, src, var->regoff);
 869                                 M_FLTMOVE(s1, var->regoff);
 870                                 }
 871                         break;
 872
 873
 874                 /* pop/dup/swap operations ********************************************/
 875
 876                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 877
 878                 case ICMD_POP:        /* ..., value  ==> ...                          */
 879                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 880                         break;
 881
 882 #define M_COPY(from,to) \
 883                         d = reg_of_var(to, REG_IFTMP); \
 884                         if ((from->regoff != to->regoff) || \
 885                             ((from->flags ^ to->flags) & INMEMORY)) { \
 886                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 887                                         var_to_reg_flt(s1, from, d); \
 888                                         M_FLTMOVE(s1,d); \
 889                                         store_reg_to_var_flt(to, d); \
 890                                         }\
 891                                 else { \
 892                                         var_to_reg_int(s1, from, d); \
 893                                         M_INTMOVE(s1,d); \
 894                                         store_reg_to_var_int(to, d); \
 895                                         }\
 896                                 }
 897
 898                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 899                         M_COPY(src, iptr->dst);
 900                         break;
 901
 902                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 903
 904                         M_COPY(src,       iptr->dst->prev->prev);
 905
 906                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 907
 908                         M_COPY(src,       iptr->dst);
 909                         M_COPY(src->prev, iptr->dst->prev);
 910                         break;
 911
 912                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 913
 914                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 915
 916                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 917
 918                         M_COPY(src,             iptr->dst);
 919                         M_COPY(src->prev,       iptr->dst->prev);
 920                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 921                         M_COPY(src, iptr->dst->prev->prev->prev);
 922                         break;
 923
 924                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 925
 926                         M_COPY(src,                   iptr->dst);
 927                         M_COPY(src->prev,             iptr->dst->prev);
 928                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 929                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 930                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 931                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 932                         break;
 933
 934                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 935
 936                         M_COPY(src, iptr->dst->prev);
 937                         M_COPY(src->prev, iptr->dst);
 938                         break;
 939
 940
 941                 /* integer operations *************************************************/
 942
 943                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 944
 945                         var_to_reg_int(s1, src, REG_ITMP1);
 946                         d = reg_of_var(iptr->dst, REG_ITMP3);
 947                         M_ISUB(REG_ZERO, s1, d);
 948                         store_reg_to_var_int(iptr->dst, d);
 949                         break;
 950
 951                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 952
 953                         var_to_reg_int(s1, src, REG_ITMP1);
 954                         d = reg_of_var(iptr->dst, REG_ITMP3);
 955                         M_LSUB(REG_ZERO, s1, d);
 956                         store_reg_to_var_int(iptr->dst, d);
 957                         break;
 958
 959                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 960
 961                         var_to_reg_int(s1, src, REG_ITMP1);
 962                         d = reg_of_var(iptr->dst, REG_ITMP3);
 963                         M_INTMOVE(s1, d);
 964                         store_reg_to_var_int(iptr->dst, d);
 965                         break;
 966
 967                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 968
 969                         var_to_reg_int(s1, src, REG_ITMP1);
 970                         d = reg_of_var(iptr->dst, REG_ITMP3);
 971                         M_IADD(s1, REG_ZERO, d );
 972                         store_reg_to_var_int(iptr->dst, d);
 973                         break;
 974
 975                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 976
 977                         var_to_reg_int(s1, src, REG_ITMP1);
 978                         d = reg_of_var(iptr->dst, REG_ITMP3);
 979                         if (has_ext_instr_set) {
 980                                 M_BSEXT(s1, d);
 981                                 }
 982                         else {
 983                                 M_SLL_IMM(s1, 56, d);
 984                                 M_SRA_IMM( d, 56, d);
 985                                 }
 986                         store_reg_to_var_int(iptr->dst, d);
 987                         break;
 988
 989                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 990
 991                         var_to_reg_int(s1, src, REG_ITMP1);
 992                         d = reg_of_var(iptr->dst, REG_ITMP3);
 993             M_CZEXT(s1, d);
 994                         store_reg_to_var_int(iptr->dst, d);
 995                         break;
 996
 997                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 998
 999                         var_to_reg_int(s1, src, REG_ITMP1);
1000                         d = reg_of_var(iptr->dst, REG_ITMP3);
1001                         if (has_ext_instr_set) {
1002                                 M_SSEXT(s1, d);
1003                                 }
1004                         else {
1005                                 M_SLL_IMM(s1, 48, d);
1006                                 M_SRA_IMM( d, 48, d);
1007                                 }
1008                         store_reg_to_var_int(iptr->dst, d);
1009                         break;
1010
1011
1012                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1013
1014                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1015                         var_to_reg_int(s2, src, REG_ITMP2);
1016                         d = reg_of_var(iptr->dst, REG_ITMP3);
1017                         M_IADD(s1, s2, d);
1018                         store_reg_to_var_int(iptr->dst, d);
1019                         break;
1020
1021                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
1022                                       /* val.i = constant                             */
1023
1024                         var_to_reg_int(s1, src, REG_ITMP1);
1025                         d = reg_of_var(iptr->dst, REG_ITMP3);
1026                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1027                                 M_IADD_IMM(s1, iptr->val.i, d);
1028                                 }
1029                         else {
1030                                 ICONST(REG_ITMP2, iptr->val.i);
1031                                 M_IADD(s1, REG_ITMP2, d);
1032                                 }
1033                         store_reg_to_var_int(iptr->dst, d);
1034                         break;
1035
1036                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1037
1038                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1039                         var_to_reg_int(s2, src, REG_ITMP2);
1040                         d = reg_of_var(iptr->dst, REG_ITMP3);
1041                         M_LADD(s1, s2, d);
1042                         store_reg_to_var_int(iptr->dst, d);
1043                         break;
1044
1045                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
1046                                       /* val.l = constant                             */
1047
1048                         var_to_reg_int(s1, src, REG_ITMP1);
1049                         d = reg_of_var(iptr->dst, REG_ITMP3);
1050                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1051                                 M_LADD_IMM(s1, iptr->val.l, d);
1052                                 }
1053                         else {
1054                                 LCONST(REG_ITMP2, iptr->val.l);
1055                                 M_LADD(s1, REG_ITMP2, d);
1056                                 }
1057                         store_reg_to_var_int(iptr->dst, d);
1058                         break;
1059
1060                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1061
1062                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1063                         var_to_reg_int(s2, src, REG_ITMP2);
1064                         d = reg_of_var(iptr->dst, REG_ITMP3);
1065                         M_ISUB(s1, s2, d);
1066                         store_reg_to_var_int(iptr->dst, d);
1067                         break;
1068
1069                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
1070                                       /* val.i = constant                             */
1071
1072                         var_to_reg_int(s1, src, REG_ITMP1);
1073                         d = reg_of_var(iptr->dst, REG_ITMP3);
1074                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1075                                 M_ISUB_IMM(s1, iptr->val.i, d);
1076                                 }
1077                         else {
1078                                 ICONST(REG_ITMP2, iptr->val.i);
1079                                 M_ISUB(s1, REG_ITMP2, d);
1080                                 }
1081                         store_reg_to_var_int(iptr->dst, d);
1082                         break;
1083
1084                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1085
1086                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1087                         var_to_reg_int(s2, src, REG_ITMP2);
1088                         d = reg_of_var(iptr->dst, REG_ITMP3);
1089                         M_LSUB(s1, s2, d);
1090                         store_reg_to_var_int(iptr->dst, d);
1091                         break;
1092
1093                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
1094                                       /* val.l = constant                             */
1095
1096                         var_to_reg_int(s1, src, REG_ITMP1);
1097                         d = reg_of_var(iptr->dst, REG_ITMP3);
1098                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1099                                 M_LSUB_IMM(s1, iptr->val.l, d);
1100                                 }
1101                         else {
1102                                 LCONST(REG_ITMP2, iptr->val.l);
1103                                 M_LSUB(s1, REG_ITMP2, d);
1104                                 }
1105                         store_reg_to_var_int(iptr->dst, d);
1106                         break;
1107
1108                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1109
1110                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1111                         var_to_reg_int(s2, src, REG_ITMP2);
1112                         d = reg_of_var(iptr->dst, REG_ITMP3);
1113                         M_IMUL(s1, s2, d);
1114                         store_reg_to_var_int(iptr->dst, d);
1115                         break;
1116
1117                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
1118                                       /* val.i = constant                             */
1119
1120                         var_to_reg_int(s1, src, REG_ITMP1);
1121                         d = reg_of_var(iptr->dst, REG_ITMP3);
1122                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1123                                 M_IMUL_IMM(s1, iptr->val.i, d);
1124                                 }
1125                         else {
1126                                 ICONST(REG_ITMP2, iptr->val.i);
1127                                 M_IMUL(s1, REG_ITMP2, d);
1128                                 }
1129                         store_reg_to_var_int(iptr->dst, d);
1130                         break;
1131
1132                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1133
1134                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1135                         var_to_reg_int(s2, src, REG_ITMP2);
1136                         d = reg_of_var(iptr->dst, REG_ITMP3);
1137                         M_LMUL (s1, s2, d);
1138                         store_reg_to_var_int(iptr->dst, d);
1139                         break;
1140
1141                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
1142                                       /* val.l = constant                             */
1143
1144                         var_to_reg_int(s1, src, REG_ITMP1);
1145                         d = reg_of_var(iptr->dst, REG_ITMP3);
1146                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1147                                 M_LMUL_IMM(s1, iptr->val.l, d);
1148                                 }
1149                         else {
1150                                 LCONST(REG_ITMP2, iptr->val.l);
1151                                 M_LMUL(s1, REG_ITMP2, d);
1152                                 }
1153                         store_reg_to_var_int(iptr->dst, d);
1154                         break;
1155
1156                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1157                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1158
1159                         var_to_reg_int(s1, src, REG_ITMP1);
1160                         d = reg_of_var(iptr->dst, REG_ITMP3);
1161                         if (iptr->val.i <= 15) {
1162                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
1163                                 M_CMOVGE(s1, s1, REG_ITMP2);
1164                                 }
1165                         else {
1166                                 M_SRA_IMM(s1, 63, REG_ITMP2);
1167                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1168                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
1169                                 }
1170                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
1171                         store_reg_to_var_int(iptr->dst, d);
1172                         break;
1173
1174                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1175
1176                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1177                         var_to_reg_int(s2, src, REG_ITMP2);
1178                         d = reg_of_var(iptr->dst, REG_ITMP3);
1179                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1180                         M_SLL(s1, REG_ITMP3, d);
1181                         M_IADD(d, REG_ZERO, d);
1182                         store_reg_to_var_int(iptr->dst, d);
1183                         break;
1184
1185                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1186                                       /* val.i = constant                             */
1187
1188                         var_to_reg_int(s1, src, REG_ITMP1);
1189                         d = reg_of_var(iptr->dst, REG_ITMP3);
1190                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1191                         M_IADD(d, REG_ZERO, d);
1192                         store_reg_to_var_int(iptr->dst, d);
1193                         break;
1194
1195                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1196
1197                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1198                         var_to_reg_int(s2, src, REG_ITMP2);
1199                         d = reg_of_var(iptr->dst, REG_ITMP3);
1200                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1201                         M_SRA(s1, REG_ITMP3, d);
1202                         store_reg_to_var_int(iptr->dst, d);
1203                         break;
1204
1205                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1206                                       /* val.i = constant                             */
1207
1208                         var_to_reg_int(s1, src, REG_ITMP1);
1209                         d = reg_of_var(iptr->dst, REG_ITMP3);
1210                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1211                         store_reg_to_var_int(iptr->dst, d);
1212                         break;
1213
1214                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1215
1216                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1217                         var_to_reg_int(s2, src, REG_ITMP2);
1218                         d = reg_of_var(iptr->dst, REG_ITMP3);
1219                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1220             M_IZEXT(s1, d);
1221                         M_SRL(d, REG_ITMP2, d);
1222                         M_IADD(d, REG_ZERO, d);
1223                         store_reg_to_var_int(iptr->dst, d);
1224                         break;
1225
1226                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1227                                       /* val.i = constant                             */
1228
1229                         var_to_reg_int(s1, src, REG_ITMP1);
1230                         d = reg_of_var(iptr->dst, REG_ITMP3);
1231             M_IZEXT(s1, d);
1232                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1233                         M_IADD(d, REG_ZERO, d);
1234                         store_reg_to_var_int(iptr->dst, d);
1235                         break;
1236
1237                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1238
1239                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1240                         var_to_reg_int(s2, src, REG_ITMP2);
1241                         d = reg_of_var(iptr->dst, REG_ITMP3);
1242                         M_SLL(s1, s2, d);
1243                         store_reg_to_var_int(iptr->dst, d);
1244                         break;
1245
1246                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1247                                       /* val.i = constant                             */
1248
1249                         var_to_reg_int(s1, src, REG_ITMP1);
1250                         d = reg_of_var(iptr->dst, REG_ITMP3);
1251                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1252                         store_reg_to_var_int(iptr->dst, d);
1253                         break;
1254
1255                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1256
1257                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1258                         var_to_reg_int(s2, src, REG_ITMP2);
1259                         d = reg_of_var(iptr->dst, REG_ITMP3);
1260                         M_SRA(s1, s2, d);
1261                         store_reg_to_var_int(iptr->dst, d);
1262                         break;
1263
1264                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1265                                       /* val.i = constant                             */
1266
1267                         var_to_reg_int(s1, src, REG_ITMP1);
1268                         d = reg_of_var(iptr->dst, REG_ITMP3);
1269                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1270                         store_reg_to_var_int(iptr->dst, d);
1271                         break;
1272
1273                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1274
1275                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1276                         var_to_reg_int(s2, src, REG_ITMP2);
1277                         d = reg_of_var(iptr->dst, REG_ITMP3);
1278                         M_SRL(s1, s2, d);
1279                         store_reg_to_var_int(iptr->dst, d);
1280                         break;
1281
1282                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1283                                       /* val.i = constant                             */
1284
1285                         var_to_reg_int(s1, src, REG_ITMP1);
1286                         d = reg_of_var(iptr->dst, REG_ITMP3);
1287                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1288                         store_reg_to_var_int(iptr->dst, d);
1289                         break;
1290
1291                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1292                 case ICMD_LAND:
1293
1294                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1295                         var_to_reg_int(s2, src, REG_ITMP2);
1296                         d = reg_of_var(iptr->dst, REG_ITMP3);
1297                         M_AND(s1, s2, d);
1298                         store_reg_to_var_int(iptr->dst, d);
1299                         break;
1300
1301                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1302                                       /* val.i = constant                             */
1303
1304                         var_to_reg_int(s1, src, REG_ITMP1);
1305                         d = reg_of_var(iptr->dst, REG_ITMP3);
1306                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1307                                 M_AND_IMM(s1, iptr->val.i, d);
1308                                 }
1309                         else if (iptr->val.i == 0xffff) {
1310                                 M_CZEXT(s1, d);
1311                                 }
1312                         else if (iptr->val.i == 0xffffff) {
1313                                 M_ZAPNOT_IMM(s1, 0x07, d);
1314                                 }
1315                         else {
1316                                 ICONST(REG_ITMP2, iptr->val.i);
1317                                 M_AND(s1, REG_ITMP2, d);
1318                                 }
1319                         store_reg_to_var_int(iptr->dst, d);
1320                         break;
1321
1322                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1323                                       /* val.i = constant                             */
1324
1325                         var_to_reg_int(s1, src, REG_ITMP1);
1326                         d = reg_of_var(iptr->dst, REG_ITMP3);
1327                         if (s1 == d) {
1328                                 M_MOV(s1, REG_ITMP1);
1329                                 s1 = REG_ITMP1;
1330                                 }
1331                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1332                                 M_AND_IMM(s1, iptr->val.i, d);
1333                                 M_BGEZ(s1, 3);
1334                                 M_ISUB(REG_ZERO, s1, d);
1335                                 M_AND_IMM(d, iptr->val.i, d);
1336                                 }
1337                         else if (iptr->val.i == 0xffff) {
1338                                 M_CZEXT(s1, d);
1339                                 M_BGEZ(s1, 3);
1340                                 M_ISUB(REG_ZERO, s1, d);
1341                                 M_CZEXT(d, d);
1342                                 }
1343                         else if (iptr->val.i == 0xffffff) {
1344                                 M_ZAPNOT_IMM(s1, 0x07, d);
1345                                 M_BGEZ(s1, 3);
1346                                 M_ISUB(REG_ZERO, s1, d);
1347                                 M_ZAPNOT_IMM(d, 0x07, d);
1348                                 }
1349                         else {
1350                                 ICONST(REG_ITMP2, iptr->val.i);
1351                                 M_AND(s1, REG_ITMP2, d);
1352                                 M_BGEZ(s1, 3);
1353                                 M_ISUB(REG_ZERO, s1, d);
1354                                 M_AND(d, REG_ITMP2, d);
1355                                 }
1356                         M_ISUB(REG_ZERO, d, d);
1357                         store_reg_to_var_int(iptr->dst, d);
1358                         break;
1359
1360                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1361
1362 /*          b = value & 0xffff;
1363                         a = value >> 16;
1364                         a = ((b - a) & 0xffff) + (b < a);
1365 */
1366                         var_to_reg_int(s1, src, REG_ITMP1);
1367                         d = reg_of_var(iptr->dst, REG_ITMP3);
1368                         if (s1 == d) {
1369                                 M_MOV(s1, REG_ITMP3);
1370                                 s1 = REG_ITMP3;
1371                                 }
1372                         M_BLTZ(s1, 7);
1373             M_CZEXT(s1, REG_ITMP2);
1374                         M_SRA_IMM(s1, 16, d);
1375                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1376                         M_ISUB(REG_ITMP2, d, d);
1377             M_CZEXT(d, d);
1378                         M_IADD(d, REG_ITMP1, d);
1379                         M_BR(11 + (s1 == REG_ITMP1));
1380                         M_ISUB(REG_ZERO, s1, REG_ITMP1);
1381             M_CZEXT(REG_ITMP1, REG_ITMP2);
1382                         M_SRA_IMM(REG_ITMP1, 16, d);
1383                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1384                         M_ISUB(REG_ITMP2, d, d);
1385             M_CZEXT(d, d);
1386                         M_IADD(d, REG_ITMP1, d);
1387                         M_ISUB(REG_ZERO, d, d);
1388                         if (s1 == REG_ITMP1) {
1389                                 var_to_reg_int(s1, src, REG_ITMP1);
1390                                 }
1391                         M_SLL_IMM(s1, 33, REG_ITMP2);
1392                         M_CMPEQ(REG_ITMP2, REG_ZERO, REG_ITMP2);
1393                         M_ISUB(d, REG_ITMP2, d);
1394                         store_reg_to_var_int(iptr->dst, d);
1395                         break;
1396
1397                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1398                                       /* val.l = constant                             */
1399
1400                         var_to_reg_int(s1, src, REG_ITMP1);
1401                         d = reg_of_var(iptr->dst, REG_ITMP3);
1402                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1403                                 M_AND_IMM(s1, iptr->val.l, d);
1404                                 }
1405                         else if (iptr->val.l == 0xffffL) {
1406                                 M_CZEXT(s1, d);
1407                                 }
1408                         else if (iptr->val.l == 0xffffffL) {
1409                                 M_ZAPNOT_IMM(s1, 0x07, d);
1410                                 }
1411                         else if (iptr->val.l == 0xffffffffL) {
1412                                 M_IZEXT(s1, d);
1413                                 }
1414                         else if (iptr->val.l == 0xffffffffffL) {
1415                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1416                                 }
1417                         else if (iptr->val.l == 0xffffffffffffL) {
1418                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1419                                 }
1420                         else if (iptr->val.l == 0xffffffffffffffL) {
1421                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1422                                 }
1423                         else {
1424                                 LCONST(REG_ITMP2, iptr->val.l);
1425                                 M_AND(s1, REG_ITMP2, d);
1426                                 }
1427                         store_reg_to_var_int(iptr->dst, d);
1428                         break;
1429
1430                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1431                                       /* val.l = constant                             */
1432
1433                         var_to_reg_int(s1, src, REG_ITMP1);
1434                         d = reg_of_var(iptr->dst, REG_ITMP3);
1435                         if (s1 == d) {
1436                                 M_MOV(s1, REG_ITMP1);
1437                                 s1 = REG_ITMP1;
1438                                 }
1439                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1440                                 M_AND_IMM(s1, iptr->val.l, d);
1441                                 M_BGEZ(s1, 3);
1442                                 M_LSUB(REG_ZERO, s1, d);
1443                                 M_AND_IMM(d, iptr->val.l, d);
1444                                 }
1445                         else if (iptr->val.l == 0xffffL) {
1446                                 M_CZEXT(s1, d);
1447                                 M_BGEZ(s1, 3);
1448                                 M_LSUB(REG_ZERO, s1, d);
1449                                 M_CZEXT(d, d);
1450                                 }
1451                         else if (iptr->val.l == 0xffffffL) {
1452                                 M_ZAPNOT_IMM(s1, 0x07, d);
1453                                 M_BGEZ(s1, 3);
1454                                 M_LSUB(REG_ZERO, s1, d);
1455                                 M_ZAPNOT_IMM(d, 0x07, d);
1456                                 }
1457                         else if (iptr->val.l == 0xffffffffL) {
1458                                 M_IZEXT(s1, d);
1459                                 M_BGEZ(s1, 3);
1460                                 M_LSUB(REG_ZERO, s1, d);
1461                                 M_IZEXT(d, d);
1462                                 }
1463                         else if (iptr->val.l == 0xffffffffffL) {
1464                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1465                                 M_BGEZ(s1, 3);
1466                                 M_LSUB(REG_ZERO, s1, d);
1467                                 M_ZAPNOT_IMM(d, 0x1f, d);
1468                                 }
1469                         else if (iptr->val.l == 0xffffffffffffL) {
1470                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1471                                 M_BGEZ(s1, 3);
1472                                 M_LSUB(REG_ZERO, s1, d);
1473                                 M_ZAPNOT_IMM(d, 0x3f, d);
1474                                 }
1475                         else if (iptr->val.l == 0xffffffffffffffL) {
1476                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1477                                 M_BGEZ(s1, 3);
1478                                 M_LSUB(REG_ZERO, s1, d);
1479                                 M_ZAPNOT_IMM(d, 0x7f, d);
1480                                 }
1481                         else {
1482                                 LCONST(REG_ITMP2, iptr->val.l);
1483                                 M_AND(s1, REG_ITMP2, d);
1484                                 M_BGEZ(s1, 3);
1485                                 M_LSUB(REG_ZERO, s1, d);
1486                                 M_AND(d, REG_ITMP2, d);
1487                                 }
1488                         M_LSUB(REG_ZERO, d, d);
1489                         store_reg_to_var_int(iptr->dst, d);
1490                         break;
1491
1492                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1493
1494                         var_to_reg_int(s1, src, REG_ITMP1);
1495                         d = reg_of_var(iptr->dst, REG_ITMP3);
1496                         if (s1 == d) {
1497                                 M_MOV(s1, REG_ITMP3);
1498                                 s1 = REG_ITMP3;
1499                                 }
1500                         M_CZEXT(s1, REG_ITMP2);
1501                         M_SRA_IMM(s1, 16, d);
1502                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1503                         M_LSUB(REG_ITMP2, d, d);
1504             M_CZEXT(d, d);
1505                         M_LADD(d, REG_ITMP1, d);
1506                         M_LDA(REG_ITMP2, REG_ZERO, -1);
1507                         M_SRL_IMM(REG_ITMP2, 33, REG_ITMP2);
1508                         if (s1 == REG_ITMP1) {
1509                                 var_to_reg_int(s1, src, REG_ITMP1);
1510                                 }
1511                         M_CMPULT(s1, REG_ITMP2, REG_ITMP2);
1512                         M_BNEZ(REG_ITMP2, 11);
1513                         M_LDA(d, REG_ZERO, -257);
1514                         M_ZAPNOT_IMM(d, 0xcd, d);
1515                         M_LSUB(REG_ZERO, s1, REG_ITMP2);
1516                         M_CMOVGE(s1, s1, REG_ITMP2);
1517                         M_UMULH(REG_ITMP2, d, REG_ITMP2);
1518                         M_SRL_IMM(REG_ITMP2, 16, REG_ITMP2);
1519                         M_LSUB(REG_ZERO, REG_ITMP2, d);
1520                         M_CMOVGE(s1, REG_ITMP2, d);
1521                         M_SLL_IMM(d, 16, REG_ITMP2);
1522                         M_LADD(d, REG_ITMP2, d);
1523                         M_LSUB(s1, d, d);
1524                         store_reg_to_var_int(iptr->dst, d);
1525                         break;
1526
1527                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1528                 case ICMD_LOR:
1529
1530                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1531                         var_to_reg_int(s2, src, REG_ITMP2);
1532                         d = reg_of_var(iptr->dst, REG_ITMP3);
1533                         M_OR( s1,s2, d);
1534                         store_reg_to_var_int(iptr->dst, d);
1535                         break;
1536
1537                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1538                                       /* val.i = constant                             */
1539
1540                         var_to_reg_int(s1, src, REG_ITMP1);
1541                         d = reg_of_var(iptr->dst, REG_ITMP3);
1542                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1543                                 M_OR_IMM(s1, iptr->val.i, d);
1544                                 }
1545                         else {
1546                                 ICONST(REG_ITMP2, iptr->val.i);
1547                                 M_OR(s1, REG_ITMP2, d);
1548                                 }
1549                         store_reg_to_var_int(iptr->dst, d);
1550                         break;
1551
1552                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1553                                       /* val.l = constant                             */
1554
1555                         var_to_reg_int(s1, src, REG_ITMP1);
1556                         d = reg_of_var(iptr->dst, REG_ITMP3);
1557                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1558                                 M_OR_IMM(s1, iptr->val.l, d);
1559                                 }
1560                         else {
1561                                 LCONST(REG_ITMP2, iptr->val.l);
1562                                 M_OR(s1, REG_ITMP2, d);
1563                                 }
1564                         store_reg_to_var_int(iptr->dst, d);
1565                         break;
1566
1567                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1568                 case ICMD_LXOR:
1569
1570                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1571                         var_to_reg_int(s2, src, REG_ITMP2);
1572                         d = reg_of_var(iptr->dst, REG_ITMP3);
1573                         M_XOR(s1, s2, d);
1574                         store_reg_to_var_int(iptr->dst, d);
1575                         break;
1576
1577                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1578                                       /* val.i = constant                             */
1579
1580                         var_to_reg_int(s1, src, REG_ITMP1);
1581                         d = reg_of_var(iptr->dst, REG_ITMP3);
1582                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1583                                 M_XOR_IMM(s1, iptr->val.i, d);
1584                                 }
1585                         else {
1586                                 ICONST(REG_ITMP2, iptr->val.i);
1587                                 M_XOR(s1, REG_ITMP2, d);
1588                                 }
1589                         store_reg_to_var_int(iptr->dst, d);
1590                         break;
1591
1592                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1593                                       /* val.l = constant                             */
1594
1595                         var_to_reg_int(s1, src, REG_ITMP1);
1596                         d = reg_of_var(iptr->dst, REG_ITMP3);
1597                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1598                                 M_XOR_IMM(s1, iptr->val.l, d);
1599                                 }
1600                         else {
1601                                 LCONST(REG_ITMP2, iptr->val.l);
1602                                 M_XOR(s1, REG_ITMP2, d);
1603                                 }
1604                         store_reg_to_var_int(iptr->dst, d);
1605                         break;
1606
1607
1608                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1609
1610                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1611                         var_to_reg_int(s2, src, REG_ITMP2);
1612                         d = reg_of_var(iptr->dst, REG_ITMP3);
1613                         M_CMPLT(s1, s2, REG_ITMP3);
1614                         M_CMPLT(s2, s1, REG_ITMP1);
1615                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1616                         store_reg_to_var_int(iptr->dst, d);
1617                         break;
1618
1619
1620                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1621                                       /* op1 = variable, val.i = constant             */
1622
1623                         var = &(locals[iptr->op1][TYPE_INT]);
1624                         if (var->flags & INMEMORY) {
1625                                 s1 = REG_ITMP1;
1626                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1627                                 }
1628                         else
1629                                 s1 = var->regoff;
1630                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1631                                 M_IADD_IMM(s1, iptr->val.i, s1);
1632                                 }
1633                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1634                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1635                                 }
1636                         else {
1637                                 M_LDA (s1, s1, iptr->val.i);
1638                                 M_IADD(s1, REG_ZERO, s1);
1639                                 }
1640                         if (var->flags & INMEMORY)
1641                                 M_LST(s1, REG_SP, 8 * var->regoff);
1642                         break;
1643
1644
1645                 /* floating operations ************************************************/
1646
1647                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1648
1649                         var_to_reg_flt(s1, src, REG_FTMP1);
1650                         d = reg_of_var(iptr->dst, REG_FTMP3);
1651                         M_FMOVN(s1, d);
1652                         store_reg_to_var_flt(iptr->dst, d);
1653                         break;
1654
1655                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1656
1657                         var_to_reg_flt(s1, src, REG_FTMP1);
1658                         d = reg_of_var(iptr->dst, REG_FTMP3);
1659                         M_FMOVN(s1, d);
1660                         store_reg_to_var_flt(iptr->dst, d);
1661                         break;
1662
1663                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1664
1665                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1666                         var_to_reg_flt(s2, src, REG_FTMP2);
1667                         d = reg_of_var(iptr->dst, REG_FTMP3);
1668                         if (opt_noieee) {
1669                                 M_FADD(s1, s2, d);
1670                                 }
1671                         else {
1672                                 if (d == s1 || d == s2) {
1673                                         M_FADDS(s1, s2, REG_FTMP3);
1674                                         M_TRAPB;
1675                                         M_FMOV(REG_FTMP3, d);
1676                                         }
1677                                 else {
1678                                         M_FADDS(s1, s2, d);
1679                                         M_TRAPB;
1680                                         }
1681                                 }
1682                         store_reg_to_var_flt(iptr->dst, d);
1683                         break;
1684
1685                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1686
1687                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1688                         var_to_reg_flt(s2, src, REG_FTMP2);
1689                         d = reg_of_var(iptr->dst, REG_FTMP3);
1690                         if (opt_noieee) {
1691                                 M_DADD(s1, s2, d);
1692                                 }
1693                         else {
1694                                 if (d == s1 || d == s2) {
1695                                         M_DADDS(s1, s2, REG_FTMP3);
1696                                         M_TRAPB;
1697                                         M_FMOV(REG_FTMP3, d);
1698                                         }
1699                                 else {
1700                                         M_DADDS(s1, s2, d);
1701                                         M_TRAPB;
1702                                         }
1703                                 }
1704                         store_reg_to_var_flt(iptr->dst, d);
1705                         break;
1706
1707                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1708
1709                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1710                         var_to_reg_flt(s2, src, REG_FTMP2);
1711                         d = reg_of_var(iptr->dst, REG_FTMP3);
1712                         if (opt_noieee) {
1713                                 M_FSUB(s1, s2, d);
1714                                 }
1715                         else {
1716                                 if (d == s1 || d == s2) {
1717                                         M_FSUBS(s1, s2, REG_FTMP3);
1718                                         M_TRAPB;
1719                                         M_FMOV(REG_FTMP3, d);
1720                                         }
1721                                 else {
1722                                         M_FSUBS(s1, s2, d);
1723                                         M_TRAPB;
1724                                         }
1725                                 }
1726                         store_reg_to_var_flt(iptr->dst, d);
1727                         break;
1728
1729                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1730
1731                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1732                         var_to_reg_flt(s2, src, REG_FTMP2);
1733                         d = reg_of_var(iptr->dst, REG_FTMP3);
1734                         if (opt_noieee) {
1735                                 M_DSUB(s1, s2, d);
1736                                 }
1737                         else {
1738                                 if (d == s1 || d == s2) {
1739                                         M_DSUBS(s1, s2, REG_FTMP3);
1740                                         M_TRAPB;
1741                                         M_FMOV(REG_FTMP3, d);
1742                                         }
1743                                 else {
1744                                         M_DSUBS(s1, s2, d);
1745                                         M_TRAPB;
1746                                         }
1747                                 }
1748                         store_reg_to_var_flt(iptr->dst, d);
1749                         break;
1750
1751                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1752
1753                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1754                         var_to_reg_flt(s2, src, REG_FTMP2);
1755                         d = reg_of_var(iptr->dst, REG_FTMP3);
1756                         if (opt_noieee) {
1757                                 M_FMUL(s1, s2, d);
1758                                 }
1759                         else {
1760                                 if (d == s1 || d == s2) {
1761                                         M_FMULS(s1, s2, REG_FTMP3);
1762                                         M_TRAPB;
1763                                         M_FMOV(REG_FTMP3, d);
1764                                         }
1765                                 else {
1766                                         M_FMULS(s1, s2, d);
1767                                         M_TRAPB;
1768                                         }
1769                                 }
1770                         store_reg_to_var_flt(iptr->dst, d);
1771                         break;
1772
1773                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1774
1775                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1776                         var_to_reg_flt(s2, src, REG_FTMP2);
1777                         d = reg_of_var(iptr->dst, REG_FTMP3);
1778                         if (opt_noieee) {
1779                                 M_DMUL(s1, s2, d);
1780                                 }
1781                         else {
1782                                 if (d == s1 || d == s2) {
1783                                         M_DMULS(s1, s2, REG_FTMP3);
1784                                         M_TRAPB;
1785                                         M_FMOV(REG_FTMP3, d);
1786                                         }
1787                                 else {
1788                                         M_DMULS(s1, s2, d);
1789                                         M_TRAPB;
1790                                         }
1791                                 }
1792                         store_reg_to_var_flt(iptr->dst, d);
1793                         break;
1794
1795                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1796
1797                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1798                         var_to_reg_flt(s2, src, REG_FTMP2);
1799                         d = reg_of_var(iptr->dst, REG_FTMP3);
1800                         if (opt_noieee) {
1801                                 M_FDIV(s1, s2, d);
1802                                 }
1803                         else {
1804                                 if (d == s1 || d == s2) {
1805                                         M_FDIVS(s1, s2, REG_FTMP3);
1806                                         M_TRAPB;
1807                                         M_FMOV(REG_FTMP3, d);
1808                                         }
1809                                 else {
1810                                         M_FDIVS(s1, s2, d);
1811                                         M_TRAPB;
1812                                         }
1813                                 }
1814                         store_reg_to_var_flt(iptr->dst, d);
1815                         break;
1816
1817                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1818
1819                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1820                         var_to_reg_flt(s2, src, REG_FTMP2);
1821                         d = reg_of_var(iptr->dst, REG_FTMP3);
1822                         if (opt_noieee) {
1823                                 M_DDIV(s1, s2, d);
1824                                 }
1825                         else {
1826                                 if (d == s1 || d == s2) {
1827                                         M_DDIVS(s1, s2, REG_FTMP3);
1828                                         M_TRAPB;
1829                                         M_FMOV(REG_FTMP3, d);
1830                                         }
1831                                 else {
1832                                         M_DDIVS(s1, s2, d);
1833                                         M_TRAPB;
1834                                         }
1835                                 }
1836                         store_reg_to_var_flt(iptr->dst, d);
1837                         break;
1838
1839                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1840                 case ICMD_L2F:
1841                         var_to_reg_int(s1, src, REG_ITMP1);
1842                         d = reg_of_var(iptr->dst, REG_FTMP3);
1843                         a = dseg_adddouble(0.0);
1844                         M_LST (s1, REG_PV, a);
1845                         M_DLD (d, REG_PV, a);
1846                         M_CVTLF(d, d);
1847                         store_reg_to_var_flt(iptr->dst, d);
1848                         break;
1849
1850                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1851                 case ICMD_L2D:
1852                         var_to_reg_int(s1, src, REG_ITMP1);
1853                         d = reg_of_var(iptr->dst, REG_FTMP3);
1854                         a = dseg_adddouble(0.0);
1855                         M_LST (s1, REG_PV, a);
1856                         M_DLD (d, REG_PV, a);
1857                         M_CVTLD(d, d);
1858                         store_reg_to_var_flt(iptr->dst, d);
1859                         break;
1860
1861                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1862                 case ICMD_D2I:
1863                         var_to_reg_flt(s1, src, REG_FTMP1);
1864                         d = reg_of_var(iptr->dst, REG_ITMP3);
1865                         a = dseg_adddouble(0.0);
1866                         M_CVTDL_C(s1, REG_FTMP2);
1867                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1868                         M_DST (REG_FTMP3, REG_PV, a);
1869                         M_ILD (d, REG_PV, a);
1870                         store_reg_to_var_int(iptr->dst, d);
1871                         break;
1872
1873                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1874                 case ICMD_D2L:
1875                         var_to_reg_flt(s1, src, REG_FTMP1);
1876                         d = reg_of_var(iptr->dst, REG_ITMP3);
1877                         a = dseg_adddouble(0.0);
1878                         M_CVTDL_C(s1, REG_FTMP2);
1879                         M_DST (REG_FTMP2, REG_PV, a);
1880                         M_LLD (d, REG_PV, a);
1881                         store_reg_to_var_int(iptr->dst, d);
1882                         break;
1883
1884                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1885
1886                         var_to_reg_flt(s1, src, REG_FTMP1);
1887                         d = reg_of_var(iptr->dst, REG_FTMP3);
1888                         M_CVTFDS(s1, d);
1889                         M_TRAPB;
1890                         store_reg_to_var_flt(iptr->dst, d);
1891                         break;
1892
1893                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1894
1895                         var_to_reg_flt(s1, src, REG_FTMP1);
1896                         d = reg_of_var(iptr->dst, REG_FTMP3);
1897                         if (opt_noieee) {
1898                                 M_CVTDF(s1, d);
1899                                 }
1900                         else {
1901                                 M_CVTDFS(s1, d);
1902                                 M_TRAPB;
1903                                 }
1904                         store_reg_to_var_flt(iptr->dst, d);
1905                         break;
1906
1907                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1908                 case ICMD_DCMPL:
1909                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1910                         var_to_reg_flt(s2, src, REG_FTMP2);
1911                         d = reg_of_var(iptr->dst, REG_ITMP3);
1912                         if (opt_noieee) {
1913                                 M_LSUB_IMM(REG_ZERO, 1, d);
1914                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1915                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1916                                 M_CLR   (d);
1917                                 M_FCMPLT(s2, s1, REG_FTMP3);
1918                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1919                                 M_LADD_IMM(REG_ZERO, 1, d);
1920                                 }
1921                         else {
1922                                 M_LSUB_IMM(REG_ZERO, 1, d);
1923                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1924                                 M_TRAPB;
1925                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1926                                 M_CLR   (d);
1927                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1928                                 M_TRAPB;
1929                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1930                                 M_LADD_IMM(REG_ZERO, 1, d);
1931                                 }
1932                         store_reg_to_var_int(iptr->dst, d);
1933                         break;
1934
1935                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1936                 case ICMD_DCMPG:
1937                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1938                         var_to_reg_flt(s2, src, REG_FTMP2);
1939                         d = reg_of_var(iptr->dst, REG_ITMP3);
1940                         if (opt_noieee) {
1941                                 M_LADD_IMM(REG_ZERO, 1, d);
1942                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1943                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1944                                 M_CLR   (d);
1945                                 M_FCMPLT(s1, s2, REG_FTMP3);
1946                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1947                                 M_LSUB_IMM(REG_ZERO, 1, d);
1948                                 }
1949                         else {
1950                                 M_LADD_IMM(REG_ZERO, 1, d);
1951                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1952                                 M_TRAPB;
1953                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1954                                 M_CLR   (d);
1955                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1956                                 M_TRAPB;
1957                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1958                                 M_LSUB_IMM(REG_ZERO, 1, d);
1959                                 }
1960                         store_reg_to_var_int(iptr->dst, d);
1961                         break;
1962
1963
1964                 /* memory operations **************************************************/
1965
1966                         /* #define gen_bound_check \
1967                         if (checkbounds) {\
1968                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1969                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1970                                 M_BEQZ(REG_ITMP3, 0);\
1971                                 codegen_addxboundrefs(mcodeptr);\
1972                                 }
1973                         */
1974
1975 #define gen_bound_check \
1976     if (checkbounds) { \
1977         M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1978         M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1979         M_BEQZ(REG_ITMP3, 0);\
1980         codegen_addxboundrefs(mcodeptr, s2); \
1981     }
1982
1983                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1984
1985                         var_to_reg_int(s1, src, REG_ITMP1);
1986                         d = reg_of_var(iptr->dst, REG_ITMP3);
1987                         gen_nullptr_check(s1);
1988                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1989                         store_reg_to_var_int(iptr->dst, d);
1990                         break;
1991
1992                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1993
1994                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1995                         var_to_reg_int(s2, src, REG_ITMP2);
1996                         d = reg_of_var(iptr->dst, REG_ITMP3);
1997                         if (iptr->op1 == 0) {
1998                                 gen_nullptr_check(s1);
1999                                 gen_bound_check;
2000                                 }
2001                         M_SAADDQ(s2, s1, REG_ITMP1);
2002                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2003                         store_reg_to_var_int(iptr->dst, d);
2004                         break;
2005
2006                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
2007
2008                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2009                         var_to_reg_int(s2, src, REG_ITMP2);
2010                         d = reg_of_var(iptr->dst, REG_ITMP3);
2011                         if (iptr->op1 == 0) {
2012                                 gen_nullptr_check(s1);
2013                                 gen_bound_check;
2014                                 }
2015                         M_S8ADDQ(s2, s1, REG_ITMP1);
2016                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
2017                         store_reg_to_var_int(iptr->dst, d);
2018                         break;
2019
2020                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
2021
2022                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2023                         var_to_reg_int(s2, src, REG_ITMP2);
2024                         d = reg_of_var(iptr->dst, REG_ITMP3);
2025                         if (iptr->op1 == 0) {
2026                                 gen_nullptr_check(s1);
2027                                 gen_bound_check;
2028                                 }
2029
2030                         M_S4ADDQ(s2, s1, REG_ITMP1);
2031                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
2032                         store_reg_to_var_int(iptr->dst, d);
2033                         break;
2034
2035                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
2036
2037                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2038                         var_to_reg_int(s2, src, REG_ITMP2);
2039                         d = reg_of_var(iptr->dst, REG_FTMP3);
2040                         if (iptr->op1 == 0) {
2041                                 gen_nullptr_check(s1);
2042                                 gen_bound_check;
2043                                 }
2044                         M_S4ADDQ(s2, s1, REG_ITMP1);
2045                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2046                         store_reg_to_var_flt(iptr->dst, d);
2047                         break;
2048
2049                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
2050
2051                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2052                         var_to_reg_int(s2, src, REG_ITMP2);
2053                         d = reg_of_var(iptr->dst, REG_FTMP3);
2054                         if (iptr->op1 == 0) {
2055                                 gen_nullptr_check(s1);
2056                                 gen_bound_check;
2057                                 }
2058                         M_S8ADDQ(s2, s1, REG_ITMP1);
2059                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2060                         store_reg_to_var_flt(iptr->dst, d);
2061                         break;
2062
2063                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
2064
2065                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2066                         var_to_reg_int(s2, src, REG_ITMP2);
2067                         d = reg_of_var(iptr->dst, REG_ITMP3);
2068                         if (iptr->op1 == 0) {
2069                                 gen_nullptr_check(s1);
2070                                 gen_bound_check;
2071                                 }
2072                         if (has_ext_instr_set) {
2073                                 M_LADD(s2, s1, REG_ITMP1);
2074                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2075                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
2076                                 }
2077                         else {
2078                                 M_LADD (s2, s1, REG_ITMP1);
2079                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2080                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2081                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2082                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
2083                                 }
2084                         store_reg_to_var_int(iptr->dst, d);
2085                         break;
2086
2087                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
2088
2089                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2090                         var_to_reg_int(s2, src, REG_ITMP2);
2091                         d = reg_of_var(iptr->dst, REG_ITMP3);
2092                         if (iptr->op1 == 0) {
2093                                 gen_nullptr_check(s1);
2094                                 gen_bound_check;
2095                                 }
2096                         if (has_ext_instr_set) {
2097                                 M_LADD(s2, s1, REG_ITMP1);
2098                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2099                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
2100                                 M_SSEXT(d, d);
2101                                 }
2102                         else {
2103                                 M_LADD(s2, s1, REG_ITMP1);
2104                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2105                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2106                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
2107                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2108                                 M_SRA_IMM(d, 48, d);
2109                                 }
2110                         store_reg_to_var_int(iptr->dst, d);
2111                         break;
2112
2113                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
2114
2115                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2116                         var_to_reg_int(s2, src, REG_ITMP2);
2117                         d = reg_of_var(iptr->dst, REG_ITMP3);
2118                         if (iptr->op1 == 0) {
2119                                 gen_nullptr_check(s1);
2120                                 gen_bound_check;
2121                                 }
2122                         if (has_ext_instr_set) {
2123                                 M_LADD   (s2, s1, REG_ITMP1);
2124                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
2125                                 M_BSEXT  (d, d);
2126                                 }
2127                         else {
2128                                 M_LADD(s2, s1, REG_ITMP1);
2129                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2130                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
2131                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2132                                 M_SRA_IMM(d, 56, d);
2133                                 }
2134                         store_reg_to_var_int(iptr->dst, d);
2135                         break;
2136
2137
2138                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
2139
2140                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2141                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2142                         if (iptr->op1 == 0) {
2143                                 gen_nullptr_check(s1);
2144                                 gen_bound_check;
2145                                 }
2146                         var_to_reg_int(s3, src, REG_ITMP3);
2147                         M_SAADDQ(s2, s1, REG_ITMP1);
2148                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2149                         break;
2150
2151                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
2152
2153                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2154                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2155                         if (iptr->op1 == 0) {
2156                                 gen_nullptr_check(s1);
2157                                 gen_bound_check;
2158                                 }
2159                         var_to_reg_int(s3, src, REG_ITMP3);
2160                         M_S8ADDQ(s2, s1, REG_ITMP1);
2161                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
2162                         break;
2163
2164                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
2165
2166                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2167                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2168                         if (iptr->op1 == 0) {
2169                                 gen_nullptr_check(s1);
2170                                 gen_bound_check;
2171                                 }
2172
2173                         var_to_reg_int(s3, src, REG_ITMP3);
2174                         M_S4ADDQ(s2, s1, REG_ITMP1);
2175                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
2176                         break;
2177
2178                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
2179
2180                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2181                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2182                         if (iptr->op1 == 0) {
2183                                 gen_nullptr_check(s1);
2184                                 gen_bound_check;
2185                                 }
2186                         var_to_reg_flt(s3, src, REG_FTMP3);
2187                         M_S4ADDQ(s2, s1, REG_ITMP1);
2188                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2189                         break;
2190
2191                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
2192
2193                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2194                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2195                         if (iptr->op1 == 0) {
2196                                 gen_nullptr_check(s1);
2197                                 gen_bound_check;
2198                                 }
2199                         var_to_reg_flt(s3, src, REG_FTMP3);
2200                         M_S8ADDQ(s2, s1, REG_ITMP1);
2201                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2202                         break;
2203
2204                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
2205
2206                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2207                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2208                         if (iptr->op1 == 0) {
2209                                 gen_nullptr_check(s1);
2210                                 gen_bound_check;
2211                                 }
2212                         var_to_reg_int(s3, src, REG_ITMP3);
2213                         if (has_ext_instr_set) {
2214                                 M_LADD(s2, s1, REG_ITMP1);
2215                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2216                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
2217                                 }
2218                         else {
2219                                 M_LADD (s2, s1, REG_ITMP1);
2220                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2221                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2222                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2223                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2224                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2225                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2226                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2227                                 }
2228                         break;
2229
2230                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
2231
2232                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2233                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2234                         if (iptr->op1 == 0) {
2235                                 gen_nullptr_check(s1);
2236                                 gen_bound_check;
2237                                 }
2238                         var_to_reg_int(s3, src, REG_ITMP3);
2239                         if (has_ext_instr_set) {
2240                                 M_LADD(s2, s1, REG_ITMP1);
2241                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2242                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2243                                 }
2244                         else {
2245                                 M_LADD (s2, s1, REG_ITMP1);
2246                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2247                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2248                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2249                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2250                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2251                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2252                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2253                                 }
2254                         break;
2255
2256                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2257
2258                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2259                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2260                         if (iptr->op1 == 0) {
2261                                 gen_nullptr_check(s1);
2262                                 gen_bound_check;
2263                                 }
2264                         var_to_reg_int(s3, src, REG_ITMP3);
2265                         if (has_ext_instr_set) {
2266                                 M_LADD(s2, s1, REG_ITMP1);
2267                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2268                                 }
2269                         else {
2270                                 M_LADD (s2, s1, REG_ITMP1);
2271                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2272                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2273                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
2274                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2275                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2276                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2277                                 }
2278                         break;
2279
2280
2281                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2282                                       /* op1 = type, val.a = field address            */
2283
2284                         /* if class isn't yet initialized, do it */
2285                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2286                                 /* call helper function which patches this code */
2287                                 a = dseg_addaddress(((fieldinfo *) iptr->val.a)->class);
2288                                 M_ALD(REG_ITMP1, REG_PV, a);
2289                                 a = dseg_addaddress(asm_check_clinit);
2290                                 M_ALD(REG_PV, REG_PV, a);
2291                                 M_JSR(REG_RA, REG_PV);
2292
2293                                 /* recompute pv */
2294                                 s1 = (int) ((u1*) mcodeptr - mcodebase);
2295                                 if (s1 <= 32768) {
2296                                         M_LDA(REG_PV, REG_RA, -s1);
2297                                         M_NOP;
2298
2299                                 } else {
2300                                         s4 ml = -s1, mh = 0;
2301                                         while (ml < -32768) { ml += 65536; mh--; }
2302                                         M_LDA(REG_PV, REG_RA, ml);
2303                                         M_LDAH(REG_PV, REG_PV, mh);
2304                                 }
2305                         }
2306
2307                         a = dseg_addaddress(&(((fieldinfo *)(iptr->val.a))->value));
2308                         M_ALD(REG_ITMP1, REG_PV, a);
2309                         switch (iptr->op1) {
2310                                 case TYPE_INT:
2311                                         var_to_reg_int(s2, src, REG_ITMP2);
2312                                         M_IST(s2, REG_ITMP1, 0);
2313                                         break;
2314                                 case TYPE_LNG:
2315                                         var_to_reg_int(s2, src, REG_ITMP2);
2316                                         M_LST(s2, REG_ITMP1, 0);
2317                                         break;
2318                                 case TYPE_ADR:
2319                                         var_to_reg_int(s2, src, REG_ITMP2);
2320                                         M_AST(s2, REG_ITMP1, 0);
2321                                         break;
2322                                 case TYPE_FLT:
2323                                         var_to_reg_flt(s2, src, REG_FTMP2);
2324                                         M_FST(s2, REG_ITMP1, 0);
2325                                         break;
2326                                 case TYPE_DBL:
2327                                         var_to_reg_flt(s2, src, REG_FTMP2);
2328                                         M_DST(s2, REG_ITMP1, 0);
2329                                         break;
2330                                 default: panic ("internal error");
2331                                 }
2332                         break;
2333
2334                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2335                                       /* op1 = type, val.a = field address            */
2336
2337                         /* if class isn't yet initialized, do it */
2338                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2339                                 /* call helper function which patches this code */
2340                                 a = dseg_addaddress(((fieldinfo *) iptr->val.a)->class);
2341                                 M_ALD(REG_ITMP1, REG_PV, a);
2342                                 a = dseg_addaddress(asm_check_clinit);
2343                                 M_ALD(REG_PV, REG_PV, a);
2344                                 M_JSR(REG_RA, REG_PV);
2345
2346                                 /* recompute pv */
2347                                 s1 = (int) ((u1*) mcodeptr - mcodebase);
2348                                 if (s1 <= 32768) {
2349                                         M_LDA(REG_PV, REG_RA, -s1);
2350                                         M_NOP;
2351
2352                                 } else {
2353                                         s4 ml = -s1, mh = 0;
2354                                         while (ml < -32768) { ml += 65536; mh--; }
2355                                         M_LDA(REG_PV, REG_RA, ml);
2356                                         M_LDAH(REG_PV, REG_PV, mh);
2357                                 }
2358                         }
2359
2360                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2361                         M_ALD(REG_ITMP1, REG_PV, a);
2362                         switch (iptr->op1) {
2363                                 case TYPE_INT:
2364                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2365                                         M_ILD(d, REG_ITMP1, 0);
2366                                         store_reg_to_var_int(iptr->dst, d);
2367                                         break;
2368                                 case TYPE_LNG:
2369                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2370                                         M_LLD(d, REG_ITMP1, 0);
2371                                         store_reg_to_var_int(iptr->dst, d);
2372                                         break;
2373                                 case TYPE_ADR:
2374                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2375                                         M_ALD(d, REG_ITMP1, 0);
2376                                         store_reg_to_var_int(iptr->dst, d);
2377                                         break;
2378                                 case TYPE_FLT:
2379                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2380                                         M_FLD(d, REG_ITMP1, 0);
2381                                         store_reg_to_var_flt(iptr->dst, d);
2382                                         break;
2383                                 case TYPE_DBL:
2384                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2385                                         M_DLD(d, REG_ITMP1, 0);
2386                                         store_reg_to_var_flt(iptr->dst, d);
2387                                         break;
2388                                 default: panic ("internal error");
2389                                 }
2390                         break;
2391
2392
2393                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2394                                       /* op1 = type, val.i = field offset             */
2395
2396                         a = ((fieldinfo *)(iptr->val.a))->offset;
2397                         switch (iptr->op1) {
2398                                 case TYPE_INT:
2399                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2400                                         var_to_reg_int(s2, src, REG_ITMP2);
2401                                         gen_nullptr_check(s1);
2402                                         M_IST(s2, s1, a);
2403                                         break;
2404                                 case TYPE_LNG:
2405                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2406                                         var_to_reg_int(s2, src, REG_ITMP2);
2407                                         gen_nullptr_check(s1);
2408                                         M_LST(s2, s1, a);
2409                                         break;
2410                                 case TYPE_ADR:
2411                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2412                                         var_to_reg_int(s2, src, REG_ITMP2);
2413                                         gen_nullptr_check(s1);
2414                                         M_AST(s2, s1, a);
2415                                         break;
2416                                 case TYPE_FLT:
2417                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2418                                         var_to_reg_flt(s2, src, REG_FTMP2);
2419                                         gen_nullptr_check(s1);
2420                                         M_FST(s2, s1, a);
2421                                         break;
2422                                 case TYPE_DBL:
2423                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2424                                         var_to_reg_flt(s2, src, REG_FTMP2);
2425                                         gen_nullptr_check(s1);
2426                                         M_DST(s2, s1, a);
2427                                         break;
2428                                 default: panic ("internal error");
2429                                 }
2430                         break;
2431
2432                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2433                                       /* op1 = type, val.i = field offset             */
2434
2435                         a = ((fieldinfo *)(iptr->val.a))->offset;
2436                         switch (iptr->op1) {
2437                                 case TYPE_INT:
2438                                         var_to_reg_int(s1, src, REG_ITMP1);
2439                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2440                                         gen_nullptr_check(s1);
2441                                         M_ILD(d, s1, a);
2442                                         store_reg_to_var_int(iptr->dst, d);
2443                                         break;
2444                                 case TYPE_LNG:
2445                                         var_to_reg_int(s1, src, REG_ITMP1);
2446                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2447                                         gen_nullptr_check(s1);
2448                                         M_LLD(d, s1, a);
2449                                         store_reg_to_var_int(iptr->dst, d);
2450                                         break;
2451                                 case TYPE_ADR:
2452                                         var_to_reg_int(s1, src, REG_ITMP1);
2453                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2454                                         gen_nullptr_check(s1);
2455                                         M_ALD(d, s1, a);
2456                                         store_reg_to_var_int(iptr->dst, d);
2457                                         break;
2458                                 case TYPE_FLT:
2459                                         var_to_reg_int(s1, src, REG_ITMP1);
2460                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2461                                         gen_nullptr_check(s1);
2462                                         M_FLD(d, s1, a);
2463                                         store_reg_to_var_flt(iptr->dst, d);
2464                                         break;
2465                                 case TYPE_DBL:
2466                                         var_to_reg_int(s1, src, REG_ITMP1);
2467                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2468                                         gen_nullptr_check(s1);
2469                                         M_DLD(d, s1, a);
2470                                         store_reg_to_var_flt(iptr->dst, d);
2471                                         break;
2472                                 default: panic ("internal error");
2473                                 }
2474                         break;
2475
2476
2477                 /* branch operations **************************************************/
2478
2479 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2480
2481                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2482
2483                         var_to_reg_int(s1, src, REG_ITMP1);
2484                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2485                         a = dseg_addaddress(asm_handle_exception);
2486                         M_ALD(REG_ITMP2, REG_PV, a);
2487                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2488                         M_NOP;              /* nop ensures that XPC is less than the end */
2489                                             /* of basic block                            */
2490                         ALIGNCODENOP;
2491                         break;
2492
2493                 case ICMD_GOTO:         /* ... ==> ...                                */
2494                                         /* op1 = target JavaVM pc                     */
2495                         M_BR(0);
2496                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2497                         ALIGNCODENOP;
2498                         break;
2499
2500                 case ICMD_JSR:          /* ... ==> ...                                */
2501                                         /* op1 = target JavaVM pc                     */
2502
2503                         M_BSR(REG_ITMP1, 0);
2504                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2505                         break;
2506
2507                 case ICMD_RET:          /* ... ==> ...                                */
2508                                         /* op1 = local variable                       */
2509
2510                         var = &(locals[iptr->op1][TYPE_ADR]);
2511                         if (var->flags & INMEMORY) {
2512                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2513                                 M_RET(REG_ZERO, REG_ITMP1);
2514                                 }
2515                         else
2516                                 M_RET(REG_ZERO, var->regoff);
2517                         ALIGNCODENOP;
2518                         break;
2519
2520                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2521                                         /* op1 = target JavaVM pc                     */
2522
2523                         var_to_reg_int(s1, src, REG_ITMP1);
2524                         M_BEQZ(s1, 0);
2525                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2526                         break;
2527
2528                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2529                                         /* op1 = target JavaVM pc                     */
2530
2531                         var_to_reg_int(s1, src, REG_ITMP1);
2532                         M_BNEZ(s1, 0);
2533                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2534                         break;
2535
2536                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2537                                         /* op1 = target JavaVM pc, val.i = constant   */
2538
2539                         var_to_reg_int(s1, src, REG_ITMP1);
2540                         if (iptr->val.i == 0) {
2541                                 M_BEQZ(s1, 0);
2542                                 }
2543                         else {
2544                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2545                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2546                                         }
2547                                 else {
2548                                         ICONST(REG_ITMP2, iptr->val.i);
2549                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2550                                         }
2551                                 M_BNEZ(REG_ITMP1, 0);
2552                                 }
2553                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2554                         break;
2555
2556                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2557                                         /* op1 = target JavaVM pc, val.i = constant   */
2558
2559                         var_to_reg_int(s1, src, REG_ITMP1);
2560                         if (iptr->val.i == 0) {
2561                                 M_BLTZ(s1, 0);
2562                                 }
2563                         else {
2564                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2565                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2566                                         }
2567                                 else {
2568                                         ICONST(REG_ITMP2, iptr->val.i);
2569                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2570                                         }
2571                                 M_BNEZ(REG_ITMP1, 0);
2572                                 }
2573                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2574                         break;
2575
2576                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2577                                         /* op1 = target JavaVM pc, val.i = constant   */
2578
2579                         var_to_reg_int(s1, src, REG_ITMP1);
2580                         if (iptr->val.i == 0) {
2581                                 M_BLEZ(s1, 0);
2582                                 }
2583                         else {
2584                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2585                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2586                                         }
2587                                 else {
2588                                         ICONST(REG_ITMP2, iptr->val.i);
2589                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2590                                         }
2591                                 M_BNEZ(REG_ITMP1, 0);
2592                                 }
2593                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2594                         break;
2595
2596                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2597                                         /* op1 = target JavaVM pc, val.i = constant   */
2598
2599                         var_to_reg_int(s1, src, REG_ITMP1);
2600                         if (iptr->val.i == 0) {
2601                                 M_BNEZ(s1, 0);
2602                                 }
2603                         else {
2604                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2605                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2606                                         }
2607                                 else {
2608                                         ICONST(REG_ITMP2, iptr->val.i);
2609                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2610                                         }
2611                                 M_BEQZ(REG_ITMP1, 0);
2612                                 }
2613                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2614                         break;
2615
2616                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2617                                         /* op1 = target JavaVM pc, val.i = constant   */
2618
2619                         var_to_reg_int(s1, src, REG_ITMP1);
2620                         if (iptr->val.i == 0) {
2621                                 M_BGTZ(s1, 0);
2622                                 }
2623                         else {
2624                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2625                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2626                                         }
2627                                 else {
2628                                         ICONST(REG_ITMP2, iptr->val.i);
2629                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2630                                         }
2631                                 M_BEQZ(REG_ITMP1, 0);
2632                                 }
2633                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2634                         break;
2635
2636                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2637                                         /* op1 = target JavaVM pc, val.i = constant   */
2638
2639                         var_to_reg_int(s1, src, REG_ITMP1);
2640                         if (iptr->val.i == 0) {
2641                                 M_BGEZ(s1, 0);
2642                                 }
2643                         else {
2644                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2645                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2646                                         }
2647                                 else {
2648                                         ICONST(REG_ITMP2, iptr->val.i);
2649                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2650                                         }
2651                                 M_BEQZ(REG_ITMP1, 0);
2652                                 }
2653                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2654                         break;
2655
2656                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2657                                         /* op1 = target JavaVM pc, val.l = constant   */
2658
2659                         var_to_reg_int(s1, src, REG_ITMP1);
2660                         if (iptr->val.l == 0) {
2661                                 M_BEQZ(s1, 0);
2662                                 }
2663                         else {
2664                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2665                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2666                                         }
2667                                 else {
2668                                         LCONST(REG_ITMP2, iptr->val.l);
2669                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2670                                         }
2671                                 M_BNEZ(REG_ITMP1, 0);
2672                                 }
2673                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2674                         break;
2675
2676                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2677                                         /* op1 = target JavaVM pc, val.l = constant   */
2678
2679                         var_to_reg_int(s1, src, REG_ITMP1);
2680                         if (iptr->val.l == 0) {
2681                                 M_BLTZ(s1, 0);
2682                                 }
2683                         else {
2684                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2685                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2686                                         }
2687                                 else {
2688                                         LCONST(REG_ITMP2, iptr->val.l);
2689                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2690                                         }
2691                                 M_BNEZ(REG_ITMP1, 0);
2692                                 }
2693                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2694                         break;
2695
2696                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2697                                         /* op1 = target JavaVM pc, val.l = constant   */
2698
2699                         var_to_reg_int(s1, src, REG_ITMP1);
2700                         if (iptr->val.l == 0) {
2701                                 M_BLEZ(s1, 0);
2702                                 }
2703                         else {
2704                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2705                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2706                                         }
2707                                 else {
2708                                         LCONST(REG_ITMP2, iptr->val.l);
2709                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2710                                         }
2711                                 M_BNEZ(REG_ITMP1, 0);
2712                                 }
2713                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2714                         break;
2715
2716                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2717                                         /* op1 = target JavaVM pc, val.l = constant   */
2718
2719                         var_to_reg_int(s1, src, REG_ITMP1);
2720                         if (iptr->val.l == 0) {
2721                                 M_BNEZ(s1, 0);
2722                                 }
2723                         else {
2724                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2725                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2726                                         }
2727                                 else {
2728                                         LCONST(REG_ITMP2, iptr->val.l);
2729                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2730                                         }
2731                                 M_BEQZ(REG_ITMP1, 0);
2732                                 }
2733                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2734                         break;
2735
2736                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2737                                         /* op1 = target JavaVM pc, val.l = constant   */
2738
2739                         var_to_reg_int(s1, src, REG_ITMP1);
2740                         if (iptr->val.l == 0) {
2741                                 M_BGTZ(s1, 0);
2742                                 }
2743                         else {
2744                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2745                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2746                                         }
2747                                 else {
2748                                         LCONST(REG_ITMP2, iptr->val.l);
2749                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2750                                         }
2751                                 M_BEQZ(REG_ITMP1, 0);
2752                                 }
2753                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2754                         break;
2755
2756                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2757                                         /* op1 = target JavaVM pc, val.l = constant   */
2758
2759                         var_to_reg_int(s1, src, REG_ITMP1);
2760                         if (iptr->val.l == 0) {
2761                                 M_BGEZ(s1, 0);
2762                                 }
2763                         else {
2764                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2765                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2766                                         }
2767                                 else {
2768                                         LCONST(REG_ITMP2, iptr->val.l);
2769                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2770                                         }
2771                                 M_BEQZ(REG_ITMP1, 0);
2772                                 }
2773                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2774                         break;
2775
2776                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2777                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2778                 case ICMD_IF_ACMPEQ:
2779
2780                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2781                         var_to_reg_int(s2, src, REG_ITMP2);
2782                         M_CMPEQ(s1, s2, REG_ITMP1);
2783                         M_BNEZ(REG_ITMP1, 0);
2784                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2785                         break;
2786
2787                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2788                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2789                 case ICMD_IF_ACMPNE:
2790
2791                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2792                         var_to_reg_int(s2, src, REG_ITMP2);
2793                         M_CMPEQ(s1, s2, REG_ITMP1);
2794                         M_BEQZ(REG_ITMP1, 0);
2795                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2796                         break;
2797
2798                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2799                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2800
2801                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2802                         var_to_reg_int(s2, src, REG_ITMP2);
2803                         M_CMPLT(s1, s2, REG_ITMP1);
2804                         M_BNEZ(REG_ITMP1, 0);
2805                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2806                         break;
2807
2808                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2809                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2810
2811                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2812                         var_to_reg_int(s2, src, REG_ITMP2);
2813                         M_CMPLE(s1, s2, REG_ITMP1);
2814                         M_BEQZ(REG_ITMP1, 0);
2815                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2816                         break;
2817
2818                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2819                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2820
2821                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2822                         var_to_reg_int(s2, src, REG_ITMP2);
2823                         M_CMPLE(s1, s2, REG_ITMP1);
2824                         M_BNEZ(REG_ITMP1, 0);
2825                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2826                         break;
2827
2828                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2829                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2830
2831                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2832                         var_to_reg_int(s2, src, REG_ITMP2);
2833                         M_CMPLT(s1, s2, REG_ITMP1);
2834                         M_BEQZ(REG_ITMP1, 0);
2835                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2836                         break;
2837
2838                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2839
2840                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2841                         break;
2842
2843                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2844                                         /* val.i = constant                           */
2845
2846                         var_to_reg_int(s1, src, REG_ITMP1);
2847                         d = reg_of_var(iptr->dst, REG_ITMP3);
2848                         s3 = iptr->val.i;
2849                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2850                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2851                                         M_CMPEQ(s1, REG_ZERO, d);
2852                                         store_reg_to_var_int(iptr->dst, d);
2853                                         break;
2854                                         }
2855                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2856                                         M_CMPEQ(s1, REG_ZERO, d);
2857                                         M_XOR_IMM(d, 1, d);
2858                                         store_reg_to_var_int(iptr->dst, d);
2859                                         break;
2860                                         }
2861                                 if (s1 == d) {
2862                                         M_MOV(s1, REG_ITMP1);
2863                                         s1 = REG_ITMP1;
2864                                         }
2865                                 ICONST(d, iptr[1].val.i);
2866                                 }
2867                         if ((s3 >= 0) && (s3 <= 255)) {
2868                                 M_CMOVEQ_IMM(s1, s3, d);
2869                                 }
2870                         else {
2871                                 ICONST(REG_ITMP2, s3);
2872                                 M_CMOVEQ(s1, REG_ITMP2, d);
2873                                 }
2874                         store_reg_to_var_int(iptr->dst, d);
2875                         break;
2876
2877                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2878                                         /* val.i = constant                           */
2879
2880                         var_to_reg_int(s1, src, REG_ITMP1);
2881                         d = reg_of_var(iptr->dst, REG_ITMP3);
2882                         s3 = iptr->val.i;
2883                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2884                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2885                                         M_CMPEQ(s1, REG_ZERO, d);
2886                                         store_reg_to_var_int(iptr->dst, d);
2887                                         break;
2888                                         }
2889                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2890                                         M_CMPEQ(s1, REG_ZERO, d);
2891                                         M_XOR_IMM(d, 1, d);
2892                                         store_reg_to_var_int(iptr->dst, d);
2893                                         break;
2894                                         }
2895                                 if (s1 == d) {
2896                                         M_MOV(s1, REG_ITMP1);
2897                                         s1 = REG_ITMP1;
2898                                         }
2899                                 ICONST(d, iptr[1].val.i);
2900                                 }
2901                         if ((s3 >= 0) && (s3 <= 255)) {
2902                                 M_CMOVNE_IMM(s1, s3, d);
2903                                 }
2904                         else {
2905                                 ICONST(REG_ITMP2, s3);
2906                                 M_CMOVNE(s1, REG_ITMP2, d);
2907                                 }
2908                         store_reg_to_var_int(iptr->dst, d);
2909                         break;
2910
2911                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2912                                         /* val.i = constant                           */
2913
2914                         var_to_reg_int(s1, src, REG_ITMP1);
2915                         d = reg_of_var(iptr->dst, REG_ITMP3);
2916                         s3 = iptr->val.i;
2917                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2918                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2919                                         M_CMPLT(s1, REG_ZERO, d);
2920                                         store_reg_to_var_int(iptr->dst, d);
2921                                         break;
2922                                         }
2923                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2924                                         M_CMPLE(REG_ZERO, s1, d);
2925                                         store_reg_to_var_int(iptr->dst, d);
2926                                         break;
2927                                         }
2928                                 if (s1 == d) {
2929                                         M_MOV(s1, REG_ITMP1);
2930                                         s1 = REG_ITMP1;
2931                                         }
2932                                 ICONST(d, iptr[1].val.i);
2933                                 }
2934                         if ((s3 >= 0) && (s3 <= 255)) {
2935                                 M_CMOVLT_IMM(s1, s3, d);
2936                                 }
2937                         else {
2938                                 ICONST(REG_ITMP2, s3);
2939                                 M_CMOVLT(s1, REG_ITMP2, d);
2940                                 }
2941                         store_reg_to_var_int(iptr->dst, d);
2942                         break;
2943
2944                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2945                                         /* val.i = constant                           */
2946
2947                         var_to_reg_int(s1, src, REG_ITMP1);
2948                         d = reg_of_var(iptr->dst, REG_ITMP3);
2949                         s3 = iptr->val.i;
2950                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2951                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2952                                         M_CMPLE(REG_ZERO, s1, d);
2953                                         store_reg_to_var_int(iptr->dst, d);
2954                                         break;
2955                                         }
2956                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2957                                         M_CMPLT(s1, REG_ZERO, d);
2958                                         store_reg_to_var_int(iptr->dst, d);
2959                                         break;
2960                                         }
2961                                 if (s1 == d) {
2962                                         M_MOV(s1, REG_ITMP1);
2963                                         s1 = REG_ITMP1;
2964                                         }
2965                                 ICONST(d, iptr[1].val.i);
2966                                 }
2967                         if ((s3 >= 0) && (s3 <= 255)) {
2968                                 M_CMOVGE_IMM(s1, s3, d);
2969                                 }
2970                         else {
2971                                 ICONST(REG_ITMP2, s3);
2972                                 M_CMOVGE(s1, REG_ITMP2, d);
2973                                 }
2974                         store_reg_to_var_int(iptr->dst, d);
2975                         break;
2976
2977                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2978                                         /* val.i = constant                           */
2979
2980                         var_to_reg_int(s1, src, REG_ITMP1);
2981                         d = reg_of_var(iptr->dst, REG_ITMP3);
2982                         s3 = iptr->val.i;
2983                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2984                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2985                                         M_CMPLT(REG_ZERO, s1, d);
2986                                         store_reg_to_var_int(iptr->dst, d);
2987                                         break;
2988                                         }
2989                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2990                                         M_CMPLE(s1, REG_ZERO, d);
2991                                         store_reg_to_var_int(iptr->dst, d);
2992                                         break;
2993                                         }
2994                                 if (s1 == d) {
2995                                         M_MOV(s1, REG_ITMP1);
2996                                         s1 = REG_ITMP1;
2997                                         }
2998                                 ICONST(d, iptr[1].val.i);
2999                                 }
3000                         if ((s3 >= 0) && (s3 <= 255)) {
3001                                 M_CMOVGT_IMM(s1, s3, d);
3002                                 }
3003                         else {
3004                                 ICONST(REG_ITMP2, s3);
3005                                 M_CMOVGT(s1, REG_ITMP2, d);
3006                                 }
3007                         store_reg_to_var_int(iptr->dst, d);
3008                         break;
3009
3010                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
3011                                         /* val.i = constant                           */
3012
3013                         var_to_reg_int(s1, src, REG_ITMP1);
3014                         d = reg_of_var(iptr->dst, REG_ITMP3);
3015                         s3 = iptr->val.i;
3016                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
3017                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
3018                                         M_CMPLE(s1, REG_ZERO, d);
3019                                         store_reg_to_var_int(iptr->dst, d);
3020                                         break;
3021                                         }
3022                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
3023                                         M_CMPLT(REG_ZERO, s1, d);
3024                                         store_reg_to_var_int(iptr->dst, d);
3025                                         break;
3026                                         }
3027                                 if (s1 == d) {
3028                                         M_MOV(s1, REG_ITMP1);
3029                                         s1 = REG_ITMP1;
3030                                         }
3031                                 ICONST(d, iptr[1].val.i);
3032                                 }
3033                         if ((s3 >= 0) && (s3 <= 255)) {
3034                                 M_CMOVLE_IMM(s1, s3, d);
3035                                 }
3036                         else {
3037                                 ICONST(REG_ITMP2, s3);
3038                                 M_CMOVLE(s1, REG_ITMP2, d);
3039                                 }
3040                         store_reg_to_var_int(iptr->dst, d);
3041                         break;
3042
3043
3044                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
3045                 case ICMD_LRETURN:
3046                 case ICMD_ARETURN:
3047
3048 #ifdef USE_THREADS
3049                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3050                                 int disp;
3051                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3052                                 M_ALD(REG_PV, REG_PV, a);
3053                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3054                                 M_JSR(REG_RA, REG_PV);
3055                                 disp = -(int)((u1*) mcodeptr - mcodebase);
3056                                 M_LDA(REG_PV, REG_RA, disp);
3057                                 }
3058 #endif
3059                         var_to_reg_int(s1, src, REG_RESULT);
3060                         M_INTMOVE(s1, REG_RESULT);
3061                         goto nowperformreturn;
3062
3063                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
3064                 case ICMD_DRETURN:
3065
3066 #ifdef USE_THREADS
3067                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3068                                 int disp;
3069                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3070                                 M_ALD(REG_PV, REG_PV, a);
3071                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3072                                 M_JSR(REG_RA, REG_PV);
3073                                 disp = -(int)((u1*) mcodeptr - mcodebase);
3074                                 M_LDA(REG_PV, REG_RA, disp);
3075                                 }
3076 #endif
3077                         var_to_reg_flt(s1, src, REG_FRESULT);
3078                         M_FLTMOVE(s1, REG_FRESULT);
3079                         goto nowperformreturn;
3080
3081                 case ICMD_RETURN:      /* ...  ==> ...                                */
3082
3083 #ifdef USE_THREADS
3084                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3085                                 int disp;
3086                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3087                                 M_ALD(REG_PV, REG_PV, a);
3088                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3089                                 M_JSR(REG_RA, REG_PV);
3090                                 disp = -(int)((u1*) mcodeptr - mcodebase);
3091                                 M_LDA(REG_PV, REG_RA, disp);
3092                                 }
3093 #endif
3094
3095 nowperformreturn:
3096                         {
3097                         int r, p;
3098
3099                         p = parentargs_base;
3100
3101                         /* restore return address                                         */
3102
3103                         if (!isleafmethod)
3104                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
3105
3106                         /* restore saved registers                                        */
3107
3108                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
3109                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
3110                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
3111                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
3112
3113                         /* deallocate stack                                               */
3114
3115                         if (parentargs_base)
3116                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
3117
3118                         /* call trace function */
3119
3120                         if (runverbose) {
3121                                 M_LDA (REG_SP, REG_SP, -24);
3122                                 M_AST(REG_RA, REG_SP, 0);
3123                                 M_LST(REG_RESULT, REG_SP, 8);
3124                                 M_DST(REG_FRESULT, REG_SP,16);
3125                                 a = dseg_addaddress(method);
3126                                 M_ALD(argintregs[0], REG_PV, a);
3127                                 M_MOV(REG_RESULT, argintregs[1]);
3128                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);
3129                                 M_FLTMOVE(REG_FRESULT, argfltregs[3]);
3130                                 a = dseg_addaddress((void *) builtin_displaymethodstop);
3131                                 M_ALD(REG_PV, REG_PV, a);
3132                                 M_JSR (REG_RA, REG_PV);
3133                                 s1 = (int)((u1*) mcodeptr - mcodebase);
3134                                 if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3135                                 else {
3136                                         s4 ml=-s1, mh=0;
3137                                         while (ml<-32768) { ml+=65536; mh--; }
3138                                         M_LDA (REG_PV, REG_RA, ml );
3139                                         M_LDAH (REG_PV, REG_PV, mh );
3140                                         }
3141                                 M_DLD(REG_FRESULT, REG_SP,16);
3142                                 M_LLD(REG_RESULT, REG_SP, 8);
3143                                 M_ALD(REG_RA, REG_SP, 0);
3144                                 M_LDA (REG_SP, REG_SP, 24);
3145                                 }
3146
3147                         M_RET(REG_ZERO, REG_RA);
3148                         ALIGNCODENOP;
3149                         }
3150                         break;
3151
3152
3153                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3154                         {
3155                         s4 i, l, *s4ptr;
3156                         void **tptr;
3157
3158                         tptr = (void **) iptr->target;
3159
3160                         s4ptr = iptr->val.a;
3161                         l = s4ptr[1];                          /* low     */
3162                         i = s4ptr[2];                          /* high    */
3163
3164                         var_to_reg_int(s1, src, REG_ITMP1);
3165                         if (l == 0)
3166                                 {M_INTMOVE(s1, REG_ITMP1);}
3167                         else if (l <= 32768) {
3168                                 M_LDA(REG_ITMP1, s1, -l);
3169                                 }
3170                         else {
3171                                 ICONST(REG_ITMP2, l);
3172                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3173                                 }
3174                         i = i - l + 1;
3175
3176                         /* range check */
3177
3178                         if (i <= 256)
3179                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3180                         else {
3181                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3182                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3183                                 }
3184                         M_BEQZ(REG_ITMP2, 0);
3185
3186
3187                         /* codegen_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3188                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3189
3190                         /* build jump table top down and use address of lowest entry */
3191
3192                         /* s4ptr += 3 + i; */
3193                         tptr += i;
3194
3195                         while (--i >= 0) {
3196                                 /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
3197                                 dseg_addtarget((basicblock *) tptr[0]);
3198                                 --tptr;
3199                                 }
3200                         }
3201
3202                         /* length of dataseg after last dseg_addtarget is used by load */
3203
3204                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3205                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
3206                         M_JMP(REG_ZERO, REG_ITMP2);
3207                         ALIGNCODENOP;
3208                         break;
3209
3210
3211                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3212                         {
3213                         s4 i, l, val, *s4ptr;
3214                         void **tptr;
3215
3216                         tptr = (void **) iptr->target;
3217
3218                         s4ptr = iptr->val.a;
3219                         l = s4ptr[0];                          /* default  */
3220                         i = s4ptr[1];                          /* count    */
3221
3222                         MCODECHECK((i<<2)+8);
3223                         var_to_reg_int(s1, src, REG_ITMP1);
3224                         while (--i >= 0) {
3225                                 s4ptr += 2;
3226                                 ++tptr;
3227
3228                                 val = s4ptr[0];
3229                                 if ((val >= 0) && (val <= 255)) {
3230                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3231                                         }
3232                                 else {
3233                                         if ((val >= -32768) && (val <= 32767)) {
3234                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3235                                                 }
3236                                         else {
3237                                                 a = dseg_adds4 (val);
3238                                                 M_ILD(REG_ITMP2, REG_PV, a);
3239                                                 }
3240                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3241                                         }
3242                                 M_BNEZ(REG_ITMP2, 0);
3243                                 /* codegen_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3244                                 codegen_addreference((basicblock *) tptr[0], mcodeptr);
3245                                 }
3246
3247                         M_BR(0);
3248                         /* codegen_addreference(BlockPtrOfPC(l), mcodeptr); */
3249
3250                         tptr = (void **) iptr->target;
3251                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3252
3253                         ALIGNCODENOP;
3254                         break;
3255                         }
3256
3257
3258                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3259                                         /* op1 = return type, val.a = function pointer*/
3260                         s3 = 3;
3261                         goto gen_method;
3262
3263                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3264                                         /* op1 = return type, val.a = function pointer*/
3265                         s3 = 2;
3266                         goto gen_method;
3267
3268                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3269                                         /* op1 = return type, val.a = function pointer*/
3270                         s3 = 1;
3271                         goto gen_method;
3272
3273                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3274                                         /* op1 = arg count, val.a = method pointer    */
3275
3276                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3277                                         /* op1 = arg count, val.a = method pointer    */
3278
3279                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3280                                         /* op1 = arg count, val.a = method pointer    */
3281
3282                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3283                                         /* op1 = arg count, val.a = method pointer    */
3284
3285                         s3 = iptr->op1;
3286
3287 gen_method: {
3288                         methodinfo   *m;
3289                         classinfo    *ci;
3290
3291                         MCODECHECK((s3 << 1) + 64);
3292
3293                         /* copy arguments to registers or stack location                  */
3294
3295                         for (; --s3 >= 0; src = src->prev) {
3296                                 if (src->varkind == ARGVAR)
3297                                         continue;
3298                                 if (IS_INT_LNG_TYPE(src->type)) {
3299                                         if (s3 < INT_ARG_CNT) {
3300                                                 s1 = argintregs[s3];
3301                                                 var_to_reg_int(d, src, s1);
3302                                                 M_INTMOVE(d, s1);
3303                                                 }
3304                                         else  {
3305                                                 var_to_reg_int(d, src, REG_ITMP1);
3306                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3307                                                 }
3308                                         }
3309                                 else
3310                                         if (s3 < FLT_ARG_CNT) {
3311                                                 s1 = argfltregs[s3];
3312                                                 var_to_reg_flt(d, src, s1);
3313                                                 M_FLTMOVE(d, s1);
3314                                                 }
3315                                         else {
3316                                                 var_to_reg_flt(d, src, REG_FTMP1);
3317                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3318                                                 }
3319                                 } /* end of for */
3320
3321                         m = iptr->val.a;
3322                         switch (iptr->opc) {
3323                                 case ICMD_BUILTIN3:
3324                                 case ICMD_BUILTIN2:
3325                                 case ICMD_BUILTIN1:
3326                                         a = dseg_addaddress ((void*) (m));
3327
3328                                         M_ALD(REG_PV, REG_PV, a); /* Pointer to built-in-function */
3329                                         d = iptr->op1;
3330                                         goto makeactualcall;
3331
3332                                 case ICMD_INVOKESTATIC:
3333                                 case ICMD_INVOKESPECIAL:
3334                                         a = dseg_addaddress (m->stubroutine);
3335
3336                                         M_ALD(REG_PV, REG_PV, a );       /* method pointer in r27 */
3337
3338                                         d = m->returntype;
3339                                         goto makeactualcall;
3340
3341                                 case ICMD_INVOKEVIRTUAL:
3342
3343                                         gen_nullptr_check(argintregs[0]);
3344                                         M_ALD(REG_METHODPTR, argintregs[0],
3345                                                                  OFFSET(java_objectheader, vftbl));
3346                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
3347                                                                 sizeof(methodptr) * m->vftblindex);
3348
3349                                         d = m->returntype;
3350                                         goto makeactualcall;
3351
3352                                 case ICMD_INVOKEINTERFACE:
3353                                         ci = m->class;
3354
3355                                         gen_nullptr_check(argintregs[0]);
3356                                         M_ALD(REG_METHODPTR, argintregs[0],
3357                                                                  OFFSET(java_objectheader, vftbl));
3358                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
3359                                               OFFSET(vftbl, interfacetable[0]) -
3360                                               sizeof(methodptr*) * ci->index);
3361                                         M_ALD(REG_PV, REG_METHODPTR,
3362                                                             sizeof(methodptr) * (m - ci->methods));
3363
3364                                         d = m->returntype;
3365                                         goto makeactualcall;
3366
3367                                 default:
3368                                         d = 0;
3369                                         error ("Unkown ICMD-Command: %d", iptr->opc);
3370                                 }
3371
3372 makeactualcall:
3373
3374                         M_JSR (REG_RA, REG_PV);
3375
3376                         /* recompute pv */
3377
3378                         s1 = (int)((u1*) mcodeptr - mcodebase);
3379                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3380                         else {
3381                                 s4 ml=-s1, mh=0;
3382                                 while (ml<-32768) { ml+=65536; mh--; }
3383                                 M_LDA (REG_PV, REG_RA, ml );
3384                                 M_LDAH (REG_PV, REG_PV, mh );
3385                                 }
3386
3387                         /* d contains return type */
3388
3389                         if (d != TYPE_VOID) {
3390                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3391                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3392                                         M_INTMOVE(REG_RESULT, s1);
3393                                         store_reg_to_var_int(iptr->dst, s1);
3394                                         }
3395                                 else {
3396                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3397                                         M_FLTMOVE(REG_FRESULT, s1);
3398                                         store_reg_to_var_flt(iptr->dst, s1);
3399                                         }
3400                                 }
3401                         }
3402                         break;
3403
3404
3405                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3406
3407                                       /* op1:   0 == array, 1 == class                */
3408                                       /* val.a: (classinfo*) superclass               */
3409
3410 /*          superclass is an interface:
3411  *
3412  *          return (sub != NULL) &&
3413  *                 (sub->vftbl->interfacetablelength > super->index) &&
3414  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3415  *
3416  *          superclass is a class:
3417  *
3418  *          return ((sub != NULL) && (0
3419  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3420  *                  super->vftbl->diffvall));
3421  */
3422
3423                         {
3424                         classinfo *super = (classinfo*) iptr->val.a;
3425
3426                         var_to_reg_int(s1, src, REG_ITMP1);
3427                         d = reg_of_var(iptr->dst, REG_ITMP3);
3428                         if (s1 == d) {
3429                                 M_MOV(s1, REG_ITMP1);
3430                                 s1 = REG_ITMP1;
3431                                 }
3432                         M_CLR(d);
3433                         if (iptr->op1) {                               /* class/interface */
3434                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3435                                         M_BEQZ(s1, 6);
3436                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3437                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3438                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3439                                         M_BLEZ(REG_ITMP2, 2);
3440                                         M_ALD(REG_ITMP1, REG_ITMP1,
3441                                               OFFSET(vftbl, interfacetable[0]) -
3442                                               super->index * sizeof(methodptr*));
3443                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3444                                         }
3445                                 else {                                     /* class           */
3446 /*
3447                                         s2 = super->vftbl->diffval;
3448                                         M_BEQZ(s1, 4 + (s2 > 255));
3449                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3450                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3451                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3452                                         if (s2 <= 255)
3453                                                 M_CMPULE_IMM(REG_ITMP1, s2, d);
3454                                         else {
3455                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3456                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3457                                                 }
3458 */
3459                                         M_BEQZ(s1, 7);
3460                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3461                                         a = dseg_addaddress ((void*) super->vftbl);
3462                                         M_ALD(REG_ITMP2, REG_PV, a);
3463                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3464                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3465                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3466                                         M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3467                                         M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3468                                         }
3469                                 }
3470                         else
3471                                 panic ("internal error: no inlined array instanceof");
3472                         }
3473                         store_reg_to_var_int(iptr->dst, d);
3474                         break;
3475
3476                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3477
3478                                       /* op1:   0 == array, 1 == class                */
3479                                       /* val.a: (classinfo*) superclass               */
3480
3481 /*          superclass is an interface:
3482  *
3483  *          OK if ((sub == NULL) ||
3484  *                 (sub->vftbl->interfacetablelength > super->index) &&
3485  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3486  *
3487  *          superclass is a class:
3488  *
3489  *          OK if ((sub == NULL) || (0
3490  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3491  *                 super->vftbl->diffvall));
3492  */
3493
3494                         {
3495                         classinfo *super = (classinfo*) iptr->val.a;
3496
3497                         d = reg_of_var(iptr->dst, REG_ITMP3);
3498                         var_to_reg_int(s1, src, d);
3499                         if (iptr->op1) {                               /* class/interface */
3500                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3501                                         M_BEQZ(s1, 6);
3502                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3503                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3504                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3505                                         M_BLEZ(REG_ITMP2, 0);
3506                                         codegen_addxcastrefs(mcodeptr);
3507                                         M_ALD(REG_ITMP2, REG_ITMP1,
3508                                               OFFSET(vftbl, interfacetable[0]) -
3509                                               super->index * sizeof(methodptr*));
3510                                         M_BEQZ(REG_ITMP2, 0);
3511                                         codegen_addxcastrefs(mcodeptr);
3512                                         }
3513                                 else {                                     /* class           */
3514 /*
3515                                         s2 = super->vftbl->diffval;
3516                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3517                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3518                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3519                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3520                                         if (s2 == 0) {
3521                                                 M_BNEZ(REG_ITMP1, 0);
3522                                                 }
3523                                         else if (s2 <= 255) {
3524                                                 M_CMPULE_IMM(REG_ITMP1, s2, REG_ITMP2);
3525                                                 M_BEQZ(REG_ITMP2, 0);
3526                                                 }
3527                                         else {
3528                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3529                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3530                                                 M_BEQZ(REG_ITMP2, 0);
3531                                                 }
3532 */
3533                                         M_BEQZ(s1, 8 + (d == REG_ITMP3));
3534                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3535                                         a = dseg_addaddress ((void*) super->vftbl);
3536                                         M_ALD(REG_ITMP2, REG_PV, a);
3537                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3538                                         if (d != REG_ITMP3) {
3539                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3540                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3541                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3542                                                 }
3543                                         else {
3544                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, baseval));
3545                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3546                                                 M_ALD(REG_ITMP2, REG_PV, a);
3547                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3548                                                 }
3549                                         M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3550                                         M_BEQZ(REG_ITMP2, 0);
3551                                         codegen_addxcastrefs(mcodeptr);
3552                                         }
3553                                 }
3554                         else
3555                                 panic ("internal error: no inlined array checkcast");
3556                         }
3557                         M_INTMOVE(s1, d);
3558                         store_reg_to_var_int(iptr->dst, d);
3559                         break;
3560
3561                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3562
3563                         var_to_reg_int(s1, src, REG_ITMP1);
3564                         M_BLTZ(s1, 0);
3565                         codegen_addxcheckarefs(mcodeptr);
3566                         break;
3567
3568                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3569                                       /* op1 = dimension, val.a = array descriptor    */
3570
3571                         /* check for negative sizes and copy sizes to stack if necessary  */
3572
3573                         MCODECHECK((iptr->op1 << 1) + 64);
3574
3575                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3576                                 var_to_reg_int(s2, src, REG_ITMP1);
3577                                 M_BLTZ(s2, 0);
3578                                 codegen_addxcheckarefs(mcodeptr);
3579
3580                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3581
3582                                 if (src->varkind != ARGVAR) {
3583                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3584                                         }
3585                                 }
3586
3587                         /* a0 = dimension count */
3588
3589                         ICONST(argintregs[0], iptr->op1);
3590
3591                         /* a1 = arraydescriptor */
3592
3593                         a = dseg_addaddress(iptr->val.a);
3594                         M_ALD(argintregs[1], REG_PV, a);
3595
3596                         /* a2 = pointer to dimensions = stack pointer */
3597
3598                         M_INTMOVE(REG_SP, argintregs[2]);
3599
3600                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3601                         M_ALD(REG_PV, REG_PV, a);
3602                         M_JSR(REG_RA, REG_PV);
3603                         s1 = (int)((u1*) mcodeptr - mcodebase);
3604                         if (s1 <= 32768)
3605                                 M_LDA (REG_PV, REG_RA, -s1);
3606                         else {
3607                                 s4 ml = -s1, mh = 0;
3608                                 while (ml < -32768) {ml += 65536; mh--;}
3609                                 M_LDA(REG_PV, REG_RA, ml);
3610                                 M_LDAH(REG_PV, REG_PV, mh);
3611                             }
3612                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3613                         M_INTMOVE(REG_RESULT, s1);
3614                         store_reg_to_var_int(iptr->dst, s1);
3615                         break;
3616
3617
3618                 default: error ("Unknown pseudo command: %d", iptr->opc);
3619
3620
3621
3622         } /* switch */
3623
3624         } /* for instruction */
3625
3626         /* copy values to interface registers */
3627
3628         src = bptr->outstack;
3629         len = bptr->outdepth;
3630         MCODECHECK(64+len);
3631         while (src) {
3632                 len--;
3633                 if ((src->varkind != STACKVAR)) {
3634                         s2 = src->type;
3635                         if (IS_FLT_DBL_TYPE(s2)) {
3636                                 var_to_reg_flt(s1, src, REG_FTMP1);
3637                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3638                                         M_FLTMOVE(s1,interfaces[len][s2].regoff);
3639                                         }
3640                                 else {
3641                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3642                                         }
3643                                 }
3644                         else {
3645                                 var_to_reg_int(s1, src, REG_ITMP1);
3646                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3647                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3648                                         }
3649                                 else {
3650                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3651                                         }
3652                                 }
3653                         }
3654                 src = src->prev;
3655                 }
3656         } /* if (bptr -> flags >= BBREACHED) */
3657         } /* for basic block */
3658
3659         /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
3660
3661         {
3662         /* generate bound check stubs */
3663
3664         s4 *xcodeptr = NULL;
3665
3666         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3667                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3668                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3669                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (4 + 4));
3670                         continue;
3671                 }
3672
3673
3674                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3675                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3676
3677                 MCODECHECK(8);
3678
3679                 M_MOV(xboundrefs->reg, REG_ITMP1);
3680                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos - 4);
3681
3682                 if (xcodeptr != NULL) {
3683                         M_BR(xcodeptr - mcodeptr - 1);
3684
3685                 } else {
3686                         xcodeptr = mcodeptr;
3687
3688                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3689                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3690
3691                         a = dseg_addaddress(string_java_lang_ArrayIndexOutOfBoundsException);
3692                         M_ALD(argintregs[0], REG_PV, a);
3693                         M_MOV(REG_ITMP1, argintregs[1]);
3694
3695                         a = dseg_addaddress(new_exception_int);
3696                         M_ALD(REG_PV, REG_PV, a);
3697                         M_JSR(REG_RA, REG_PV);
3698
3699                         /* recompute pv */
3700                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3701                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3702                         else {
3703                                 s4 ml = -s1, mh = 0;
3704                                 while (ml < -32768) { ml += 65536; mh--; }
3705                                 M_LDA(REG_PV, REG_RA, ml);
3706                                 M_LDAH(REG_PV, REG_PV, mh);
3707                         }
3708
3709                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3710
3711                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3712                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3713
3714                         a = dseg_addaddress(asm_handle_exception);
3715                         M_ALD(REG_ITMP3, REG_PV, a);
3716
3717                         M_JMP(REG_ZERO, REG_ITMP3);
3718                 }
3719         }
3720
3721         /* generate negative array size check stubs */
3722
3723         xcodeptr = NULL;
3724
3725         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3726                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3727                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3728                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3729                         continue;
3730                 }
3731
3732                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3733                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3734
3735                 MCODECHECK(8);
3736
3737                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos - 4);
3738
3739                 if (xcodeptr != NULL) {
3740                         M_BR(xcodeptr - mcodeptr - 1);
3741
3742                 } else {
3743                         xcodeptr = mcodeptr;
3744
3745                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3746                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3747
3748                         a = dseg_addaddress(string_java_lang_NegativeArraySizeException);
3749                         M_ALD(argintregs[0], REG_PV, a);
3750
3751                         a = dseg_addaddress(new_exception);
3752                         M_ALD(REG_PV, REG_PV, a);
3753                         M_JSR(REG_RA, REG_PV);
3754
3755                         /* recompute pv */
3756                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3757                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3758                         else {
3759                                 s4 ml = -s1, mh = 0;
3760                                 while (ml < -32768) { ml += 65536; mh--; }
3761                                 M_LDA(REG_PV, REG_RA, ml);
3762                                 M_LDAH(REG_PV, REG_PV, mh);
3763                         }
3764
3765                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3766
3767                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3768                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3769
3770                         a = dseg_addaddress(asm_handle_exception);
3771                         M_ALD(REG_ITMP3, REG_PV, a);
3772
3773                         M_JMP(REG_ZERO, REG_ITMP3);
3774                 }
3775         }
3776
3777         /* generate cast check stubs */
3778
3779         xcodeptr = NULL;
3780
3781         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3782                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3783                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3784                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3785                         continue;
3786                 }
3787
3788                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3789                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3790
3791                 MCODECHECK(8);
3792
3793                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos - 4);
3794
3795                 if (xcodeptr != NULL) {
3796                         M_BR(xcodeptr - mcodeptr - 1);
3797
3798                 } else {
3799                         xcodeptr = mcodeptr;
3800
3801                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3802                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3803
3804                         a = dseg_addaddress(string_java_lang_ClassCastException);
3805                         M_ALD(argintregs[0], REG_PV, a);
3806
3807                         a = dseg_addaddress(new_exception);
3808                         M_ALD(REG_PV, REG_PV, a);
3809                         M_JSR(REG_RA, REG_PV);
3810
3811                         /* recompute pv */
3812                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3813                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3814                         else {
3815                                 s4 ml = -s1, mh = 0;
3816                                 while (ml < -32768) { ml += 65536; mh--; }
3817                                 M_LDA(REG_PV, REG_RA, ml);
3818                                 M_LDAH(REG_PV, REG_PV, mh);
3819                         }
3820
3821                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3822
3823                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3824                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3825
3826                         a = dseg_addaddress(asm_handle_exception);
3827                         M_ALD(REG_ITMP3, REG_PV, a);
3828
3829                         M_JMP(REG_ZERO, REG_ITMP3);
3830                 }
3831         }
3832
3833         /* generate null pointer check stubs */
3834
3835         xcodeptr = NULL;
3836
3837         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3838                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3839                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3840                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3841                         continue;
3842                 }
3843
3844                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3845                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3846
3847                 MCODECHECK(8);
3848
3849                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3850
3851                 if (xcodeptr != NULL) {
3852                         M_BR(xcodeptr - mcodeptr - 1);
3853
3854                 } else {
3855                         xcodeptr = mcodeptr;
3856
3857                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3858                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3859
3860                         a = dseg_addaddress(string_java_lang_NullPointerException);
3861                         M_ALD(argintregs[0], REG_PV, a);
3862
3863                         a = dseg_addaddress(new_exception);
3864                         M_ALD(REG_PV, REG_PV, a);
3865                         M_JSR(REG_RA, REG_PV);
3866
3867                         /* recompute pv */
3868                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3869                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3870                         else {
3871                                 s4 ml = -s1, mh = 0;
3872                                 while (ml < -32768) { ml += 65536; mh--; }
3873                                 M_LDA(REG_PV, REG_RA, ml);
3874                                 M_LDAH(REG_PV, REG_PV, mh);
3875                         }
3876
3877                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3878
3879                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3880                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3881
3882                         a = dseg_addaddress(asm_handle_exception);
3883                         M_ALD(REG_ITMP3, REG_PV, a);
3884
3885                         M_JMP(REG_ZERO, REG_ITMP3);
3886                 }
3887         }
3888         }
3889
3890         codegen_finish((int)((u1*) mcodeptr - mcodebase));
3891 }
3892
3893
3894 /* function createcompilerstub *************************************************
3895
3896         creates a stub routine which calls the compiler
3897
3898 *******************************************************************************/
3899
3900 #define COMPSTUBSIZE    3
3901
3902 u1 *createcompilerstub(methodinfo *m)
3903 {
3904         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
3905         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
3906
3907                                             /* code for the stub                  */
3908         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
3909         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
3910                                                in reg 0 is used as method pointer */
3911         s[1] = (u8) m;                      /* literals to be adressed            */
3912         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3913
3914 #ifdef STATISTICS
3915         count_cstub_len += COMPSTUBSIZE * 8;
3916 #endif
3917
3918         return (u1 *) s;
3919 }
3920
3921
3922 /* function removecompilerstub *************************************************
3923
3924      deletes a compilerstub from memory  (simply by freeing it)
3925
3926 *******************************************************************************/
3927
3928 void removecompilerstub(u1 *stub)
3929 {
3930         CFREE(stub, COMPSTUBSIZE * 8);
3931 }
3932
3933
3934 /* function: createnativestub **************************************************
3935
3936         creates a stub routine which calls a native method
3937
3938 *******************************************************************************/
3939
3940 #define NATIVESTUBSIZE      44
3941 #define NATIVEVERBOSESIZE   39 + 13
3942 #define NATIVESTUBOFFSET    8
3943
3944 u1 *createnativestub(functionptr f, methodinfo *m)
3945 {
3946         u8 *s;                              /* memory pointer to hold the stub    */
3947         u8 *cs;
3948         s4 *mcodeptr;                       /* code generation pointer            */
3949         int stackframesize = 0;             /* size of stackframe if needed       */
3950         int disp;
3951         int stubsize;
3952
3953         reg_init();
3954         descriptor2types(m);                /* set paramcount and paramtypes      */
3955
3956         stubsize = runverbose ? NATIVESTUBSIZE + NATIVEVERBOSESIZE : NATIVESTUBSIZE;
3957         s = CNEW(u8, stubsize);             /* memory to hold the stub            */
3958         cs = s + NATIVESTUBOFFSET;
3959         mcodeptr = (s4 *) (cs);             /* code generation pointer            */
3960
3961         *(cs-1) = (u8) f;                   /* address of native method           */
3962         *(cs-2) = (u8) (&_exceptionptr);    /* address of exceptionptr            */
3963         *(cs-3) = (u8) asm_handle_nat_exception; /* addr of asm exception handler */
3964         *(cs-4) = (u8) (&env);              /* addr of jni_environement           */
3965         *(cs-5) = (u8) builtin_trace_args;
3966         *(cs-6) = (u8) m;
3967         *(cs-7) = (u8) builtin_displaymethodstop;
3968         *(cs-8) = (u8) m->class;
3969
3970         M_LDA(REG_SP, REG_SP, -8);          /* build up stackframe                */
3971         M_AST(REG_RA, REG_SP, 0);           /* store return address               */
3972
3973         /* max. 39 instructions */
3974         if (runverbose) {
3975                 int p;
3976                 int t;
3977                 M_LDA(REG_SP, REG_SP, -(14 * 8));
3978                 M_AST(REG_RA, REG_SP, 1 * 8);
3979
3980                 /* save integer argument registers */
3981                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
3982                         M_LST(argintregs[p], REG_SP,  (2 + p) * 8);
3983                 }
3984
3985                 /* save and copy float arguments into integer registers */
3986                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
3987                         t = m->paramtypes[p];
3988
3989                         if (IS_FLT_DBL_TYPE(t)) {
3990                                 if (IS_2_WORD_TYPE(t)) {
3991                                         M_DST(argfltregs[p], REG_SP, (8 + p) * 8);
3992                                         M_LLD(argintregs[p], REG_SP, (8 + p) * 8);
3993
3994                                 } else {
3995                                         M_FST(argfltregs[p], REG_SP, (8 + p) * 8);
3996                                         M_ILD(argintregs[p], REG_SP, (8 + p) * 8);
3997                                 }
3998
3999                         } else {
4000                                 M_DST(argfltregs[p], REG_SP, (8 + p) * 8);
4001                         }
4002                 }
4003
4004                 M_ALD(REG_ITMP1, REG_PV, -6 * 8);
4005                 M_AST(REG_ITMP1, REG_SP, 0);
4006                 M_ALD(REG_PV, REG_PV, -5 * 8);
4007                 M_JSR(REG_RA, REG_PV);
4008                 disp = -(int) (mcodeptr - (s4*) cs) * 4;
4009                 M_LDA(REG_PV, REG_RA, disp);
4010
4011                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
4012                         M_LLD(argintregs[p], REG_SP, (2 + p) * 8);
4013                 }
4014
4015                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
4016                         t = m->paramtypes[p];
4017
4018                         if (IS_FLT_DBL_TYPE(t)) {
4019                                 if (IS_2_WORD_TYPE(t)) {
4020                                         M_DLD(argfltregs[p], REG_SP, (8 + p) * 8);
4021
4022                                 } else {
4023                                         M_FLD(argfltregs[p], REG_SP, (8 + p) * 8);
4024                                 }
4025
4026                         } else {
4027                                 M_DLD(argfltregs[p], REG_SP, (8 + p) * 8);
4028                         }
4029                 }
4030
4031                 M_ALD(REG_RA, REG_SP, 1 * 8);
4032                 M_LDA(REG_SP, REG_SP, 14 * 8);
4033         }
4034
4035         /* save argument registers on stack -- if we have to */
4036         if ((m->flags & ACC_STATIC && m->paramcount > (INT_ARG_CNT - 2)) || m->paramcount > (INT_ARG_CNT - 1)) {
4037                 int i;
4038                 int paramshiftcnt = (m->flags & ACC_STATIC) ? 2 : 1;
4039                 int stackparamcnt = (m->paramcount > INT_ARG_CNT) ? m->paramcount - INT_ARG_CNT : 0;
4040
4041                 stackframesize = stackparamcnt + paramshiftcnt;
4042
4043                 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4044
4045                 /* copy stack arguments into new stack frame -- if any */
4046                 for (i = 0; i < stackparamcnt; i++) {
4047                         M_LLD(REG_ITMP1, REG_SP, (stackparamcnt + 1 + i) * 8);
4048                         M_LST(REG_ITMP1, REG_SP, (paramshiftcnt + i) * 8);
4049                 }
4050
4051                 if (m->flags & ACC_STATIC) {
4052                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4053                                 M_DST(argfltregs[5], REG_SP, 1 * 8);
4054                         } else {
4055                                 M_LST(argintregs[5], REG_SP, 1 * 8);
4056                         }
4057
4058                         if (IS_FLT_DBL_TYPE(m->paramtypes[4])) {
4059                                 M_DST(argfltregs[4], REG_SP, 0 * 8);
4060                         } else {
4061                                 M_LST(argintregs[4], REG_SP, 0 * 8);
4062                         }
4063
4064                 } else {
4065                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4066                                 M_DST(argfltregs[5], REG_SP, 0 * 8);
4067                         } else {
4068                                 M_LST(argintregs[5], REG_SP, 0 * 8);
4069                         }
4070                 }
4071         }
4072
4073         if (m->flags & ACC_STATIC) {
4074                 M_MOV(argintregs[3], argintregs[5]);
4075                 M_MOV(argintregs[2], argintregs[4]);
4076                 M_MOV(argintregs[1], argintregs[3]);
4077                 M_MOV(argintregs[0], argintregs[2]);
4078                 M_FMOV(argfltregs[3], argfltregs[5]);
4079                 M_FMOV(argfltregs[2], argfltregs[4]);
4080                 M_FMOV(argfltregs[1], argfltregs[3]);
4081                 M_FMOV(argfltregs[0], argfltregs[2]);
4082
4083                 /* put class into second argument register */
4084                 M_ALD(argintregs[1], REG_PV, -8 * 8);
4085
4086         } else {
4087                 M_MOV(argintregs[4], argintregs[5]);
4088                 M_MOV(argintregs[3], argintregs[4]);
4089                 M_MOV(argintregs[2], argintregs[3]);
4090                 M_MOV(argintregs[1], argintregs[2]);
4091                 M_MOV(argintregs[0], argintregs[1]);
4092                 M_FMOV(argfltregs[4], argfltregs[5]);
4093                 M_FMOV(argfltregs[3], argfltregs[4]);
4094                 M_FMOV(argfltregs[2], argfltregs[3]);
4095                 M_FMOV(argfltregs[1], argfltregs[2]);
4096                 M_FMOV(argfltregs[0], argfltregs[1]);
4097         }
4098
4099         /* put env into first argument register */
4100         M_ALD(argintregs[0], REG_PV, -4 * 8);
4101
4102         M_ALD(REG_PV, REG_PV, -1 * 8);      /* load adress of native method       */
4103         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4104         disp = -(int) (mcodeptr - (s4*) cs) * 4;
4105         M_LDA(REG_PV, REG_RA, disp);        /* recompute pv from ra               */
4106
4107         /* remove stackframe if there is one */
4108         if (stackframesize) {
4109                 M_LDA(REG_SP, REG_SP, stackframesize * 8);
4110         }
4111
4112         /* 13 instructions */
4113         if (runverbose) {
4114                 M_LDA(REG_SP, REG_SP, -(2 * 8));
4115                 M_ALD(argintregs[0], REG_PV, -6 * 8); /* load method adress           */
4116                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4117                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4118                 M_MOV(REG_RESULT, argintregs[1]);
4119                 M_FMOV(REG_FRESULT, argfltregs[2]);
4120                 M_FMOV(REG_FRESULT, argfltregs[3]);
4121                 M_ALD(REG_PV, REG_PV, -7 * 8);  /* builtin_displaymethodstop          */
4122                 M_JSR(REG_RA, REG_PV);
4123                 disp = -(int) (mcodeptr - (s4*) cs) * 4;
4124                 M_LDA(REG_PV, REG_RA, disp);
4125                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4126                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4127                 M_LDA(REG_SP, REG_SP, 2 * 8);
4128         }
4129
4130         M_ALD(REG_ITMP3, REG_PV, -2 * 8);   /* get address of exceptionptr        */
4131         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4132         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4133
4134         M_ALD(REG_RA, REG_SP, 0);           /* load return address                */
4135         M_LDA(REG_SP, REG_SP, 8);           /* remove stackframe                  */
4136         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4137
4138         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4139
4140         M_ALD(REG_RA, REG_SP, 0);           /* load return address                */
4141         M_LDA(REG_SP, REG_SP, 8);           /* remove stackframe                  */
4142         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4143         M_ALD(REG_ITMP3, REG_PV, -3 * 8);   /* load asm exception handler address */
4144         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4145
4146 #if 0
4147         dolog_plain("stubsize: %d (for %d params)\n", (int) (mcodeptr - (s4*) s), m->paramcount);
4148 #endif
4149
4150 #ifdef STATISTICS
4151         count_nstub_len += NATIVESTUBSIZE * 8;
4152 #endif
4153
4154         return (u1*) (s + NATIVESTUBOFFSET);
4155 }
4156
4157
4158 /* function: removenativestub **************************************************
4159
4160     removes a previously created native-stub from memory
4161
4162 *******************************************************************************/
4163
4164 void removenativestub(u1 *stub)
4165 {
4166         CFREE((u8*) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
4167 }
4168
4169
4170 /*
4171  * These are local overrides for various environment variables in Emacs.
4172  * Please do not remove this and leave it at the end of the file, where
4173  * Emacs will automagically detect them.
4174  * ---------------------------------------------------------------------
4175  * Local variables:
4176  * mode: c
4177  * indent-tabs-mode: t
4178  * c-basic-offset: 4
4179  * tab-width: 4
4180  * End:
4181  */