src/vm/jit/alpha/codegen.c

   1 /* src/vm/jit/alpha/codegen.c - machine code generator for Alpha
   2
   3    Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    Contact: cacao@cacaojvm.org
  26
  27    Authors: Andreas Krall
  28             Reinhard Grafl
  29
  30    Changes: Joseph Wenninger
  31             Christian Thalinger
  32             Christian Ullrich
  33             Edwin Steiner
  34
  35    $Id: codegen.c 4357 2006-01-22 23:33:38Z twisti $
  36
  37 */
  38
  39
  40 #include <stdio.h>
  41
  42 #include "config.h"
  43 #include "vm/types.h"
  44
  45 #include "md.h"
  46 #include "md-abi.h"
  47
  48 #include "vm/jit/alpha/arch.h"
  49 #include "vm/jit/alpha/codegen.h"
  50
  51 #include "cacao/cacao.h"
  52 #include "native/jni.h"
  53 #include "native/native.h"
  54 #include "vm/builtin.h"
  55 #include "vm/exceptions.h"
  56 #include "vm/global.h"
  57 #include "vm/loader.h"
  58 #include "vm/options.h"
  59 #include "vm/stringlocal.h"
  60 #include "vm/jit/asmpart.h"
  61 #include "vm/jit/codegen-common.h"
  62 #include "vm/jit/dseg.h"
  63 #include "vm/jit/jit.h"
  64 #include "vm/jit/parse.h"
  65 #include "vm/jit/patcher.h"
  66 #include "vm/jit/reg.h"
  67
  68 #if defined(ENABLE_LSRA)
  69 # include "vm/jit/allocator/lsra.h"
  70 #endif
  71
  72
  73 /* codegen *********************************************************************
  74
  75    Generates machine code.
  76
  77 *******************************************************************************/
  78
  79 bool codegen(methodinfo *m, codegendata *cd, registerdata *rd)
  80 {
  81         s4                  len, s1, s2, s3, d, disp;
  82         s4                  parentargs_base;
  83         s4                 *mcodeptr;
  84         stackptr            src;
  85         varinfo            *var;
  86         basicblock         *bptr;
  87         instruction        *iptr;
  88         exceptiontable     *ex;
  89         u2                  currentline;
  90         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
  91         builtintable_entry *bte;
  92         methoddesc         *md;
  93
  94         /* prevent compiler warnings */
  95
  96         d = 0;
  97         currentline = 0;
  98         lm = NULL;
  99         bte = NULL;
 100
 101         {
 102         s4 i, p, t, l;
 103         s4 savedregs_num;
 104
 105         savedregs_num = (m->isleafmethod) ? 0 : 1;        /* space to save the RA */
 106
 107         /* space to save used callee saved registers */
 108
 109         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 110         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
 111
 112         parentargs_base = rd->memuse + savedregs_num;
 113
 114 #if defined(USE_THREADS)           /* space to save argument of monitor_enter */
 115         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 116                 parentargs_base++;
 117 #endif
 118
 119         /* create method header */
 120
 121         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
 122         (void) dseg_adds4(cd, parentargs_base * 8);             /* FrameSize      */
 123
 124 #if defined(USE_THREADS)
 125         /* IsSync contains the offset relative to the stack pointer for the
 126            argument of monitor_exit used in the exception handler. Since the
 127            offset could be zero and give a wrong meaning of the flag it is
 128            offset by one.
 129         */
 130
 131         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 132                 (void) dseg_adds4(cd, (rd->memuse + 1) * 8);        /* IsSync         */
 133         else
 134 #endif
 135                 (void) dseg_adds4(cd, 0);                           /* IsSync         */
 136
 137         (void) dseg_adds4(cd, m->isleafmethod);                 /* IsLeaf         */
 138         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse);  /* IntSave        */
 139         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse);  /* FltSave        */
 140
 141         dseg_addlinenumbertablesize(cd);
 142
 143         (void) dseg_adds4(cd, cd->exceptiontablelength);        /* ExTableSize    */
 144
 145         /* create exception table */
 146
 147         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 148                 dseg_addtarget(cd, ex->start);
 149                 dseg_addtarget(cd, ex->end);
 150                 dseg_addtarget(cd, ex->handler);
 151                 (void) dseg_addaddress(cd, ex->catchtype.cls);
 152         }
 153
 154         /* initialize mcode variables */
 155
 156         mcodeptr = (s4 *) cd->mcodeptr;
 157
 158         MCODECHECK(128 + m->paramcount);
 159
 160         /* create stack frame (if necessary) */
 161
 162         if (parentargs_base) {
 163                 M_LDA(REG_SP, REG_SP, -parentargs_base * 8);
 164         }
 165
 166         /* save return address and used callee saved registers */
 167
 168         p = parentargs_base;
 169         if (!m->isleafmethod) {
 170                 p--; M_AST(REG_RA, REG_SP, p * 8);
 171         }
 172         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
 173                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
 174         }
 175         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 176                 p--; M_DST(rd->savfltregs[i], REG_SP, p * 8);
 177         }
 178
 179         /* take arguments out of register or stack frame */
 180
 181         md = m->parseddesc;
 182
 183         for (p = 0, l = 0; p < md->paramcount; p++) {
 184                 t = md->paramtypes[p].type;
 185                 var = &(rd->locals[l][t]);
 186                 l++;
 187                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 188                         l++;
 189                 if (var->type < 0)
 190                         continue;
 191                 s1 = md->params[p].regoff;
 192                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 193                         if (!md->params[p].inmemory) {           /* register arguments    */
 194                                 s2 = rd->argintregs[s1];
 195                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 196                                         M_INTMOVE(s2, var->regoff);
 197
 198                                 } else {                             /* reg arg -> spilled    */
 199                                         M_LST(s2, REG_SP, var->regoff * 8);
 200                                 }
 201
 202                         } else {                                 /* stack arguments       */
 203                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 204                                         M_LLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
 205
 206                                 } else {                             /* stack arg -> spilled  */
 207                                         var->regoff = parentargs_base + s1;
 208                                 }
 209                         }
 210
 211                 } else {                                     /* floating args         */
 212                         if (!md->params[p].inmemory) {           /* register arguments    */
 213                                 s2 = rd->argfltregs[s1];
 214                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 215                                         M_FLTMOVE(s2, var->regoff);
 216
 217                                 } else {                                         /* reg arg -> spilled    */
 218                                         M_DST(s2, REG_SP, var->regoff * 8);
 219                                 }
 220
 221                         } else {                                 /* stack arguments       */
 222                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 223                                         M_DLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
 224
 225                                 } else {                             /* stack-arg -> spilled  */
 226                                         var->regoff = parentargs_base + s1;
 227                                 }
 228                         }
 229                 }
 230         } /* end for */
 231
 232         /* call monitorenter function */
 233
 234 #if defined(USE_THREADS)
 235         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 236                 /* stack offset for monitor argument */
 237
 238                 s1 = rd->memuse;
 239
 240                 if (runverbose) {
 241                         M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT + FLT_ARG_CNT) * 8);
 242
 243                         for (p = 0; p < INT_ARG_CNT; p++)
 244                                 M_LST(rd->argintregs[p], REG_SP, p * 8);
 245
 246                         for (p = 0; p < FLT_ARG_CNT; p++)
 247                                 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 248
 249                         s1 += INT_ARG_CNT + FLT_ARG_CNT;
 250                 }
 251
 252                 /* decide which monitor enter function to call */
 253
 254                 if (m->flags & ACC_STATIC) {
 255                         disp = dseg_addaddress(cd, m->class);
 256                         M_ALD(rd->argintregs[0], REG_PV, disp);
 257                         M_AST(rd->argintregs[0], REG_SP, s1 * 8);
 258                         disp = dseg_addaddress(cd, BUILTIN_staticmonitorenter);
 259                         M_ALD(REG_PV, REG_PV, disp);
 260                         M_JSR(REG_RA, REG_PV);
 261                         disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 262                         M_LDA(REG_PV, REG_RA, disp);
 263
 264                 } else {
 265                         M_BEQZ(rd->argintregs[0], 0);
 266                         codegen_addxnullrefs(cd, mcodeptr);
 267                         M_AST(rd->argintregs[0], REG_SP, s1 * 8);
 268                         disp = dseg_addaddress(cd, BUILTIN_monitorenter);
 269                         M_ALD(REG_PV, REG_PV, disp);
 270                         M_JSR(REG_RA, REG_PV);
 271                         disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 272                         M_LDA(REG_PV, REG_RA, disp);
 273                 }
 274
 275                 if (runverbose) {
 276                         for (p = 0; p < INT_ARG_CNT; p++)
 277                                 M_LLD(rd->argintregs[p], REG_SP, p * 8);
 278
 279                         for (p = 0; p < FLT_ARG_CNT; p++)
 280                                 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 281
 282                         M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
 283                 }
 284         }
 285 #endif
 286
 287         /* call trace function */
 288
 289         if (runverbose) {
 290                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
 291                 M_AST(REG_RA, REG_SP, 1 * 8);
 292
 293                 /* save integer argument registers */
 294
 295                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 296                         M_LST(rd->argintregs[p], REG_SP, (2 + p) * 8);
 297
 298                 /* save and copy float arguments into integer registers */
 299
 300                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 301                         t = md->paramtypes[p].type;
 302
 303                         if (IS_FLT_DBL_TYPE(t)) {
 304                                 if (IS_2_WORD_TYPE(t)) {
 305                                         M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 306
 307                                 } else {
 308                                         M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 309                                 }
 310
 311                                 M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 312
 313                         } else {
 314                                 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 315                         }
 316                 }
 317
 318                 disp = dseg_addaddress(cd, m);
 319                 M_ALD(REG_ITMP1, REG_PV, disp);
 320                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
 321                 disp = dseg_addaddress(cd, (void *) builtin_trace_args);
 322                 M_ALD(REG_PV, REG_PV, disp);
 323                 M_JSR(REG_RA, REG_PV);
 324                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 325                 M_LDA(REG_PV, REG_RA, disp);
 326                 M_ALD(REG_RA, REG_SP, 1 * 8);
 327
 328                 /* restore integer argument registers */
 329
 330                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 331                         M_LLD(rd->argintregs[p], REG_SP, (2 + p) * 8);
 332
 333                 /* restore float argument registers */
 334
 335                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 336                         t = md->paramtypes[p].type;
 337
 338                         if (IS_FLT_DBL_TYPE(t)) {
 339                                 if (IS_2_WORD_TYPE(t)) {
 340                                         M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 341
 342                                 } else {
 343                                         M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 344                                 }
 345
 346                         } else {
 347                                 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 348                         }
 349                 }
 350
 351                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
 352         }
 353
 354         }
 355
 356         /* end of header generation */
 357
 358         /* walk through all basic blocks */
 359
 360         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 361
 362                 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 363
 364                 if (bptr->flags >= BBREACHED) {
 365
 366                 /* branch resolving */
 367
 368                 {
 369                 branchref *brefs;
 370                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 371                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 372                                           brefs->branchpos, bptr->mpc);
 373                         }
 374                 }
 375
 376                 /* copy interface registers to their destination */
 377
 378                 src = bptr->instack;
 379                 len = bptr->indepth;
 380                 MCODECHECK(64+len);
 381 #if defined(ENABLE_LSRA)
 382                 if (opt_lsra) {
 383                 while (src != NULL) {
 384                         len--;
 385                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 386                                         /*                              d = reg_of_var(m, src, REG_ITMP1); */
 387                                         if (!(src->flags & INMEMORY))
 388                                                 d = src->regoff;
 389                                         else
 390                                                 d = REG_ITMP1;
 391                                         M_INTMOVE(REG_ITMP1, d);
 392                                         store_reg_to_var_int(src, d);
 393                                 }
 394                                 src = src->prev;
 395                         }
 396                 } else {
 397 #endif
 398                         while (src != NULL) {
 399                                 len--;
 400                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 401                                         d = reg_of_var(rd, src, REG_ITMP1);
 402                                         M_INTMOVE(REG_ITMP1, d);
 403                                         store_reg_to_var_int(src, d);
 404                                 } else {
 405                                         d = reg_of_var(rd, src, REG_IFTMP);
 406                                         if ((src->varkind != STACKVAR)) {
 407                                                 s2 = src->type;
 408                                                 if (IS_FLT_DBL_TYPE(s2)) {
 409                                                         if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 410                                                                 s1 = rd->interfaces[len][s2].regoff;
 411                                                                 M_FLTMOVE(s1, d);
 412                                                         } else {
 413                                                                 M_DLD(d, REG_SP, rd->interfaces[len][s2].regoff * 8);
 414                                                         }
 415                                                         store_reg_to_var_flt(src, d);
 416                                                 }
 417                                                 else {
 418                                                         if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 419                                                                 s1 = rd->interfaces[len][s2].regoff;
 420                                                                 M_INTMOVE(s1, d);
 421                                                         } else {
 422                                                                 M_LLD(d, REG_SP, rd->interfaces[len][s2].regoff * 8);
 423                                                         }
 424                                                         store_reg_to_var_int(src, d);
 425                                                 }
 426                                         }
 427                                 }
 428                                 src = src->prev;
 429                         }
 430 #if defined(ENABLE_LSRA)
 431                 }
 432 #endif
 433
 434                 /* walk through all instructions */
 435
 436                 src = bptr->instack;
 437                 len = bptr->icount;
 438
 439                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 440                         if (iptr->line != currentline) {
 441                                 dseg_addlinenumber(cd, iptr->line, (u1 *) mcodeptr);
 442                                 currentline = iptr->line;
 443                         }
 444
 445                 MCODECHECK(64);       /* an instruction usually needs < 64 words      */
 446                 switch (iptr->opc) {
 447
 448                 case ICMD_INLINE_START:
 449                 case ICMD_INLINE_END:
 450                         break;
 451
 452                 case ICMD_NOP:        /* ...  ==> ...                                 */
 453                         break;
 454
 455                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 456
 457                         var_to_reg_int(s1, src, REG_ITMP1);
 458                         M_BEQZ(s1, 0);
 459                         codegen_addxnullrefs(cd, mcodeptr);
 460                         break;
 461
 462                 /* constant operations ************************************************/
 463
 464                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 465                                       /* op1 = 0, val.i = constant                    */
 466
 467                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 468                         ICONST(d, iptr->val.i);
 469                         store_reg_to_var_int(iptr->dst, d);
 470                         break;
 471
 472                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 473                                       /* op1 = 0, val.l = constant                    */
 474
 475                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 476                         LCONST(d, iptr->val.l);
 477                         store_reg_to_var_int(iptr->dst, d);
 478                         break;
 479
 480                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 481                                       /* op1 = 0, val.f = constant                    */
 482
 483                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 484                         disp = dseg_addfloat(cd, iptr->val.f);
 485                         M_FLD(d, REG_PV, disp);
 486                         store_reg_to_var_flt(iptr->dst, d);
 487                         break;
 488
 489                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 490                                       /* op1 = 0, val.d = constant                    */
 491
 492                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 493                         disp = dseg_adddouble(cd, iptr->val.d);
 494                         M_DLD(d, REG_PV, disp);
 495                         store_reg_to_var_flt(iptr->dst, d);
 496                         break;
 497
 498                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 499                                       /* op1 = 0, val.a = constant                    */
 500
 501                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 502
 503                         if ((iptr->target != NULL) && (iptr->val.a == NULL)) {
 504                                 disp = dseg_addaddress(cd, iptr->val.a);
 505
 506                                 codegen_addpatchref(cd, mcodeptr,
 507                                                                         PATCHER_aconst,
 508                                                                         (unresolved_class *) iptr->target, disp);
 509
 510                                 if (opt_showdisassemble)
 511                                         M_NOP;
 512
 513                                 M_ALD(d, REG_PV, disp);
 514
 515                         } else {
 516                                 if (iptr->val.a == NULL) {
 517                                         M_INTMOVE(REG_ZERO, d);
 518                                 } else {
 519                                         disp = dseg_addaddress(cd, iptr->val.a);
 520                                         M_ALD(d, REG_PV, disp);
 521                                 }
 522                         }
 523                         store_reg_to_var_int(iptr->dst, d);
 524                         break;
 525
 526
 527                 /* load/store operations **********************************************/
 528
 529                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 530                 case ICMD_LLOAD:      /* op1 = local variable                         */
 531                 case ICMD_ALOAD:
 532
 533                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 534                         if ((iptr->dst->varkind == LOCALVAR) &&
 535                             (iptr->dst->varnum == iptr->op1))
 536                                 break;
 537                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 538                         if (var->flags & INMEMORY) {
 539                                 M_LLD(d, REG_SP, var->regoff * 8);
 540                         } else {
 541                                 M_INTMOVE(var->regoff, d);
 542                         }
 543                         store_reg_to_var_int(iptr->dst, d);
 544                         break;
 545
 546                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 547                 case ICMD_DLOAD:      /* op1 = local variable                         */
 548
 549                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 550                         if ((iptr->dst->varkind == LOCALVAR) &&
 551                             (iptr->dst->varnum == iptr->op1))
 552                                 break;
 553                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 554                         if (var->flags & INMEMORY) {
 555                                 M_DLD(d, REG_SP, var->regoff * 8);
 556                         } else {
 557                                 M_FLTMOVE(var->regoff, d);
 558                         }
 559                         store_reg_to_var_flt(iptr->dst, d);
 560                         break;
 561
 562
 563                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 564                 case ICMD_LSTORE:     /* op1 = local variable                         */
 565                 case ICMD_ASTORE:
 566
 567                         if ((src->varkind == LOCALVAR) &&
 568                             (src->varnum == iptr->op1))
 569                                 break;
 570                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 571                         if (var->flags & INMEMORY) {
 572                                 var_to_reg_int(s1, src, REG_ITMP1);
 573                                 M_LST(s1, REG_SP, var->regoff * 8);
 574                         } else {
 575                                 var_to_reg_int(s1, src, var->regoff);
 576                                 M_INTMOVE(s1, var->regoff);
 577                         }
 578                         break;
 579
 580                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 581                 case ICMD_DSTORE:     /* op1 = local variable                         */
 582
 583                         if ((src->varkind == LOCALVAR) &&
 584                             (src->varnum == iptr->op1))
 585                                 break;
 586                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 587                         if (var->flags & INMEMORY) {
 588                                 var_to_reg_flt(s1, src, REG_FTMP1);
 589                                 M_DST(s1, REG_SP, var->regoff * 8);
 590                         } else {
 591                                 var_to_reg_flt(s1, src, var->regoff);
 592                                 M_FLTMOVE(s1, var->regoff);
 593                         }
 594                         break;
 595
 596
 597                 /* pop/dup/swap operations ********************************************/
 598
 599                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 600
 601                 case ICMD_POP:        /* ..., value  ==> ...                          */
 602                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 603                         break;
 604
 605                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 606                         M_COPY(src, iptr->dst);
 607                         break;
 608
 609                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 610
 611                         M_COPY(src,       iptr->dst);
 612                         M_COPY(src->prev, iptr->dst->prev);
 613                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 614                         break;
 615
 616                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 617
 618                         M_COPY(src,             iptr->dst);
 619                         M_COPY(src->prev,       iptr->dst->prev);
 620                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 621                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 622                         break;
 623
 624                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 625
 626                         M_COPY(src,       iptr->dst);
 627                         M_COPY(src->prev, iptr->dst->prev);
 628                         break;
 629
 630                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 631
 632                         M_COPY(src,             iptr->dst);
 633                         M_COPY(src->prev,       iptr->dst->prev);
 634                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 635                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 636                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 637                         break;
 638
 639                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 640
 641                         M_COPY(src,                   iptr->dst);
 642                         M_COPY(src->prev,             iptr->dst->prev);
 643                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 644                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 645                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 646                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 647                         break;
 648
 649                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 650
 651                         M_COPY(src,       iptr->dst->prev);
 652                         M_COPY(src->prev, iptr->dst);
 653                         break;
 654
 655
 656                 /* integer operations *************************************************/
 657
 658                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 659
 660                         var_to_reg_int(s1, src, REG_ITMP1);
 661                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 662                         M_ISUB(REG_ZERO, s1, d);
 663                         store_reg_to_var_int(iptr->dst, d);
 664                         break;
 665
 666                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 667
 668                         var_to_reg_int(s1, src, REG_ITMP1);
 669                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 670                         M_LSUB(REG_ZERO, s1, d);
 671                         store_reg_to_var_int(iptr->dst, d);
 672                         break;
 673
 674                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 675
 676                         var_to_reg_int(s1, src, REG_ITMP1);
 677                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 678                         M_INTMOVE(s1, d);
 679                         store_reg_to_var_int(iptr->dst, d);
 680                         break;
 681
 682                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 683
 684                         var_to_reg_int(s1, src, REG_ITMP1);
 685                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 686                         M_IADD(s1, REG_ZERO, d);
 687                         store_reg_to_var_int(iptr->dst, d);
 688                         break;
 689
 690                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 691
 692                         var_to_reg_int(s1, src, REG_ITMP1);
 693                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 694                         if (has_ext_instr_set) {
 695                                 M_BSEXT(s1, d);
 696                         } else {
 697                                 M_SLL_IMM(s1, 56, d);
 698                                 M_SRA_IMM( d, 56, d);
 699                         }
 700                         store_reg_to_var_int(iptr->dst, d);
 701                         break;
 702
 703                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 704
 705                         var_to_reg_int(s1, src, REG_ITMP1);
 706                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 707             M_CZEXT(s1, d);
 708                         store_reg_to_var_int(iptr->dst, d);
 709                         break;
 710
 711                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 712
 713                         var_to_reg_int(s1, src, REG_ITMP1);
 714                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 715                         if (has_ext_instr_set) {
 716                                 M_SSEXT(s1, d);
 717                         } else {
 718                                 M_SLL_IMM(s1, 48, d);
 719                                 M_SRA_IMM( d, 48, d);
 720                         }
 721                         store_reg_to_var_int(iptr->dst, d);
 722                         break;
 723
 724
 725                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 726
 727                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 728                         var_to_reg_int(s2, src, REG_ITMP2);
 729                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 730                         M_IADD(s1, s2, d);
 731                         store_reg_to_var_int(iptr->dst, d);
 732                         break;
 733
 734                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 735                                       /* val.i = constant                             */
 736
 737                         var_to_reg_int(s1, src, REG_ITMP1);
 738                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 739                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 740                                 M_IADD_IMM(s1, iptr->val.i, d);
 741                         } else {
 742                                 ICONST(REG_ITMP2, iptr->val.i);
 743                                 M_IADD(s1, REG_ITMP2, d);
 744                         }
 745                         store_reg_to_var_int(iptr->dst, d);
 746                         break;
 747
 748                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 749
 750                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 751                         var_to_reg_int(s2, src, REG_ITMP2);
 752                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 753                         M_LADD(s1, s2, d);
 754                         store_reg_to_var_int(iptr->dst, d);
 755                         break;
 756
 757                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 758                                       /* val.l = constant                             */
 759
 760                         var_to_reg_int(s1, src, REG_ITMP1);
 761                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 762                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 763                                 M_LADD_IMM(s1, iptr->val.l, d);
 764                         } else {
 765                                 LCONST(REG_ITMP2, iptr->val.l);
 766                                 M_LADD(s1, REG_ITMP2, d);
 767                         }
 768                         store_reg_to_var_int(iptr->dst, d);
 769                         break;
 770
 771                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 772
 773                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 774                         var_to_reg_int(s2, src, REG_ITMP2);
 775                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 776                         M_ISUB(s1, s2, d);
 777                         store_reg_to_var_int(iptr->dst, d);
 778                         break;
 779
 780                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 781                                       /* val.i = constant                             */
 782
 783                         var_to_reg_int(s1, src, REG_ITMP1);
 784                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 785                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 786                                 M_ISUB_IMM(s1, iptr->val.i, d);
 787                         } else {
 788                                 ICONST(REG_ITMP2, iptr->val.i);
 789                                 M_ISUB(s1, REG_ITMP2, d);
 790                         }
 791                         store_reg_to_var_int(iptr->dst, d);
 792                         break;
 793
 794                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 795
 796                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 797                         var_to_reg_int(s2, src, REG_ITMP2);
 798                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 799                         M_LSUB(s1, s2, d);
 800                         store_reg_to_var_int(iptr->dst, d);
 801                         break;
 802
 803                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 804                                       /* val.l = constant                             */
 805
 806                         var_to_reg_int(s1, src, REG_ITMP1);
 807                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 808                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 809                                 M_LSUB_IMM(s1, iptr->val.l, d);
 810                         } else {
 811                                 LCONST(REG_ITMP2, iptr->val.l);
 812                                 M_LSUB(s1, REG_ITMP2, d);
 813                         }
 814                         store_reg_to_var_int(iptr->dst, d);
 815                         break;
 816
 817                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 818
 819                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 820                         var_to_reg_int(s2, src, REG_ITMP2);
 821                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 822                         M_IMUL(s1, s2, d);
 823                         store_reg_to_var_int(iptr->dst, d);
 824                         break;
 825
 826                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 827                                       /* val.i = constant                             */
 828
 829                         var_to_reg_int(s1, src, REG_ITMP1);
 830                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 831                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 832                                 M_IMUL_IMM(s1, iptr->val.i, d);
 833                         } else {
 834                                 ICONST(REG_ITMP2, iptr->val.i);
 835                                 M_IMUL(s1, REG_ITMP2, d);
 836                         }
 837                         store_reg_to_var_int(iptr->dst, d);
 838                         break;
 839
 840                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 841
 842                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 843                         var_to_reg_int(s2, src, REG_ITMP2);
 844                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 845                         M_LMUL(s1, s2, d);
 846                         store_reg_to_var_int(iptr->dst, d);
 847                         break;
 848
 849                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 850                                       /* val.l = constant                             */
 851
 852                         var_to_reg_int(s1, src, REG_ITMP1);
 853                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 854                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 855                                 M_LMUL_IMM(s1, iptr->val.l, d);
 856                         } else {
 857                                 LCONST(REG_ITMP2, iptr->val.l);
 858                                 M_LMUL(s1, REG_ITMP2, d);
 859                         }
 860                         store_reg_to_var_int(iptr->dst, d);
 861                         break;
 862
 863                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 864                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 865
 866                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 867                         var_to_reg_int(s2, src, REG_ITMP2);
 868                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
 869                         M_BEQZ(s2, 0);
 870                         codegen_addxdivrefs(cd, mcodeptr);
 871
 872                         M_MOV(s1, rd->argintregs[0]);
 873                         M_MOV(s2, rd->argintregs[1]);
 874                         bte = iptr->val.a;
 875                         disp = dseg_addaddress(cd, bte->fp);
 876                         M_ALD(REG_PV, REG_PV, disp);
 877                         M_JSR(REG_RA, REG_PV);
 878                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 879                         M_LDA(REG_PV, REG_RA, -disp);
 880
 881                         M_IADD(REG_RESULT, REG_ZERO, d); /* sign extend (bugfix for gcc -O2) */
 882                         store_reg_to_var_int(iptr->dst, d);
 883                         break;
 884
 885                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 886                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 887
 888                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 889                         var_to_reg_int(s2, src, REG_ITMP2);
 890                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
 891                         M_BEQZ(s2, 0);
 892                         codegen_addxdivrefs(cd, mcodeptr);
 893
 894                         M_MOV(s1, rd->argintregs[0]);
 895                         M_MOV(s2, rd->argintregs[1]);
 896                         bte = iptr->val.a;
 897                         disp = dseg_addaddress(cd, bte->fp);
 898                         M_ALD(REG_PV, REG_PV, disp);
 899                         M_JSR(REG_RA, REG_PV);
 900                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 901                         M_LDA(REG_PV, REG_RA, -disp);
 902
 903                         M_INTMOVE(REG_RESULT, d);
 904                         store_reg_to_var_int(iptr->dst, d);
 905                         break;
 906
 907                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 908                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 909
 910                         var_to_reg_int(s1, src, REG_ITMP1);
 911                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 912                         if (iptr->val.i <= 15) {
 913                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
 914                                 M_CMOVGE(s1, s1, REG_ITMP2);
 915                         } else {
 916                                 M_SRA_IMM(s1, 63, REG_ITMP2);
 917                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
 918                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
 919                         }
 920                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
 921                         store_reg_to_var_int(iptr->dst, d);
 922                         break;
 923
 924                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 925
 926                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 927                         var_to_reg_int(s2, src, REG_ITMP2);
 928                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 929                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 930                         M_SLL(s1, REG_ITMP3, d);
 931                         M_IADD(d, REG_ZERO, d);
 932                         store_reg_to_var_int(iptr->dst, d);
 933                         break;
 934
 935                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 936                                       /* val.i = constant                             */
 937
 938                         var_to_reg_int(s1, src, REG_ITMP1);
 939                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 940                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
 941                         M_IADD(d, REG_ZERO, d);
 942                         store_reg_to_var_int(iptr->dst, d);
 943                         break;
 944
 945                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 946
 947                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 948                         var_to_reg_int(s2, src, REG_ITMP2);
 949                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 950                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 951                         M_SRA(s1, REG_ITMP3, d);
 952                         store_reg_to_var_int(iptr->dst, d);
 953                         break;
 954
 955                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
 956                                       /* val.i = constant                             */
 957
 958                         var_to_reg_int(s1, src, REG_ITMP1);
 959                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 960                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
 961                         store_reg_to_var_int(iptr->dst, d);
 962                         break;
 963
 964                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 965
 966                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 967                         var_to_reg_int(s2, src, REG_ITMP2);
 968                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 969                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
 970             M_IZEXT(s1, d);
 971                         M_SRL(d, REG_ITMP2, d);
 972                         M_IADD(d, REG_ZERO, d);
 973                         store_reg_to_var_int(iptr->dst, d);
 974                         break;
 975
 976                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 977                                       /* val.i = constant                             */
 978
 979                         var_to_reg_int(s1, src, REG_ITMP1);
 980                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 981             M_IZEXT(s1, d);
 982                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
 983                         M_IADD(d, REG_ZERO, d);
 984                         store_reg_to_var_int(iptr->dst, d);
 985                         break;
 986
 987                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 988
 989                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 990                         var_to_reg_int(s2, src, REG_ITMP2);
 991                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 992                         M_SLL(s1, s2, d);
 993                         store_reg_to_var_int(iptr->dst, d);
 994                         break;
 995
 996                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
 997                                       /* val.i = constant                             */
 998
 999                         var_to_reg_int(s1, src, REG_ITMP1);
1000                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1001                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1002                         store_reg_to_var_int(iptr->dst, d);
1003                         break;
1004
1005                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1006
1007                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1008                         var_to_reg_int(s2, src, REG_ITMP2);
1009                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1010                         M_SRA(s1, s2, d);
1011                         store_reg_to_var_int(iptr->dst, d);
1012                         break;
1013
1014                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1015                                       /* val.i = constant                             */
1016
1017                         var_to_reg_int(s1, src, REG_ITMP1);
1018                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1019                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1020                         store_reg_to_var_int(iptr->dst, d);
1021                         break;
1022
1023                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1024
1025                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1026                         var_to_reg_int(s2, src, REG_ITMP2);
1027                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1028                         M_SRL(s1, s2, d);
1029                         store_reg_to_var_int(iptr->dst, d);
1030                         break;
1031
1032                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1033                                       /* val.i = constant                             */
1034
1035                         var_to_reg_int(s1, src, REG_ITMP1);
1036                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1037                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1038                         store_reg_to_var_int(iptr->dst, d);
1039                         break;
1040
1041                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1042                 case ICMD_LAND:
1043
1044                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1045                         var_to_reg_int(s2, src, REG_ITMP2);
1046                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1047                         M_AND(s1, s2, d);
1048                         store_reg_to_var_int(iptr->dst, d);
1049                         break;
1050
1051                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1052                                       /* val.i = constant                             */
1053
1054                         var_to_reg_int(s1, src, REG_ITMP1);
1055                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1056                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1057                                 M_AND_IMM(s1, iptr->val.i, d);
1058                         } else if (iptr->val.i == 0xffff) {
1059                                 M_CZEXT(s1, d);
1060                         } else if (iptr->val.i == 0xffffff) {
1061                                 M_ZAPNOT_IMM(s1, 0x07, d);
1062                         } else {
1063                                 ICONST(REG_ITMP2, iptr->val.i);
1064                                 M_AND(s1, REG_ITMP2, d);
1065                         }
1066                         store_reg_to_var_int(iptr->dst, d);
1067                         break;
1068
1069                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1070                                       /* val.i = constant                             */
1071
1072                         var_to_reg_int(s1, src, REG_ITMP1);
1073                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1074                         if (s1 == d) {
1075                                 M_MOV(s1, REG_ITMP1);
1076                                 s1 = REG_ITMP1;
1077                         }
1078                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1079                                 M_AND_IMM(s1, iptr->val.i, d);
1080                                 M_BGEZ(s1, 3);
1081                                 M_ISUB(REG_ZERO, s1, d);
1082                                 M_AND_IMM(d, iptr->val.i, d);
1083                         } else if (iptr->val.i == 0xffff) {
1084                                 M_CZEXT(s1, d);
1085                                 M_BGEZ(s1, 3);
1086                                 M_ISUB(REG_ZERO, s1, d);
1087                                 M_CZEXT(d, d);
1088                         } else if (iptr->val.i == 0xffffff) {
1089                                 M_ZAPNOT_IMM(s1, 0x07, d);
1090                                 M_BGEZ(s1, 3);
1091                                 M_ISUB(REG_ZERO, s1, d);
1092                                 M_ZAPNOT_IMM(d, 0x07, d);
1093                         } else {
1094                                 ICONST(REG_ITMP2, iptr->val.i);
1095                                 M_AND(s1, REG_ITMP2, d);
1096                                 M_BGEZ(s1, 3);
1097                                 M_ISUB(REG_ZERO, s1, d);
1098                                 M_AND(d, REG_ITMP2, d);
1099                         }
1100                         M_ISUB(REG_ZERO, d, d);
1101                         store_reg_to_var_int(iptr->dst, d);
1102                         break;
1103
1104                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1105                                       /* val.l = constant                             */
1106
1107                         var_to_reg_int(s1, src, REG_ITMP1);
1108                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1109                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1110                                 M_AND_IMM(s1, iptr->val.l, d);
1111                         } else if (iptr->val.l == 0xffffL) {
1112                                 M_CZEXT(s1, d);
1113                         } else if (iptr->val.l == 0xffffffL) {
1114                                 M_ZAPNOT_IMM(s1, 0x07, d);
1115                         } else if (iptr->val.l == 0xffffffffL) {
1116                                 M_IZEXT(s1, d);
1117                         } else if (iptr->val.l == 0xffffffffffL) {
1118                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1119                         } else if (iptr->val.l == 0xffffffffffffL) {
1120                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1121                         } else if (iptr->val.l == 0xffffffffffffffL) {
1122                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1123                         } else {
1124                                 LCONST(REG_ITMP2, iptr->val.l);
1125                                 M_AND(s1, REG_ITMP2, d);
1126                         }
1127                         store_reg_to_var_int(iptr->dst, d);
1128                         break;
1129
1130                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1131                                       /* val.l = constant                             */
1132
1133                         var_to_reg_int(s1, src, REG_ITMP1);
1134                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1135                         if (s1 == d) {
1136                                 M_MOV(s1, REG_ITMP1);
1137                                 s1 = REG_ITMP1;
1138                         }
1139                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1140                                 M_AND_IMM(s1, iptr->val.l, d);
1141                                 M_BGEZ(s1, 3);
1142                                 M_LSUB(REG_ZERO, s1, d);
1143                                 M_AND_IMM(d, iptr->val.l, d);
1144                         } else if (iptr->val.l == 0xffffL) {
1145                                 M_CZEXT(s1, d);
1146                                 M_BGEZ(s1, 3);
1147                                 M_LSUB(REG_ZERO, s1, d);
1148                                 M_CZEXT(d, d);
1149                         } else if (iptr->val.l == 0xffffffL) {
1150                                 M_ZAPNOT_IMM(s1, 0x07, d);
1151                                 M_BGEZ(s1, 3);
1152                                 M_LSUB(REG_ZERO, s1, d);
1153                                 M_ZAPNOT_IMM(d, 0x07, d);
1154                         } else if (iptr->val.l == 0xffffffffL) {
1155                                 M_IZEXT(s1, d);
1156                                 M_BGEZ(s1, 3);
1157                                 M_LSUB(REG_ZERO, s1, d);
1158                                 M_IZEXT(d, d);
1159                         } else if (iptr->val.l == 0xffffffffffL) {
1160                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1161                                 M_BGEZ(s1, 3);
1162                                 M_LSUB(REG_ZERO, s1, d);
1163                                 M_ZAPNOT_IMM(d, 0x1f, d);
1164                         } else if (iptr->val.l == 0xffffffffffffL) {
1165                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1166                                 M_BGEZ(s1, 3);
1167                                 M_LSUB(REG_ZERO, s1, d);
1168                                 M_ZAPNOT_IMM(d, 0x3f, d);
1169                         } else if (iptr->val.l == 0xffffffffffffffL) {
1170                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1171                                 M_BGEZ(s1, 3);
1172                                 M_LSUB(REG_ZERO, s1, d);
1173                                 M_ZAPNOT_IMM(d, 0x7f, d);
1174                         } else {
1175                                 LCONST(REG_ITMP2, iptr->val.l);
1176                                 M_AND(s1, REG_ITMP2, d);
1177                                 M_BGEZ(s1, 3);
1178                                 M_LSUB(REG_ZERO, s1, d);
1179                                 M_AND(d, REG_ITMP2, d);
1180                         }
1181                         M_LSUB(REG_ZERO, d, d);
1182                         store_reg_to_var_int(iptr->dst, d);
1183                         break;
1184
1185                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1186                 case ICMD_LOR:
1187
1188                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1189                         var_to_reg_int(s2, src, REG_ITMP2);
1190                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1191                         M_OR( s1,s2, d);
1192                         store_reg_to_var_int(iptr->dst, d);
1193                         break;
1194
1195                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1196                                       /* val.i = constant                             */
1197
1198                         var_to_reg_int(s1, src, REG_ITMP1);
1199                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1200                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1201                                 M_OR_IMM(s1, iptr->val.i, d);
1202                         } else {
1203                                 ICONST(REG_ITMP2, iptr->val.i);
1204                                 M_OR(s1, REG_ITMP2, d);
1205                         }
1206                         store_reg_to_var_int(iptr->dst, d);
1207                         break;
1208
1209                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1210                                       /* val.l = constant                             */
1211
1212                         var_to_reg_int(s1, src, REG_ITMP1);
1213                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1214                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1215                                 M_OR_IMM(s1, iptr->val.l, d);
1216                         } else {
1217                                 LCONST(REG_ITMP2, iptr->val.l);
1218                                 M_OR(s1, REG_ITMP2, d);
1219                         }
1220                         store_reg_to_var_int(iptr->dst, d);
1221                         break;
1222
1223                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1224                 case ICMD_LXOR:
1225
1226                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1227                         var_to_reg_int(s2, src, REG_ITMP2);
1228                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1229                         M_XOR(s1, s2, d);
1230                         store_reg_to_var_int(iptr->dst, d);
1231                         break;
1232
1233                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1234                                       /* val.i = constant                             */
1235
1236                         var_to_reg_int(s1, src, REG_ITMP1);
1237                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1238                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1239                                 M_XOR_IMM(s1, iptr->val.i, d);
1240                         } else {
1241                                 ICONST(REG_ITMP2, iptr->val.i);
1242                                 M_XOR(s1, REG_ITMP2, d);
1243                         }
1244                         store_reg_to_var_int(iptr->dst, d);
1245                         break;
1246
1247                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1248                                       /* val.l = constant                             */
1249
1250                         var_to_reg_int(s1, src, REG_ITMP1);
1251                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1252                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1253                                 M_XOR_IMM(s1, iptr->val.l, d);
1254                         } else {
1255                                 LCONST(REG_ITMP2, iptr->val.l);
1256                                 M_XOR(s1, REG_ITMP2, d);
1257                         }
1258                         store_reg_to_var_int(iptr->dst, d);
1259                         break;
1260
1261
1262                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1263
1264                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1265                         var_to_reg_int(s2, src, REG_ITMP2);
1266                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1267                         M_CMPLT(s1, s2, REG_ITMP3);
1268                         M_CMPLT(s2, s1, REG_ITMP1);
1269                         M_LSUB(REG_ITMP1, REG_ITMP3, d);
1270                         store_reg_to_var_int(iptr->dst, d);
1271                         break;
1272
1273
1274                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1275                                       /* op1 = variable, val.i = constant             */
1276
1277                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1278                         if (var->flags & INMEMORY) {
1279                                 s1 = REG_ITMP1;
1280                                 M_LLD(s1, REG_SP, var->regoff * 8);
1281                         } else
1282                                 s1 = var->regoff;
1283                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1284                                 M_IADD_IMM(s1, iptr->val.i, s1);
1285                         } else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1286                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1287                         } else {
1288                                 M_LDA (s1, s1, iptr->val.i);
1289                                 M_IADD(s1, REG_ZERO, s1);
1290                         }
1291                         if (var->flags & INMEMORY)
1292                                 M_LST(s1, REG_SP, var->regoff * 8);
1293                         break;
1294
1295
1296                 /* floating operations ************************************************/
1297
1298                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1299
1300                         var_to_reg_flt(s1, src, REG_FTMP1);
1301                         d = reg_of_var(rd, iptr->dst, REG_FTMP2);
1302                         M_FMOVN(s1, d);
1303                         store_reg_to_var_flt(iptr->dst, d);
1304                         break;
1305
1306                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1307
1308                         var_to_reg_flt(s1, src, REG_FTMP1);
1309                         d = reg_of_var(rd, iptr->dst, REG_FTMP2);
1310                         M_FMOVN(s1, d);
1311                         store_reg_to_var_flt(iptr->dst, d);
1312                         break;
1313
1314                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1315
1316                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1317                         var_to_reg_flt(s2, src, REG_FTMP2);
1318                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1319                         if (opt_noieee) {
1320                                 M_FADD(s1, s2, d);
1321                         } else {
1322                                 if (d == s1 || d == s2) {
1323                                         M_FADDS(s1, s2, REG_FTMP3);
1324                                         M_TRAPB;
1325                                         M_FMOV(REG_FTMP3, d);
1326                                 } else {
1327                                         M_FADDS(s1, s2, d);
1328                                         M_TRAPB;
1329                                 }
1330                         }
1331                         store_reg_to_var_flt(iptr->dst, d);
1332                         break;
1333
1334                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1335
1336                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1337                         var_to_reg_flt(s2, src, REG_FTMP2);
1338                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1339                         if (opt_noieee) {
1340                                 M_DADD(s1, s2, d);
1341                         } else {
1342                                 if (d == s1 || d == s2) {
1343                                         M_DADDS(s1, s2, REG_FTMP3);
1344                                         M_TRAPB;
1345                                         M_FMOV(REG_FTMP3, d);
1346                                 } else {
1347                                         M_DADDS(s1, s2, d);
1348                                         M_TRAPB;
1349                                 }
1350                         }
1351                         store_reg_to_var_flt(iptr->dst, d);
1352                         break;
1353
1354                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1355
1356                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1357                         var_to_reg_flt(s2, src, REG_FTMP2);
1358                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1359                         if (opt_noieee) {
1360                                 M_FSUB(s1, s2, d);
1361                         } else {
1362                                 if (d == s1 || d == s2) {
1363                                         M_FSUBS(s1, s2, REG_FTMP3);
1364                                         M_TRAPB;
1365                                         M_FMOV(REG_FTMP3, d);
1366                                 } else {
1367                                         M_FSUBS(s1, s2, d);
1368                                         M_TRAPB;
1369                                 }
1370                         }
1371                         store_reg_to_var_flt(iptr->dst, d);
1372                         break;
1373
1374                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1375
1376                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1377                         var_to_reg_flt(s2, src, REG_FTMP2);
1378                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1379                         if (opt_noieee) {
1380                                 M_DSUB(s1, s2, d);
1381                         } else {
1382                                 if (d == s1 || d == s2) {
1383                                         M_DSUBS(s1, s2, REG_FTMP3);
1384                                         M_TRAPB;
1385                                         M_FMOV(REG_FTMP3, d);
1386                                 } else {
1387                                         M_DSUBS(s1, s2, d);
1388                                         M_TRAPB;
1389                                 }
1390                         }
1391                         store_reg_to_var_flt(iptr->dst, d);
1392                         break;
1393
1394                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1395
1396                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1397                         var_to_reg_flt(s2, src, REG_FTMP2);
1398                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1399                         if (opt_noieee) {
1400                                 M_FMUL(s1, s2, d);
1401                         } else {
1402                                 if (d == s1 || d == s2) {
1403                                         M_FMULS(s1, s2, REG_FTMP3);
1404                                         M_TRAPB;
1405                                         M_FMOV(REG_FTMP3, d);
1406                                 } else {
1407                                         M_FMULS(s1, s2, d);
1408                                         M_TRAPB;
1409                                 }
1410                         }
1411                         store_reg_to_var_flt(iptr->dst, d);
1412                         break;
1413
1414                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2      */
1415
1416                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1417                         var_to_reg_flt(s2, src, REG_FTMP2);
1418                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1419                         if (opt_noieee) {
1420                                 M_DMUL(s1, s2, d);
1421                         } else {
1422                                 if (d == s1 || d == s2) {
1423                                         M_DMULS(s1, s2, REG_FTMP3);
1424                                         M_TRAPB;
1425                                         M_FMOV(REG_FTMP3, d);
1426                                 } else {
1427                                         M_DMULS(s1, s2, d);
1428                                         M_TRAPB;
1429                                 }
1430                         }
1431                         store_reg_to_var_flt(iptr->dst, d);
1432                         break;
1433
1434                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1435
1436                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1437                         var_to_reg_flt(s2, src, REG_FTMP2);
1438                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1439                         if (opt_noieee) {
1440                                 M_FDIV(s1, s2, d);
1441                         } else {
1442                                 if (d == s1 || d == s2) {
1443                                         M_FDIVS(s1, s2, REG_FTMP3);
1444                                         M_TRAPB;
1445                                         M_FMOV(REG_FTMP3, d);
1446                                 } else {
1447                                         M_FDIVS(s1, s2, d);
1448                                         M_TRAPB;
1449                                 }
1450                         }
1451                         store_reg_to_var_flt(iptr->dst, d);
1452                         break;
1453
1454                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1455
1456                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1457                         var_to_reg_flt(s2, src, REG_FTMP2);
1458                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1459                         if (opt_noieee) {
1460                                 M_DDIV(s1, s2, d);
1461                         } else {
1462                                 if (d == s1 || d == s2) {
1463                                         M_DDIVS(s1, s2, REG_FTMP3);
1464                                         M_TRAPB;
1465                                         M_FMOV(REG_FTMP3, d);
1466                                 } else {
1467                                         M_DDIVS(s1, s2, d);
1468                                         M_TRAPB;
1469                                 }
1470                         }
1471                         store_reg_to_var_flt(iptr->dst, d);
1472                         break;
1473
1474                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1475                 case ICMD_L2F:
1476                         var_to_reg_int(s1, src, REG_ITMP1);
1477                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1478                         disp = dseg_adddouble(cd, 0.0);
1479                         M_LST(s1, REG_PV, disp);
1480                         M_DLD(d, REG_PV, disp);
1481                         M_CVTLF(d, d);
1482                         store_reg_to_var_flt(iptr->dst, d);
1483                         break;
1484
1485                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1486                 case ICMD_L2D:
1487                         var_to_reg_int(s1, src, REG_ITMP1);
1488                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1489                         disp = dseg_adddouble(cd, 0.0);
1490                         M_LST(s1, REG_PV, disp);
1491                         M_DLD(d, REG_PV, disp);
1492                         M_CVTLD(d, d);
1493                         store_reg_to_var_flt(iptr->dst, d);
1494                         break;
1495
1496                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1497                 case ICMD_D2I:
1498                         var_to_reg_flt(s1, src, REG_FTMP1);
1499                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1500                         disp = dseg_adddouble(cd, 0.0);
1501                         M_CVTDL_C(s1, REG_FTMP2);
1502                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1503                         M_DST(REG_FTMP3, REG_PV, disp);
1504                         M_ILD(d, REG_PV, disp);
1505                         store_reg_to_var_int(iptr->dst, d);
1506                         break;
1507
1508                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1509                 case ICMD_D2L:
1510                         var_to_reg_flt(s1, src, REG_FTMP1);
1511                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1512                         disp = dseg_adddouble(cd, 0.0);
1513                         M_CVTDL_C(s1, REG_FTMP2);
1514                         M_DST(REG_FTMP2, REG_PV, disp);
1515                         M_LLD(d, REG_PV, disp);
1516                         store_reg_to_var_int(iptr->dst, d);
1517                         break;
1518
1519                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1520
1521                         var_to_reg_flt(s1, src, REG_FTMP1);
1522                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1523                         M_CVTFDS(s1, d);
1524                         M_TRAPB;
1525                         store_reg_to_var_flt(iptr->dst, d);
1526                         break;
1527
1528                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1529
1530                         var_to_reg_flt(s1, src, REG_FTMP1);
1531                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1532                         if (opt_noieee) {
1533                                 M_CVTDF(s1, d);
1534                         } else {
1535                                 M_CVTDFS(s1, d);
1536                                 M_TRAPB;
1537                         }
1538                         store_reg_to_var_flt(iptr->dst, d);
1539                         break;
1540
1541                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1542                 case ICMD_DCMPL:
1543                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1544                         var_to_reg_flt(s2, src, REG_FTMP2);
1545                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1546                         if (opt_noieee) {
1547                                 M_LSUB_IMM(REG_ZERO, 1, d);
1548                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1549                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1550                                 M_CLR   (d);
1551                                 M_FCMPLT(s2, s1, REG_FTMP3);
1552                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1553                                 M_LADD_IMM(REG_ZERO, 1, d);
1554                         } else {
1555                                 M_LSUB_IMM(REG_ZERO, 1, d);
1556                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1557                                 M_TRAPB;
1558                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1559                                 M_CLR   (d);
1560                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1561                                 M_TRAPB;
1562                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1563                                 M_LADD_IMM(REG_ZERO, 1, d);
1564                         }
1565                         store_reg_to_var_int(iptr->dst, d);
1566                         break;
1567
1568                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1569                 case ICMD_DCMPG:
1570                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1571                         var_to_reg_flt(s2, src, REG_FTMP2);
1572                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1573                         if (opt_noieee) {
1574                                 M_LADD_IMM(REG_ZERO, 1, d);
1575                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1576                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1577                                 M_CLR   (d);
1578                                 M_FCMPLT(s1, s2, REG_FTMP3);
1579                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1580                                 M_LSUB_IMM(REG_ZERO, 1, d);
1581                         } else {
1582                                 M_LADD_IMM(REG_ZERO, 1, d);
1583                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1584                                 M_TRAPB;
1585                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1586                                 M_CLR   (d);
1587                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1588                                 M_TRAPB;
1589                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1590                                 M_LSUB_IMM(REG_ZERO, 1, d);
1591                         }
1592                         store_reg_to_var_int(iptr->dst, d);
1593                         break;
1594
1595
1596                 /* memory operations **************************************************/
1597
1598                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1599
1600                         var_to_reg_int(s1, src, REG_ITMP1);
1601                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1602                         gen_nullptr_check(s1);
1603                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1604                         store_reg_to_var_int(iptr->dst, d);
1605                         break;
1606
1607                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1608
1609                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1610                         var_to_reg_int(s2, src, REG_ITMP2);
1611                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1612                         if (iptr->op1 == 0) {
1613                                 gen_nullptr_check(s1);
1614                                 gen_bound_check;
1615                         }
1616                         if (has_ext_instr_set) {
1617                                 M_LADD   (s2, s1, REG_ITMP1);
1618                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1619                                 M_BSEXT  (d, d);
1620                         } else {
1621                                 M_LADD(s2, s1, REG_ITMP1);
1622                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1623                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1624                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1625                                 M_SRA_IMM(d, 56, d);
1626                         }
1627                         store_reg_to_var_int(iptr->dst, d);
1628                         break;
1629
1630                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1631
1632                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1633                         var_to_reg_int(s2, src, REG_ITMP2);
1634                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1635                         if (iptr->op1 == 0) {
1636                                 gen_nullptr_check(s1);
1637                                 gen_bound_check;
1638                         }
1639                         if (has_ext_instr_set) {
1640                                 M_LADD(s2, s1, REG_ITMP1);
1641                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1642                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1643                         } else {
1644                                 M_LADD (s2, s1, REG_ITMP1);
1645                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1646                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1647                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1648                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1649                         }
1650                         store_reg_to_var_int(iptr->dst, d);
1651                         break;
1652
1653                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1654
1655                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1656                         var_to_reg_int(s2, src, REG_ITMP2);
1657                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1658                         if (iptr->op1 == 0) {
1659                                 gen_nullptr_check(s1);
1660                                 gen_bound_check;
1661                         }
1662                         if (has_ext_instr_set) {
1663                                 M_LADD(s2, s1, REG_ITMP1);
1664                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1665                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1666                                 M_SSEXT(d, d);
1667                         } else {
1668                                 M_LADD(s2, s1, REG_ITMP1);
1669                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1670                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1671                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1672                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1673                                 M_SRA_IMM(d, 48, d);
1674                         }
1675                         store_reg_to_var_int(iptr->dst, d);
1676                         break;
1677
1678                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1679
1680                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1681                         var_to_reg_int(s2, src, REG_ITMP2);
1682                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1683                         if (iptr->op1 == 0) {
1684                                 gen_nullptr_check(s1);
1685                                 gen_bound_check;
1686                         }
1687                         M_S4ADDQ(s2, s1, REG_ITMP1);
1688                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1689                         store_reg_to_var_int(iptr->dst, d);
1690                         break;
1691
1692                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1693
1694                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1695                         var_to_reg_int(s2, src, REG_ITMP2);
1696                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1697                         if (iptr->op1 == 0) {
1698                                 gen_nullptr_check(s1);
1699                                 gen_bound_check;
1700                         }
1701                         M_S8ADDQ(s2, s1, REG_ITMP1);
1702                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1703                         store_reg_to_var_int(iptr->dst, d);
1704                         break;
1705
1706                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1707
1708                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1709                         var_to_reg_int(s2, src, REG_ITMP2);
1710                         d = reg_of_var(rd, iptr->dst, REG_FTMP2);
1711                         if (iptr->op1 == 0) {
1712                                 gen_nullptr_check(s1);
1713                                 gen_bound_check;
1714                         }
1715                         M_S4ADDQ(s2, s1, REG_ITMP1);
1716                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1717                         store_reg_to_var_flt(iptr->dst, d);
1718                         break;
1719
1720                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1721
1722                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1723                         var_to_reg_int(s2, src, REG_ITMP2);
1724                         d = reg_of_var(rd, iptr->dst, REG_FTMP2);
1725                         if (iptr->op1 == 0) {
1726                                 gen_nullptr_check(s1);
1727                                 gen_bound_check;
1728                         }
1729                         M_S8ADDQ(s2, s1, REG_ITMP1);
1730                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1731                         store_reg_to_var_flt(iptr->dst, d);
1732                         break;
1733
1734                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1735
1736                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1737                         var_to_reg_int(s2, src, REG_ITMP2);
1738                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1739                         if (iptr->op1 == 0) {
1740                                 gen_nullptr_check(s1);
1741                                 gen_bound_check;
1742                         }
1743                         M_SAADDQ(s2, s1, REG_ITMP1);
1744                         M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1745                         store_reg_to_var_int(iptr->dst, d);
1746                         break;
1747
1748
1749                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1750
1751                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1752                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1753                         if (iptr->op1 == 0) {
1754                                 gen_nullptr_check(s1);
1755                                 gen_bound_check;
1756                         }
1757                         var_to_reg_int(s3, src, REG_ITMP3);
1758                         if (has_ext_instr_set) {
1759                                 M_LADD(s2, s1, REG_ITMP1);
1760                                 M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1761                         } else {
1762                                 M_LADD(s2, s1, REG_ITMP1);
1763                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1764                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1765                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
1766                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1767                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1768                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1769                         }
1770                         break;
1771
1772                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1773
1774                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1775                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1776                         if (iptr->op1 == 0) {
1777                                 gen_nullptr_check(s1);
1778                                 gen_bound_check;
1779                         }
1780                         var_to_reg_int(s3, src, REG_ITMP3);
1781                         if (has_ext_instr_set) {
1782                                 M_LADD(s2, s1, REG_ITMP1);
1783                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1784                                 M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1785                         } else {
1786                                 M_LADD(s2, s1, REG_ITMP1);
1787                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1788                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1789                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1790                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1791                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1792                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1793                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1794                         }
1795                         break;
1796
1797                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1798
1799                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1800                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1801                         if (iptr->op1 == 0) {
1802                                 gen_nullptr_check(s1);
1803                                 gen_bound_check;
1804                         }
1805                         var_to_reg_int(s3, src, REG_ITMP3);
1806                         if (has_ext_instr_set) {
1807                                 M_LADD(s2, s1, REG_ITMP1);
1808                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1809                                 M_SST(s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1810                         } else {
1811                                 M_LADD(s2, s1, REG_ITMP1);
1812                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1813                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1814                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1815                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1816                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1817                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1818                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1819                         }
1820                         break;
1821
1822                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1823
1824                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1825                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1826                         if (iptr->op1 == 0) {
1827                                 gen_nullptr_check(s1);
1828                                 gen_bound_check;
1829                         }
1830                         var_to_reg_int(s3, src, REG_ITMP3);
1831                         M_S4ADDQ(s2, s1, REG_ITMP1);
1832                         M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1833                         break;
1834
1835                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1836
1837                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1838                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1839                         if (iptr->op1 == 0) {
1840                                 gen_nullptr_check(s1);
1841                                 gen_bound_check;
1842                         }
1843                         var_to_reg_int(s3, src, REG_ITMP3);
1844                         M_S8ADDQ(s2, s1, REG_ITMP1);
1845                         M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1846                         break;
1847
1848                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1849
1850                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1851                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1852                         if (iptr->op1 == 0) {
1853                                 gen_nullptr_check(s1);
1854                                 gen_bound_check;
1855                         }
1856                         var_to_reg_flt(s3, src, REG_FTMP3);
1857                         M_S4ADDQ(s2, s1, REG_ITMP1);
1858                         M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1859                         break;
1860
1861                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1862
1863                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1864                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1865                         if (iptr->op1 == 0) {
1866                                 gen_nullptr_check(s1);
1867                                 gen_bound_check;
1868                         }
1869                         var_to_reg_flt(s3, src, REG_FTMP3);
1870                         M_S8ADDQ(s2, s1, REG_ITMP1);
1871                         M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1872                         break;
1873
1874                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1875
1876                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1877                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1878                         if (iptr->op1 == 0) {
1879                                 gen_nullptr_check(s1);
1880                                 gen_bound_check;
1881                         }
1882                         var_to_reg_int(s3, src, REG_ITMP3);
1883
1884                         M_MOV(s1, rd->argintregs[0]);
1885                         M_MOV(s3, rd->argintregs[1]);
1886                         disp = dseg_addaddress(cd, BUILTIN_canstore);
1887                         M_ALD(REG_PV, REG_PV, disp);
1888                         M_JSR(REG_RA, REG_PV);
1889                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
1890                         M_LDA(REG_PV, REG_RA, -disp);
1891
1892                         M_BEQZ(REG_RESULT, 0);
1893                         codegen_addxstorerefs(cd, mcodeptr);
1894
1895                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1896                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1897                         var_to_reg_int(s3, src, REG_ITMP3);
1898                         M_SAADDQ(s2, s1, REG_ITMP1);
1899                         M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1900                         break;
1901
1902
1903                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
1904
1905                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1906                         var_to_reg_int(s2, src, REG_ITMP2);
1907                         if (iptr->op1 == 0) {
1908                                 gen_nullptr_check(s1);
1909                                 gen_bound_check;
1910                         }
1911                         M_S4ADDQ(s2, s1, REG_ITMP1);
1912                         M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
1913                         break;
1914
1915                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
1916
1917                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1918                         var_to_reg_int(s2, src, REG_ITMP2);
1919                         if (iptr->op1 == 0) {
1920                                 gen_nullptr_check(s1);
1921                                 gen_bound_check;
1922                         }
1923                         M_S8ADDQ(s2, s1, REG_ITMP1);
1924                         M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
1925                         break;
1926
1927                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
1928
1929                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1930                         var_to_reg_int(s2, src, REG_ITMP2);
1931                         if (iptr->op1 == 0) {
1932                                 gen_nullptr_check(s1);
1933                                 gen_bound_check;
1934                         }
1935                         M_SAADDQ(s2, s1, REG_ITMP1);
1936                         M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1937                         break;
1938
1939                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
1940
1941                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1942                         var_to_reg_int(s2, src, REG_ITMP2);
1943                         if (iptr->op1 == 0) {
1944                                 gen_nullptr_check(s1);
1945                                 gen_bound_check;
1946                         }
1947                         if (has_ext_instr_set) {
1948                                 M_LADD(s2, s1, REG_ITMP1);
1949                                 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1950
1951                         } else {
1952                                 M_LADD(s2, s1, REG_ITMP1);
1953                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1954                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1955                                 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1956                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1957                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1958                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1959                         }
1960                         break;
1961
1962                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
1963
1964                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1965                         var_to_reg_int(s2, src, REG_ITMP2);
1966                         if (iptr->op1 == 0) {
1967                                 gen_nullptr_check(s1);
1968                                 gen_bound_check;
1969                         }
1970                         if (has_ext_instr_set) {
1971                                 M_LADD(s2, s1, REG_ITMP1);
1972                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1973                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
1974
1975                         } else {
1976                                 M_LADD(s2, s1, REG_ITMP1);
1977                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1978                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1979                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1980                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1981                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1982                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1983                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1984                         }
1985                         break;
1986
1987                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
1988
1989                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1990                         var_to_reg_int(s2, src, REG_ITMP2);
1991                         if (iptr->op1 == 0) {
1992                                 gen_nullptr_check(s1);
1993                                 gen_bound_check;
1994                         }
1995                         if (has_ext_instr_set) {
1996                                 M_LADD(s2, s1, REG_ITMP1);
1997                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1998                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1999
2000                         } else {
2001                                 M_LADD(s2, s1, REG_ITMP1);
2002                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2003                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2004                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2005                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2006                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2007                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2008                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2009                         }
2010                         break;
2011
2012
2013                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2014                                       /* op1 = type, val.a = field address            */
2015
2016                         if (!iptr->val.a) {
2017                                 disp = dseg_addaddress(cd, 0);
2018
2019                                 codegen_addpatchref(cd, mcodeptr,
2020                                                                         PATCHER_get_putstatic,
2021                                                                         (unresolved_field *) iptr->target, disp);
2022
2023                                 if (opt_showdisassemble)
2024                                         M_NOP;
2025
2026
2027                         } else {
2028                                 fieldinfo *fi = iptr->val.a;
2029
2030                                 disp = dseg_addaddress(cd, &(fi->value));
2031
2032                                 if (!(fi->class->state & CLASS_INITIALIZED)) {
2033                                         codegen_addpatchref(cd, mcodeptr,
2034                                                                                 PATCHER_clinit, fi->class, 0);
2035
2036                                         if (opt_showdisassemble)
2037                                                 M_NOP;
2038                                 }
2039                         }
2040
2041                         M_ALD(REG_ITMP1, REG_PV, disp);
2042                         switch (iptr->op1) {
2043                         case TYPE_INT:
2044                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2045                                 M_ILD(d, REG_ITMP1, 0);
2046                                 store_reg_to_var_int(iptr->dst, d);
2047                                 break;
2048                         case TYPE_LNG:
2049                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2050                                 M_LLD(d, REG_ITMP1, 0);
2051                                 store_reg_to_var_int(iptr->dst, d);
2052                                 break;
2053                         case TYPE_ADR:
2054                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2055                                 M_ALD(d, REG_ITMP1, 0);
2056                                 store_reg_to_var_int(iptr->dst, d);
2057                                 break;
2058                         case TYPE_FLT:
2059                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2060                                 M_FLD(d, REG_ITMP1, 0);
2061                                 store_reg_to_var_flt(iptr->dst, d);
2062                                 break;
2063                         case TYPE_DBL:
2064                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2065                                 M_DLD(d, REG_ITMP1, 0);
2066                                 store_reg_to_var_flt(iptr->dst, d);
2067                                 break;
2068                         }
2069                         break;
2070
2071                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2072                                       /* op1 = type, val.a = field address            */
2073
2074                         if (!iptr->val.a) {
2075                                 disp = dseg_addaddress(cd, 0);
2076
2077                                 codegen_addpatchref(cd, mcodeptr,
2078                                                                         PATCHER_get_putstatic,
2079                                                                         (unresolved_field *) iptr->target, disp);
2080
2081                                 if (opt_showdisassemble)
2082                                         M_NOP;
2083
2084                         } else {
2085                                 fieldinfo *fi = iptr->val.a;
2086
2087                                 disp = dseg_addaddress(cd, &(fi->value));
2088
2089                                 if (!(fi->class->state & CLASS_INITIALIZED)) {
2090                                         codegen_addpatchref(cd, mcodeptr,
2091                                                                                 PATCHER_clinit, fi->class, 0);
2092
2093                                         if (opt_showdisassemble)
2094                                                 M_NOP;
2095                                 }
2096                         }
2097
2098                         M_ALD(REG_ITMP1, REG_PV, disp);
2099                         switch (iptr->op1) {
2100                         case TYPE_INT:
2101                                 var_to_reg_int(s2, src, REG_ITMP2);
2102                                 M_IST(s2, REG_ITMP1, 0);
2103                                 break;
2104                         case TYPE_LNG:
2105                                 var_to_reg_int(s2, src, REG_ITMP2);
2106                                 M_LST(s2, REG_ITMP1, 0);
2107                                 break;
2108                         case TYPE_ADR:
2109                                 var_to_reg_int(s2, src, REG_ITMP2);
2110                                 M_AST(s2, REG_ITMP1, 0);
2111                                 break;
2112                         case TYPE_FLT:
2113                                 var_to_reg_flt(s2, src, REG_FTMP2);
2114                                 M_FST(s2, REG_ITMP1, 0);
2115                                 break;
2116                         case TYPE_DBL:
2117                                 var_to_reg_flt(s2, src, REG_FTMP2);
2118                                 M_DST(s2, REG_ITMP1, 0);
2119                                 break;
2120                         }
2121                         break;
2122
2123                 case ICMD_PUTSTATICCONST: /* ...  ==> ...                             */
2124                                           /* val = value (in current instruction)     */
2125                                           /* op1 = type, val.a = field address (in    */
2126                                           /* following NOP)                           */
2127
2128                         if (!iptr[1].val.a) {
2129                                 disp = dseg_addaddress(cd, 0);
2130
2131                                 codegen_addpatchref(cd, mcodeptr,
2132                                                                         PATCHER_get_putstatic,
2133                                                                         (unresolved_field *) iptr[1].target, disp);
2134
2135                                 if (opt_showdisassemble)
2136                                         M_NOP;
2137
2138                         } else {
2139                                 fieldinfo *fi = iptr[1].val.a;
2140
2141                                 disp = dseg_addaddress(cd, &(fi->value));
2142
2143                                 if (!(fi->class->state & CLASS_INITIALIZED)) {
2144                                         codegen_addpatchref(cd, mcodeptr,
2145                                                                                 PATCHER_clinit, fi->class, 0);
2146
2147                                         if (opt_showdisassemble)
2148                                                 M_NOP;
2149                                 }
2150                         }
2151
2152                         M_ALD(REG_ITMP1, REG_PV, disp);
2153                         switch (iptr->op1) {
2154                         case TYPE_INT:
2155                                 M_IST(REG_ZERO, REG_ITMP1, 0);
2156                                 break;
2157                         case TYPE_LNG:
2158                                 M_LST(REG_ZERO, REG_ITMP1, 0);
2159                                 break;
2160                         case TYPE_ADR:
2161                                 M_AST(REG_ZERO, REG_ITMP1, 0);
2162                                 break;
2163                         case TYPE_FLT:
2164                                 M_FST(REG_ZERO, REG_ITMP1, 0);
2165                                 break;
2166                         case TYPE_DBL:
2167                                 M_DST(REG_ZERO, REG_ITMP1, 0);
2168                                 break;
2169                         }
2170                         break;
2171
2172
2173                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2174                                       /* op1 = type, val.i = field offset             */
2175
2176                         var_to_reg_int(s1, src, REG_ITMP1);
2177                         gen_nullptr_check(s1);
2178
2179                         if (!iptr->val.a) {
2180                                 codegen_addpatchref(cd, mcodeptr,
2181                                                                         PATCHER_get_putfield,
2182                                                                         (unresolved_field *) iptr->target, 0);
2183
2184                                 if (opt_showdisassemble)
2185                                         M_NOP;
2186
2187                                 disp = 0;
2188
2189                         } else {
2190                                 disp = ((fieldinfo *) (iptr->val.a))->offset;
2191                         }
2192
2193                         switch (iptr->op1) {
2194                         case TYPE_INT:
2195                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2196                                 M_ILD(d, s1, disp);
2197                                 store_reg_to_var_int(iptr->dst, d);
2198                                 break;
2199                         case TYPE_LNG:
2200                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2201                                 M_LLD(d, s1, disp);
2202                                 store_reg_to_var_int(iptr->dst, d);
2203                                 break;
2204                         case TYPE_ADR:
2205                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2206                                 M_ALD(d, s1, disp);
2207                                 store_reg_to_var_int(iptr->dst, d);
2208                                 break;
2209                         case TYPE_FLT:
2210                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2211                                 M_FLD(d, s1, disp);
2212                                 store_reg_to_var_flt(iptr->dst, d);
2213                                 break;
2214                         case TYPE_DBL:
2215                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2216                                 M_DLD(d, s1, disp);
2217                                 store_reg_to_var_flt(iptr->dst, d);
2218                                 break;
2219                         }
2220                         break;
2221
2222                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
2223                                       /* op1 = type, val.a = field address            */
2224
2225                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2226                         gen_nullptr_check(s1);
2227
2228                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2229                                 var_to_reg_int(s2, src, REG_ITMP2);
2230                         } else {
2231                                 var_to_reg_flt(s2, src, REG_FTMP2);
2232                         }
2233
2234                         if (!iptr->val.a) {
2235                                 codegen_addpatchref(cd, mcodeptr,
2236                                                                         PATCHER_get_putfield,
2237                                                                         (unresolved_field *) iptr->target, 0);
2238
2239                                 if (opt_showdisassemble)
2240                                         M_NOP;
2241
2242                                 disp = 0;
2243
2244                         } else {
2245                                 disp = ((fieldinfo *) (iptr->val.a))->offset;
2246                         }
2247
2248                         switch (iptr->op1) {
2249                         case TYPE_INT:
2250                                 M_IST(s2, s1, disp);
2251                                 break;
2252                         case TYPE_LNG:
2253                                 M_LST(s2, s1, disp);
2254                                 break;
2255                         case TYPE_ADR:
2256                                 M_AST(s2, s1, disp);
2257                                 break;
2258                         case TYPE_FLT:
2259                                 M_FST(s2, s1, disp);
2260                                 break;
2261                         case TYPE_DBL:
2262                                 M_DST(s2, s1, disp);
2263                                 break;
2264                         }
2265                         break;
2266
2267                 case ICMD_PUTFIELDCONST:  /* ..., objectref  ==> ...                  */
2268                                           /* val = value (in current instruction)     */
2269                                           /* op1 = type, val.a = field address (in    */
2270                                           /* following NOP)                           */
2271
2272                         var_to_reg_int(s1, src, REG_ITMP1);
2273                         gen_nullptr_check(s1);
2274
2275                         if (!iptr[1].val.a) {
2276                                 codegen_addpatchref(cd, mcodeptr,
2277                                                                         PATCHER_get_putfield,
2278                                                                         (unresolved_field *) iptr[1].target, 0);
2279
2280                                 if (opt_showdisassemble)
2281                                         M_NOP;
2282
2283                                 disp = 0;
2284
2285                         } else {
2286                                 disp = ((fieldinfo *) (iptr[1].val.a))->offset;
2287                         }
2288
2289                         switch (iptr[1].op1) {
2290                         case TYPE_INT:
2291                                 M_IST(REG_ZERO, s1, disp);
2292                                 break;
2293                         case TYPE_LNG:
2294                                 M_LST(REG_ZERO, s1, disp);
2295                                 break;
2296                         case TYPE_ADR:
2297                                 M_AST(REG_ZERO, s1, disp);
2298                                 break;
2299                         case TYPE_FLT:
2300                                 M_FST(REG_ZERO, s1, disp);
2301                                 break;
2302                         case TYPE_DBL:
2303                                 M_DST(REG_ZERO, s1, disp);
2304                                 break;
2305                         }
2306                         break;
2307
2308
2309                 /* branch operations **************************************************/
2310
2311                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2312
2313                         var_to_reg_int(s1, src, REG_ITMP1);
2314                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2315
2316 #ifdef ENABLE_VERIFIER
2317                         if (iptr->val.a) {
2318                                 codegen_addpatchref(cd, mcodeptr,
2319                                                                         PATCHER_athrow_areturn,
2320                                                                         (unresolved_class *) iptr->val.a, 0);
2321
2322                                 if (opt_showdisassemble)
2323                                         M_NOP;
2324                         }
2325 #endif /* ENABLE_VERIFIER */
2326
2327                         disp = dseg_addaddress(cd, asm_handle_exception);
2328                         M_ALD(REG_ITMP2, REG_PV, disp);
2329                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2330                         M_NOP;              /* nop ensures that XPC is less than the end */
2331                                             /* of basic block                            */
2332                         ALIGNCODENOP;
2333                         break;
2334
2335                 case ICMD_GOTO:         /* ... ==> ...                                */
2336                                         /* op1 = target JavaVM pc                     */
2337                         M_BR(0);
2338                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2339                         ALIGNCODENOP;
2340                         break;
2341
2342                 case ICMD_JSR:          /* ... ==> ...                                */
2343                                         /* op1 = target JavaVM pc                     */
2344
2345                         M_BSR(REG_ITMP1, 0);
2346                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2347                         break;
2348
2349                 case ICMD_RET:          /* ... ==> ...                                */
2350                                         /* op1 = local variable                       */
2351
2352                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2353                         if (var->flags & INMEMORY) {
2354                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2355                                 M_RET(REG_ZERO, REG_ITMP1);
2356                                 }
2357                         else
2358                                 M_RET(REG_ZERO, var->regoff);
2359                         ALIGNCODENOP;
2360                         break;
2361
2362                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2363                                         /* op1 = target JavaVM pc                     */
2364
2365                         var_to_reg_int(s1, src, REG_ITMP1);
2366                         M_BEQZ(s1, 0);
2367                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2368                         break;
2369
2370                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2371                                         /* op1 = target JavaVM pc                     */
2372
2373                         var_to_reg_int(s1, src, REG_ITMP1);
2374                         M_BNEZ(s1, 0);
2375                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2376                         break;
2377
2378                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2379                                         /* op1 = target JavaVM pc, val.i = constant   */
2380
2381                         var_to_reg_int(s1, src, REG_ITMP1);
2382                         if (iptr->val.i == 0) {
2383                                 M_BEQZ(s1, 0);
2384                                 }
2385                         else {
2386                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2387                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2388                                         }
2389                                 else {
2390                                         ICONST(REG_ITMP2, iptr->val.i);
2391                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2392                                         }
2393                                 M_BNEZ(REG_ITMP1, 0);
2394                                 }
2395                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2396                         break;
2397
2398                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2399                                         /* op1 = target JavaVM pc, val.i = constant   */
2400
2401                         var_to_reg_int(s1, src, REG_ITMP1);
2402                         if (iptr->val.i == 0) {
2403                                 M_BLTZ(s1, 0);
2404                                 }
2405                         else {
2406                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2407                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2408                                         }
2409                                 else {
2410                                         ICONST(REG_ITMP2, iptr->val.i);
2411                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2412                                         }
2413                                 M_BNEZ(REG_ITMP1, 0);
2414                                 }
2415                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2416                         break;
2417
2418                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2419                                         /* op1 = target JavaVM pc, val.i = constant   */
2420
2421                         var_to_reg_int(s1, src, REG_ITMP1);
2422                         if (iptr->val.i == 0) {
2423                                 M_BLEZ(s1, 0);
2424                                 }
2425                         else {
2426                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2427                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2428                                         }
2429                                 else {
2430                                         ICONST(REG_ITMP2, iptr->val.i);
2431                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2432                                         }
2433                                 M_BNEZ(REG_ITMP1, 0);
2434                                 }
2435                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2436                         break;
2437
2438                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2439                                         /* op1 = target JavaVM pc, val.i = constant   */
2440
2441                         var_to_reg_int(s1, src, REG_ITMP1);
2442                         if (iptr->val.i == 0) {
2443                                 M_BNEZ(s1, 0);
2444                                 }
2445                         else {
2446                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2447                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2448                                         }
2449                                 else {
2450                                         ICONST(REG_ITMP2, iptr->val.i);
2451                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2452                                         }
2453                                 M_BEQZ(REG_ITMP1, 0);
2454                                 }
2455                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2456                         break;
2457
2458                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2459                                         /* op1 = target JavaVM pc, val.i = constant   */
2460
2461                         var_to_reg_int(s1, src, REG_ITMP1);
2462                         if (iptr->val.i == 0) {
2463                                 M_BGTZ(s1, 0);
2464                                 }
2465                         else {
2466                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2467                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2468                                         }
2469                                 else {
2470                                         ICONST(REG_ITMP2, iptr->val.i);
2471                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2472                                         }
2473                                 M_BEQZ(REG_ITMP1, 0);
2474                                 }
2475                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2476                         break;
2477
2478                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2479                                         /* op1 = target JavaVM pc, val.i = constant   */
2480
2481                         var_to_reg_int(s1, src, REG_ITMP1);
2482                         if (iptr->val.i == 0) {
2483                                 M_BGEZ(s1, 0);
2484                                 }
2485                         else {
2486                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2487                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2488                                         }
2489                                 else {
2490                                         ICONST(REG_ITMP2, iptr->val.i);
2491                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2492                                         }
2493                                 M_BEQZ(REG_ITMP1, 0);
2494                                 }
2495                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2496                         break;
2497
2498                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2499                                         /* op1 = target JavaVM pc, val.l = constant   */
2500
2501                         var_to_reg_int(s1, src, REG_ITMP1);
2502                         if (iptr->val.l == 0) {
2503                                 M_BEQZ(s1, 0);
2504                                 }
2505                         else {
2506                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2507                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2508                                         }
2509                                 else {
2510                                         LCONST(REG_ITMP2, iptr->val.l);
2511                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2512                                         }
2513                                 M_BNEZ(REG_ITMP1, 0);
2514                                 }
2515                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2516                         break;
2517
2518                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2519                                         /* op1 = target JavaVM pc, val.l = constant   */
2520
2521                         var_to_reg_int(s1, src, REG_ITMP1);
2522                         if (iptr->val.l == 0) {
2523                                 M_BLTZ(s1, 0);
2524                                 }
2525                         else {
2526                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2527                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2528                                         }
2529                                 else {
2530                                         LCONST(REG_ITMP2, iptr->val.l);
2531                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2532                                         }
2533                                 M_BNEZ(REG_ITMP1, 0);
2534                                 }
2535                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2536                         break;
2537
2538                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2539                                         /* op1 = target JavaVM pc, val.l = constant   */
2540
2541                         var_to_reg_int(s1, src, REG_ITMP1);
2542                         if (iptr->val.l == 0) {
2543                                 M_BLEZ(s1, 0);
2544                                 }
2545                         else {
2546                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2547                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2548                                         }
2549                                 else {
2550                                         LCONST(REG_ITMP2, iptr->val.l);
2551                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2552                                         }
2553                                 M_BNEZ(REG_ITMP1, 0);
2554                                 }
2555                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2556                         break;
2557
2558                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2559                                         /* op1 = target JavaVM pc, val.l = constant   */
2560
2561                         var_to_reg_int(s1, src, REG_ITMP1);
2562                         if (iptr->val.l == 0) {
2563                                 M_BNEZ(s1, 0);
2564                                 }
2565                         else {
2566                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2567                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2568                                         }
2569                                 else {
2570                                         LCONST(REG_ITMP2, iptr->val.l);
2571                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2572                                         }
2573                                 M_BEQZ(REG_ITMP1, 0);
2574                                 }
2575                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2576                         break;
2577
2578                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2579                                         /* op1 = target JavaVM pc, val.l = constant   */
2580
2581                         var_to_reg_int(s1, src, REG_ITMP1);
2582                         if (iptr->val.l == 0) {
2583                                 M_BGTZ(s1, 0);
2584                                 }
2585                         else {
2586                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2587                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2588                                         }
2589                                 else {
2590                                         LCONST(REG_ITMP2, iptr->val.l);
2591                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2592                                         }
2593                                 M_BEQZ(REG_ITMP1, 0);
2594                                 }
2595                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2596                         break;
2597
2598                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2599                                         /* op1 = target JavaVM pc, val.l = constant   */
2600
2601                         var_to_reg_int(s1, src, REG_ITMP1);
2602                         if (iptr->val.l == 0) {
2603                                 M_BGEZ(s1, 0);
2604                                 }
2605                         else {
2606                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2607                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2608                                         }
2609                                 else {
2610                                         LCONST(REG_ITMP2, iptr->val.l);
2611                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2612                                         }
2613                                 M_BEQZ(REG_ITMP1, 0);
2614                                 }
2615                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2616                         break;
2617
2618                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2619                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2620                 case ICMD_IF_ACMPEQ:
2621
2622                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2623                         var_to_reg_int(s2, src, REG_ITMP2);
2624                         M_CMPEQ(s1, s2, REG_ITMP1);
2625                         M_BNEZ(REG_ITMP1, 0);
2626                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2627                         break;
2628
2629                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2630                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2631                 case ICMD_IF_ACMPNE:
2632
2633                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2634                         var_to_reg_int(s2, src, REG_ITMP2);
2635                         M_CMPEQ(s1, s2, REG_ITMP1);
2636                         M_BEQZ(REG_ITMP1, 0);
2637                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2638                         break;
2639
2640                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2641                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2642
2643                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2644                         var_to_reg_int(s2, src, REG_ITMP2);
2645                         M_CMPLT(s1, s2, REG_ITMP1);
2646                         M_BNEZ(REG_ITMP1, 0);
2647                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2648                         break;
2649
2650                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2651                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2652
2653                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2654                         var_to_reg_int(s2, src, REG_ITMP2);
2655                         M_CMPLE(s1, s2, REG_ITMP1);
2656                         M_BEQZ(REG_ITMP1, 0);
2657                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2658                         break;
2659
2660                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2661                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2662
2663                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2664                         var_to_reg_int(s2, src, REG_ITMP2);
2665                         M_CMPLE(s1, s2, REG_ITMP1);
2666                         M_BNEZ(REG_ITMP1, 0);
2667                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2668                         break;
2669
2670                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2671                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2672
2673                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2674                         var_to_reg_int(s2, src, REG_ITMP2);
2675                         M_CMPLT(s1, s2, REG_ITMP1);
2676                         M_BEQZ(REG_ITMP1, 0);
2677                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2678                         break;
2679
2680                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2681
2682                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2683                         break;
2684
2685                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2686                                         /* val.i = constant                           */
2687
2688                         var_to_reg_int(s1, src, REG_ITMP1);
2689                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2690                         s3 = iptr->val.i;
2691                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2692                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2693                                         M_CMPEQ(s1, REG_ZERO, d);
2694                                         store_reg_to_var_int(iptr->dst, d);
2695                                         break;
2696                                 }
2697                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2698                                         M_CMPEQ(s1, REG_ZERO, d);
2699                                         M_XOR_IMM(d, 1, d);
2700                                         store_reg_to_var_int(iptr->dst, d);
2701                                         break;
2702                                 }
2703                                 if (s1 == d) {
2704                                         M_MOV(s1, REG_ITMP1);
2705                                         s1 = REG_ITMP1;
2706                                 }
2707                                 ICONST(d, iptr[1].val.i);
2708                         }
2709                         if ((s3 >= 0) && (s3 <= 255)) {
2710                                 M_CMOVEQ_IMM(s1, s3, d);
2711                         } else {
2712                                 ICONST(REG_ITMP3, s3);
2713                                 M_CMOVEQ(s1, REG_ITMP3, d);
2714                         }
2715                         store_reg_to_var_int(iptr->dst, d);
2716                         break;
2717
2718                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2719                                         /* val.i = constant                           */
2720
2721                         var_to_reg_int(s1, src, REG_ITMP1);
2722                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2723                         s3 = iptr->val.i;
2724                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2725                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2726                                         M_CMPEQ(s1, REG_ZERO, d);
2727                                         store_reg_to_var_int(iptr->dst, d);
2728                                         break;
2729                                 }
2730                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2731                                         M_CMPEQ(s1, REG_ZERO, d);
2732                                         M_XOR_IMM(d, 1, d);
2733                                         store_reg_to_var_int(iptr->dst, d);
2734                                         break;
2735                                 }
2736                                 if (s1 == d) {
2737                                         M_MOV(s1, REG_ITMP1);
2738                                         s1 = REG_ITMP1;
2739                                 }
2740                                 ICONST(d, iptr[1].val.i);
2741                         }
2742                         if ((s3 >= 0) && (s3 <= 255)) {
2743                                 M_CMOVNE_IMM(s1, s3, d);
2744                         } else {
2745                                 ICONST(REG_ITMP3, s3);
2746                                 M_CMOVNE(s1, REG_ITMP3, d);
2747                         }
2748                         store_reg_to_var_int(iptr->dst, d);
2749                         break;
2750
2751                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2752                                         /* val.i = constant                           */
2753
2754                         var_to_reg_int(s1, src, REG_ITMP1);
2755                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2756                         s3 = iptr->val.i;
2757                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2758                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2759                                         M_CMPLT(s1, REG_ZERO, d);
2760                                         store_reg_to_var_int(iptr->dst, d);
2761                                         break;
2762                                 }
2763                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2764                                         M_CMPLE(REG_ZERO, s1, d);
2765                                         store_reg_to_var_int(iptr->dst, d);
2766                                         break;
2767                                 }
2768                                 if (s1 == d) {
2769                                         M_MOV(s1, REG_ITMP1);
2770                                         s1 = REG_ITMP1;
2771                                 }
2772                                 ICONST(d, iptr[1].val.i);
2773                         }
2774                         if ((s3 >= 0) && (s3 <= 255)) {
2775                                 M_CMOVLT_IMM(s1, s3, d);
2776                         } else {
2777                                 ICONST(REG_ITMP3, s3);
2778                                 M_CMOVLT(s1, REG_ITMP3, d);
2779                         }
2780                         store_reg_to_var_int(iptr->dst, d);
2781                         break;
2782
2783                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2784                                         /* val.i = constant                           */
2785
2786                         var_to_reg_int(s1, src, REG_ITMP1);
2787                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2788                         s3 = iptr->val.i;
2789                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2790                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2791                                         M_CMPLE(REG_ZERO, s1, d);
2792                                         store_reg_to_var_int(iptr->dst, d);
2793                                         break;
2794                                 }
2795                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2796                                         M_CMPLT(s1, REG_ZERO, d);
2797                                         store_reg_to_var_int(iptr->dst, d);
2798                                         break;
2799                                 }
2800                                 if (s1 == d) {
2801                                         M_MOV(s1, REG_ITMP1);
2802                                         s1 = REG_ITMP1;
2803                                 }
2804                                 ICONST(d, iptr[1].val.i);
2805                         }
2806                         if ((s3 >= 0) && (s3 <= 255)) {
2807                                 M_CMOVGE_IMM(s1, s3, d);
2808                         } else {
2809                                 ICONST(REG_ITMP3, s3);
2810                                 M_CMOVGE(s1, REG_ITMP3, d);
2811                         }
2812                         store_reg_to_var_int(iptr->dst, d);
2813                         break;
2814
2815                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2816                                         /* val.i = constant                           */
2817
2818                         var_to_reg_int(s1, src, REG_ITMP1);
2819                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2820                         s3 = iptr->val.i;
2821                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2822                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2823                                         M_CMPLT(REG_ZERO, s1, d);
2824                                         store_reg_to_var_int(iptr->dst, d);
2825                                         break;
2826                                 }
2827                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2828                                         M_CMPLE(s1, REG_ZERO, d);
2829                                         store_reg_to_var_int(iptr->dst, d);
2830                                         break;
2831                                 }
2832                                 if (s1 == d) {
2833                                         M_MOV(s1, REG_ITMP1);
2834                                         s1 = REG_ITMP1;
2835                                 }
2836                                 ICONST(d, iptr[1].val.i);
2837                         }
2838                         if ((s3 >= 0) && (s3 <= 255)) {
2839                                 M_CMOVGT_IMM(s1, s3, d);
2840                         } else {
2841                                 ICONST(REG_ITMP3, s3);
2842                                 M_CMOVGT(s1, REG_ITMP3, d);
2843                         }
2844                         store_reg_to_var_int(iptr->dst, d);
2845                         break;
2846
2847                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2848                                         /* val.i = constant                           */
2849
2850                         var_to_reg_int(s1, src, REG_ITMP1);
2851                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2852                         s3 = iptr->val.i;
2853                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2854                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2855                                         M_CMPLE(s1, REG_ZERO, d);
2856                                         store_reg_to_var_int(iptr->dst, d);
2857                                         break;
2858                                 }
2859                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2860                                         M_CMPLT(REG_ZERO, s1, d);
2861                                         store_reg_to_var_int(iptr->dst, d);
2862                                         break;
2863                                 }
2864                                 if (s1 == d) {
2865                                         M_MOV(s1, REG_ITMP1);
2866                                         s1 = REG_ITMP1;
2867                                 }
2868                                 ICONST(d, iptr[1].val.i);
2869                         }
2870                         if ((s3 >= 0) && (s3 <= 255)) {
2871                                 M_CMOVLE_IMM(s1, s3, d);
2872                         } else {
2873                                 ICONST(REG_ITMP3, s3);
2874                                 M_CMOVLE(s1, REG_ITMP3, d);
2875                         }
2876                         store_reg_to_var_int(iptr->dst, d);
2877                         break;
2878
2879
2880                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2881                 case ICMD_LRETURN:
2882
2883                         var_to_reg_int(s1, src, REG_RESULT);
2884                         M_INTMOVE(s1, REG_RESULT);
2885                         goto nowperformreturn;
2886
2887                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2888
2889                         var_to_reg_int(s1, src, REG_RESULT);
2890                         M_INTMOVE(s1, REG_RESULT);
2891
2892 #ifdef ENABLE_VERIFIER
2893                         if (iptr->val.a) {
2894                                 codegen_addpatchref(cd, mcodeptr,
2895                                                                         PATCHER_athrow_areturn,
2896                                                                         (unresolved_class *) iptr->val.a, 0);
2897
2898                                 if (opt_showdisassemble)
2899                                         M_NOP;
2900                         }
2901 #endif /* ENABLE_VERIFIER */
2902                         goto nowperformreturn;
2903
2904                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2905                 case ICMD_DRETURN:
2906
2907                         var_to_reg_flt(s1, src, REG_FRESULT);
2908                         M_FLTMOVE(s1, REG_FRESULT);
2909                         goto nowperformreturn;
2910
2911                 case ICMD_RETURN:       /* ...  ==> ...                               */
2912
2913 nowperformreturn:
2914                         {
2915                         s4 i, p;
2916
2917                         p = parentargs_base;
2918
2919                         /* call trace function */
2920
2921                         if (runverbose) {
2922                                 M_LDA(REG_SP, REG_SP, -3 * 8);
2923                                 M_AST(REG_RA, REG_SP, 0 * 8);
2924                                 M_LST(REG_RESULT, REG_SP, 1 * 8);
2925                                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
2926
2927                                 disp = dseg_addaddress(cd, m);
2928                                 M_ALD(rd->argintregs[0], REG_PV, disp);
2929                                 M_MOV(REG_RESULT, rd->argintregs[1]);
2930                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[2]);
2931                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[3]);
2932
2933                                 disp = dseg_addaddress(cd, (void *) builtin_displaymethodstop);
2934                                 M_ALD(REG_PV, REG_PV, disp);
2935                                 M_JSR(REG_RA, REG_PV);
2936                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2937                                 M_LDA(REG_PV, REG_RA, -disp);
2938
2939                                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
2940                                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
2941                                 M_ALD(REG_RA, REG_SP, 0 * 8);
2942                                 M_LDA(REG_SP, REG_SP, 3 * 8);
2943                         }
2944
2945 #if defined(USE_THREADS)
2946                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2947                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8);
2948
2949                                 switch (iptr->opc) {
2950                                 case ICMD_IRETURN:
2951                                 case ICMD_LRETURN:
2952                                 case ICMD_ARETURN:
2953                                         M_LST(REG_RESULT, REG_SP, rd->memuse * 8);
2954                                         break;
2955                                 case ICMD_FRETURN:
2956                                 case ICMD_DRETURN:
2957                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 8);
2958                                         break;
2959                                 }
2960
2961                                 disp = dseg_addaddress(cd, BUILTIN_monitorexit);
2962                                 M_ALD(REG_PV, REG_PV, disp);
2963                                 M_JSR(REG_RA, REG_PV);
2964                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2965                                 M_LDA(REG_PV, REG_RA, disp);
2966
2967                                 switch (iptr->opc) {
2968                                 case ICMD_IRETURN:
2969                                 case ICMD_LRETURN:
2970                                 case ICMD_ARETURN:
2971                                         M_LLD(REG_RESULT, REG_SP, rd->memuse * 8);
2972                                         break;
2973                                 case ICMD_FRETURN:
2974                                 case ICMD_DRETURN:
2975                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8);
2976                                         break;
2977                                 }
2978                         }
2979 #endif
2980
2981                         /* restore return address                                         */
2982
2983                         if (!m->isleafmethod) {
2984                                 p--; M_LLD(REG_RA, REG_SP, p * 8);
2985                         }
2986
2987                         /* restore saved registers                                        */
2988
2989                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2990                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
2991                         }
2992                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2993                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
2994                         }
2995
2996                         /* deallocate stack                                               */
2997
2998                         if (parentargs_base) {
2999                                 M_LDA(REG_SP, REG_SP, parentargs_base * 8);
3000                         }
3001
3002                         M_RET(REG_ZERO, REG_RA);
3003                         ALIGNCODENOP;
3004                         }
3005                         break;
3006
3007
3008                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3009                         {
3010                         s4 i, l, *s4ptr;
3011                         void **tptr;
3012
3013                         tptr = (void **) iptr->target;
3014
3015                         s4ptr = iptr->val.a;
3016                         l = s4ptr[1];                          /* low     */
3017                         i = s4ptr[2];                          /* high    */
3018
3019                         var_to_reg_int(s1, src, REG_ITMP1);
3020                         if (l == 0) {
3021                                 M_INTMOVE(s1, REG_ITMP1);
3022                         } else if (l <= 32768) {
3023                                 M_LDA(REG_ITMP1, s1, -l);
3024                         } else {
3025                                 ICONST(REG_ITMP2, l);
3026                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3027                         }
3028                         i = i - l + 1;
3029
3030                         /* range check */
3031
3032                         if (i <= 256)
3033                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3034                         else {
3035                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3036                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3037                         }
3038                         M_BEQZ(REG_ITMP2, 0);
3039                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3040
3041                         /* build jump table top down and use address of lowest entry */
3042
3043                         /* s4ptr += 3 + i; */
3044                         tptr += i;
3045
3046                         while (--i >= 0) {
3047                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
3048                                 --tptr;
3049                         }
3050                         }
3051
3052                         /* length of dataseg after last dseg_addtarget is used by load */
3053
3054                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3055                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
3056                         M_JMP(REG_ZERO, REG_ITMP2);
3057                         ALIGNCODENOP;
3058                         break;
3059
3060
3061                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3062                         {
3063                         s4 i, l, val, *s4ptr;
3064                         void **tptr;
3065
3066                         tptr = (void **) iptr->target;
3067
3068                         s4ptr = iptr->val.a;
3069                         l = s4ptr[0];                          /* default  */
3070                         i = s4ptr[1];                          /* count    */
3071
3072                         MCODECHECK((i<<2)+8);
3073                         var_to_reg_int(s1, src, REG_ITMP1);
3074                         while (--i >= 0) {
3075                                 s4ptr += 2;
3076                                 ++tptr;
3077
3078                                 val = s4ptr[0];
3079                                 if ((val >= 0) && (val <= 255)) {
3080                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3081                                 } else {
3082                                         if ((val >= -32768) && (val <= 32767)) {
3083                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3084                                         } else {
3085                                                 disp = dseg_adds4(cd, val);
3086                                                 M_ILD(REG_ITMP2, REG_PV, disp);
3087                                         }
3088                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3089                                 }
3090                                 M_BNEZ(REG_ITMP2, 0);
3091                                 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3092                         }
3093
3094                         M_BR(0);
3095
3096                         tptr = (void **) iptr->target;
3097                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3098
3099                         ALIGNCODENOP;
3100                         break;
3101                         }
3102
3103
3104                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
3105                                         /* op1 = arg count val.a = builtintable entry */
3106
3107                         bte = iptr->val.a;
3108                         md = bte->md;
3109                         goto gen_method;
3110
3111                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3112                                         /* op1 = arg count, val.a = method pointer    */
3113
3114                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3115                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
3116                 case ICMD_INVOKEINTERFACE:
3117
3118                         lm = iptr->val.a;
3119
3120                         if (lm == NULL) {
3121                                 unresolved_method *um = iptr->target;
3122                                 md = um->methodref->parseddesc.md;
3123                         } else {
3124                                 md = lm->parseddesc;
3125                         }
3126
3127 gen_method:
3128                         s3 = md->paramcount;
3129
3130                         MCODECHECK((s3 << 1) + 64);
3131
3132                         /* copy arguments to registers or stack location                  */
3133
3134                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
3135                                 if (src->varkind == ARGVAR)
3136                                         continue;
3137                                 if (IS_INT_LNG_TYPE(src->type)) {
3138                                         if (!md->params[s3].inmemory) {
3139                                                 s1 = rd->argintregs[md->params[s3].regoff];
3140                                                 var_to_reg_int(d, src, s1);
3141                                                 M_INTMOVE(d, s1);
3142                                         } else {
3143                                                 var_to_reg_int(d, src, REG_ITMP1);
3144                                                 M_LST(d, REG_SP, md->params[s3].regoff * 8);
3145                                         }
3146
3147                                 } else {
3148                                         if (!md->params[s3].inmemory) {
3149                                                 s1 = rd->argfltregs[md->params[s3].regoff];
3150                                                 var_to_reg_flt(d, src, s1);
3151                                                 M_FLTMOVE(d, s1);
3152                                         } else {
3153                                                 var_to_reg_flt(d, src, REG_FTMP1);
3154                                                 M_DST(d, REG_SP, md->params[s3].regoff * 8);
3155                                         }
3156                                 }
3157                         }
3158
3159                         switch (iptr->opc) {
3160                         case ICMD_BUILTIN:
3161                                 disp = dseg_addaddress(cd, bte->fp);
3162                                 d = md->returntype.type;
3163
3164                                 M_ALD(REG_PV, REG_PV, disp);  /* Pointer to built-in-function */
3165                                 M_JSR(REG_RA, REG_PV);
3166                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3167                                 M_LDA(REG_PV, REG_RA, -disp);
3168
3169                                 /* if op1 == true, we need to check for an exception */
3170
3171                                 if (iptr->op1 == true) {
3172                                         M_BEQZ(REG_RESULT, 0);
3173                                         codegen_addxexceptionrefs(cd, mcodeptr);
3174                                 }
3175                                 break;
3176
3177                         case ICMD_INVOKESPECIAL:
3178                                 M_BEQZ(rd->argintregs[0], 0);
3179                                 codegen_addxnullrefs(cd, mcodeptr);
3180                                 /* fall through */
3181
3182                         case ICMD_INVOKESTATIC:
3183                                 if (!lm) {
3184                                         unresolved_method *um = iptr->target;
3185
3186                                         disp = dseg_addaddress(cd, NULL);
3187
3188                                         codegen_addpatchref(cd, mcodeptr,
3189                                                                                 PATCHER_invokestatic_special, um, disp);
3190
3191                                         if (opt_showdisassemble)
3192                                                 M_NOP;
3193
3194                                         d = um->methodref->parseddesc.md->returntype.type;
3195
3196                                 } else {
3197                                         disp = dseg_addaddress(cd, lm->stubroutine);
3198                                         d = lm->parseddesc->returntype.type;
3199                                 }
3200
3201                                 M_ALD(REG_PV, REG_PV, disp);         /* method pointer in r27 */
3202                                 M_JSR(REG_RA, REG_PV);
3203                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3204                                 M_LDA(REG_PV, REG_RA, -disp);
3205                                 break;
3206
3207                         case ICMD_INVOKEVIRTUAL:
3208                                 gen_nullptr_check(rd->argintregs[0]);
3209
3210                                 if (!lm) {
3211                                         unresolved_method *um = iptr->target;
3212
3213                                         codegen_addpatchref(cd, mcodeptr,
3214                                                                                 PATCHER_invokevirtual, um, 0);
3215
3216                                         if (opt_showdisassemble)
3217                                                 M_NOP;
3218
3219                                         s1 = 0;
3220                                         d = um->methodref->parseddesc.md->returntype.type;
3221
3222                                 } else {
3223                                         s1 = OFFSET(vftbl_t, table[0]) +
3224                                                 sizeof(methodptr) * lm->vftblindex;
3225                                         d = lm->parseddesc->returntype.type;
3226                                 }
3227
3228                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3229                                           OFFSET(java_objectheader, vftbl));
3230                                 M_ALD(REG_PV, REG_METHODPTR, s1);
3231                                 M_JSR(REG_RA, REG_PV);
3232                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3233                                 M_LDA(REG_PV, REG_RA, -disp);
3234                                 break;
3235
3236                         case ICMD_INVOKEINTERFACE:
3237                                 gen_nullptr_check(rd->argintregs[0]);
3238
3239                                 if (!lm) {
3240                                         unresolved_method *um = iptr->target;
3241
3242                                         codegen_addpatchref(cd, mcodeptr,
3243                                                                                 PATCHER_invokeinterface, um, 0);
3244
3245                                         if (opt_showdisassemble)
3246                                                 M_NOP;
3247
3248                                         s1 = 0;
3249                                         s2 = 0;
3250                                         d = um->methodref->parseddesc.md->returntype.type;
3251
3252                                 } else {
3253                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
3254                                                 sizeof(methodptr*) * lm->class->index;
3255
3256                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
3257
3258                                         d = lm->parseddesc->returntype.type;
3259                                 }
3260
3261                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3262                                           OFFSET(java_objectheader, vftbl));
3263                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
3264                                 M_ALD(REG_PV, REG_METHODPTR, s2);
3265                                 M_JSR(REG_RA, REG_PV);
3266                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3267                                 M_LDA(REG_PV, REG_RA, -disp);
3268                                 break;
3269                         }
3270
3271                         /* d contains return type */
3272
3273                         if (d != TYPE_VOID) {
3274                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3275                                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3276                                         M_INTMOVE(REG_RESULT, s1);
3277                                         store_reg_to_var_int(iptr->dst, s1);
3278                                 } else {
3279                                         s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
3280                                         M_FLTMOVE(REG_FRESULT, s1);
3281                                         store_reg_to_var_flt(iptr->dst, s1);
3282                                 }
3283                         }
3284                         break;
3285
3286
3287                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3288
3289                                       /* op1:   0 == array, 1 == class                */
3290                                       /* val.a: (classinfo*) superclass               */
3291
3292                         /*  superclass is an interface:
3293                          *
3294                          *  OK if ((sub == NULL) ||
3295                          *         (sub->vftbl->interfacetablelength > super->index) &&
3296                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
3297                          *
3298                          *  superclass is a class:
3299                          *
3300                          *  OK if ((sub == NULL) || (0
3301                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3302                          *         super->vftbl->diffval));
3303                          */
3304
3305                         if (iptr->op1 == 1) {
3306                                 /* object type cast-check */
3307
3308                                 classinfo *super;
3309                                 vftbl_t   *supervftbl;
3310                                 s4         superindex;
3311
3312                                 super = (classinfo *) iptr->val.a;
3313
3314                                 if (!super) {
3315                                         superindex = 0;
3316                                         supervftbl = NULL;
3317
3318                                 } else {
3319                                         superindex = super->index;
3320                                         supervftbl = super->vftbl;
3321                                 }
3322
3323 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3324                                 codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3325 #endif
3326                                 var_to_reg_int(s1, src, REG_ITMP1);
3327
3328                                 /* calculate interface checkcast code size */
3329
3330                                 s2 = 6;
3331                                 if (!super)
3332                                         s2 += opt_showdisassemble ? 1 : 0;
3333
3334                                 /* calculate class checkcast code size */
3335
3336                                 s3 = 9 /* 8 + (s1 == REG_ITMP1) */;
3337                                 if (!super)
3338                                         s3 += opt_showdisassemble ? 1 : 0;
3339
3340                                 /* if class is not resolved, check which code to call */
3341
3342                                 if (!super) {
3343                                         M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3344
3345                                         disp = dseg_adds4(cd, 0);                 /* super->flags */
3346
3347                                         codegen_addpatchref(cd, mcodeptr,
3348                                                                                 PATCHER_checkcast_instanceof_flags,
3349                                                                                 (constant_classref *) iptr->target,
3350                                                                                 disp);
3351
3352                                         if (opt_showdisassemble)
3353                                                 M_NOP;
3354
3355                                         M_ILD(REG_ITMP2, REG_PV, disp);
3356                                         disp = dseg_adds4(cd, ACC_INTERFACE);
3357                                         M_ILD(REG_ITMP3, REG_PV, disp);
3358                                         M_AND(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3359                                         M_BEQZ(REG_ITMP2, s2 + 1);
3360                                 }
3361
3362                                 /* interface checkcast code */
3363
3364                                 if (!super || (super->flags & ACC_INTERFACE)) {
3365                                         if (super) {
3366                                                 M_BEQZ(s1, s2);
3367
3368                                         } else {
3369                                                 codegen_addpatchref(cd, mcodeptr,
3370                                                                                         PATCHER_checkcast_instanceof_interface,
3371                                                                                         (constant_classref *) iptr->target,
3372                                                                                         0);
3373
3374                                                 if (opt_showdisassemble)
3375                                                         M_NOP;
3376                                         }
3377
3378                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3379                                         M_ILD(REG_ITMP3, REG_ITMP2,
3380                                                   OFFSET(vftbl_t, interfacetablelength));
3381                                         M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3382                                         M_BLEZ(REG_ITMP3, 0);
3383                                         codegen_addxcastrefs(cd, mcodeptr);
3384                                         M_ALD(REG_ITMP3, REG_ITMP2,
3385                                                   (s4) (OFFSET(vftbl_t, interfacetable[0]) -
3386                                                                 superindex * sizeof(methodptr*)));
3387                                         M_BEQZ(REG_ITMP3, 0);
3388                                         codegen_addxcastrefs(cd, mcodeptr);
3389
3390                                         if (!super)
3391                                                 M_BR(s3);
3392                                 }
3393
3394                                 /* class checkcast code */
3395
3396                                 if (!super || !(super->flags & ACC_INTERFACE)) {
3397                                         disp = dseg_addaddress(cd, supervftbl);
3398
3399                                         if (super) {
3400                                                 M_BEQZ(s1, s3);
3401
3402                                         } else {
3403                                                 codegen_addpatchref(cd, mcodeptr,
3404                                                                                         PATCHER_checkcast_instanceof_class,
3405                                                                                         (constant_classref *) iptr->target,
3406                                                                                         disp);
3407
3408                                                 if (opt_showdisassemble)
3409                                                         M_NOP;
3410                                         }
3411
3412                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3413                                         M_ALD(REG_ITMP3, REG_PV, disp);
3414 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3415                                         codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3416 #endif
3417                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3418                                         /*                              if (s1 != REG_ITMP1) { */
3419                                         /*                                      M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, baseval)); */
3420                                         /*                                      M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval)); */
3421                                         /*  #if defined(USE_THREADS) && defined(NATIVE_THREADS) */
3422                                         /*                                      codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase); */
3423                                         /*  #endif */
3424                                         /*                                      M_ISUB(REG_ITMP2, REG_ITMP1, REG_ITMP2); */
3425
3426                                         /*                              } else { */
3427                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
3428                                         M_ISUB(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3429                                         M_ALD(REG_ITMP3, REG_PV, disp);
3430                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
3431 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3432                                         codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3433 #endif
3434                                         /*                              } */
3435                                         M_CMPULE(REG_ITMP2, REG_ITMP3, REG_ITMP3);
3436                                         M_BEQZ(REG_ITMP3, 0);
3437                                         codegen_addxcastrefs(cd, mcodeptr);
3438                                 }
3439                                 d = reg_of_var(rd, iptr->dst, s1);
3440
3441                         } else {
3442                                 /* array type cast-check */
3443
3444                                 var_to_reg_int(s1, src, rd->argintregs[0]);
3445                                 M_INTMOVE(s1, rd->argintregs[0]);
3446
3447                                 disp = dseg_addaddress(cd, iptr->val.a);
3448
3449                                 if (iptr->val.a == NULL) {
3450                                         codegen_addpatchref(cd, mcodeptr,
3451                                                                                 PATCHER_builtin_arraycheckcast,
3452                                                                                 (constant_classref *) iptr->target,
3453                                                                                 disp);
3454
3455                                         if (opt_showdisassemble)
3456                                                 M_NOP;
3457                                 }
3458
3459                                 M_ALD(rd->argintregs[1], REG_PV, disp);
3460                                 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
3461                                 M_ALD(REG_PV, REG_PV, disp);
3462                                 M_JSR(REG_RA, REG_PV);
3463                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3464                                 M_LDA(REG_PV, REG_RA, -disp);
3465
3466                                 M_BEQZ(REG_RESULT, 0);
3467                                 codegen_addxcastrefs(cd, mcodeptr);
3468
3469                                 var_to_reg_int(s1, src, REG_ITMP1);
3470                                 d = reg_of_var(rd, iptr->dst, s1);
3471                         }
3472                         M_INTMOVE(s1, d);
3473                         store_reg_to_var_int(iptr->dst, d);
3474                         break;
3475
3476                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3477
3478                                       /* op1:   0 == array, 1 == class                */
3479                                       /* val.a: (classinfo*) superclass               */
3480
3481                         /*  superclass is an interface:
3482                          *
3483                          *  return (sub != NULL) &&
3484                          *         (sub->vftbl->interfacetablelength > super->index) &&
3485                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3486                          *
3487                          *  superclass is a class:
3488                          *
3489                          *  return ((sub != NULL) && (0
3490                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3491                          *          super->vftbl->diffvall));
3492                          */
3493
3494                         {
3495                         classinfo *super;
3496                         vftbl_t   *supervftbl;
3497                         s4         superindex;
3498
3499                         super = (classinfo *) iptr->val.a;
3500
3501                         if (!super) {
3502                                 superindex = 0;
3503                                 supervftbl = NULL;
3504
3505                         } else {
3506                                 superindex = super->index;
3507                                 supervftbl = super->vftbl;
3508                         }
3509
3510 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3511                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3512 #endif
3513                         var_to_reg_int(s1, src, REG_ITMP1);
3514                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
3515                         if (s1 == d) {
3516                                 M_MOV(s1, REG_ITMP1);
3517                                 s1 = REG_ITMP1;
3518                         }
3519
3520                         /* calculate interface instanceof code size */
3521
3522                         s2 = 6;
3523                         if (!super)
3524                                 s2 += (d == REG_ITMP2 ? 1 : 0) + (opt_showdisassemble ? 1 : 0);
3525
3526                         /* calculate class instanceof code size */
3527
3528                         s3 = 7;
3529                         if (!super)
3530                                 s3 += (opt_showdisassemble ? 1 : 0);
3531
3532                         /* if class is not resolved, check which code to call */
3533
3534                         if (!super) {
3535                                 M_CLR(d);
3536                                 M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3537
3538                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
3539
3540                                 codegen_addpatchref(cd, mcodeptr,
3541                                                                         PATCHER_checkcast_instanceof_flags,
3542                                                                         (constant_classref *) iptr->target, disp);
3543
3544                                 if (opt_showdisassemble)
3545                                         M_NOP;
3546
3547                                 M_ILD(REG_ITMP3, REG_PV, disp);
3548
3549                                 disp = dseg_adds4(cd, ACC_INTERFACE);
3550                                 M_ILD(REG_ITMP2, REG_PV, disp);
3551                                 M_AND(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3552                                 M_BEQZ(REG_ITMP3, s2 + 1);
3553                         }
3554
3555                         /* interface instanceof code */
3556
3557                         if (!super || (super->flags & ACC_INTERFACE)) {
3558                                 if (super) {
3559                                         M_CLR(d);
3560                                         M_BEQZ(s1, s2);
3561
3562                                 } else {
3563                                         /* If d == REG_ITMP2, then it's destroyed in check code   */
3564                                         /* above.                                                 */
3565                                         if (d == REG_ITMP2)
3566                                                 M_CLR(d);
3567
3568                                         codegen_addpatchref(cd, mcodeptr,
3569                                                                                 PATCHER_checkcast_instanceof_interface,
3570                                                                                 (constant_classref *) iptr->target, 0);
3571
3572                                         if (opt_showdisassemble)
3573                                                 M_NOP;
3574                                 }
3575
3576                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3577                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3578                                 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3579                                 M_BLEZ(REG_ITMP3, 2);
3580                                 M_ALD(REG_ITMP1, REG_ITMP1,
3581                                           (s4) (OFFSET(vftbl_t, interfacetable[0]) -
3582                                                         superindex * sizeof(methodptr*)));
3583                                 M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3584
3585                                 if (!super)
3586                                         M_BR(s3);
3587                         }
3588
3589                         /* class instanceof code */
3590
3591                         if (!super || !(super->flags & ACC_INTERFACE)) {
3592                                 disp = dseg_addaddress(cd, supervftbl);
3593
3594                                 if (super) {
3595                                         M_CLR(d);
3596                                         M_BEQZ(s1, s3);
3597
3598                                 } else {
3599                                         codegen_addpatchref(cd, mcodeptr,
3600                                                                                 PATCHER_checkcast_instanceof_class,
3601                                                                                 (constant_classref *) iptr->target,
3602                                                                                 disp);
3603
3604                                         if (opt_showdisassemble)
3605                                                 M_NOP;
3606                                 }
3607
3608                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3609                                 M_ALD(REG_ITMP2, REG_PV, disp);
3610 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3611                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3612 #endif
3613                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3614                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3615                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3616 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3617                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3618 #endif
3619                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3620                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3621                         }
3622                         store_reg_to_var_int(iptr->dst, d);
3623                         }
3624                         break;
3625
3626                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3627                                       /* op1 = dimension, val.a = class               */
3628
3629                         /* check for negative sizes and copy sizes to stack if necessary  */
3630
3631                         MCODECHECK((iptr->op1 << 1) + 64);
3632
3633                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3634                                 /* copy SAVEDVAR sizes to stack */
3635
3636                                 if (src->varkind != ARGVAR) {
3637                                         var_to_reg_int(s2, src, REG_ITMP1);
3638                                         M_LST(s2, REG_SP, s1 * 8);
3639                                 }
3640                         }
3641
3642                         /* a0 = dimension count */
3643
3644                         ICONST(rd->argintregs[0], iptr->op1);
3645
3646                         /* is patcher function set? */
3647
3648                         if (iptr->val.a == NULL) {
3649                                 disp = dseg_addaddress(cd, 0);
3650
3651                                 codegen_addpatchref(cd, mcodeptr,
3652                                                                         PATCHER_builtin_multianewarray,
3653                                                                         (constant_classref *) iptr->target,
3654                                                                         disp);
3655
3656                                 if (opt_showdisassemble)
3657                                         M_NOP;
3658
3659                         } else {
3660                                 disp = dseg_addaddress(cd, iptr->val.a);
3661                         }
3662
3663                         /* a1 = arraydescriptor */
3664
3665                         M_ALD(rd->argintregs[1], REG_PV, disp);
3666
3667                         /* a2 = pointer to dimensions = stack pointer */
3668
3669                         M_INTMOVE(REG_SP, rd->argintregs[2]);
3670
3671                         disp = dseg_addaddress(cd, BUILTIN_multianewarray);
3672                         M_ALD(REG_PV, REG_PV, disp);
3673                         M_JSR(REG_RA, REG_PV);
3674                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3675                         M_LDA(REG_PV, REG_RA, -disp);
3676
3677                         /* check for exception before result assignment */
3678
3679                         M_BEQZ(REG_RESULT, 0);
3680                         codegen_addxexceptionrefs(cd, mcodeptr);
3681
3682                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
3683                         M_INTMOVE(REG_RESULT, d);
3684                         store_reg_to_var_int(iptr->dst, d);
3685                         break;
3686
3687                 default:
3688                         *exceptionptr =
3689                                 new_internalerror("Unknown ICMD %d", iptr->opc);
3690                         return false;
3691         } /* switch */
3692
3693         } /* for instruction */
3694
3695         /* copy values to interface registers */
3696
3697         src = bptr->outstack;
3698         len = bptr->outdepth;
3699         MCODECHECK(64+len);
3700 #if defined(ENABLE_LSRA)
3701         if (!opt_lsra)
3702 #endif
3703         while (src) {
3704                 len--;
3705                 if ((src->varkind != STACKVAR)) {
3706                         s2 = src->type;
3707                         if (IS_FLT_DBL_TYPE(s2)) {
3708                                 var_to_reg_flt(s1, src, REG_FTMP1);
3709                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3710                                         M_FLTMOVE(s1,rd->interfaces[len][s2].regoff);
3711                                         }
3712                                 else {
3713                                         M_DST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3714                                         }
3715                                 }
3716                         else {
3717                                 var_to_reg_int(s1, src, REG_ITMP1);
3718                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3719                                         M_INTMOVE(s1,rd->interfaces[len][s2].regoff);
3720                                         }
3721                                 else {
3722                                         M_LST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3723                                         }
3724                                 }
3725                         }
3726                 src = src->prev;
3727                 }
3728         } /* if (bptr -> flags >= BBREACHED) */
3729         } /* for basic block */
3730
3731         dseg_createlinenumbertable(cd);
3732
3733         {
3734
3735         s4 *xcodeptr = NULL;
3736         branchref *bref;
3737
3738         /* generate ArithmeticException stubs */
3739
3740         for (bref = cd->xdivrefs; bref != NULL; bref = bref->next) {
3741                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3742                                   bref->branchpos,
3743                                                   (u1 *) mcodeptr - cd->mcodebase);
3744
3745                 MCODECHECK(100);
3746
3747                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3748
3749                 if (xcodeptr != NULL) {
3750                         disp = xcodeptr - mcodeptr - 1;
3751                         M_BR(disp);
3752
3753                 } else {
3754                         xcodeptr = mcodeptr;
3755
3756                         M_MOV(REG_PV, rd->argintregs[0]);
3757                         M_MOV(REG_SP, rd->argintregs[1]);
3758                         M_ALD(rd->argintregs[2],
3759                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3760                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3761
3762                         M_LDA(REG_SP, REG_SP, -1 * 8);
3763                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3764
3765                         disp = dseg_addaddress(cd, stacktrace_inline_arithmeticexception);
3766                         M_ALD(REG_PV, REG_PV, disp);
3767                         M_JSR(REG_RA, REG_PV);
3768                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3769                         M_LDA(REG_PV, REG_RA, -disp);
3770
3771                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3772
3773                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3774                         M_LDA(REG_SP, REG_SP, 1 * 8);
3775
3776                         disp = dseg_addaddress(cd, asm_handle_exception);
3777                         M_ALD(REG_ITMP3, REG_PV, disp);
3778                         M_JMP(REG_ZERO, REG_ITMP3);
3779                 }
3780         }
3781
3782         /* generate ArrayIndexOutOfBoundsException stubs */
3783
3784         xcodeptr = NULL;
3785
3786         for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3787                 gen_resolvebranch((u1*) cd->mcodebase + bref->branchpos,
3788                                   bref->branchpos,
3789                                                   (u1*) mcodeptr - cd->mcodebase);
3790
3791                 MCODECHECK(100);
3792
3793                 /* move index register into REG_ITMP1 */
3794
3795                 M_MOV(bref->reg, REG_ITMP1);
3796                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3797
3798                 if (xcodeptr != NULL) {
3799                         disp = xcodeptr - mcodeptr - 1;
3800                         M_BR(disp);
3801
3802                 } else {
3803                         xcodeptr = mcodeptr;
3804
3805                         M_MOV(REG_PV, rd->argintregs[0]);
3806                         M_MOV(REG_SP, rd->argintregs[1]);
3807
3808                         if (m->isleafmethod)
3809                                 M_MOV(REG_RA, rd->argintregs[2]);
3810                         else
3811                                 M_ALD(rd->argintregs[2],
3812                                           REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3813
3814                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3815                         M_MOV(REG_ITMP1, rd->argintregs[4]);
3816
3817                         M_LDA(REG_SP, REG_SP, -2 * 8);
3818                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3819
3820                         if (m->isleafmethod)
3821                                 M_AST(REG_RA, REG_SP, 1 * 8);
3822
3823                         disp = dseg_addaddress(cd, stacktrace_inline_arrayindexoutofboundsexception);
3824                         M_ALD(REG_PV, REG_PV, disp);
3825                         M_JSR(REG_RA, REG_PV);
3826                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3827                         M_LDA(REG_PV, REG_RA, -disp);
3828
3829                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3830
3831                         if (m->isleafmethod)
3832                                 M_ALD(REG_RA, REG_SP, 1 * 8);
3833
3834                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3835                         M_LDA(REG_SP, REG_SP, 2 * 8);
3836
3837                         disp = dseg_addaddress(cd, asm_handle_exception);
3838                         M_ALD(REG_ITMP3, REG_PV, disp);
3839                         M_JMP(REG_ZERO, REG_ITMP3);
3840                 }
3841         }
3842
3843         /* generate ArrayStoreException stubs */
3844
3845         xcodeptr = NULL;
3846
3847         for (bref = cd->xstorerefs; bref != NULL; bref = bref->next) {
3848                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3849                                   bref->branchpos,
3850                                                   (u1 *) mcodeptr - cd->mcodebase);
3851
3852                 MCODECHECK(100);
3853
3854                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3855
3856                 if (xcodeptr != NULL) {
3857                         disp = xcodeptr - mcodeptr - 1;
3858                         M_BR(disp);
3859
3860                 } else {
3861                         xcodeptr = mcodeptr;
3862
3863                         M_MOV(REG_PV, rd->argintregs[0]);
3864                         M_MOV(REG_SP, rd->argintregs[1]);
3865                         M_ALD(rd->argintregs[2],
3866                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3867                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3868
3869                         M_LDA(REG_SP, REG_SP, -1 * 8);
3870                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3871
3872                         disp = dseg_addaddress(cd, stacktrace_inline_arraystoreexception);
3873                         M_ALD(REG_PV, REG_PV, disp);
3874                         M_JSR(REG_RA, REG_PV);
3875                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3876                         M_LDA(REG_PV, REG_RA, -disp);
3877
3878                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3879
3880                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3881                         M_LDA(REG_SP, REG_SP, 1 * 8);
3882
3883                         disp = dseg_addaddress(cd, asm_handle_exception);
3884                         M_ALD(REG_ITMP3, REG_PV, disp);
3885                         M_JMP(REG_ZERO, REG_ITMP3);
3886                 }
3887         }
3888
3889         /* generate ClassCastException stubs */
3890
3891         xcodeptr = NULL;
3892
3893         for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3894                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3895                                   bref->branchpos,
3896                                                   (u1 *) mcodeptr - cd->mcodebase);
3897
3898                 MCODECHECK(100);
3899
3900                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3901
3902                 if (xcodeptr != NULL) {
3903                         disp = xcodeptr - mcodeptr - 1;
3904                         M_BR(disp);
3905
3906                 } else {
3907                         xcodeptr = mcodeptr;
3908
3909                         M_MOV(REG_PV, rd->argintregs[0]);
3910                         M_MOV(REG_SP, rd->argintregs[1]);
3911
3912                         if (m->isleafmethod)
3913                                 M_MOV(REG_RA, rd->argintregs[2]);
3914                         else
3915                                 M_ALD(rd->argintregs[2],
3916                                           REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3917
3918                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3919
3920                         M_LDA(REG_SP, REG_SP, -2 * 8);
3921                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3922
3923                         if (m->isleafmethod)
3924                                 M_AST(REG_RA, REG_SP, 1 * 8);
3925
3926                         disp = dseg_addaddress(cd, stacktrace_inline_classcastexception);
3927                         M_ALD(REG_PV, REG_PV, disp);
3928                         M_JSR(REG_RA, REG_PV);
3929                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3930                         M_LDA(REG_PV, REG_RA, -disp);
3931
3932                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3933
3934                         if (m->isleafmethod)
3935                                 M_ALD(REG_RA, REG_SP, 1 * 8);
3936
3937                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3938                         M_LDA(REG_SP, REG_SP, 2 * 8);
3939
3940                         disp = dseg_addaddress(cd, asm_handle_exception);
3941                         M_ALD(REG_ITMP3, REG_PV, disp);
3942                         M_JMP(REG_ZERO, REG_ITMP3);
3943                 }
3944         }
3945
3946         /* generate NullPointerException stubs */
3947
3948         xcodeptr = NULL;
3949
3950         for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
3951                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3952                                   bref->branchpos,
3953                                                   (u1 *) mcodeptr - cd->mcodebase);
3954
3955                 MCODECHECK(100);
3956
3957                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3958
3959                 if (xcodeptr != NULL) {
3960                         disp = xcodeptr - mcodeptr - 1;
3961                         M_BR(disp);
3962
3963                 } else {
3964                         xcodeptr = mcodeptr;
3965
3966                         M_MOV(REG_PV, rd->argintregs[0]);
3967                         M_MOV(REG_SP, rd->argintregs[1]);
3968
3969                         if (m->isleafmethod)
3970                                 M_MOV(REG_RA, rd->argintregs[2]);
3971                         else
3972                                 M_ALD(rd->argintregs[2],
3973                                           REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3974
3975                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3976
3977                         M_LDA(REG_SP, REG_SP, -2 * 8);
3978                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3979
3980                         if (m->isleafmethod)
3981                                 M_AST(REG_RA, REG_SP, 1 * 8);
3982
3983                         disp = dseg_addaddress(cd, stacktrace_inline_nullpointerexception);
3984                         M_ALD(REG_PV, REG_PV, disp);
3985                         M_JSR(REG_RA, REG_PV);
3986                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3987                         M_LDA(REG_PV, REG_RA, -disp);
3988
3989                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3990
3991                         if (m->isleafmethod)
3992                                 M_ALD(REG_RA, REG_SP, 1 * 8);
3993
3994                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3995                         M_LDA(REG_SP, REG_SP, 2 * 8);
3996
3997                         disp = dseg_addaddress(cd, asm_handle_exception);
3998                         M_ALD(REG_ITMP3, REG_PV, disp);
3999                         M_JMP(REG_ZERO, REG_ITMP3);
4000                 }
4001         }
4002
4003         /* generate exception check stubs */
4004
4005         xcodeptr = NULL;
4006
4007         for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
4008                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4009                                   bref->branchpos,
4010                                                   (u1 *) mcodeptr - cd->mcodebase);
4011
4012                 MCODECHECK(100);
4013
4014                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
4015
4016                 if (xcodeptr != NULL) {
4017                         disp = xcodeptr - mcodeptr - 1;
4018                         M_BR(disp);
4019
4020                 } else {
4021                         xcodeptr = mcodeptr;
4022
4023                         M_MOV(REG_PV, rd->argintregs[0]);
4024                         M_MOV(REG_SP, rd->argintregs[1]);
4025                         M_ALD(rd->argintregs[2],
4026                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
4027                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
4028
4029                         M_LDA(REG_SP, REG_SP, -1 * 8);
4030                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
4031
4032                         disp = dseg_addaddress(cd, stacktrace_inline_fillInStackTrace);
4033                         M_ALD(REG_PV, REG_PV, disp);
4034                         M_JSR(REG_RA, REG_PV);
4035                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4036                         M_LDA(REG_PV, REG_RA, -disp);
4037
4038                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4039
4040                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
4041                         M_LDA(REG_SP, REG_SP, 1 * 8);
4042
4043                         disp = dseg_addaddress(cd, asm_handle_exception);
4044                         M_ALD(REG_ITMP3, REG_PV, disp);
4045                         M_JMP(REG_ZERO, REG_ITMP3);
4046                 }
4047         }
4048
4049         /* generate patcher stub call code */
4050
4051         {
4052                 patchref *pref;
4053                 u4        mcode;
4054                 s4       *tmpmcodeptr;
4055
4056                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4057                         /* check code segment size */
4058
4059                         MCODECHECK(100);
4060
4061                         /* Get machine code which is patched back in later. The call is   */
4062                         /* 1 instruction word long.                                       */
4063
4064                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4065                         mcode = *xcodeptr;
4066
4067                         /* patch in the call to call the following code (done at compile  */
4068                         /* time)                                                          */
4069
4070                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4071                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4072
4073                         M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
4074
4075                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4076
4077                         /* create stack frame */
4078
4079                         M_LSUB_IMM(REG_SP, 6 * 8, REG_SP);
4080
4081                         /* move return address onto stack */
4082
4083                         M_AST(REG_ITMP3, REG_SP, 5 * 8);
4084
4085                         /* move pointer to java_objectheader onto stack */
4086
4087 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4088                         /* create a virtual java_objectheader */
4089
4090                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4091                         disp = dseg_addaddress(cd, NULL);                   /* vftbl      */
4092
4093                         M_LDA(REG_ITMP3, REG_PV, disp);
4094                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
4095 #else
4096                         /* do nothing */
4097 #endif
4098
4099                         /* move machine code onto stack */
4100
4101                         disp = dseg_adds4(cd, mcode);
4102                         M_ILD(REG_ITMP3, REG_PV, disp);
4103                         M_IST(REG_ITMP3, REG_SP, 3 * 8);
4104
4105                         /* move class/method/field reference onto stack */
4106
4107                         disp = dseg_addaddress(cd, pref->ref);
4108                         M_ALD(REG_ITMP3, REG_PV, disp);
4109                         M_AST(REG_ITMP3, REG_SP, 2 * 8);
4110
4111                         /* move data segment displacement onto stack */
4112
4113                         disp = dseg_adds4(cd, pref->disp);
4114                         M_ILD(REG_ITMP3, REG_PV, disp);
4115                         M_IST(REG_ITMP3, REG_SP, 1 * 8);
4116
4117                         /* move patcher function pointer onto stack */
4118
4119                         disp = dseg_addaddress(cd, pref->patcher);
4120                         M_ALD(REG_ITMP3, REG_PV, disp);
4121                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4122
4123                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
4124                         M_ALD(REG_ITMP3, REG_PV, disp);
4125                         M_JMP(REG_ZERO, REG_ITMP3);
4126                 }
4127         }
4128         }
4129
4130         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4131
4132         /* everything's ok */
4133
4134         return true;
4135 }
4136
4137
4138 /* createcompilerstub **********************************************************
4139
4140    Creates a stub routine which calls the compiler.
4141
4142 *******************************************************************************/
4143
4144 #define COMPSTUBSIZE    3
4145
4146 u1 *createcompilerstub(methodinfo *m)
4147 {
4148         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
4149         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
4150
4151                                             /* code for the stub                  */
4152         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
4153         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
4154                                                in reg 0 is used as method pointer */
4155         s[1] = (ptrint) m;                  /* literals to be adressed            */
4156         s[2] = (ptrint) asm_call_jit_compiler; /* jump directly via PV from above */
4157
4158 #if defined(ENABLE_STATISTICS)
4159         if (opt_stat)
4160                 count_cstub_len += COMPSTUBSIZE * 8;
4161 #endif
4162
4163         return (u1 *) s;
4164 }
4165
4166
4167 /* createnativestub ************************************************************
4168
4169    Creates a stub routine which calls a native method.
4170
4171 *******************************************************************************/
4172
4173 u1 *createnativestub(functionptr f, methodinfo *m, codegendata *cd,
4174                                          registerdata *rd, methoddesc *nmd)
4175 {
4176         s4         *mcodeptr;               /* code generation pointer            */
4177         s4          stackframesize;         /* size of stackframe if needed       */
4178         methoddesc *md;
4179         s4          nativeparams;
4180         s4          i, j;                   /* count variables                    */
4181         s4          t;
4182         s4          s1, s2, disp;
4183         s4          funcdisp;               /* displacement of the function       */
4184
4185         /* initialize variables */
4186
4187         md = m->parseddesc;
4188         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
4189
4190
4191         /* calculate stack frame size */
4192
4193         stackframesize =
4194                 1 +                             /* return address                     */
4195                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
4196                 sizeof(localref_table) / SIZEOF_VOID_P +
4197                 1 +                             /* methodinfo for call trace          */
4198                 (md->paramcount > INT_ARG_CNT ? INT_ARG_CNT : md->paramcount) +
4199                 nmd->memuse;
4200
4201
4202         /* create method header */
4203
4204         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
4205         (void) dseg_adds4(cd, stackframesize * 8);              /* FrameSize      */
4206         (void) dseg_adds4(cd, 0);                               /* IsSync         */
4207         (void) dseg_adds4(cd, 0);                               /* IsLeaf         */
4208         (void) dseg_adds4(cd, 0);                               /* IntSave        */
4209         (void) dseg_adds4(cd, 0);                               /* FltSave        */
4210         (void) dseg_addlinenumbertablesize(cd);
4211         (void) dseg_adds4(cd, 0);                               /* ExTableSize    */
4212
4213
4214         /* initialize mcode variables */
4215
4216         mcodeptr = (s4 *) cd->mcodeptr;
4217
4218
4219         /* generate stub code */
4220
4221         M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4222         M_AST(REG_RA, REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4223
4224
4225         /* call trace function */
4226
4227         if (runverbose) {
4228                 /* save integer argument registers */
4229
4230                 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++) {
4231                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4232                                 M_LST(rd->argintregs[i], REG_SP, j * 8);
4233                                 j++;
4234                         }
4235                 }
4236
4237                 /* save and copy float arguments into integer registers */
4238
4239                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4240                         t = md->paramtypes[i].type;
4241
4242                         if (IS_FLT_DBL_TYPE(t)) {
4243                                 if (IS_2_WORD_TYPE(t)) {
4244                                         M_DST(rd->argfltregs[i], REG_SP, j * 8);
4245                                         M_LLD(rd->argintregs[i], REG_SP, j * 8);
4246                                 } else {
4247                                         M_FST(rd->argfltregs[i], REG_SP, j * 8);
4248                                         M_ILD(rd->argintregs[i], REG_SP, j * 8);
4249                                 }
4250                                 j++;
4251                         }
4252                 }
4253
4254                 disp = dseg_addaddress(cd, m);
4255                 M_ALD(REG_ITMP1, REG_PV, disp);
4256                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
4257                 disp = dseg_addaddress(cd, builtin_trace_args);
4258                 M_ALD(REG_PV, REG_PV, disp);
4259                 M_JSR(REG_RA, REG_PV);
4260                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4261                 M_LDA(REG_PV, REG_RA, -disp);
4262
4263                 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++) {
4264                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4265                                 M_LLD(rd->argintregs[i], REG_SP, j * 8);
4266                                 j++;
4267                         }
4268                 }
4269
4270                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4271                         t = md->paramtypes[i].type;
4272
4273                         if (IS_FLT_DBL_TYPE(t)) {
4274                                 if (IS_2_WORD_TYPE(t)) {
4275                                         M_DLD(rd->argfltregs[i], REG_SP, j * 8);
4276                                 } else {
4277                                         M_FLD(rd->argfltregs[i], REG_SP, j * 8);
4278                                 }
4279                                 j++;
4280                         }
4281                 }
4282         }
4283
4284         /* get function address (this must happen before the stackframeinfo) */
4285
4286         funcdisp = dseg_addaddress(cd, f);
4287
4288 #if !defined(ENABLE_STATICVM)
4289         if (f == NULL) {
4290                 codegen_addpatchref(cd, mcodeptr, PATCHER_resolve_native, m, funcdisp);
4291
4292                 if (opt_showdisassemble)
4293                         M_NOP;
4294         }
4295 #endif
4296
4297         /* save integer and float argument registers */
4298
4299         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
4300                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4301                         M_LST(rd->argintregs[i], REG_SP, j * 8);
4302                         j++;
4303                 }
4304         }
4305
4306         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4307                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
4308                         M_DST(rd->argfltregs[i], REG_SP, j * 8);
4309                         j++;
4310                 }
4311         }
4312
4313         /* prepare data structures for native function call */
4314
4315         M_LDA(rd->argintregs[0], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4316         M_MOV(REG_PV, rd->argintregs[1]);
4317         M_LDA(rd->argintregs[2], REG_SP, stackframesize * 8);
4318         M_ALD(rd->argintregs[3], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4319         disp = dseg_addaddress(cd, codegen_start_native_call);
4320         M_ALD(REG_PV, REG_PV, disp);
4321         M_JSR(REG_RA, REG_PV);
4322         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4323         M_LDA(REG_PV, REG_RA, -disp);
4324
4325         /* restore integer and float argument registers */
4326
4327         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
4328                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4329                         M_LLD(rd->argintregs[i], REG_SP, j * 8);
4330                         j++;
4331                 }
4332         }
4333
4334         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4335                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
4336                         M_DLD(rd->argfltregs[i], REG_SP, j * 8);
4337                         j++;
4338                 }
4339         }
4340
4341         /* copy or spill arguments to new locations */
4342
4343         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
4344                 t = md->paramtypes[i].type;
4345
4346                 if (IS_INT_LNG_TYPE(t)) {
4347                         if (!md->params[i].inmemory) {
4348                                 s1 = rd->argintregs[md->params[i].regoff];
4349
4350                                 if (!nmd->params[j].inmemory) {
4351                                         s2 = rd->argintregs[nmd->params[j].regoff];
4352                                         M_INTMOVE(s1, s2);
4353
4354                                 } else {
4355                                         s2 = nmd->params[j].regoff;
4356                                         M_LST(s1, REG_SP, s2 * 8);
4357                                 }
4358
4359                         } else {
4360                                 s1 = md->params[i].regoff + stackframesize;
4361                                 s2 = nmd->params[j].regoff;
4362                                 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
4363                                 M_LST(REG_ITMP1, REG_SP, s2 * 8);
4364                         }
4365
4366                 } else {
4367                         if (!md->params[i].inmemory) {
4368                                 s1 = rd->argfltregs[md->params[i].regoff];
4369
4370                                 if (!nmd->params[j].inmemory) {
4371                                         s2 = rd->argfltregs[nmd->params[j].regoff];
4372                                         M_FLTMOVE(s1, s2);
4373
4374                                 } else {
4375                                         s2 = nmd->params[j].regoff;
4376                                         if (IS_2_WORD_TYPE(t))
4377                                                 M_DST(s1, REG_SP, s2 * 8);
4378                                         else
4379                                                 M_FST(s1, REG_SP, s2 * 8);
4380                                 }
4381
4382                         } else {
4383                                 s1 = md->params[i].regoff + stackframesize;
4384                                 s2 = nmd->params[j].regoff;
4385                                 M_DLD(REG_FTMP1, REG_SP, s1 * 8);
4386                                 if (IS_2_WORD_TYPE(t))
4387                                         M_DST(REG_FTMP1, REG_SP, s2 * 8);
4388                                 else
4389                                         M_FST(REG_FTMP1, REG_SP, s2 * 8);
4390                         }
4391                 }
4392         }
4393
4394         /* put class into second argument register */
4395
4396         if (m->flags & ACC_STATIC) {
4397                 disp = dseg_addaddress(cd, m->class);
4398                 M_ALD(rd->argintregs[1], REG_PV, disp);
4399         }
4400
4401         /* put env into first argument register */
4402
4403         disp = dseg_addaddress(cd, &env);
4404         M_ALD(rd->argintregs[0], REG_PV, disp);
4405
4406         /* do the native function call */
4407
4408         M_ALD(REG_PV, REG_PV, funcdisp);
4409         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4410         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4411         M_LDA(REG_PV, REG_RA, -disp);       /* recompute pv from ra               */
4412
4413         /* save return value */
4414
4415         if (IS_INT_LNG_TYPE(md->returntype.type))
4416                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4417         else
4418                 M_DST(REG_FRESULT, REG_SP, 0 * 8);
4419
4420         /* remove native stackframe info */
4421
4422         M_LDA(rd->argintregs[0], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4423         disp = dseg_addaddress(cd, codegen_finish_native_call);
4424         M_ALD(REG_PV, REG_PV, disp);
4425         M_JSR(REG_RA, REG_PV);
4426         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4427         M_LDA(REG_PV, REG_RA, -disp);
4428
4429         /* call finished trace */
4430
4431         if (runverbose) {
4432                 /* just restore the value we need, don't care about the other */
4433
4434                 if (IS_INT_LNG_TYPE(md->returntype.type))
4435                         M_LLD(REG_RESULT, REG_SP, 0 * 8);
4436                 else
4437                         M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4438
4439                 disp = dseg_addaddress(cd, m);
4440                 M_ALD(rd->argintregs[0], REG_PV, disp);
4441
4442                 M_MOV(REG_RESULT, rd->argintregs[1]);
4443                 M_FMOV(REG_FRESULT, rd->argfltregs[2]);
4444                 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
4445
4446                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
4447                 M_ALD(REG_PV, REG_PV, disp);
4448                 M_JSR(REG_RA, REG_PV);
4449                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4450                 M_LDA(REG_PV, REG_RA, -disp);
4451         }
4452
4453         /* check for exception */
4454
4455 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4456         disp = dseg_addaddress(cd, builtin_get_exceptionptrptr);
4457         M_ALD(REG_PV, REG_PV, disp);
4458         M_JSR(REG_RA, REG_PV);
4459         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4460         M_LDA(REG_PV, REG_RA, -disp);
4461         M_MOV(REG_RESULT, REG_ITMP3);
4462 #else
4463         disp = dseg_addaddress(cd, &_exceptionptr);
4464         M_ALD(REG_RESULT, REG_PV, disp);    /* get address of exceptionptr        */
4465 #endif
4466         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4467
4468         /* restore return value */
4469
4470         if (IS_INT_LNG_TYPE(md->returntype.type))
4471                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4472         else
4473                 M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4474
4475         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4476
4477         M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address   */
4478         M_LDA(REG_SP, REG_SP, stackframesize * 8);
4479         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4480
4481         /* handle exception */
4482
4483         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4484
4485         M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address   */
4486         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4487
4488         M_LDA(REG_SP, REG_SP, stackframesize * 8);
4489
4490         disp = dseg_addaddress(cd, asm_handle_nat_exception);
4491         M_ALD(REG_ITMP3, REG_PV, disp);     /* load asm exception handler address */
4492         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4493
4494
4495         /* process patcher calls **************************************************/
4496
4497         {
4498                 patchref *pref;
4499                 s4       *xcodeptr;
4500                 u4        mcode;
4501                 s4       *tmpmcodeptr;
4502
4503                 /* there can only be one <clinit> ref entry                           */
4504                 pref = cd->patchrefs;
4505
4506                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4507                         /* Get machine code which is patched back in later. The call is   */
4508                         /* 1 instruction word long.                                       */
4509
4510                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4511                         mcode = (u4) *xcodeptr;
4512
4513                         /* patch in the call to call the following code (done at compile  */
4514                         /* time)                                                          */
4515
4516                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4517                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4518
4519                         M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
4520
4521                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4522
4523                         /* create stack frame                                             */
4524
4525                         M_LSUB_IMM(REG_SP, 6 * 8, REG_SP);
4526
4527                         /* move return address onto stack */
4528
4529                         M_AST(REG_ITMP3, REG_SP, 5 * 8);
4530
4531                         /* move pointer to java_objectheader onto stack */
4532
4533 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4534                         /* create a virtual java_objectheader */
4535
4536                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4537                         disp = dseg_addaddress(cd, NULL);                   /* vftbl      */
4538
4539                         M_LDA(REG_ITMP3, REG_PV, disp);
4540                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
4541 #else
4542                         M_AST(REG_ZERO, REG_SP, 4 * 8);
4543 #endif
4544
4545                         /* move machine code onto stack */
4546
4547                         disp = dseg_adds4(cd, mcode);
4548                         M_ILD(REG_ITMP3, REG_PV, disp);
4549                         M_IST(REG_ITMP3, REG_SP, 3 * 8);
4550
4551                         /* move class/method/field reference onto stack */
4552
4553                         disp = dseg_addaddress(cd, pref->ref);
4554                         M_ALD(REG_ITMP3, REG_PV, disp);
4555                         M_AST(REG_ITMP3, REG_SP, 2 * 8);
4556
4557                         /* move data segment displacement onto stack */
4558
4559                         disp = dseg_adds4(cd, pref->disp);
4560                         M_ILD(REG_ITMP3, REG_PV, disp);
4561                         M_IST(REG_ITMP3, REG_SP, 1 * 8);
4562
4563                         /* move patcher function pointer onto stack */
4564
4565                         disp = dseg_addaddress(cd, pref->patcher);
4566                         M_ALD(REG_ITMP3, REG_PV, disp);
4567                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4568
4569                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
4570                         M_ALD(REG_ITMP3, REG_PV, disp);
4571                         M_JMP(REG_ZERO, REG_ITMP3);
4572                 }
4573         }
4574
4575         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4576
4577         return m->entrypoint;
4578 }
4579
4580
4581 /*
4582  * These are local overrides for various environment variables in Emacs.
4583  * Please do not remove this and leave it at the end of the file, where
4584  * Emacs will automagically detect them.
4585  * ---------------------------------------------------------------------
4586  * Local variables:
4587  * mode: c
4588  * indent-tabs-mode: t
4589  * c-basic-offset: 4
4590  * tab-width: 4
4591  * End:
4592  */