2 * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved.
3 * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved.
4 * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved.
7 * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
8 * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
10 * Permission is hereby granted to use or copy this program
11 * for any purpose, provided the above notices are retained on all copies.
12 * Permission to modify the code and to distribute modified code is granted,
13 * provided the above notices are retained, and a notice that the code was
14 * modified is included with the above copyright notice.
16 * Some of the machine specific code was borrowed from our GC distribution.
19 /* The following really assume we have a 486 or better. */
21 #include "../all_aligned_atomic_load_store.h"
23 /* Real X86 implementations, except for some old WinChips, appear */
24 /* to enforce ordering between memory operations, EXCEPT that a later */
25 /* read can pass earlier writes, presumably due to the visible */
26 /* presence of store buffers. */
27 /* We ignore both the WinChips, and the fact that the official specs */
28 /* seem to be much weaker (and arguably too weak to be usable). */
30 #include "../ordered_except_wr.h"
32 #include "../test_and_set_t_is_char.h"
34 #include "../standard_ao_double_t.h"
36 #if defined(AO_USE_PENTIUM4_INSTRS)
40 __asm__ __volatile__("mfence" : : : "memory");
43 #define AO_HAVE_nop_full
47 /* We could use the cpuid instruction. But that seems to be slower */
48 /* than the default implementation based on test_and_set_full. Thus */
49 /* we omit that bit of misinformation here. */
53 /* As far as we can tell, the lfence and sfence instructions are not */
54 /* currently needed or useful for cached memory accesses. */
56 /* Really only works for 486 and later */
58 AO_fetch_and_add_full (volatile AO_t *p, AO_t incr)
62 __asm__ __volatile__ ("lock; xaddl %0, %1" :
63 "=r" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */
68 #define AO_HAVE_fetch_and_add_full
70 AO_INLINE unsigned char
71 AO_char_fetch_and_add_full (volatile unsigned char *p, unsigned char incr)
75 __asm__ __volatile__ ("lock; xaddb %0, %1" :
76 "=q" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */
81 #define AO_HAVE_char_fetch_and_add_full
83 AO_INLINE unsigned short
84 AO_short_fetch_and_add_full (volatile unsigned short *p, unsigned short incr)
86 unsigned short result;
88 __asm__ __volatile__ ("lock; xaddw %0, %1" :
89 "=r" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */
94 #define AO_HAVE_short_fetch_and_add_full
96 /* Really only works for 486 and later */
98 AO_or_full (volatile AO_t *p, AO_t incr)
100 __asm__ __volatile__ ("lock; orl %1, %0" :
101 "=m" (*p) : "r" (incr) /* , "m" (*p) */
105 #define AO_HAVE_or_full
107 AO_INLINE AO_TS_VAL_t
108 AO_test_and_set_full(volatile AO_TS_t *addr)
111 /* Note: the "xchg" instruction does not need a "lock" prefix */
112 /* Note 2: "xchgb" is not recognized by Sun CC assembler yet. */
113 __asm__ __volatile__("xchgl %0, %1"
114 : "=q"(oldval), "=m"(*addr)
115 : "0"(0xff) /* , "m"(*addr) */
117 return (AO_TS_VAL_t)oldval;
120 #define AO_HAVE_test_and_set_full
122 /* Returns nonzero if the comparison succeeded. */
124 AO_compare_and_swap_full(volatile AO_t *addr,
125 AO_t old, AO_t new_val)
128 __asm__ __volatile__("lock; cmpxchgl %2, %0; setz %1"
129 : "=m"(*addr), "=q"(result)
130 : "r" (new_val), "a"(old) : "memory");
134 #define AO_HAVE_compare_and_swap_full
136 /* Returns nonzero if the comparison succeeded. */
137 /* Really requires at least a Pentium. */
139 AO_compare_double_and_swap_double_full(volatile AO_double_t *addr,
140 AO_t old_val1, AO_t old_val2,
141 AO_t new_val1, AO_t new_val2)
144 /* FIXME: not tested */
146 /* If PIC is turned on, we can't use %ebx as it is reserved for the
147 GOT pointer. We can save and restore %ebx because GCC won't be
148 using it for anything else (such as any of the m operands) */
149 __asm__ __volatile__("pushl %%ebx;" /* save ebx used for PIC GOT ptr */
150 "movl %6,%%ebx;" /* move new_val2 to %ebx */
151 "lock; cmpxchg8b %0; setz %1;"
152 "pop %%ebx;" /* restore %ebx */
153 : "=m"(*addr), "=q"(result)
154 : "m"(*addr), "d" (old_val2), "a" (old_val1),
155 "c" (new_val2), "m" (new_val1) : "memory");
157 /* We can't just do the same thing in non-PIC mode, because GCC
158 * might be using %ebx as the memory operand. We could have ifdef'd
159 * in a clobber, but there's no point doing the push/pop if we don't
161 __asm__ __volatile__("lock; cmpxchg8b %0; setz %1;"
162 : "=m"(*addr), "=q"(result)
163 : /* "m"(*addr), */ "d" (old_val2), "a" (old_val1),
164 "c" (new_val2), "b" (new_val1) : "memory");
169 #define AO_HAVE_compare_double_and_swap_double_full
171 #include "../ao_t_is_int.h"