src/mm/boehm-gc/libatomic_ops-1.2/src/atomic_ops/sysdeps/hpc/ia64.h

   1 /*
   2  * Copyright (c) 2003 Hewlett-Packard Development Company, L.P.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a copy
   5  * of this software and associated documentation files (the "Software"), to deal
   6  * in the Software without restriction, including without limitation the rights
   7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   8  * copies of the Software, and to permit persons to whom the Software is
   9  * furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  17  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  19  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 /*
  24  * This file specifies Itanimum primitives for use with the HP compiler
  25  * under HP/UX.  We use intrinsics instead of the inline assembly code in the
  26  * gcc file.
  27  */
  28
  29 #include "../all_atomic_load_store.h"
  30
  31 #include "../all_acquire_release_volatile.h"
  32
  33 #include "../test_and_set_t_is_char.h"
  34
  35 #include <machine/sys/inline.h>
  36
  37 #ifdef __LP64__
  38 # define AO_T_FASIZE _FASZ_D
  39 # define AO_T_SIZE _SZ_D
  40 #else
  41 # define AO_T_FASIZE _FASZ_W
  42 # define AO_T_SIZE _SZ_W
  43 #endif
  44
  45 AO_INLINE void
  46 AO_nop_full(void)
  47 {
  48   _Asm_mf();
  49 }
  50 #define AO_HAVE_nop_full
  51
  52 AO_INLINE AO_t
  53 AO_fetch_and_add1_acquire (volatile AO_t *p)
  54 {
  55   return _Asm_fetchadd(AO_T_FASIZE, _SEM_ACQ, p, 1,
  56                        _LDHINT_NONE, _DOWN_MEM_FENCE);
  57 }
  58 #define AO_HAVE_fetch_and_add1_acquire
  59
  60 AO_INLINE AO_t
  61 AO_fetch_and_add1_release (volatile AO_t *p)
  62 {
  63   return _Asm_fetchadd(AO_T_FASIZE, _SEM_REL, p, 1,
  64                        _LDHINT_NONE, _UP_MEM_FENCE);
  65 }
  66
  67 #define AO_HAVE_fetch_and_add1_release
  68
  69 AO_INLINE AO_t
  70 AO_fetch_and_sub1_acquire (volatile AO_t *p)
  71 {
  72   return _Asm_fetchadd(AO_T_FASIZE, _SEM_ACQ, p, -1,
  73                        _LDHINT_NONE, _DOWN_MEM_FENCE);
  74 }
  75
  76 #define AO_HAVE_fetch_and_sub1_acquire
  77
  78 AO_INLINE AO_t
  79 AO_fetch_and_sub1_release (volatile AO_t *p)
  80 {
  81   return _Asm_fetchadd(AO_T_FASIZE, _SEM_REL, p, -1,
  82                        _LDHINT_NONE, _UP_MEM_FENCE);
  83 }
  84
  85 #define AO_HAVE_fetch_and_sub1_release
  86
  87 AO_INLINE int
  88 AO_compare_and_swap_acquire(volatile AO_t *addr,
  89                              AO_t old, AO_t new_val)
  90 {
  91   AO_t oldval;
  92
  93   _Asm_mov_to_ar(_AREG_CCV, old, _DOWN_MEM_FENCE);
  94   oldval = _Asm_cmpxchg(AO_T_SIZE, _SEM_ACQ, addr,
  95                         new_val, _LDHINT_NONE, _DOWN_MEM_FENCE);
  96   return (oldval == old);
  97 }
  98
  99 #define AO_HAVE_compare_and_swap_acquire
 100
 101 AO_INLINE int
 102 AO_compare_and_swap_release(volatile AO_t *addr,
 103                              AO_t old, AO_t new_val)
 104 {
 105   AO_t oldval;
 106   _Asm_mov_to_ar(_AREG_CCV, old, _UP_MEM_FENCE);
 107   oldval = _Asm_cmpxchg(AO_T_SIZE, _SEM_REL, addr,
 108                         new_val, _LDHINT_NONE, _UP_MEM_FENCE);
 109   /* Hopefully the compiler knows not to reorder the above two? */
 110   return (oldval == old);
 111 }
 112
 113 #define AO_HAVE_compare_and_swap_release
 114
 115 AO_INLINE int
 116 AO_char_compare_and_swap_acquire(volatile unsigned char *addr,
 117                                  unsigned char old, unsigned char new_val)
 118 {
 119   unsigned char oldval;
 120
 121   _Asm_mov_to_ar(_AREG_CCV, old, _DOWN_MEM_FENCE);
 122   oldval = _Asm_cmpxchg(_SZ_B, _SEM_ACQ, addr,
 123                         new_val, _LDHINT_NONE, _DOWN_MEM_FENCE);
 124   return (oldval == old);
 125 }
 126
 127 #define AO_HAVE_char_compare_and_swap_acquire
 128
 129 AO_INLINE int
 130 AO_char_compare_and_swap_release(volatile unsigned char *addr,
 131                                  unsigned char old, unsigned char new_val)
 132 {
 133   unsigned char oldval;
 134   _Asm_mov_to_ar(_AREG_CCV, old, _UP_MEM_FENCE);
 135   oldval = _Asm_cmpxchg(_SZ_B, _SEM_REL, addr,
 136                         new_val, _LDHINT_NONE, _UP_MEM_FENCE);
 137   /* Hopefully the compiler knows not to reorder the above two? */
 138   return (oldval == old);
 139 }
 140
 141 #define AO_HAVE_char_compare_and_swap_release
 142
 143 AO_INLINE int
 144 AO_short_compare_and_swap_acquire(volatile unsigned short *addr,
 145                                  unsigned short old, unsigned short new_val)
 146 {
 147   unsigned short oldval;
 148
 149   _Asm_mov_to_ar(_AREG_CCV, old, _DOWN_MEM_FENCE);
 150   oldval = _Asm_cmpxchg(_SZ_B, _SEM_ACQ, addr,
 151                         new_val, _LDHINT_NONE, _DOWN_MEM_FENCE);
 152   return (oldval == old);
 153 }
 154
 155 #define AO_HAVE_short_compare_and_swap_acquire
 156
 157 AO_INLINE int
 158 AO_short_compare_and_swap_release(volatile unsigned short *addr,
 159                                  unsigned short old, unsigned short new_val)
 160 {
 161   unsigned short oldval;
 162   _Asm_mov_to_ar(_AREG_CCV, old, _UP_MEM_FENCE);
 163   oldval = _Asm_cmpxchg(_SZ_B, _SEM_REL, addr,
 164                         new_val, _LDHINT_NONE, _UP_MEM_FENCE);
 165   /* Hopefully the compiler knows not to reorder the above two? */
 166   return (oldval == old);
 167 }
 168
 169 #define AO_HAVE_short_compare_and_swap_release
 170
 171 #ifndef __LP64__
 172 # include "../ao_t_is_int.h"
 173 #endif
 174