jit/alpha/codegen.c

   1 /* jit/alpha/codegen.c - machine code generator for alpha
   2
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
   4    Institut f. Computersprachen, TU Wien
   5    R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
   6    S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
   7    J. Wenninger
   8
   9    This file is part of CACAO.
  10
  11    This program is free software; you can redistribute it and/or
  12    modify it under the terms of the GNU General Public License as
  13    published by the Free Software Foundation; either version 2, or (at
  14    your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful, but
  17    WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19    General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  24    02111-1307, USA.
  25
  26    Contact: cacao@complang.tuwien.ac.at
  27
  28    Authors: Andreas Krall
  29             Reinhard Grafl
  30
  31    $Id: codegen.c 963 2004-03-15 07:37:49Z jowenn $
  32
  33 */
  34
  35
  36 #include <stdio.h>
  37 #include <signal.h>
  38 #include "types.h"
  39 #include "main.h"
  40 #include "codegen.h"
  41 #include "jit.h"
  42 #include "parse.h"
  43 #include "reg.h"
  44 #include "builtin.h"
  45 #include "asmpart.h"
  46 #include "jni.h"
  47 #include "loader.h"
  48 #include "tables.h"
  49 #include "native.h"
  50 #include "main.h"
  51
  52 /* include independent code generation stuff */
  53 #include "codegen.inc"
  54 #include "reg.inc"
  55
  56
  57 /* *****************************************************************************
  58
  59 Datatypes and Register Allocations:
  60 -----------------------------------
  61
  62 On 64-bit-machines (like the Alpha) all operands are stored in the
  63 registers in a 64-bit form, even when the correspondig JavaVM  operands
  64 only need 32 bits. This is done by a canonical representation:
  65
  66 32-bit integers are allways stored as sign-extended 64-bit values (this
  67 approach is directly supported by the Alpha architecture and is very easy
  68 to implement).
  69
  70 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  71 expanding the exponent and mantissa with zeroes. (also supported by the
  72 architecture)
  73
  74
  75 Stackframes:
  76
  77 The calling conventions and the layout of the stack is  explained in detail
  78 in the documention file: calling.doc
  79
  80 *******************************************************************************/
  81
  82
  83 /* register descripton - array ************************************************/
  84
  85 /* #define REG_RES   0         reserved register for OS or code generator     */
  86 /* #define REG_RET   1         return value register                          */
  87 /* #define REG_EXC   2         exception value register (only old jit)        */
  88 /* #define REG_SAV   3         (callee) saved register                        */
  89 /* #define REG_TMP   4         scratch temporary register (caller saved)      */
  90 /* #define REG_ARG   5         argument register (caller saved)               */
  91
  92 /* #define REG_END   -1        last entry in tables */
  93
  94 int nregdescint[] = {
  95         REG_RET, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
  96         REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
  97         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
  98         REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
  99         REG_END };
 100
 101 /* for use of reserved registers, see comment above */
 102
 103 int nregdescfloat[] = {
 104         REG_RET, REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
 105         REG_SAV, REG_SAV, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 106         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
 107         REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES,
 108         REG_END };
 109
 110 /* for use of reserved registers, see comment above */
 111
 112
 113 /* parameter allocation mode */
 114
 115 int nreg_parammode = PARAMMODE_NUMBERED;
 116
 117    /* parameter-registers will be allocated by assigning the
 118       1. parameter:   int/float-reg 16
 119       2. parameter:   int/float-reg 17
 120       3. parameter:   int/float-reg 18 ....
 121    */
 122
 123
 124 /* stackframe-infos ***********************************************************/
 125
 126 int parentargs_base; /* offset in stackframe for the parameter from the caller*/
 127
 128 /* -> see file 'calling.doc' */
 129
 130
 131 /* additional functions and macros to generate code ***************************/
 132
 133 /* #define BlockPtrOfPC(pc)        block+block_index[pc] */
 134 #define BlockPtrOfPC(pc)  ((basicblock *) iptr->target)
 135
 136
 137 #ifdef STATISTICS
 138 #define COUNT_SPILLS count_spills++
 139 #else
 140 #define COUNT_SPILLS
 141 #endif
 142
 143
 144 /* gen_nullptr_check(objreg) */
 145
 146 #define gen_nullptr_check(objreg) \
 147     if (checknull) { \
 148         M_BEQZ((objreg), 0); \
 149         codegen_addxnullrefs(mcodeptr); \
 150     }
 151
 152
 153 /* MCODECHECK(icnt) */
 154
 155 #define MCODECHECK(icnt) \
 156         if((mcodeptr + (icnt)) > mcodeend) mcodeptr = codegen_increase((u1*) mcodeptr)
 157
 158 /* M_INTMOVE:
 159      generates an integer-move from register a to b.
 160      if a and b are the same int-register, no code will be generated.
 161 */
 162
 163 #define M_INTMOVE(a,b) if (a != b) { M_MOV(a, b); }
 164
 165
 166 /* M_FLTMOVE:
 167     generates a floating-point-move from register a to b.
 168     if a and b are the same float-register, no code will be generated
 169 */
 170
 171 #define M_FLTMOVE(a,b) if (a != b) { M_FMOV(a, b); }
 172
 173
 174 /* var_to_reg_xxx:
 175     this function generates code to fetch data from a pseudo-register
 176     into a real register.
 177     If the pseudo-register has actually been assigned to a real
 178     register, no code will be emitted, since following operations
 179     can use this register directly.
 180
 181     v: pseudoregister to be fetched from
 182     tempregnum: temporary register to be used if v is actually spilled to ram
 183
 184     return: the register number, where the operand can be found after
 185             fetching (this wil be either tempregnum or the register
 186             number allready given to v)
 187 */
 188
 189 #define var_to_reg_int(regnr,v,tempnr) { \
 190         if ((v)->flags & INMEMORY) \
 191                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 192         else regnr=(v)->regoff; \
 193 }
 194
 195
 196 #define var_to_reg_flt(regnr,v,tempnr) { \
 197         if ((v)->flags & INMEMORY) \
 198                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 199         else regnr=(v)->regoff; \
 200 }
 201
 202
 203 /* reg_of_var:
 204     This function determines a register, to which the result of an operation
 205     should go, when it is ultimatively intended to store the result in
 206     pseudoregister v.
 207     If v is assigned to an actual register, this register will be returned.
 208     Otherwise (when v is spilled) this function returns tempregnum.
 209     If not already done, regoff and flags are set in the stack location.
 210 */
 211
 212 static int reg_of_var(stackptr v, int tempregnum)
 213 {
 214         varinfo      *var;
 215
 216         switch (v->varkind) {
 217                 case TEMPVAR:
 218                         if (!(v->flags & INMEMORY))
 219                                 return(v->regoff);
 220                         break;
 221                 case STACKVAR:
 222                         var = &(interfaces[v->varnum][v->type]);
 223                         v->regoff = var->regoff;
 224                         if (!(var->flags & INMEMORY))
 225                                 return(var->regoff);
 226                         break;
 227                 case LOCALVAR:
 228                         var = &(locals[v->varnum][v->type]);
 229                         v->regoff = var->regoff;
 230                         if (!(var->flags & INMEMORY))
 231                                 return(var->regoff);
 232                         break;
 233                 case ARGVAR:
 234                         v->regoff = v->varnum;
 235                         if (IS_FLT_DBL_TYPE(v->type)) {
 236                                 if (v->varnum < fltreg_argnum) {
 237                                         v->regoff = argfltregs[v->varnum];
 238                                         return(argfltregs[v->varnum]);
 239                                         }
 240                                 }
 241                         else
 242                                 if (v->varnum < intreg_argnum) {
 243                                         v->regoff = argintregs[v->varnum];
 244                                         return(argintregs[v->varnum]);
 245                                         }
 246                         v->regoff -= intreg_argnum;
 247                         break;
 248                 }
 249         v->flags |= INMEMORY;
 250         return tempregnum;
 251 }
 252
 253
 254 /* store_reg_to_var_xxx:
 255     This function generates the code to store the result of an operation
 256     back into a spilled pseudo-variable.
 257     If the pseudo-variable has not been spilled in the first place, this
 258     function will generate nothing.
 259
 260     v ............ Pseudovariable
 261     tempregnum ... Number of the temporary registers as returned by
 262                    reg_of_var.
 263 */
 264
 265 #define store_reg_to_var_int(sptr, tempregnum) {       \
 266         if ((sptr)->flags & INMEMORY) {                    \
 267                 COUNT_SPILLS;                                  \
 268                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 269                 }                                              \
 270         }
 271
 272 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 273         if ((sptr)->flags & INMEMORY) {                    \
 274                 COUNT_SPILLS;                                  \
 275                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 276                 }                                              \
 277         }
 278
 279
 280 /* NullPointerException handlers and exception handling initialisation        */
 281
 282 typedef struct sigctx_struct {
 283
 284         long          sc_onstack;           /* sigstack state to restore          */
 285         long          sc_mask;              /* signal mask to restore             */
 286         long          sc_pc;                /* pc at time of signal               */
 287         long          sc_ps;                /* psl to retore                      */
 288         long          sc_regs[32];          /* processor regs 0 to 31             */
 289         long          sc_ownedfp;           /* fp has been used                   */
 290         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 291         unsigned long sc_fpcr;              /* floating point control register    */
 292         unsigned long sc_fp_control;        /* software fpcr                      */
 293                                             /* rest is unused                     */
 294         unsigned long sc_reserved1, sc_reserved2;
 295         unsigned long sc_ssize;
 296         char          *sc_sbase;
 297         unsigned long sc_traparg_a0;
 298         unsigned long sc_traparg_a1;
 299         unsigned long sc_traparg_a2;
 300         unsigned long sc_fp_trap_pc;
 301         unsigned long sc_fp_trigger_sum;
 302         unsigned long sc_fp_trigger_inst;
 303         unsigned long sc_retcode[2];
 304 } sigctx_struct;
 305
 306
 307 /* NullPointerException signal handler for hardware null pointer check */
 308
 309 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 310 {
 311         sigset_t nsig;
 312         int      instr;
 313         long     faultaddr;
 314
 315         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 316
 317         instr = *((int*)(sigctx->sc_pc));
 318         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 319
 320         if (faultaddr == 0) {
 321                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 322                 sigemptyset(&nsig);
 323                 sigaddset(&nsig, sig);
 324                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 325
 326                 if (!proto_java_lang_NullPointerException) {
 327                         proto_java_lang_NullPointerException =
 328                                 new_exception(string_java_lang_NullPointerException);
 329                 }
 330
 331                 sigctx->sc_regs[REG_ITMP1_XPTR] =
 332                                             (long) proto_java_lang_NullPointerException;
 333                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 334                 sigctx->sc_pc = (long) asm_handle_exception;
 335                 return;
 336
 337         } else {
 338                 faultaddr += (long) ((instr << 16) >> 16);
 339                 fprintf(stderr, "faulting address: 0x%16lx\n", faultaddr);
 340                 panic("Stack overflow");
 341         }
 342 }
 343
 344
 345 #ifdef __osf__
 346
 347 void init_exceptions(void)
 348 {
 349
 350 #else /* Linux */
 351
 352 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 353         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 354         Digital Unix this is done automatically.
 355 */
 356
 357 #include <asm/fpu.h>
 358
 359 extern unsigned long ieee_get_fp_control();
 360 extern void ieee_set_fp_control(unsigned long fp_control);
 361
 362 void init_exceptions(void)
 363 {
 364 /* initialize floating point control */
 365
 366 ieee_set_fp_control(ieee_get_fp_control()
 367                     & ~IEEE_TRAP_ENABLE_INV
 368                     & ~IEEE_TRAP_ENABLE_DZE
 369 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 370                     & ~IEEE_TRAP_ENABLE_OVF);
 371 #endif
 372
 373         /* install signal handlers we need to convert to exceptions */
 374
 375         if (!checknull) {
 376 #if defined(SIGSEGV)
 377                 signal(SIGSEGV, (void*) catch_NullPointerException);
 378 #endif
 379
 380 #if defined(SIGBUS)
 381                 signal(SIGBUS, (void*) catch_NullPointerException);
 382 #endif
 383         }
 384 }
 385
 386
 387 /* function gen_mcode **********************************************************
 388
 389         generates machine code
 390
 391 *******************************************************************************/
 392
 393 void codegen()
 394 {
 395         int  len, s1, s2, s3, d;
 396         s4   a;
 397         s4          *mcodeptr;
 398         stackptr    src;
 399         varinfo     *var;
 400         basicblock  *bptr;
 401         instruction *iptr;
 402         xtable *ex;
 403         u2 currentline=0;
 404
 405         {
 406         int p, pa, t, l, r;
 407
 408         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 409
 410         /* space to save used callee saved registers */
 411
 412         savedregs_num += (savintregcnt - maxsavintreguse);
 413         savedregs_num += (savfltregcnt - maxsavfltreguse);
 414
 415         parentargs_base = maxmemuse + savedregs_num;
 416
 417 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 418
 419         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 420                 parentargs_base++;
 421
 422 #endif
 423
 424         /* create method header */
 425
 426         (void) dseg_addaddress(method);                         /* MethodPointer  */
 427         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 428
 429 #ifdef USE_THREADS
 430
 431         /* IsSync contains the offset relative to the stack pointer for the
 432            argument of monitor_exit used in the exception handler. Since the
 433            offset could be zero and give a wrong meaning of the flag it is
 434            offset by one.
 435         */
 436
 437         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 438                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 439         else
 440
 441 #endif
 442
 443         (void) dseg_adds4(0);                                   /* IsSync         */
 444
 445         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 446         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 447         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 448
 449         (void) dseg_addlinenumbertablesize()                    /* line number table size + start*/
 450
 451         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 452
 453         /* create exception table */
 454
 455         for (ex = extable; ex != NULL; ex = ex->down) {
 456
 457 #ifdef LOOP_DEBUG
 458                 if (ex->start != NULL)
 459                         printf("adding start - %d - ", ex->start->debug_nr);
 460                 else {
 461                         printf("PANIC - start is NULL");
 462                         exit(-1);
 463                 }
 464 #endif
 465
 466                 dseg_addtarget(ex->start);
 467
 468 #ifdef LOOP_DEBUG
 469                 if (ex->end != NULL)
 470                         printf("adding end - %d - ", ex->end->debug_nr);
 471                 else {
 472                         printf("PANIC - end is NULL");
 473                         exit(-1);
 474                 }
 475 #endif
 476
 477                 dseg_addtarget(ex->end);
 478
 479 #ifdef LOOP_DEBUG
 480                 if (ex->handler != NULL)
 481                         printf("adding handler - %d\n", ex->handler->debug_nr);
 482                 else {
 483                         printf("PANIC - handler is NULL");
 484                         exit(-1);
 485                 }
 486 #endif
 487
 488                 dseg_addtarget(ex->handler);
 489
 490                 (void) dseg_addaddress(ex->catchtype);
 491                 }
 492
 493         /* initialize mcode variables */
 494
 495         mcodeptr = (s4*) mcodebase;
 496         mcodeend = (s4*) (mcodebase + mcodesize);
 497         MCODECHECK(128 + mparamcount);
 498
 499         /* create stack frame (if necessary) */
 500
 501         if (parentargs_base)
 502                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 503
 504         /* save return address and used callee saved registers */
 505
 506         p = parentargs_base;
 507         if (!isleafmethod)
 508                 {p--;  M_AST (REG_RA, REG_SP, 8*p);}
 509         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 510                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 511         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 512                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 513
 514         /* save monitorenter argument */
 515
 516 #ifdef USE_THREADS
 517         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 518                 if (method->flags & ACC_STATIC) {
 519                         p = dseg_addaddress (class);
 520                         M_ALD(REG_ITMP1, REG_PV, p);
 521                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 522                         }
 523                 else {
 524                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 525                         }
 526                 }
 527 #endif
 528
 529         /* copy argument registers to stack and call trace function with pointer
 530            to arguments on stack.
 531         */
 532
 533         if (runverbose) {
 534                 int disp;
 535                 M_LDA(REG_SP, REG_SP, -(14 * 8));
 536                 M_AST(REG_RA, REG_SP, 1 * 8);
 537
 538                 /* save integer argument registers */
 539                 for (p = 0; p < mparamcount && p < INT_ARG_CNT; p++) {
 540                         M_LST(argintregs[p], REG_SP,  (2 + p) * 8);
 541                 }
 542
 543                 /* save and copy float arguments into integer registers */
 544                 for (p = 0; p < mparamcount && p < FLT_ARG_CNT; p++) {
 545                         t = mparamtypes[p];
 546
 547                         if (IS_FLT_DBL_TYPE(t)) {
 548                                 if (IS_2_WORD_TYPE(t)) {
 549                                         M_DST(argfltregs[p], REG_SP, (8 + p) * 8);
 550                                 } else {
 551                                         M_FST(argfltregs[p], REG_SP, (8 + p) * 8);
 552                                 }
 553
 554                                 M_LLD(argintregs[p], REG_SP, (8 + p) * 8);
 555
 556                         } else {
 557                                 M_DST(argfltregs[p], REG_SP, (8 + p) * 8);
 558                         }
 559                 }
 560
 561                 p = dseg_addaddress(method);
 562                 M_ALD(REG_ITMP1, REG_PV, p);
 563                 M_AST(REG_ITMP1, REG_SP, 0);
 564                 p = dseg_addaddress((void *) builtin_trace_args);
 565                 M_ALD(REG_PV, REG_PV, p);
 566                 M_JSR(REG_RA, REG_PV);
 567                 disp = -(int)((u1 *) mcodeptr - mcodebase);
 568                 M_LDA(REG_PV, REG_RA, disp);
 569                 M_ALD(REG_RA, REG_SP, 1 * 8);
 570
 571                 for (p = 0; p < mparamcount && p < INT_ARG_CNT; p++) {
 572                         M_LLD(argintregs[p], REG_SP,  (2 + p) * 8);
 573                 }
 574
 575                 for (p = 0; p < mparamcount && p < FLT_ARG_CNT; p++) {
 576                         t = mparamtypes[p];
 577
 578                         if (IS_FLT_DBL_TYPE(t)) {
 579                                 if (IS_2_WORD_TYPE(t)) {
 580                                         M_DLD(argfltregs[p], REG_SP, (8 + p) * 8);
 581                                 } else {
 582                                         M_FLD(argfltregs[p], REG_SP, (8 + p) * 8);
 583                                 }
 584                         } else {
 585                                 M_DLD(argfltregs[p], REG_SP, (8 + p) * 8);
 586                         }
 587                 }
 588
 589                 M_LDA (REG_SP, REG_SP, 14 * 8);
 590         }
 591
 592         /* take arguments out of register or stack frame */
 593
 594         for (p = 0, l = 0; p < mparamcount; p++) {
 595                 t = mparamtypes[p];
 596                 var = &(locals[l][t]);
 597                 l++;
 598                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 599                         l++;
 600                 if (var->type < 0)
 601                         continue;
 602                 r = var->regoff;
 603                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 604                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 605                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 606                                         {M_INTMOVE (argintregs[p], r);}
 607                                 else                                 /* reg arg -> spilled    */
 608                                         M_LST (argintregs[p], REG_SP, 8 * r);
 609                                 }
 610                         else {                                   /* stack arguments       */
 611                                 pa = p - INT_ARG_CNT;
 612                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 613                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 614                                 else {                               /* stack arg -> spilled  */
 615                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 616                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 617                                         }
 618                                 }
 619                         }
 620                 else {                                       /* floating args         */
 621                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 622                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 623                                         {M_FLTMOVE (argfltregs[p], r);}
 624                                 else                                             /* reg arg -> spilled    */
 625                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 626                                 }
 627                         else {                                   /* stack arguments       */
 628                                 pa = p - FLT_ARG_CNT;
 629                                 if (!(var->flags & INMEMORY))        /* stack-arg -> register */
 630                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 631                                 else {                               /* stack-arg -> spilled  */
 632                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 633                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 634                                         }
 635                                 }
 636                         }
 637                 }  /* end for */
 638
 639         /* call trace function */
 640
 641 #if 0
 642         if (runverbose && !isleafmethod) {
 643                 M_LDA (REG_SP, REG_SP, -8);
 644                 p = dseg_addaddress (method);
 645                 M_ALD(REG_ITMP1, REG_PV, p);
 646                 M_AST(REG_ITMP1, REG_SP, 0);
 647                 p = dseg_addaddress ((void*) (builtin_trace_args));
 648                 M_ALD(REG_PV, REG_PV, p);
 649                 M_JSR(REG_RA, REG_PV);
 650                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 651                 M_LDA(REG_SP, REG_SP, 8);
 652                 }
 653 #endif
 654
 655         /* call monitorenter function */
 656
 657 #ifdef USE_THREADS
 658         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 659                 int disp;
 660                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 661                 M_ALD(REG_PV, REG_PV, p);
 662                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 663                 M_JSR(REG_RA, REG_PV);
 664                 disp = -(int)((u1*) mcodeptr - mcodebase);
 665                 M_LDA(REG_PV, REG_RA, disp);
 666                 }
 667 #endif
 668         }
 669
 670         /* end of header generation */
 671
 672         /* walk through all basic blocks */
 673         for (bptr = block; bptr != NULL; bptr = bptr->next) {
 674
 675                 bptr->mpc = (int)((u1*) mcodeptr - mcodebase);
 676
 677                 if (bptr->flags >= BBREACHED) {
 678
 679                 /* branch resolving */
 680
 681                 {
 682                 branchref *brefs;
 683                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 684                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 685                                           brefs->branchpos, bptr->mpc);
 686                         }
 687                 }
 688
 689                 /* copy interface registers to their destination */
 690
 691                 src = bptr->instack;
 692                 len = bptr->indepth;
 693                 MCODECHECK(64+len);
 694                 while (src != NULL) {
 695                         len--;
 696                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 697                                 d = reg_of_var(src, REG_ITMP1);
 698                                 M_INTMOVE(REG_ITMP1, d);
 699                                 store_reg_to_var_int(src, d);
 700                                 }
 701                         else {
 702                                 d = reg_of_var(src, REG_IFTMP);
 703                                 if ((src->varkind != STACKVAR)) {
 704                                         s2 = src->type;
 705                                         if (IS_FLT_DBL_TYPE(s2)) {
 706                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 707                                                         s1 = interfaces[len][s2].regoff;
 708                                                         M_FLTMOVE(s1,d);
 709                                                         }
 710                                                 else {
 711                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 712                                                         }
 713                                                 store_reg_to_var_flt(src, d);
 714                                                 }
 715                                         else {
 716                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 717                                                         s1 = interfaces[len][s2].regoff;
 718                                                         M_INTMOVE(s1,d);
 719                                                         }
 720                                                 else {
 721                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 722                                                         }
 723                                                 store_reg_to_var_int(src, d);
 724                                                 }
 725                                         }
 726                                 }
 727                         src = src->prev;
 728                         }
 729
 730                 /* walk through all instructions */
 731
 732                 src = bptr->instack;
 733                 len = bptr->icount;
 734                 for (iptr = bptr->iinstr;
 735                     len > 0;
 736                     src = iptr->dst, len--, iptr++) {
 737
 738         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 739
 740         if (iptr->line!=currentline) {
 741                 dseg_addlinenumber(iptr->line,mcodeptr);
 742                 currentline=iptr->line;
 743         }
 744
 745         switch (iptr->opc) {
 746
 747                 case ICMD_NOP:        /* ...  ==> ...                                 */
 748                         break;
 749
 750                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 751
 752                         var_to_reg_int(s1, src, REG_ITMP1);
 753                         M_BEQZ(s1, 0);
 754                         codegen_addxnullrefs(mcodeptr);
 755                         break;
 756
 757                 /* constant operations ************************************************/
 758
 759 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 760                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 761
 762 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 763                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 764
 765                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 766                                       /* op1 = 0, val.i = constant                    */
 767
 768                         d = reg_of_var(iptr->dst, REG_ITMP1);
 769                         ICONST(d, iptr->val.i);
 770                         store_reg_to_var_int(iptr->dst, d);
 771                         break;
 772
 773                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 774                                       /* op1 = 0, val.l = constant                    */
 775
 776                         d = reg_of_var(iptr->dst, REG_ITMP1);
 777                         LCONST(d, iptr->val.l);
 778                         store_reg_to_var_int(iptr->dst, d);
 779                         break;
 780
 781                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 782                                       /* op1 = 0, val.f = constant                    */
 783
 784                         d = reg_of_var(iptr->dst, REG_FTMP1);
 785                         a = dseg_addfloat(iptr->val.f);
 786                         M_FLD(d, REG_PV, a);
 787                         store_reg_to_var_flt(iptr->dst, d);
 788                         break;
 789
 790                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 791                                       /* op1 = 0, val.d = constant                    */
 792
 793                         d = reg_of_var(iptr->dst, REG_FTMP1);
 794                         a = dseg_adddouble(iptr->val.d);
 795                         M_DLD(d, REG_PV, a);
 796                         store_reg_to_var_flt(iptr->dst, d);
 797                         break;
 798
 799                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 800                                       /* op1 = 0, val.a = constant                    */
 801
 802                         d = reg_of_var(iptr->dst, REG_ITMP1);
 803                         if (iptr->val.a) {
 804                                 a = dseg_addaddress (iptr->val.a);
 805                                 M_ALD(d, REG_PV, a);
 806                                 }
 807                         else {
 808                                 M_INTMOVE(REG_ZERO, d);
 809                                 }
 810                         store_reg_to_var_int(iptr->dst, d);
 811                         break;
 812
 813
 814                 /* load/store operations **********************************************/
 815
 816                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 817                 case ICMD_LLOAD:      /* op1 = local variable                         */
 818                 case ICMD_ALOAD:
 819
 820                         d = reg_of_var(iptr->dst, REG_ITMP1);
 821                         if ((iptr->dst->varkind == LOCALVAR) &&
 822                             (iptr->dst->varnum == iptr->op1))
 823                                 break;
 824                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 825                         if (var->flags & INMEMORY)
 826                                 M_LLD(d, REG_SP, 8 * var->regoff);
 827                         else
 828                                 {M_INTMOVE(var->regoff,d);}
 829                         store_reg_to_var_int(iptr->dst, d);
 830                         break;
 831
 832                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 833                 case ICMD_DLOAD:      /* op1 = local variable                         */
 834
 835                         d = reg_of_var(iptr->dst, REG_FTMP1);
 836                         if ((iptr->dst->varkind == LOCALVAR) &&
 837                             (iptr->dst->varnum == iptr->op1))
 838                                 break;
 839                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 840                         if (var->flags & INMEMORY)
 841                                 M_DLD(d, REG_SP, 8 * var->regoff);
 842                         else
 843                                 {M_FLTMOVE(var->regoff,d);}
 844                         store_reg_to_var_flt(iptr->dst, d);
 845                         break;
 846
 847
 848                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 849                 case ICMD_LSTORE:     /* op1 = local variable                         */
 850                 case ICMD_ASTORE:
 851
 852                         if ((src->varkind == LOCALVAR) &&
 853                             (src->varnum == iptr->op1))
 854                                 break;
 855                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 856                         if (var->flags & INMEMORY) {
 857                                 var_to_reg_int(s1, src, REG_ITMP1);
 858                                 M_LST(s1, REG_SP, 8 * var->regoff);
 859                                 }
 860                         else {
 861                                 var_to_reg_int(s1, src, var->regoff);
 862                                 M_INTMOVE(s1, var->regoff);
 863                                 }
 864                         break;
 865
 866                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 867                 case ICMD_DSTORE:     /* op1 = local variable                         */
 868
 869                         if ((src->varkind == LOCALVAR) &&
 870                             (src->varnum == iptr->op1))
 871                                 break;
 872                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 873                         if (var->flags & INMEMORY) {
 874                                 var_to_reg_flt(s1, src, REG_FTMP1);
 875                                 M_DST(s1, REG_SP, 8 * var->regoff);
 876                                 }
 877                         else {
 878                                 var_to_reg_flt(s1, src, var->regoff);
 879                                 M_FLTMOVE(s1, var->regoff);
 880                                 }
 881                         break;
 882
 883
 884                 /* pop/dup/swap operations ********************************************/
 885
 886                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 887
 888                 case ICMD_POP:        /* ..., value  ==> ...                          */
 889                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 890                         break;
 891
 892 #define M_COPY(from,to) \
 893                         d = reg_of_var(to, REG_IFTMP); \
 894                         if ((from->regoff != to->regoff) || \
 895                             ((from->flags ^ to->flags) & INMEMORY)) { \
 896                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 897                                         var_to_reg_flt(s1, from, d); \
 898                                         M_FLTMOVE(s1,d); \
 899                                         store_reg_to_var_flt(to, d); \
 900                                         }\
 901                                 else { \
 902                                         var_to_reg_int(s1, from, d); \
 903                                         M_INTMOVE(s1,d); \
 904                                         store_reg_to_var_int(to, d); \
 905                                         }\
 906                                 }
 907
 908                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 909                         M_COPY(src, iptr->dst);
 910                         break;
 911
 912                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 913
 914                         M_COPY(src,       iptr->dst->prev->prev);
 915
 916                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 917
 918                         M_COPY(src,       iptr->dst);
 919                         M_COPY(src->prev, iptr->dst->prev);
 920                         break;
 921
 922                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 923
 924                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 925
 926                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 927
 928                         M_COPY(src,             iptr->dst);
 929                         M_COPY(src->prev,       iptr->dst->prev);
 930                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 931                         M_COPY(src, iptr->dst->prev->prev->prev);
 932                         break;
 933
 934                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 935
 936                         M_COPY(src,                   iptr->dst);
 937                         M_COPY(src->prev,             iptr->dst->prev);
 938                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 939                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 940                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 941                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 942                         break;
 943
 944                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 945
 946                         M_COPY(src, iptr->dst->prev);
 947                         M_COPY(src->prev, iptr->dst);
 948                         break;
 949
 950
 951                 /* integer operations *************************************************/
 952
 953                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 954
 955                         var_to_reg_int(s1, src, REG_ITMP1);
 956                         d = reg_of_var(iptr->dst, REG_ITMP3);
 957                         M_ISUB(REG_ZERO, s1, d);
 958                         store_reg_to_var_int(iptr->dst, d);
 959                         break;
 960
 961                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 962
 963                         var_to_reg_int(s1, src, REG_ITMP1);
 964                         d = reg_of_var(iptr->dst, REG_ITMP3);
 965                         M_LSUB(REG_ZERO, s1, d);
 966                         store_reg_to_var_int(iptr->dst, d);
 967                         break;
 968
 969                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 970
 971                         var_to_reg_int(s1, src, REG_ITMP1);
 972                         d = reg_of_var(iptr->dst, REG_ITMP3);
 973                         M_INTMOVE(s1, d);
 974                         store_reg_to_var_int(iptr->dst, d);
 975                         break;
 976
 977                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 978
 979                         var_to_reg_int(s1, src, REG_ITMP1);
 980                         d = reg_of_var(iptr->dst, REG_ITMP3);
 981                         M_IADD(s1, REG_ZERO, d );
 982                         store_reg_to_var_int(iptr->dst, d);
 983                         break;
 984
 985                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 986
 987                         var_to_reg_int(s1, src, REG_ITMP1);
 988                         d = reg_of_var(iptr->dst, REG_ITMP3);
 989                         if (has_ext_instr_set) {
 990                                 M_BSEXT(s1, d);
 991                                 }
 992                         else {
 993                                 M_SLL_IMM(s1, 56, d);
 994                                 M_SRA_IMM( d, 56, d);
 995                                 }
 996                         store_reg_to_var_int(iptr->dst, d);
 997                         break;
 998
 999                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
1000
1001                         var_to_reg_int(s1, src, REG_ITMP1);
1002                         d = reg_of_var(iptr->dst, REG_ITMP3);
1003             M_CZEXT(s1, d);
1004                         store_reg_to_var_int(iptr->dst, d);
1005                         break;
1006
1007                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
1008
1009                         var_to_reg_int(s1, src, REG_ITMP1);
1010                         d = reg_of_var(iptr->dst, REG_ITMP3);
1011                         if (has_ext_instr_set) {
1012                                 M_SSEXT(s1, d);
1013                                 }
1014                         else {
1015                                 M_SLL_IMM(s1, 48, d);
1016                                 M_SRA_IMM( d, 48, d);
1017                                 }
1018                         store_reg_to_var_int(iptr->dst, d);
1019                         break;
1020
1021
1022                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1023
1024                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1025                         var_to_reg_int(s2, src, REG_ITMP2);
1026                         d = reg_of_var(iptr->dst, REG_ITMP3);
1027                         M_IADD(s1, s2, d);
1028                         store_reg_to_var_int(iptr->dst, d);
1029                         break;
1030
1031                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
1032                                       /* val.i = constant                             */
1033
1034                         var_to_reg_int(s1, src, REG_ITMP1);
1035                         d = reg_of_var(iptr->dst, REG_ITMP3);
1036                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1037                                 M_IADD_IMM(s1, iptr->val.i, d);
1038                                 }
1039                         else {
1040                                 ICONST(REG_ITMP2, iptr->val.i);
1041                                 M_IADD(s1, REG_ITMP2, d);
1042                                 }
1043                         store_reg_to_var_int(iptr->dst, d);
1044                         break;
1045
1046                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1047
1048                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1049                         var_to_reg_int(s2, src, REG_ITMP2);
1050                         d = reg_of_var(iptr->dst, REG_ITMP3);
1051                         M_LADD(s1, s2, d);
1052                         store_reg_to_var_int(iptr->dst, d);
1053                         break;
1054
1055                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
1056                                       /* val.l = constant                             */
1057
1058                         var_to_reg_int(s1, src, REG_ITMP1);
1059                         d = reg_of_var(iptr->dst, REG_ITMP3);
1060                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1061                                 M_LADD_IMM(s1, iptr->val.l, d);
1062                                 }
1063                         else {
1064                                 LCONST(REG_ITMP2, iptr->val.l);
1065                                 M_LADD(s1, REG_ITMP2, d);
1066                                 }
1067                         store_reg_to_var_int(iptr->dst, d);
1068                         break;
1069
1070                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1071
1072                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1073                         var_to_reg_int(s2, src, REG_ITMP2);
1074                         d = reg_of_var(iptr->dst, REG_ITMP3);
1075                         M_ISUB(s1, s2, d);
1076                         store_reg_to_var_int(iptr->dst, d);
1077                         break;
1078
1079                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
1080                                       /* val.i = constant                             */
1081
1082                         var_to_reg_int(s1, src, REG_ITMP1);
1083                         d = reg_of_var(iptr->dst, REG_ITMP3);
1084                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1085                                 M_ISUB_IMM(s1, iptr->val.i, d);
1086                                 }
1087                         else {
1088                                 ICONST(REG_ITMP2, iptr->val.i);
1089                                 M_ISUB(s1, REG_ITMP2, d);
1090                                 }
1091                         store_reg_to_var_int(iptr->dst, d);
1092                         break;
1093
1094                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1095
1096                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1097                         var_to_reg_int(s2, src, REG_ITMP2);
1098                         d = reg_of_var(iptr->dst, REG_ITMP3);
1099                         M_LSUB(s1, s2, d);
1100                         store_reg_to_var_int(iptr->dst, d);
1101                         break;
1102
1103                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
1104                                       /* val.l = constant                             */
1105
1106                         var_to_reg_int(s1, src, REG_ITMP1);
1107                         d = reg_of_var(iptr->dst, REG_ITMP3);
1108                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1109                                 M_LSUB_IMM(s1, iptr->val.l, d);
1110                                 }
1111                         else {
1112                                 LCONST(REG_ITMP2, iptr->val.l);
1113                                 M_LSUB(s1, REG_ITMP2, d);
1114                                 }
1115                         store_reg_to_var_int(iptr->dst, d);
1116                         break;
1117
1118                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1119
1120                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1121                         var_to_reg_int(s2, src, REG_ITMP2);
1122                         d = reg_of_var(iptr->dst, REG_ITMP3);
1123                         M_IMUL(s1, s2, d);
1124                         store_reg_to_var_int(iptr->dst, d);
1125                         break;
1126
1127                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
1128                                       /* val.i = constant                             */
1129
1130                         var_to_reg_int(s1, src, REG_ITMP1);
1131                         d = reg_of_var(iptr->dst, REG_ITMP3);
1132                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1133                                 M_IMUL_IMM(s1, iptr->val.i, d);
1134                                 }
1135                         else {
1136                                 ICONST(REG_ITMP2, iptr->val.i);
1137                                 M_IMUL(s1, REG_ITMP2, d);
1138                                 }
1139                         store_reg_to_var_int(iptr->dst, d);
1140                         break;
1141
1142                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1143
1144                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1145                         var_to_reg_int(s2, src, REG_ITMP2);
1146                         d = reg_of_var(iptr->dst, REG_ITMP3);
1147                         M_LMUL (s1, s2, d);
1148                         store_reg_to_var_int(iptr->dst, d);
1149                         break;
1150
1151                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
1152                                       /* val.l = constant                             */
1153
1154                         var_to_reg_int(s1, src, REG_ITMP1);
1155                         d = reg_of_var(iptr->dst, REG_ITMP3);
1156                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1157                                 M_LMUL_IMM(s1, iptr->val.l, d);
1158                                 }
1159                         else {
1160                                 LCONST(REG_ITMP2, iptr->val.l);
1161                                 M_LMUL(s1, REG_ITMP2, d);
1162                                 }
1163                         store_reg_to_var_int(iptr->dst, d);
1164                         break;
1165
1166                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1167                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1168
1169                         var_to_reg_int(s1, src, REG_ITMP1);
1170                         d = reg_of_var(iptr->dst, REG_ITMP3);
1171                         if (iptr->val.i <= 15) {
1172                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
1173                                 M_CMOVGE(s1, s1, REG_ITMP2);
1174                                 }
1175                         else {
1176                                 M_SRA_IMM(s1, 63, REG_ITMP2);
1177                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1178                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
1179                                 }
1180                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
1181                         store_reg_to_var_int(iptr->dst, d);
1182                         break;
1183
1184                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1185
1186                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1187                         var_to_reg_int(s2, src, REG_ITMP2);
1188                         d = reg_of_var(iptr->dst, REG_ITMP3);
1189                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1190                         M_SLL(s1, REG_ITMP3, d);
1191                         M_IADD(d, REG_ZERO, d);
1192                         store_reg_to_var_int(iptr->dst, d);
1193                         break;
1194
1195                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1196                                       /* val.i = constant                             */
1197
1198                         var_to_reg_int(s1, src, REG_ITMP1);
1199                         d = reg_of_var(iptr->dst, REG_ITMP3);
1200                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1201                         M_IADD(d, REG_ZERO, d);
1202                         store_reg_to_var_int(iptr->dst, d);
1203                         break;
1204
1205                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1206
1207                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1208                         var_to_reg_int(s2, src, REG_ITMP2);
1209                         d = reg_of_var(iptr->dst, REG_ITMP3);
1210                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1211                         M_SRA(s1, REG_ITMP3, d);
1212                         store_reg_to_var_int(iptr->dst, d);
1213                         break;
1214
1215                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1216                                       /* val.i = constant                             */
1217
1218                         var_to_reg_int(s1, src, REG_ITMP1);
1219                         d = reg_of_var(iptr->dst, REG_ITMP3);
1220                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1221                         store_reg_to_var_int(iptr->dst, d);
1222                         break;
1223
1224                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1225
1226                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1227                         var_to_reg_int(s2, src, REG_ITMP2);
1228                         d = reg_of_var(iptr->dst, REG_ITMP3);
1229                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1230             M_IZEXT(s1, d);
1231                         M_SRL(d, REG_ITMP2, d);
1232                         M_IADD(d, REG_ZERO, d);
1233                         store_reg_to_var_int(iptr->dst, d);
1234                         break;
1235
1236                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1237                                       /* val.i = constant                             */
1238
1239                         var_to_reg_int(s1, src, REG_ITMP1);
1240                         d = reg_of_var(iptr->dst, REG_ITMP3);
1241             M_IZEXT(s1, d);
1242                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1243                         M_IADD(d, REG_ZERO, d);
1244                         store_reg_to_var_int(iptr->dst, d);
1245                         break;
1246
1247                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1248
1249                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1250                         var_to_reg_int(s2, src, REG_ITMP2);
1251                         d = reg_of_var(iptr->dst, REG_ITMP3);
1252                         M_SLL(s1, s2, d);
1253                         store_reg_to_var_int(iptr->dst, d);
1254                         break;
1255
1256                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1257                                       /* val.i = constant                             */
1258
1259                         var_to_reg_int(s1, src, REG_ITMP1);
1260                         d = reg_of_var(iptr->dst, REG_ITMP3);
1261                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1262                         store_reg_to_var_int(iptr->dst, d);
1263                         break;
1264
1265                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1266
1267                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1268                         var_to_reg_int(s2, src, REG_ITMP2);
1269                         d = reg_of_var(iptr->dst, REG_ITMP3);
1270                         M_SRA(s1, s2, d);
1271                         store_reg_to_var_int(iptr->dst, d);
1272                         break;
1273
1274                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1275                                       /* val.i = constant                             */
1276
1277                         var_to_reg_int(s1, src, REG_ITMP1);
1278                         d = reg_of_var(iptr->dst, REG_ITMP3);
1279                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1280                         store_reg_to_var_int(iptr->dst, d);
1281                         break;
1282
1283                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1284
1285                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1286                         var_to_reg_int(s2, src, REG_ITMP2);
1287                         d = reg_of_var(iptr->dst, REG_ITMP3);
1288                         M_SRL(s1, s2, d);
1289                         store_reg_to_var_int(iptr->dst, d);
1290                         break;
1291
1292                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1293                                       /* val.i = constant                             */
1294
1295                         var_to_reg_int(s1, src, REG_ITMP1);
1296                         d = reg_of_var(iptr->dst, REG_ITMP3);
1297                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1298                         store_reg_to_var_int(iptr->dst, d);
1299                         break;
1300
1301                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1302                 case ICMD_LAND:
1303
1304                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1305                         var_to_reg_int(s2, src, REG_ITMP2);
1306                         d = reg_of_var(iptr->dst, REG_ITMP3);
1307                         M_AND(s1, s2, d);
1308                         store_reg_to_var_int(iptr->dst, d);
1309                         break;
1310
1311                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1312                                       /* val.i = constant                             */
1313
1314                         var_to_reg_int(s1, src, REG_ITMP1);
1315                         d = reg_of_var(iptr->dst, REG_ITMP3);
1316                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1317                                 M_AND_IMM(s1, iptr->val.i, d);
1318                                 }
1319                         else if (iptr->val.i == 0xffff) {
1320                                 M_CZEXT(s1, d);
1321                                 }
1322                         else if (iptr->val.i == 0xffffff) {
1323                                 M_ZAPNOT_IMM(s1, 0x07, d);
1324                                 }
1325                         else {
1326                                 ICONST(REG_ITMP2, iptr->val.i);
1327                                 M_AND(s1, REG_ITMP2, d);
1328                                 }
1329                         store_reg_to_var_int(iptr->dst, d);
1330                         break;
1331
1332                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1333                                       /* val.i = constant                             */
1334
1335                         var_to_reg_int(s1, src, REG_ITMP1);
1336                         d = reg_of_var(iptr->dst, REG_ITMP3);
1337                         if (s1 == d) {
1338                                 M_MOV(s1, REG_ITMP1);
1339                                 s1 = REG_ITMP1;
1340                                 }
1341                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1342                                 M_AND_IMM(s1, iptr->val.i, d);
1343                                 M_BGEZ(s1, 3);
1344                                 M_ISUB(REG_ZERO, s1, d);
1345                                 M_AND_IMM(d, iptr->val.i, d);
1346                                 }
1347                         else if (iptr->val.i == 0xffff) {
1348                                 M_CZEXT(s1, d);
1349                                 M_BGEZ(s1, 3);
1350                                 M_ISUB(REG_ZERO, s1, d);
1351                                 M_CZEXT(d, d);
1352                                 }
1353                         else if (iptr->val.i == 0xffffff) {
1354                                 M_ZAPNOT_IMM(s1, 0x07, d);
1355                                 M_BGEZ(s1, 3);
1356                                 M_ISUB(REG_ZERO, s1, d);
1357                                 M_ZAPNOT_IMM(d, 0x07, d);
1358                                 }
1359                         else {
1360                                 ICONST(REG_ITMP2, iptr->val.i);
1361                                 M_AND(s1, REG_ITMP2, d);
1362                                 M_BGEZ(s1, 3);
1363                                 M_ISUB(REG_ZERO, s1, d);
1364                                 M_AND(d, REG_ITMP2, d);
1365                                 }
1366                         M_ISUB(REG_ZERO, d, d);
1367                         store_reg_to_var_int(iptr->dst, d);
1368                         break;
1369
1370                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1371
1372 /*          b = value & 0xffff;
1373                         a = value >> 16;
1374                         a = ((b - a) & 0xffff) + (b < a);
1375 */
1376                         var_to_reg_int(s1, src, REG_ITMP1);
1377                         d = reg_of_var(iptr->dst, REG_ITMP3);
1378                         if (s1 == d) {
1379                                 M_MOV(s1, REG_ITMP3);
1380                                 s1 = REG_ITMP3;
1381                                 }
1382                         M_BLTZ(s1, 7);
1383             M_CZEXT(s1, REG_ITMP2);
1384                         M_SRA_IMM(s1, 16, d);
1385                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1386                         M_ISUB(REG_ITMP2, d, d);
1387             M_CZEXT(d, d);
1388                         M_IADD(d, REG_ITMP1, d);
1389                         M_BR(11 + (s1 == REG_ITMP1));
1390                         M_ISUB(REG_ZERO, s1, REG_ITMP1);
1391             M_CZEXT(REG_ITMP1, REG_ITMP2);
1392                         M_SRA_IMM(REG_ITMP1, 16, d);
1393                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1394                         M_ISUB(REG_ITMP2, d, d);
1395             M_CZEXT(d, d);
1396                         M_IADD(d, REG_ITMP1, d);
1397                         M_ISUB(REG_ZERO, d, d);
1398                         if (s1 == REG_ITMP1) {
1399                                 var_to_reg_int(s1, src, REG_ITMP1);
1400                                 }
1401                         M_SLL_IMM(s1, 33, REG_ITMP2);
1402                         M_CMPEQ(REG_ITMP2, REG_ZERO, REG_ITMP2);
1403                         M_ISUB(d, REG_ITMP2, d);
1404                         store_reg_to_var_int(iptr->dst, d);
1405                         break;
1406
1407                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1408                                       /* val.l = constant                             */
1409
1410                         var_to_reg_int(s1, src, REG_ITMP1);
1411                         d = reg_of_var(iptr->dst, REG_ITMP3);
1412                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1413                                 M_AND_IMM(s1, iptr->val.l, d);
1414                                 }
1415                         else if (iptr->val.l == 0xffffL) {
1416                                 M_CZEXT(s1, d);
1417                                 }
1418                         else if (iptr->val.l == 0xffffffL) {
1419                                 M_ZAPNOT_IMM(s1, 0x07, d);
1420                                 }
1421                         else if (iptr->val.l == 0xffffffffL) {
1422                                 M_IZEXT(s1, d);
1423                                 }
1424                         else if (iptr->val.l == 0xffffffffffL) {
1425                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1426                                 }
1427                         else if (iptr->val.l == 0xffffffffffffL) {
1428                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1429                                 }
1430                         else if (iptr->val.l == 0xffffffffffffffL) {
1431                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1432                                 }
1433                         else {
1434                                 LCONST(REG_ITMP2, iptr->val.l);
1435                                 M_AND(s1, REG_ITMP2, d);
1436                                 }
1437                         store_reg_to_var_int(iptr->dst, d);
1438                         break;
1439
1440                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1441                                       /* val.l = constant                             */
1442
1443                         var_to_reg_int(s1, src, REG_ITMP1);
1444                         d = reg_of_var(iptr->dst, REG_ITMP3);
1445                         if (s1 == d) {
1446                                 M_MOV(s1, REG_ITMP1);
1447                                 s1 = REG_ITMP1;
1448                                 }
1449                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1450                                 M_AND_IMM(s1, iptr->val.l, d);
1451                                 M_BGEZ(s1, 3);
1452                                 M_LSUB(REG_ZERO, s1, d);
1453                                 M_AND_IMM(d, iptr->val.l, d);
1454                                 }
1455                         else if (iptr->val.l == 0xffffL) {
1456                                 M_CZEXT(s1, d);
1457                                 M_BGEZ(s1, 3);
1458                                 M_LSUB(REG_ZERO, s1, d);
1459                                 M_CZEXT(d, d);
1460                                 }
1461                         else if (iptr->val.l == 0xffffffL) {
1462                                 M_ZAPNOT_IMM(s1, 0x07, d);
1463                                 M_BGEZ(s1, 3);
1464                                 M_LSUB(REG_ZERO, s1, d);
1465                                 M_ZAPNOT_IMM(d, 0x07, d);
1466                                 }
1467                         else if (iptr->val.l == 0xffffffffL) {
1468                                 M_IZEXT(s1, d);
1469                                 M_BGEZ(s1, 3);
1470                                 M_LSUB(REG_ZERO, s1, d);
1471                                 M_IZEXT(d, d);
1472                                 }
1473                         else if (iptr->val.l == 0xffffffffffL) {
1474                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1475                                 M_BGEZ(s1, 3);
1476                                 M_LSUB(REG_ZERO, s1, d);
1477                                 M_ZAPNOT_IMM(d, 0x1f, d);
1478                                 }
1479                         else if (iptr->val.l == 0xffffffffffffL) {
1480                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1481                                 M_BGEZ(s1, 3);
1482                                 M_LSUB(REG_ZERO, s1, d);
1483                                 M_ZAPNOT_IMM(d, 0x3f, d);
1484                                 }
1485                         else if (iptr->val.l == 0xffffffffffffffL) {
1486                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1487                                 M_BGEZ(s1, 3);
1488                                 M_LSUB(REG_ZERO, s1, d);
1489                                 M_ZAPNOT_IMM(d, 0x7f, d);
1490                                 }
1491                         else {
1492                                 LCONST(REG_ITMP2, iptr->val.l);
1493                                 M_AND(s1, REG_ITMP2, d);
1494                                 M_BGEZ(s1, 3);
1495                                 M_LSUB(REG_ZERO, s1, d);
1496                                 M_AND(d, REG_ITMP2, d);
1497                                 }
1498                         M_LSUB(REG_ZERO, d, d);
1499                         store_reg_to_var_int(iptr->dst, d);
1500                         break;
1501
1502                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1503
1504                         var_to_reg_int(s1, src, REG_ITMP1);
1505                         d = reg_of_var(iptr->dst, REG_ITMP3);
1506                         if (s1 == d) {
1507                                 M_MOV(s1, REG_ITMP3);
1508                                 s1 = REG_ITMP3;
1509                                 }
1510                         M_CZEXT(s1, REG_ITMP2);
1511                         M_SRA_IMM(s1, 16, d);
1512                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1513                         M_LSUB(REG_ITMP2, d, d);
1514             M_CZEXT(d, d);
1515                         M_LADD(d, REG_ITMP1, d);
1516                         M_LDA(REG_ITMP2, REG_ZERO, -1);
1517                         M_SRL_IMM(REG_ITMP2, 33, REG_ITMP2);
1518                         if (s1 == REG_ITMP1) {
1519                                 var_to_reg_int(s1, src, REG_ITMP1);
1520                                 }
1521                         M_CMPULT(s1, REG_ITMP2, REG_ITMP2);
1522                         M_BNEZ(REG_ITMP2, 11);
1523                         M_LDA(d, REG_ZERO, -257);
1524                         M_ZAPNOT_IMM(d, 0xcd, d);
1525                         M_LSUB(REG_ZERO, s1, REG_ITMP2);
1526                         M_CMOVGE(s1, s1, REG_ITMP2);
1527                         M_UMULH(REG_ITMP2, d, REG_ITMP2);
1528                         M_SRL_IMM(REG_ITMP2, 16, REG_ITMP2);
1529                         M_LSUB(REG_ZERO, REG_ITMP2, d);
1530                         M_CMOVGE(s1, REG_ITMP2, d);
1531                         M_SLL_IMM(d, 16, REG_ITMP2);
1532                         M_LADD(d, REG_ITMP2, d);
1533                         M_LSUB(s1, d, d);
1534                         store_reg_to_var_int(iptr->dst, d);
1535                         break;
1536
1537                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1538                 case ICMD_LOR:
1539
1540                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1541                         var_to_reg_int(s2, src, REG_ITMP2);
1542                         d = reg_of_var(iptr->dst, REG_ITMP3);
1543                         M_OR( s1,s2, d);
1544                         store_reg_to_var_int(iptr->dst, d);
1545                         break;
1546
1547                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1548                                       /* val.i = constant                             */
1549
1550                         var_to_reg_int(s1, src, REG_ITMP1);
1551                         d = reg_of_var(iptr->dst, REG_ITMP3);
1552                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1553                                 M_OR_IMM(s1, iptr->val.i, d);
1554                                 }
1555                         else {
1556                                 ICONST(REG_ITMP2, iptr->val.i);
1557                                 M_OR(s1, REG_ITMP2, d);
1558                                 }
1559                         store_reg_to_var_int(iptr->dst, d);
1560                         break;
1561
1562                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1563                                       /* val.l = constant                             */
1564
1565                         var_to_reg_int(s1, src, REG_ITMP1);
1566                         d = reg_of_var(iptr->dst, REG_ITMP3);
1567                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1568                                 M_OR_IMM(s1, iptr->val.l, d);
1569                                 }
1570                         else {
1571                                 LCONST(REG_ITMP2, iptr->val.l);
1572                                 M_OR(s1, REG_ITMP2, d);
1573                                 }
1574                         store_reg_to_var_int(iptr->dst, d);
1575                         break;
1576
1577                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1578                 case ICMD_LXOR:
1579
1580                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1581                         var_to_reg_int(s2, src, REG_ITMP2);
1582                         d = reg_of_var(iptr->dst, REG_ITMP3);
1583                         M_XOR(s1, s2, d);
1584                         store_reg_to_var_int(iptr->dst, d);
1585                         break;
1586
1587                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1588                                       /* val.i = constant                             */
1589
1590                         var_to_reg_int(s1, src, REG_ITMP1);
1591                         d = reg_of_var(iptr->dst, REG_ITMP3);
1592                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1593                                 M_XOR_IMM(s1, iptr->val.i, d);
1594                                 }
1595                         else {
1596                                 ICONST(REG_ITMP2, iptr->val.i);
1597                                 M_XOR(s1, REG_ITMP2, d);
1598                                 }
1599                         store_reg_to_var_int(iptr->dst, d);
1600                         break;
1601
1602                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1603                                       /* val.l = constant                             */
1604
1605                         var_to_reg_int(s1, src, REG_ITMP1);
1606                         d = reg_of_var(iptr->dst, REG_ITMP3);
1607                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1608                                 M_XOR_IMM(s1, iptr->val.l, d);
1609                                 }
1610                         else {
1611                                 LCONST(REG_ITMP2, iptr->val.l);
1612                                 M_XOR(s1, REG_ITMP2, d);
1613                                 }
1614                         store_reg_to_var_int(iptr->dst, d);
1615                         break;
1616
1617
1618                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1619
1620                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1621                         var_to_reg_int(s2, src, REG_ITMP2);
1622                         d = reg_of_var(iptr->dst, REG_ITMP3);
1623                         M_CMPLT(s1, s2, REG_ITMP3);
1624                         M_CMPLT(s2, s1, REG_ITMP1);
1625                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1626                         store_reg_to_var_int(iptr->dst, d);
1627                         break;
1628
1629
1630                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1631                                       /* op1 = variable, val.i = constant             */
1632
1633                         var = &(locals[iptr->op1][TYPE_INT]);
1634                         if (var->flags & INMEMORY) {
1635                                 s1 = REG_ITMP1;
1636                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1637                                 }
1638                         else
1639                                 s1 = var->regoff;
1640                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1641                                 M_IADD_IMM(s1, iptr->val.i, s1);
1642                                 }
1643                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1644                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1645                                 }
1646                         else {
1647                                 M_LDA (s1, s1, iptr->val.i);
1648                                 M_IADD(s1, REG_ZERO, s1);
1649                                 }
1650                         if (var->flags & INMEMORY)
1651                                 M_LST(s1, REG_SP, 8 * var->regoff);
1652                         break;
1653
1654
1655                 /* floating operations ************************************************/
1656
1657                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1658
1659                         var_to_reg_flt(s1, src, REG_FTMP1);
1660                         d = reg_of_var(iptr->dst, REG_FTMP3);
1661                         M_FMOVN(s1, d);
1662                         store_reg_to_var_flt(iptr->dst, d);
1663                         break;
1664
1665                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1666
1667                         var_to_reg_flt(s1, src, REG_FTMP1);
1668                         d = reg_of_var(iptr->dst, REG_FTMP3);
1669                         M_FMOVN(s1, d);
1670                         store_reg_to_var_flt(iptr->dst, d);
1671                         break;
1672
1673                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1674
1675                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1676                         var_to_reg_flt(s2, src, REG_FTMP2);
1677                         d = reg_of_var(iptr->dst, REG_FTMP3);
1678                         if (opt_noieee) {
1679                                 M_FADD(s1, s2, d);
1680                                 }
1681                         else {
1682                                 if (d == s1 || d == s2) {
1683                                         M_FADDS(s1, s2, REG_FTMP3);
1684                                         M_TRAPB;
1685                                         M_FMOV(REG_FTMP3, d);
1686                                         }
1687                                 else {
1688                                         M_FADDS(s1, s2, d);
1689                                         M_TRAPB;
1690                                         }
1691                                 }
1692                         store_reg_to_var_flt(iptr->dst, d);
1693                         break;
1694
1695                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1696
1697                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1698                         var_to_reg_flt(s2, src, REG_FTMP2);
1699                         d = reg_of_var(iptr->dst, REG_FTMP3);
1700                         if (opt_noieee) {
1701                                 M_DADD(s1, s2, d);
1702                                 }
1703                         else {
1704                                 if (d == s1 || d == s2) {
1705                                         M_DADDS(s1, s2, REG_FTMP3);
1706                                         M_TRAPB;
1707                                         M_FMOV(REG_FTMP3, d);
1708                                         }
1709                                 else {
1710                                         M_DADDS(s1, s2, d);
1711                                         M_TRAPB;
1712                                         }
1713                                 }
1714                         store_reg_to_var_flt(iptr->dst, d);
1715                         break;
1716
1717                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1718
1719                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1720                         var_to_reg_flt(s2, src, REG_FTMP2);
1721                         d = reg_of_var(iptr->dst, REG_FTMP3);
1722                         if (opt_noieee) {
1723                                 M_FSUB(s1, s2, d);
1724                                 }
1725                         else {
1726                                 if (d == s1 || d == s2) {
1727                                         M_FSUBS(s1, s2, REG_FTMP3);
1728                                         M_TRAPB;
1729                                         M_FMOV(REG_FTMP3, d);
1730                                         }
1731                                 else {
1732                                         M_FSUBS(s1, s2, d);
1733                                         M_TRAPB;
1734                                         }
1735                                 }
1736                         store_reg_to_var_flt(iptr->dst, d);
1737                         break;
1738
1739                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1740
1741                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1742                         var_to_reg_flt(s2, src, REG_FTMP2);
1743                         d = reg_of_var(iptr->dst, REG_FTMP3);
1744                         if (opt_noieee) {
1745                                 M_DSUB(s1, s2, d);
1746                                 }
1747                         else {
1748                                 if (d == s1 || d == s2) {
1749                                         M_DSUBS(s1, s2, REG_FTMP3);
1750                                         M_TRAPB;
1751                                         M_FMOV(REG_FTMP3, d);
1752                                         }
1753                                 else {
1754                                         M_DSUBS(s1, s2, d);
1755                                         M_TRAPB;
1756                                         }
1757                                 }
1758                         store_reg_to_var_flt(iptr->dst, d);
1759                         break;
1760
1761                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1762
1763                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1764                         var_to_reg_flt(s2, src, REG_FTMP2);
1765                         d = reg_of_var(iptr->dst, REG_FTMP3);
1766                         if (opt_noieee) {
1767                                 M_FMUL(s1, s2, d);
1768                                 }
1769                         else {
1770                                 if (d == s1 || d == s2) {
1771                                         M_FMULS(s1, s2, REG_FTMP3);
1772                                         M_TRAPB;
1773                                         M_FMOV(REG_FTMP3, d);
1774                                         }
1775                                 else {
1776                                         M_FMULS(s1, s2, d);
1777                                         M_TRAPB;
1778                                         }
1779                                 }
1780                         store_reg_to_var_flt(iptr->dst, d);
1781                         break;
1782
1783                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1784
1785                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1786                         var_to_reg_flt(s2, src, REG_FTMP2);
1787                         d = reg_of_var(iptr->dst, REG_FTMP3);
1788                         if (opt_noieee) {
1789                                 M_DMUL(s1, s2, d);
1790                                 }
1791                         else {
1792                                 if (d == s1 || d == s2) {
1793                                         M_DMULS(s1, s2, REG_FTMP3);
1794                                         M_TRAPB;
1795                                         M_FMOV(REG_FTMP3, d);
1796                                         }
1797                                 else {
1798                                         M_DMULS(s1, s2, d);
1799                                         M_TRAPB;
1800                                         }
1801                                 }
1802                         store_reg_to_var_flt(iptr->dst, d);
1803                         break;
1804
1805                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1806
1807                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1808                         var_to_reg_flt(s2, src, REG_FTMP2);
1809                         d = reg_of_var(iptr->dst, REG_FTMP3);
1810                         if (opt_noieee) {
1811                                 M_FDIV(s1, s2, d);
1812                                 }
1813                         else {
1814                                 if (d == s1 || d == s2) {
1815                                         M_FDIVS(s1, s2, REG_FTMP3);
1816                                         M_TRAPB;
1817                                         M_FMOV(REG_FTMP3, d);
1818                                         }
1819                                 else {
1820                                         M_FDIVS(s1, s2, d);
1821                                         M_TRAPB;
1822                                         }
1823                                 }
1824                         store_reg_to_var_flt(iptr->dst, d);
1825                         break;
1826
1827                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1828
1829                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1830                         var_to_reg_flt(s2, src, REG_FTMP2);
1831                         d = reg_of_var(iptr->dst, REG_FTMP3);
1832                         if (opt_noieee) {
1833                                 M_DDIV(s1, s2, d);
1834                                 }
1835                         else {
1836                                 if (d == s1 || d == s2) {
1837                                         M_DDIVS(s1, s2, REG_FTMP3);
1838                                         M_TRAPB;
1839                                         M_FMOV(REG_FTMP3, d);
1840                                         }
1841                                 else {
1842                                         M_DDIVS(s1, s2, d);
1843                                         M_TRAPB;
1844                                         }
1845                                 }
1846                         store_reg_to_var_flt(iptr->dst, d);
1847                         break;
1848
1849                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1850                 case ICMD_L2F:
1851                         var_to_reg_int(s1, src, REG_ITMP1);
1852                         d = reg_of_var(iptr->dst, REG_FTMP3);
1853                         a = dseg_adddouble(0.0);
1854                         M_LST (s1, REG_PV, a);
1855                         M_DLD (d, REG_PV, a);
1856                         M_CVTLF(d, d);
1857                         store_reg_to_var_flt(iptr->dst, d);
1858                         break;
1859
1860                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1861                 case ICMD_L2D:
1862                         var_to_reg_int(s1, src, REG_ITMP1);
1863                         d = reg_of_var(iptr->dst, REG_FTMP3);
1864                         a = dseg_adddouble(0.0);
1865                         M_LST (s1, REG_PV, a);
1866                         M_DLD (d, REG_PV, a);
1867                         M_CVTLD(d, d);
1868                         store_reg_to_var_flt(iptr->dst, d);
1869                         break;
1870
1871                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1872                 case ICMD_D2I:
1873                         var_to_reg_flt(s1, src, REG_FTMP1);
1874                         d = reg_of_var(iptr->dst, REG_ITMP3);
1875                         a = dseg_adddouble(0.0);
1876                         M_CVTDL_C(s1, REG_FTMP2);
1877                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1878                         M_DST (REG_FTMP3, REG_PV, a);
1879                         M_ILD (d, REG_PV, a);
1880                         store_reg_to_var_int(iptr->dst, d);
1881                         break;
1882
1883                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1884                 case ICMD_D2L:
1885                         var_to_reg_flt(s1, src, REG_FTMP1);
1886                         d = reg_of_var(iptr->dst, REG_ITMP3);
1887                         a = dseg_adddouble(0.0);
1888                         M_CVTDL_C(s1, REG_FTMP2);
1889                         M_DST (REG_FTMP2, REG_PV, a);
1890                         M_LLD (d, REG_PV, a);
1891                         store_reg_to_var_int(iptr->dst, d);
1892                         break;
1893
1894                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1895
1896                         var_to_reg_flt(s1, src, REG_FTMP1);
1897                         d = reg_of_var(iptr->dst, REG_FTMP3);
1898                         M_CVTFDS(s1, d);
1899                         M_TRAPB;
1900                         store_reg_to_var_flt(iptr->dst, d);
1901                         break;
1902
1903                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1904
1905                         var_to_reg_flt(s1, src, REG_FTMP1);
1906                         d = reg_of_var(iptr->dst, REG_FTMP3);
1907                         if (opt_noieee) {
1908                                 M_CVTDF(s1, d);
1909                                 }
1910                         else {
1911                                 M_CVTDFS(s1, d);
1912                                 M_TRAPB;
1913                                 }
1914                         store_reg_to_var_flt(iptr->dst, d);
1915                         break;
1916
1917                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1918                 case ICMD_DCMPL:
1919                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1920                         var_to_reg_flt(s2, src, REG_FTMP2);
1921                         d = reg_of_var(iptr->dst, REG_ITMP3);
1922                         if (opt_noieee) {
1923                                 M_LSUB_IMM(REG_ZERO, 1, d);
1924                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1925                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1926                                 M_CLR   (d);
1927                                 M_FCMPLT(s2, s1, REG_FTMP3);
1928                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1929                                 M_LADD_IMM(REG_ZERO, 1, d);
1930                                 }
1931                         else {
1932                                 M_LSUB_IMM(REG_ZERO, 1, d);
1933                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1934                                 M_TRAPB;
1935                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1936                                 M_CLR   (d);
1937                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1938                                 M_TRAPB;
1939                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1940                                 M_LADD_IMM(REG_ZERO, 1, d);
1941                                 }
1942                         store_reg_to_var_int(iptr->dst, d);
1943                         break;
1944
1945                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1946                 case ICMD_DCMPG:
1947                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1948                         var_to_reg_flt(s2, src, REG_FTMP2);
1949                         d = reg_of_var(iptr->dst, REG_ITMP3);
1950                         if (opt_noieee) {
1951                                 M_LADD_IMM(REG_ZERO, 1, d);
1952                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1953                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1954                                 M_CLR   (d);
1955                                 M_FCMPLT(s1, s2, REG_FTMP3);
1956                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1957                                 M_LSUB_IMM(REG_ZERO, 1, d);
1958                                 }
1959                         else {
1960                                 M_LADD_IMM(REG_ZERO, 1, d);
1961                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1962                                 M_TRAPB;
1963                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1964                                 M_CLR   (d);
1965                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1966                                 M_TRAPB;
1967                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1968                                 M_LSUB_IMM(REG_ZERO, 1, d);
1969                                 }
1970                         store_reg_to_var_int(iptr->dst, d);
1971                         break;
1972
1973
1974                 /* memory operations **************************************************/
1975
1976                         /* #define gen_bound_check \
1977                         if (checkbounds) {\
1978                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1979                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1980                                 M_BEQZ(REG_ITMP3, 0);\
1981                                 codegen_addxboundrefs(mcodeptr);\
1982                                 }
1983                         */
1984
1985 #define gen_bound_check \
1986     if (checkbounds) { \
1987         M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1988         M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1989         M_BEQZ(REG_ITMP3, 0);\
1990         codegen_addxboundrefs(mcodeptr, s2); \
1991     }
1992
1993                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1994
1995                         var_to_reg_int(s1, src, REG_ITMP1);
1996                         d = reg_of_var(iptr->dst, REG_ITMP3);
1997                         gen_nullptr_check(s1);
1998                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1999                         store_reg_to_var_int(iptr->dst, d);
2000                         break;
2001
2002                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
2003
2004                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2005                         var_to_reg_int(s2, src, REG_ITMP2);
2006                         d = reg_of_var(iptr->dst, REG_ITMP3);
2007                         if (iptr->op1 == 0) {
2008                                 gen_nullptr_check(s1);
2009                                 gen_bound_check;
2010                                 }
2011                         M_SAADDQ(s2, s1, REG_ITMP1);
2012                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2013                         store_reg_to_var_int(iptr->dst, d);
2014                         break;
2015
2016                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
2017
2018                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2019                         var_to_reg_int(s2, src, REG_ITMP2);
2020                         d = reg_of_var(iptr->dst, REG_ITMP3);
2021                         if (iptr->op1 == 0) {
2022                                 gen_nullptr_check(s1);
2023                                 gen_bound_check;
2024                                 }
2025                         M_S8ADDQ(s2, s1, REG_ITMP1);
2026                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
2027                         store_reg_to_var_int(iptr->dst, d);
2028                         break;
2029
2030                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
2031
2032                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2033                         var_to_reg_int(s2, src, REG_ITMP2);
2034                         d = reg_of_var(iptr->dst, REG_ITMP3);
2035                         if (iptr->op1 == 0) {
2036                                 gen_nullptr_check(s1);
2037                                 gen_bound_check;
2038                                 }
2039
2040                         M_S4ADDQ(s2, s1, REG_ITMP1);
2041                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
2042                         store_reg_to_var_int(iptr->dst, d);
2043                         break;
2044
2045                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
2046
2047                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2048                         var_to_reg_int(s2, src, REG_ITMP2);
2049                         d = reg_of_var(iptr->dst, REG_FTMP3);
2050                         if (iptr->op1 == 0) {
2051                                 gen_nullptr_check(s1);
2052                                 gen_bound_check;
2053                                 }
2054                         M_S4ADDQ(s2, s1, REG_ITMP1);
2055                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2056                         store_reg_to_var_flt(iptr->dst, d);
2057                         break;
2058
2059                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
2060
2061                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2062                         var_to_reg_int(s2, src, REG_ITMP2);
2063                         d = reg_of_var(iptr->dst, REG_FTMP3);
2064                         if (iptr->op1 == 0) {
2065                                 gen_nullptr_check(s1);
2066                                 gen_bound_check;
2067                                 }
2068                         M_S8ADDQ(s2, s1, REG_ITMP1);
2069                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2070                         store_reg_to_var_flt(iptr->dst, d);
2071                         break;
2072
2073                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
2074
2075                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2076                         var_to_reg_int(s2, src, REG_ITMP2);
2077                         d = reg_of_var(iptr->dst, REG_ITMP3);
2078                         if (iptr->op1 == 0) {
2079                                 gen_nullptr_check(s1);
2080                                 gen_bound_check;
2081                                 }
2082                         if (has_ext_instr_set) {
2083                                 M_LADD(s2, s1, REG_ITMP1);
2084                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2085                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
2086                                 }
2087                         else {
2088                                 M_LADD (s2, s1, REG_ITMP1);
2089                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2090                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2091                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2092                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
2093                                 }
2094                         store_reg_to_var_int(iptr->dst, d);
2095                         break;
2096
2097                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
2098
2099                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2100                         var_to_reg_int(s2, src, REG_ITMP2);
2101                         d = reg_of_var(iptr->dst, REG_ITMP3);
2102                         if (iptr->op1 == 0) {
2103                                 gen_nullptr_check(s1);
2104                                 gen_bound_check;
2105                                 }
2106                         if (has_ext_instr_set) {
2107                                 M_LADD(s2, s1, REG_ITMP1);
2108                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2109                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
2110                                 M_SSEXT(d, d);
2111                                 }
2112                         else {
2113                                 M_LADD(s2, s1, REG_ITMP1);
2114                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2115                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2116                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
2117                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2118                                 M_SRA_IMM(d, 48, d);
2119                                 }
2120                         store_reg_to_var_int(iptr->dst, d);
2121                         break;
2122
2123                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
2124
2125                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2126                         var_to_reg_int(s2, src, REG_ITMP2);
2127                         d = reg_of_var(iptr->dst, REG_ITMP3);
2128                         if (iptr->op1 == 0) {
2129                                 gen_nullptr_check(s1);
2130                                 gen_bound_check;
2131                                 }
2132                         if (has_ext_instr_set) {
2133                                 M_LADD   (s2, s1, REG_ITMP1);
2134                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
2135                                 M_BSEXT  (d, d);
2136                                 }
2137                         else {
2138                                 M_LADD(s2, s1, REG_ITMP1);
2139                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2140                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
2141                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2142                                 M_SRA_IMM(d, 56, d);
2143                                 }
2144                         store_reg_to_var_int(iptr->dst, d);
2145                         break;
2146
2147
2148                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
2149
2150                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2151                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2152                         if (iptr->op1 == 0) {
2153                                 gen_nullptr_check(s1);
2154                                 gen_bound_check;
2155                                 }
2156                         var_to_reg_int(s3, src, REG_ITMP3);
2157                         M_SAADDQ(s2, s1, REG_ITMP1);
2158                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2159                         break;
2160
2161                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
2162
2163                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2164                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2165                         if (iptr->op1 == 0) {
2166                                 gen_nullptr_check(s1);
2167                                 gen_bound_check;
2168                                 }
2169                         var_to_reg_int(s3, src, REG_ITMP3);
2170                         M_S8ADDQ(s2, s1, REG_ITMP1);
2171                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
2172                         break;
2173
2174                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
2175
2176                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2177                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2178                         if (iptr->op1 == 0) {
2179                                 gen_nullptr_check(s1);
2180                                 gen_bound_check;
2181                                 }
2182
2183                         var_to_reg_int(s3, src, REG_ITMP3);
2184                         M_S4ADDQ(s2, s1, REG_ITMP1);
2185                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
2186                         break;
2187
2188                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
2189
2190                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2191                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2192                         if (iptr->op1 == 0) {
2193                                 gen_nullptr_check(s1);
2194                                 gen_bound_check;
2195                                 }
2196                         var_to_reg_flt(s3, src, REG_FTMP3);
2197                         M_S4ADDQ(s2, s1, REG_ITMP1);
2198                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2199                         break;
2200
2201                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
2202
2203                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2204                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2205                         if (iptr->op1 == 0) {
2206                                 gen_nullptr_check(s1);
2207                                 gen_bound_check;
2208                                 }
2209                         var_to_reg_flt(s3, src, REG_FTMP3);
2210                         M_S8ADDQ(s2, s1, REG_ITMP1);
2211                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2212                         break;
2213
2214                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
2215
2216                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2217                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2218                         if (iptr->op1 == 0) {
2219                                 gen_nullptr_check(s1);
2220                                 gen_bound_check;
2221                                 }
2222                         var_to_reg_int(s3, src, REG_ITMP3);
2223                         if (has_ext_instr_set) {
2224                                 M_LADD(s2, s1, REG_ITMP1);
2225                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2226                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
2227                                 }
2228                         else {
2229                                 M_LADD (s2, s1, REG_ITMP1);
2230                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2231                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2232                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2233                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2234                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2235                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2236                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2237                                 }
2238                         break;
2239
2240                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
2241
2242                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2243                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2244                         if (iptr->op1 == 0) {
2245                                 gen_nullptr_check(s1);
2246                                 gen_bound_check;
2247                                 }
2248                         var_to_reg_int(s3, src, REG_ITMP3);
2249                         if (has_ext_instr_set) {
2250                                 M_LADD(s2, s1, REG_ITMP1);
2251                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2252                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2253                                 }
2254                         else {
2255                                 M_LADD (s2, s1, REG_ITMP1);
2256                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2257                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2258                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2259                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2260                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2261                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2262                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2263                                 }
2264                         break;
2265
2266                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2267
2268                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2269                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2270                         if (iptr->op1 == 0) {
2271                                 gen_nullptr_check(s1);
2272                                 gen_bound_check;
2273                                 }
2274                         var_to_reg_int(s3, src, REG_ITMP3);
2275                         if (has_ext_instr_set) {
2276                                 M_LADD(s2, s1, REG_ITMP1);
2277                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2278                                 }
2279                         else {
2280                                 M_LADD (s2, s1, REG_ITMP1);
2281                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2282                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2283                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
2284                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2285                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2286                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2287                                 }
2288                         break;
2289
2290
2291                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2292                                       /* op1 = type, val.a = field address            */
2293
2294                         /* if class isn't yet initialized, do it */
2295                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2296                                 /* call helper function which patches this code */
2297                                 a = dseg_addaddress(((fieldinfo *) iptr->val.a)->class);
2298                                 M_ALD(REG_ITMP1, REG_PV, a);
2299                                 a = dseg_addaddress(asm_check_clinit);
2300                                 M_ALD(REG_PV, REG_PV, a);
2301                                 M_JSR(REG_RA, REG_PV);
2302
2303                                 /* recompute pv */
2304                                 s1 = (int) ((u1*) mcodeptr - mcodebase);
2305                                 if (s1 <= 32768) {
2306                                         M_LDA(REG_PV, REG_RA, -s1);
2307                                         M_NOP;
2308
2309                                 } else {
2310                                         s4 ml = -s1, mh = 0;
2311                                         while (ml < -32768) { ml += 65536; mh--; }
2312                                         M_LDA(REG_PV, REG_RA, ml);
2313                                         M_LDAH(REG_PV, REG_PV, mh);
2314                                 }
2315                         }
2316
2317                         a = dseg_addaddress(&(((fieldinfo *)(iptr->val.a))->value));
2318                         M_ALD(REG_ITMP1, REG_PV, a);
2319                         switch (iptr->op1) {
2320                                 case TYPE_INT:
2321                                         var_to_reg_int(s2, src, REG_ITMP2);
2322                                         M_IST(s2, REG_ITMP1, 0);
2323                                         break;
2324                                 case TYPE_LNG:
2325                                         var_to_reg_int(s2, src, REG_ITMP2);
2326                                         M_LST(s2, REG_ITMP1, 0);
2327                                         break;
2328                                 case TYPE_ADR:
2329                                         var_to_reg_int(s2, src, REG_ITMP2);
2330                                         M_AST(s2, REG_ITMP1, 0);
2331                                         break;
2332                                 case TYPE_FLT:
2333                                         var_to_reg_flt(s2, src, REG_FTMP2);
2334                                         M_FST(s2, REG_ITMP1, 0);
2335                                         break;
2336                                 case TYPE_DBL:
2337                                         var_to_reg_flt(s2, src, REG_FTMP2);
2338                                         M_DST(s2, REG_ITMP1, 0);
2339                                         break;
2340                                 default: panic ("internal error");
2341                                 }
2342                         break;
2343
2344                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2345                                       /* op1 = type, val.a = field address            */
2346
2347                         /* if class isn't yet initialized, do it */
2348                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2349                                 /* call helper function which patches this code */
2350                                 a = dseg_addaddress(((fieldinfo *) iptr->val.a)->class);
2351                                 M_ALD(REG_ITMP1, REG_PV, a);
2352                                 a = dseg_addaddress(asm_check_clinit);
2353                                 M_ALD(REG_PV, REG_PV, a);
2354                                 M_JSR(REG_RA, REG_PV);
2355
2356                                 /* recompute pv */
2357                                 s1 = (int) ((u1*) mcodeptr - mcodebase);
2358                                 if (s1 <= 32768) {
2359                                         M_LDA(REG_PV, REG_RA, -s1);
2360                                         M_NOP;
2361
2362                                 } else {
2363                                         s4 ml = -s1, mh = 0;
2364                                         while (ml < -32768) { ml += 65536; mh--; }
2365                                         M_LDA(REG_PV, REG_RA, ml);
2366                                         M_LDAH(REG_PV, REG_PV, mh);
2367                                 }
2368                         }
2369
2370                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2371                         M_ALD(REG_ITMP1, REG_PV, a);
2372                         switch (iptr->op1) {
2373                                 case TYPE_INT:
2374                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2375                                         M_ILD(d, REG_ITMP1, 0);
2376                                         store_reg_to_var_int(iptr->dst, d);
2377                                         break;
2378                                 case TYPE_LNG:
2379                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2380                                         M_LLD(d, REG_ITMP1, 0);
2381                                         store_reg_to_var_int(iptr->dst, d);
2382                                         break;
2383                                 case TYPE_ADR:
2384                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2385                                         M_ALD(d, REG_ITMP1, 0);
2386                                         store_reg_to_var_int(iptr->dst, d);
2387                                         break;
2388                                 case TYPE_FLT:
2389                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2390                                         M_FLD(d, REG_ITMP1, 0);
2391                                         store_reg_to_var_flt(iptr->dst, d);
2392                                         break;
2393                                 case TYPE_DBL:
2394                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2395                                         M_DLD(d, REG_ITMP1, 0);
2396                                         store_reg_to_var_flt(iptr->dst, d);
2397                                         break;
2398                                 default: panic ("internal error");
2399                                 }
2400                         break;
2401
2402
2403                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2404                                       /* op1 = type, val.i = field offset             */
2405
2406                         a = ((fieldinfo *)(iptr->val.a))->offset;
2407                         switch (iptr->op1) {
2408                                 case TYPE_INT:
2409                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2410                                         var_to_reg_int(s2, src, REG_ITMP2);
2411                                         gen_nullptr_check(s1);
2412                                         M_IST(s2, s1, a);
2413                                         break;
2414                                 case TYPE_LNG:
2415                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2416                                         var_to_reg_int(s2, src, REG_ITMP2);
2417                                         gen_nullptr_check(s1);
2418                                         M_LST(s2, s1, a);
2419                                         break;
2420                                 case TYPE_ADR:
2421                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2422                                         var_to_reg_int(s2, src, REG_ITMP2);
2423                                         gen_nullptr_check(s1);
2424                                         M_AST(s2, s1, a);
2425                                         break;
2426                                 case TYPE_FLT:
2427                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2428                                         var_to_reg_flt(s2, src, REG_FTMP2);
2429                                         gen_nullptr_check(s1);
2430                                         M_FST(s2, s1, a);
2431                                         break;
2432                                 case TYPE_DBL:
2433                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2434                                         var_to_reg_flt(s2, src, REG_FTMP2);
2435                                         gen_nullptr_check(s1);
2436                                         M_DST(s2, s1, a);
2437                                         break;
2438                                 default: panic ("internal error");
2439                                 }
2440                         break;
2441
2442                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2443                                       /* op1 = type, val.i = field offset             */
2444
2445                         a = ((fieldinfo *)(iptr->val.a))->offset;
2446                         switch (iptr->op1) {
2447                                 case TYPE_INT:
2448                                         var_to_reg_int(s1, src, REG_ITMP1);
2449                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2450                                         gen_nullptr_check(s1);
2451                                         M_ILD(d, s1, a);
2452                                         store_reg_to_var_int(iptr->dst, d);
2453                                         break;
2454                                 case TYPE_LNG:
2455                                         var_to_reg_int(s1, src, REG_ITMP1);
2456                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2457                                         gen_nullptr_check(s1);
2458                                         M_LLD(d, s1, a);
2459                                         store_reg_to_var_int(iptr->dst, d);
2460                                         break;
2461                                 case TYPE_ADR:
2462                                         var_to_reg_int(s1, src, REG_ITMP1);
2463                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2464                                         gen_nullptr_check(s1);
2465                                         M_ALD(d, s1, a);
2466                                         store_reg_to_var_int(iptr->dst, d);
2467                                         break;
2468                                 case TYPE_FLT:
2469                                         var_to_reg_int(s1, src, REG_ITMP1);
2470                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2471                                         gen_nullptr_check(s1);
2472                                         M_FLD(d, s1, a);
2473                                         store_reg_to_var_flt(iptr->dst, d);
2474                                         break;
2475                                 case TYPE_DBL:
2476                                         var_to_reg_int(s1, src, REG_ITMP1);
2477                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2478                                         gen_nullptr_check(s1);
2479                                         M_DLD(d, s1, a);
2480                                         store_reg_to_var_flt(iptr->dst, d);
2481                                         break;
2482                                 default: panic ("internal error");
2483                                 }
2484                         break;
2485
2486
2487                 /* branch operations **************************************************/
2488
2489 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2490
2491                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2492
2493                         var_to_reg_int(s1, src, REG_ITMP1);
2494                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2495                         a = dseg_addaddress(asm_handle_exception);
2496                         M_ALD(REG_ITMP2, REG_PV, a);
2497                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2498                         M_NOP;              /* nop ensures that XPC is less than the end */
2499                                             /* of basic block                            */
2500                         ALIGNCODENOP;
2501                         break;
2502
2503                 case ICMD_GOTO:         /* ... ==> ...                                */
2504                                         /* op1 = target JavaVM pc                     */
2505                         M_BR(0);
2506                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2507                         ALIGNCODENOP;
2508                         break;
2509
2510                 case ICMD_JSR:          /* ... ==> ...                                */
2511                                         /* op1 = target JavaVM pc                     */
2512
2513                         M_BSR(REG_ITMP1, 0);
2514                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2515                         break;
2516
2517                 case ICMD_RET:          /* ... ==> ...                                */
2518                                         /* op1 = local variable                       */
2519
2520                         var = &(locals[iptr->op1][TYPE_ADR]);
2521                         if (var->flags & INMEMORY) {
2522                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2523                                 M_RET(REG_ZERO, REG_ITMP1);
2524                                 }
2525                         else
2526                                 M_RET(REG_ZERO, var->regoff);
2527                         ALIGNCODENOP;
2528                         break;
2529
2530                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2531                                         /* op1 = target JavaVM pc                     */
2532
2533                         var_to_reg_int(s1, src, REG_ITMP1);
2534                         M_BEQZ(s1, 0);
2535                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2536                         break;
2537
2538                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2539                                         /* op1 = target JavaVM pc                     */
2540
2541                         var_to_reg_int(s1, src, REG_ITMP1);
2542                         M_BNEZ(s1, 0);
2543                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2544                         break;
2545
2546                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2547                                         /* op1 = target JavaVM pc, val.i = constant   */
2548
2549                         var_to_reg_int(s1, src, REG_ITMP1);
2550                         if (iptr->val.i == 0) {
2551                                 M_BEQZ(s1, 0);
2552                                 }
2553                         else {
2554                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2555                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2556                                         }
2557                                 else {
2558                                         ICONST(REG_ITMP2, iptr->val.i);
2559                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2560                                         }
2561                                 M_BNEZ(REG_ITMP1, 0);
2562                                 }
2563                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2564                         break;
2565
2566                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2567                                         /* op1 = target JavaVM pc, val.i = constant   */
2568
2569                         var_to_reg_int(s1, src, REG_ITMP1);
2570                         if (iptr->val.i == 0) {
2571                                 M_BLTZ(s1, 0);
2572                                 }
2573                         else {
2574                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2575                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2576                                         }
2577                                 else {
2578                                         ICONST(REG_ITMP2, iptr->val.i);
2579                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2580                                         }
2581                                 M_BNEZ(REG_ITMP1, 0);
2582                                 }
2583                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2584                         break;
2585
2586                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2587                                         /* op1 = target JavaVM pc, val.i = constant   */
2588
2589                         var_to_reg_int(s1, src, REG_ITMP1);
2590                         if (iptr->val.i == 0) {
2591                                 M_BLEZ(s1, 0);
2592                                 }
2593                         else {
2594                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2595                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2596                                         }
2597                                 else {
2598                                         ICONST(REG_ITMP2, iptr->val.i);
2599                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2600                                         }
2601                                 M_BNEZ(REG_ITMP1, 0);
2602                                 }
2603                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2604                         break;
2605
2606                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2607                                         /* op1 = target JavaVM pc, val.i = constant   */
2608
2609                         var_to_reg_int(s1, src, REG_ITMP1);
2610                         if (iptr->val.i == 0) {
2611                                 M_BNEZ(s1, 0);
2612                                 }
2613                         else {
2614                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2615                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2616                                         }
2617                                 else {
2618                                         ICONST(REG_ITMP2, iptr->val.i);
2619                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2620                                         }
2621                                 M_BEQZ(REG_ITMP1, 0);
2622                                 }
2623                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2624                         break;
2625
2626                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2627                                         /* op1 = target JavaVM pc, val.i = constant   */
2628
2629                         var_to_reg_int(s1, src, REG_ITMP1);
2630                         if (iptr->val.i == 0) {
2631                                 M_BGTZ(s1, 0);
2632                                 }
2633                         else {
2634                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2635                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2636                                         }
2637                                 else {
2638                                         ICONST(REG_ITMP2, iptr->val.i);
2639                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2640                                         }
2641                                 M_BEQZ(REG_ITMP1, 0);
2642                                 }
2643                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2644                         break;
2645
2646                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2647                                         /* op1 = target JavaVM pc, val.i = constant   */
2648
2649                         var_to_reg_int(s1, src, REG_ITMP1);
2650                         if (iptr->val.i == 0) {
2651                                 M_BGEZ(s1, 0);
2652                                 }
2653                         else {
2654                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2655                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2656                                         }
2657                                 else {
2658                                         ICONST(REG_ITMP2, iptr->val.i);
2659                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2660                                         }
2661                                 M_BEQZ(REG_ITMP1, 0);
2662                                 }
2663                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2664                         break;
2665
2666                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2667                                         /* op1 = target JavaVM pc, val.l = constant   */
2668
2669                         var_to_reg_int(s1, src, REG_ITMP1);
2670                         if (iptr->val.l == 0) {
2671                                 M_BEQZ(s1, 0);
2672                                 }
2673                         else {
2674                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2675                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2676                                         }
2677                                 else {
2678                                         LCONST(REG_ITMP2, iptr->val.l);
2679                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2680                                         }
2681                                 M_BNEZ(REG_ITMP1, 0);
2682                                 }
2683                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2684                         break;
2685
2686                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2687                                         /* op1 = target JavaVM pc, val.l = constant   */
2688
2689                         var_to_reg_int(s1, src, REG_ITMP1);
2690                         if (iptr->val.l == 0) {
2691                                 M_BLTZ(s1, 0);
2692                                 }
2693                         else {
2694                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2695                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2696                                         }
2697                                 else {
2698                                         LCONST(REG_ITMP2, iptr->val.l);
2699                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2700                                         }
2701                                 M_BNEZ(REG_ITMP1, 0);
2702                                 }
2703                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2704                         break;
2705
2706                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2707                                         /* op1 = target JavaVM pc, val.l = constant   */
2708
2709                         var_to_reg_int(s1, src, REG_ITMP1);
2710                         if (iptr->val.l == 0) {
2711                                 M_BLEZ(s1, 0);
2712                                 }
2713                         else {
2714                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2715                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2716                                         }
2717                                 else {
2718                                         LCONST(REG_ITMP2, iptr->val.l);
2719                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2720                                         }
2721                                 M_BNEZ(REG_ITMP1, 0);
2722                                 }
2723                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2724                         break;
2725
2726                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2727                                         /* op1 = target JavaVM pc, val.l = constant   */
2728
2729                         var_to_reg_int(s1, src, REG_ITMP1);
2730                         if (iptr->val.l == 0) {
2731                                 M_BNEZ(s1, 0);
2732                                 }
2733                         else {
2734                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2735                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2736                                         }
2737                                 else {
2738                                         LCONST(REG_ITMP2, iptr->val.l);
2739                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2740                                         }
2741                                 M_BEQZ(REG_ITMP1, 0);
2742                                 }
2743                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2744                         break;
2745
2746                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2747                                         /* op1 = target JavaVM pc, val.l = constant   */
2748
2749                         var_to_reg_int(s1, src, REG_ITMP1);
2750                         if (iptr->val.l == 0) {
2751                                 M_BGTZ(s1, 0);
2752                                 }
2753                         else {
2754                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2755                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2756                                         }
2757                                 else {
2758                                         LCONST(REG_ITMP2, iptr->val.l);
2759                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2760                                         }
2761                                 M_BEQZ(REG_ITMP1, 0);
2762                                 }
2763                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2764                         break;
2765
2766                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2767                                         /* op1 = target JavaVM pc, val.l = constant   */
2768
2769                         var_to_reg_int(s1, src, REG_ITMP1);
2770                         if (iptr->val.l == 0) {
2771                                 M_BGEZ(s1, 0);
2772                                 }
2773                         else {
2774                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2775                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2776                                         }
2777                                 else {
2778                                         LCONST(REG_ITMP2, iptr->val.l);
2779                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2780                                         }
2781                                 M_BEQZ(REG_ITMP1, 0);
2782                                 }
2783                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2784                         break;
2785
2786                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2787                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2788                 case ICMD_IF_ACMPEQ:
2789
2790                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2791                         var_to_reg_int(s2, src, REG_ITMP2);
2792                         M_CMPEQ(s1, s2, REG_ITMP1);
2793                         M_BNEZ(REG_ITMP1, 0);
2794                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2795                         break;
2796
2797                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2798                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2799                 case ICMD_IF_ACMPNE:
2800
2801                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2802                         var_to_reg_int(s2, src, REG_ITMP2);
2803                         M_CMPEQ(s1, s2, REG_ITMP1);
2804                         M_BEQZ(REG_ITMP1, 0);
2805                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2806                         break;
2807
2808                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2809                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2810
2811                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2812                         var_to_reg_int(s2, src, REG_ITMP2);
2813                         M_CMPLT(s1, s2, REG_ITMP1);
2814                         M_BNEZ(REG_ITMP1, 0);
2815                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2816                         break;
2817
2818                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2819                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2820
2821                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2822                         var_to_reg_int(s2, src, REG_ITMP2);
2823                         M_CMPLE(s1, s2, REG_ITMP1);
2824                         M_BEQZ(REG_ITMP1, 0);
2825                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2826                         break;
2827
2828                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2829                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2830
2831                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2832                         var_to_reg_int(s2, src, REG_ITMP2);
2833                         M_CMPLE(s1, s2, REG_ITMP1);
2834                         M_BNEZ(REG_ITMP1, 0);
2835                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2836                         break;
2837
2838                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2839                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2840
2841                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2842                         var_to_reg_int(s2, src, REG_ITMP2);
2843                         M_CMPLT(s1, s2, REG_ITMP1);
2844                         M_BEQZ(REG_ITMP1, 0);
2845                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2846                         break;
2847
2848                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2849
2850                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2851                         break;
2852
2853                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2854                                         /* val.i = constant                           */
2855
2856                         var_to_reg_int(s1, src, REG_ITMP1);
2857                         d = reg_of_var(iptr->dst, REG_ITMP3);
2858                         s3 = iptr->val.i;
2859                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2860                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2861                                         M_CMPEQ(s1, REG_ZERO, d);
2862                                         store_reg_to_var_int(iptr->dst, d);
2863                                         break;
2864                                         }
2865                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2866                                         M_CMPEQ(s1, REG_ZERO, d);
2867                                         M_XOR_IMM(d, 1, d);
2868                                         store_reg_to_var_int(iptr->dst, d);
2869                                         break;
2870                                         }
2871                                 if (s1 == d) {
2872                                         M_MOV(s1, REG_ITMP1);
2873                                         s1 = REG_ITMP1;
2874                                         }
2875                                 ICONST(d, iptr[1].val.i);
2876                                 }
2877                         if ((s3 >= 0) && (s3 <= 255)) {
2878                                 M_CMOVEQ_IMM(s1, s3, d);
2879                                 }
2880                         else {
2881                                 ICONST(REG_ITMP2, s3);
2882                                 M_CMOVEQ(s1, REG_ITMP2, d);
2883                                 }
2884                         store_reg_to_var_int(iptr->dst, d);
2885                         break;
2886
2887                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2888                                         /* val.i = constant                           */
2889
2890                         var_to_reg_int(s1, src, REG_ITMP1);
2891                         d = reg_of_var(iptr->dst, REG_ITMP3);
2892                         s3 = iptr->val.i;
2893                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2894                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2895                                         M_CMPEQ(s1, REG_ZERO, d);
2896                                         store_reg_to_var_int(iptr->dst, d);
2897                                         break;
2898                                         }
2899                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2900                                         M_CMPEQ(s1, REG_ZERO, d);
2901                                         M_XOR_IMM(d, 1, d);
2902                                         store_reg_to_var_int(iptr->dst, d);
2903                                         break;
2904                                         }
2905                                 if (s1 == d) {
2906                                         M_MOV(s1, REG_ITMP1);
2907                                         s1 = REG_ITMP1;
2908                                         }
2909                                 ICONST(d, iptr[1].val.i);
2910                                 }
2911                         if ((s3 >= 0) && (s3 <= 255)) {
2912                                 M_CMOVNE_IMM(s1, s3, d);
2913                                 }
2914                         else {
2915                                 ICONST(REG_ITMP2, s3);
2916                                 M_CMOVNE(s1, REG_ITMP2, d);
2917                                 }
2918                         store_reg_to_var_int(iptr->dst, d);
2919                         break;
2920
2921                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2922                                         /* val.i = constant                           */
2923
2924                         var_to_reg_int(s1, src, REG_ITMP1);
2925                         d = reg_of_var(iptr->dst, REG_ITMP3);
2926                         s3 = iptr->val.i;
2927                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2928                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2929                                         M_CMPLT(s1, REG_ZERO, d);
2930                                         store_reg_to_var_int(iptr->dst, d);
2931                                         break;
2932                                         }
2933                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2934                                         M_CMPLE(REG_ZERO, s1, d);
2935                                         store_reg_to_var_int(iptr->dst, d);
2936                                         break;
2937                                         }
2938                                 if (s1 == d) {
2939                                         M_MOV(s1, REG_ITMP1);
2940                                         s1 = REG_ITMP1;
2941                                         }
2942                                 ICONST(d, iptr[1].val.i);
2943                                 }
2944                         if ((s3 >= 0) && (s3 <= 255)) {
2945                                 M_CMOVLT_IMM(s1, s3, d);
2946                                 }
2947                         else {
2948                                 ICONST(REG_ITMP2, s3);
2949                                 M_CMOVLT(s1, REG_ITMP2, d);
2950                                 }
2951                         store_reg_to_var_int(iptr->dst, d);
2952                         break;
2953
2954                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2955                                         /* val.i = constant                           */
2956
2957                         var_to_reg_int(s1, src, REG_ITMP1);
2958                         d = reg_of_var(iptr->dst, REG_ITMP3);
2959                         s3 = iptr->val.i;
2960                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2961                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2962                                         M_CMPLE(REG_ZERO, s1, d);
2963                                         store_reg_to_var_int(iptr->dst, d);
2964                                         break;
2965                                         }
2966                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2967                                         M_CMPLT(s1, REG_ZERO, d);
2968                                         store_reg_to_var_int(iptr->dst, d);
2969                                         break;
2970                                         }
2971                                 if (s1 == d) {
2972                                         M_MOV(s1, REG_ITMP1);
2973                                         s1 = REG_ITMP1;
2974                                         }
2975                                 ICONST(d, iptr[1].val.i);
2976                                 }
2977                         if ((s3 >= 0) && (s3 <= 255)) {
2978                                 M_CMOVGE_IMM(s1, s3, d);
2979                                 }
2980                         else {
2981                                 ICONST(REG_ITMP2, s3);
2982                                 M_CMOVGE(s1, REG_ITMP2, d);
2983                                 }
2984                         store_reg_to_var_int(iptr->dst, d);
2985                         break;
2986
2987                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2988                                         /* val.i = constant                           */
2989
2990                         var_to_reg_int(s1, src, REG_ITMP1);
2991                         d = reg_of_var(iptr->dst, REG_ITMP3);
2992                         s3 = iptr->val.i;
2993                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2994                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2995                                         M_CMPLT(REG_ZERO, s1, d);
2996                                         store_reg_to_var_int(iptr->dst, d);
2997                                         break;
2998                                         }
2999                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
3000                                         M_CMPLE(s1, REG_ZERO, d);
3001                                         store_reg_to_var_int(iptr->dst, d);
3002                                         break;
3003                                         }
3004                                 if (s1 == d) {
3005                                         M_MOV(s1, REG_ITMP1);
3006                                         s1 = REG_ITMP1;
3007                                         }
3008                                 ICONST(d, iptr[1].val.i);
3009                                 }
3010                         if ((s3 >= 0) && (s3 <= 255)) {
3011                                 M_CMOVGT_IMM(s1, s3, d);
3012                                 }
3013                         else {
3014                                 ICONST(REG_ITMP2, s3);
3015                                 M_CMOVGT(s1, REG_ITMP2, d);
3016                                 }
3017                         store_reg_to_var_int(iptr->dst, d);
3018                         break;
3019
3020                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
3021                                         /* val.i = constant                           */
3022
3023                         var_to_reg_int(s1, src, REG_ITMP1);
3024                         d = reg_of_var(iptr->dst, REG_ITMP3);
3025                         s3 = iptr->val.i;
3026                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
3027                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
3028                                         M_CMPLE(s1, REG_ZERO, d);
3029                                         store_reg_to_var_int(iptr->dst, d);
3030                                         break;
3031                                         }
3032                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
3033                                         M_CMPLT(REG_ZERO, s1, d);
3034                                         store_reg_to_var_int(iptr->dst, d);
3035                                         break;
3036                                         }
3037                                 if (s1 == d) {
3038                                         M_MOV(s1, REG_ITMP1);
3039                                         s1 = REG_ITMP1;
3040                                         }
3041                                 ICONST(d, iptr[1].val.i);
3042                                 }
3043                         if ((s3 >= 0) && (s3 <= 255)) {
3044                                 M_CMOVLE_IMM(s1, s3, d);
3045                                 }
3046                         else {
3047                                 ICONST(REG_ITMP2, s3);
3048                                 M_CMOVLE(s1, REG_ITMP2, d);
3049                                 }
3050                         store_reg_to_var_int(iptr->dst, d);
3051                         break;
3052
3053
3054                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
3055                 case ICMD_LRETURN:
3056                 case ICMD_ARETURN:
3057
3058 #ifdef USE_THREADS
3059                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3060                                 int disp;
3061                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3062                                 M_ALD(REG_PV, REG_PV, a);
3063                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3064                                 M_JSR(REG_RA, REG_PV);
3065                                 disp = -(int)((u1*) mcodeptr - mcodebase);
3066                                 M_LDA(REG_PV, REG_RA, disp);
3067                                 }
3068 #endif
3069                         var_to_reg_int(s1, src, REG_RESULT);
3070                         M_INTMOVE(s1, REG_RESULT);
3071                         goto nowperformreturn;
3072
3073                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
3074                 case ICMD_DRETURN:
3075
3076 #ifdef USE_THREADS
3077                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3078                                 int disp;
3079                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3080                                 M_ALD(REG_PV, REG_PV, a);
3081                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3082                                 M_JSR(REG_RA, REG_PV);
3083                                 disp = -(int)((u1*) mcodeptr - mcodebase);
3084                                 M_LDA(REG_PV, REG_RA, disp);
3085                                 }
3086 #endif
3087                         var_to_reg_flt(s1, src, REG_FRESULT);
3088                         M_FLTMOVE(s1, REG_FRESULT);
3089                         goto nowperformreturn;
3090
3091                 case ICMD_RETURN:      /* ...  ==> ...                                */
3092
3093 #ifdef USE_THREADS
3094                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3095                                 int disp;
3096                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3097                                 M_ALD(REG_PV, REG_PV, a);
3098                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3099                                 M_JSR(REG_RA, REG_PV);
3100                                 disp = -(int)((u1*) mcodeptr - mcodebase);
3101                                 M_LDA(REG_PV, REG_RA, disp);
3102                                 }
3103 #endif
3104
3105 nowperformreturn:
3106                         {
3107                         int r, p;
3108
3109                         p = parentargs_base;
3110
3111                         /* restore return address                                         */
3112
3113                         if (!isleafmethod)
3114                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
3115
3116                         /* restore saved registers                                        */
3117
3118                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
3119                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
3120                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
3121                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
3122
3123                         /* deallocate stack                                               */
3124
3125                         if (parentargs_base)
3126                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
3127
3128                         /* call trace function */
3129
3130                         if (runverbose) {
3131                                 M_LDA (REG_SP, REG_SP, -24);
3132                                 M_AST(REG_RA, REG_SP, 0);
3133                                 M_LST(REG_RESULT, REG_SP, 8);
3134                                 M_DST(REG_FRESULT, REG_SP,16);
3135                                 a = dseg_addaddress(method);
3136                                 M_ALD(argintregs[0], REG_PV, a);
3137                                 M_MOV(REG_RESULT, argintregs[1]);
3138                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);
3139                                 M_FLTMOVE(REG_FRESULT, argfltregs[3]);
3140                                 a = dseg_addaddress((void *) builtin_displaymethodstop);
3141                                 M_ALD(REG_PV, REG_PV, a);
3142                                 M_JSR (REG_RA, REG_PV);
3143                                 s1 = (int)((u1*) mcodeptr - mcodebase);
3144                                 if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3145                                 else {
3146                                         s4 ml=-s1, mh=0;
3147                                         while (ml<-32768) { ml+=65536; mh--; }
3148                                         M_LDA (REG_PV, REG_RA, ml );
3149                                         M_LDAH (REG_PV, REG_PV, mh );
3150                                         }
3151                                 M_DLD(REG_FRESULT, REG_SP,16);
3152                                 M_LLD(REG_RESULT, REG_SP, 8);
3153                                 M_ALD(REG_RA, REG_SP, 0);
3154                                 M_LDA (REG_SP, REG_SP, 24);
3155                                 }
3156
3157                         M_RET(REG_ZERO, REG_RA);
3158                         ALIGNCODENOP;
3159                         }
3160                         break;
3161
3162
3163                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3164                         {
3165                         s4 i, l, *s4ptr;
3166                         void **tptr;
3167
3168                         tptr = (void **) iptr->target;
3169
3170                         s4ptr = iptr->val.a;
3171                         l = s4ptr[1];                          /* low     */
3172                         i = s4ptr[2];                          /* high    */
3173
3174                         var_to_reg_int(s1, src, REG_ITMP1);
3175                         if (l == 0)
3176                                 {M_INTMOVE(s1, REG_ITMP1);}
3177                         else if (l <= 32768) {
3178                                 M_LDA(REG_ITMP1, s1, -l);
3179                                 }
3180                         else {
3181                                 ICONST(REG_ITMP2, l);
3182                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3183                                 }
3184                         i = i - l + 1;
3185
3186                         /* range check */
3187
3188                         if (i <= 256)
3189                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3190                         else {
3191                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3192                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3193                                 }
3194                         M_BEQZ(REG_ITMP2, 0);
3195
3196
3197                         /* codegen_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3198                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3199
3200                         /* build jump table top down and use address of lowest entry */
3201
3202                         /* s4ptr += 3 + i; */
3203                         tptr += i;
3204
3205                         while (--i >= 0) {
3206                                 /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
3207                                 dseg_addtarget((basicblock *) tptr[0]);
3208                                 --tptr;
3209                                 }
3210                         }
3211
3212                         /* length of dataseg after last dseg_addtarget is used by load */
3213
3214                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3215                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
3216                         M_JMP(REG_ZERO, REG_ITMP2);
3217                         ALIGNCODENOP;
3218                         break;
3219
3220
3221                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3222                         {
3223                         s4 i, l, val, *s4ptr;
3224                         void **tptr;
3225
3226                         tptr = (void **) iptr->target;
3227
3228                         s4ptr = iptr->val.a;
3229                         l = s4ptr[0];                          /* default  */
3230                         i = s4ptr[1];                          /* count    */
3231
3232                         MCODECHECK((i<<2)+8);
3233                         var_to_reg_int(s1, src, REG_ITMP1);
3234                         while (--i >= 0) {
3235                                 s4ptr += 2;
3236                                 ++tptr;
3237
3238                                 val = s4ptr[0];
3239                                 if ((val >= 0) && (val <= 255)) {
3240                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3241                                         }
3242                                 else {
3243                                         if ((val >= -32768) && (val <= 32767)) {
3244                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3245                                                 }
3246                                         else {
3247                                                 a = dseg_adds4 (val);
3248                                                 M_ILD(REG_ITMP2, REG_PV, a);
3249                                                 }
3250                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3251                                         }
3252                                 M_BNEZ(REG_ITMP2, 0);
3253                                 /* codegen_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3254                                 codegen_addreference((basicblock *) tptr[0], mcodeptr);
3255                                 }
3256
3257                         M_BR(0);
3258                         /* codegen_addreference(BlockPtrOfPC(l), mcodeptr); */
3259
3260                         tptr = (void **) iptr->target;
3261                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3262
3263                         ALIGNCODENOP;
3264                         break;
3265                         }
3266
3267
3268                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3269                                         /* op1 = return type, val.a = function pointer*/
3270                         s3 = 3;
3271                         goto gen_method;
3272
3273                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3274                                         /* op1 = return type, val.a = function pointer*/
3275                         s3 = 2;
3276                         goto gen_method;
3277
3278                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3279                                         /* op1 = return type, val.a = function pointer*/
3280                         s3 = 1;
3281                         goto gen_method;
3282
3283                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3284                                         /* op1 = arg count, val.a = method pointer    */
3285
3286                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3287                                         /* op1 = arg count, val.a = method pointer    */
3288
3289                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3290                                         /* op1 = arg count, val.a = method pointer    */
3291
3292                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3293                                         /* op1 = arg count, val.a = method pointer    */
3294
3295                         s3 = iptr->op1;
3296
3297 gen_method: {
3298                         methodinfo   *m;
3299                         classinfo    *ci;
3300
3301                         MCODECHECK((s3 << 1) + 64);
3302
3303                         /* copy arguments to registers or stack location                  */
3304
3305                         for (; --s3 >= 0; src = src->prev) {
3306                                 if (src->varkind == ARGVAR)
3307                                         continue;
3308                                 if (IS_INT_LNG_TYPE(src->type)) {
3309                                         if (s3 < INT_ARG_CNT) {
3310                                                 s1 = argintregs[s3];
3311                                                 var_to_reg_int(d, src, s1);
3312                                                 M_INTMOVE(d, s1);
3313                                                 }
3314                                         else  {
3315                                                 var_to_reg_int(d, src, REG_ITMP1);
3316                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3317                                                 }
3318                                         }
3319                                 else
3320                                         if (s3 < FLT_ARG_CNT) {
3321                                                 s1 = argfltregs[s3];
3322                                                 var_to_reg_flt(d, src, s1);
3323                                                 M_FLTMOVE(d, s1);
3324                                                 }
3325                                         else {
3326                                                 var_to_reg_flt(d, src, REG_FTMP1);
3327                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3328                                                 }
3329                                 } /* end of for */
3330
3331                         m = iptr->val.a;
3332                         switch (iptr->opc) {
3333                                 case ICMD_BUILTIN3:
3334                                 case ICMD_BUILTIN2:
3335                                 case ICMD_BUILTIN1:
3336                                         a = dseg_addaddress ((void*) (m));
3337
3338                                         M_ALD(REG_PV, REG_PV, a); /* Pointer to built-in-function */
3339                                         d = iptr->op1;
3340                                         goto makeactualcall;
3341
3342                                 case ICMD_INVOKESTATIC:
3343                                 case ICMD_INVOKESPECIAL:
3344                                         a = dseg_addaddress (m->stubroutine);
3345
3346                                         M_ALD(REG_PV, REG_PV, a );       /* method pointer in r27 */
3347
3348                                         d = m->returntype;
3349                                         goto makeactualcall;
3350
3351                                 case ICMD_INVOKEVIRTUAL:
3352
3353                                         gen_nullptr_check(argintregs[0]);
3354                                         M_ALD(REG_METHODPTR, argintregs[0],
3355                                                                  OFFSET(java_objectheader, vftbl));
3356                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
3357                                                                 sizeof(methodptr) * m->vftblindex);
3358
3359                                         d = m->returntype;
3360                                         goto makeactualcall;
3361
3362                                 case ICMD_INVOKEINTERFACE:
3363                                         ci = m->class;
3364
3365                                         gen_nullptr_check(argintregs[0]);
3366                                         M_ALD(REG_METHODPTR, argintregs[0],
3367                                                                  OFFSET(java_objectheader, vftbl));
3368                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
3369                                               OFFSET(vftbl, interfacetable[0]) -
3370                                               sizeof(methodptr*) * ci->index);
3371                                         M_ALD(REG_PV, REG_METHODPTR,
3372                                                             sizeof(methodptr) * (m - ci->methods));
3373
3374                                         d = m->returntype;
3375                                         goto makeactualcall;
3376
3377                                 default:
3378                                         d = 0;
3379                                         error ("Unkown ICMD-Command: %d", iptr->opc);
3380                                 }
3381
3382 makeactualcall:
3383
3384                         M_JSR (REG_RA, REG_PV);
3385
3386                         /* recompute pv */
3387
3388                         s1 = (int)((u1*) mcodeptr - mcodebase);
3389                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3390                         else {
3391                                 s4 ml=-s1, mh=0;
3392                                 while (ml<-32768) { ml+=65536; mh--; }
3393                                 M_LDA (REG_PV, REG_RA, ml );
3394                                 M_LDAH (REG_PV, REG_PV, mh );
3395                                 }
3396
3397                         /* d contains return type */
3398
3399                         if (d != TYPE_VOID) {
3400                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3401                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3402                                         M_INTMOVE(REG_RESULT, s1);
3403                                         store_reg_to_var_int(iptr->dst, s1);
3404                                         }
3405                                 else {
3406                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3407                                         M_FLTMOVE(REG_FRESULT, s1);
3408                                         store_reg_to_var_flt(iptr->dst, s1);
3409                                         }
3410                                 }
3411                         }
3412                         break;
3413
3414
3415                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3416
3417                                       /* op1:   0 == array, 1 == class                */
3418                                       /* val.a: (classinfo*) superclass               */
3419
3420 /*          superclass is an interface:
3421  *
3422  *          return (sub != NULL) &&
3423  *                 (sub->vftbl->interfacetablelength > super->index) &&
3424  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3425  *
3426  *          superclass is a class:
3427  *
3428  *          return ((sub != NULL) && (0
3429  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3430  *                  super->vftbl->diffvall));
3431  */
3432
3433                         {
3434                         classinfo *super = (classinfo*) iptr->val.a;
3435
3436                         var_to_reg_int(s1, src, REG_ITMP1);
3437                         d = reg_of_var(iptr->dst, REG_ITMP3);
3438                         if (s1 == d) {
3439                                 M_MOV(s1, REG_ITMP1);
3440                                 s1 = REG_ITMP1;
3441                                 }
3442                         M_CLR(d);
3443                         if (iptr->op1) {                               /* class/interface */
3444                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3445                                         M_BEQZ(s1, 6);
3446                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3447                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3448                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3449                                         M_BLEZ(REG_ITMP2, 2);
3450                                         M_ALD(REG_ITMP1, REG_ITMP1,
3451                                               OFFSET(vftbl, interfacetable[0]) -
3452                                               super->index * sizeof(methodptr*));
3453                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3454                                         }
3455                                 else {                                     /* class           */
3456 /*
3457                                         s2 = super->vftbl->diffval;
3458                                         M_BEQZ(s1, 4 + (s2 > 255));
3459                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3460                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3461                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3462                                         if (s2 <= 255)
3463                                                 M_CMPULE_IMM(REG_ITMP1, s2, d);
3464                                         else {
3465                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3466                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3467                                                 }
3468 */
3469                                         M_BEQZ(s1, 7);
3470                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3471                                         a = dseg_addaddress ((void*) super->vftbl);
3472                                         M_ALD(REG_ITMP2, REG_PV, a);
3473                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3474                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3475                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3476                                         M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3477                                         M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3478                                         }
3479                                 }
3480                         else
3481                                 panic ("internal error: no inlined array instanceof");
3482                         }
3483                         store_reg_to_var_int(iptr->dst, d);
3484                         break;
3485
3486                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3487
3488                                       /* op1:   0 == array, 1 == class                */
3489                                       /* val.a: (classinfo*) superclass               */
3490
3491 /*          superclass is an interface:
3492  *
3493  *          OK if ((sub == NULL) ||
3494  *                 (sub->vftbl->interfacetablelength > super->index) &&
3495  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3496  *
3497  *          superclass is a class:
3498  *
3499  *          OK if ((sub == NULL) || (0
3500  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3501  *                 super->vftbl->diffvall));
3502  */
3503
3504                         {
3505                         classinfo *super = (classinfo*) iptr->val.a;
3506
3507                         d = reg_of_var(iptr->dst, REG_ITMP3);
3508                         var_to_reg_int(s1, src, d);
3509                         if (iptr->op1) {                               /* class/interface */
3510                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3511                                         M_BEQZ(s1, 6);
3512                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3513                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3514                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3515                                         M_BLEZ(REG_ITMP2, 0);
3516                                         codegen_addxcastrefs(mcodeptr);
3517                                         M_ALD(REG_ITMP2, REG_ITMP1,
3518                                               OFFSET(vftbl, interfacetable[0]) -
3519                                               super->index * sizeof(methodptr*));
3520                                         M_BEQZ(REG_ITMP2, 0);
3521                                         codegen_addxcastrefs(mcodeptr);
3522                                         }
3523                                 else {                                     /* class           */
3524 /*
3525                                         s2 = super->vftbl->diffval;
3526                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3527                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3528                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3529                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3530                                         if (s2 == 0) {
3531                                                 M_BNEZ(REG_ITMP1, 0);
3532                                                 }
3533                                         else if (s2 <= 255) {
3534                                                 M_CMPULE_IMM(REG_ITMP1, s2, REG_ITMP2);
3535                                                 M_BEQZ(REG_ITMP2, 0);
3536                                                 }
3537                                         else {
3538                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3539                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3540                                                 M_BEQZ(REG_ITMP2, 0);
3541                                                 }
3542 */
3543                                         M_BEQZ(s1, 8 + (d == REG_ITMP3));
3544                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3545                                         a = dseg_addaddress ((void*) super->vftbl);
3546                                         M_ALD(REG_ITMP2, REG_PV, a);
3547                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3548                                         if (d != REG_ITMP3) {
3549                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3550                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3551                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3552                                                 }
3553                                         else {
3554                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, baseval));
3555                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3556                                                 M_ALD(REG_ITMP2, REG_PV, a);
3557                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3558                                                 }
3559                                         M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3560                                         M_BEQZ(REG_ITMP2, 0);
3561                                         codegen_addxcastrefs(mcodeptr);
3562                                         }
3563                                 }
3564                         else
3565                                 panic ("internal error: no inlined array checkcast");
3566                         }
3567                         M_INTMOVE(s1, d);
3568                         store_reg_to_var_int(iptr->dst, d);
3569                         break;
3570
3571                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3572
3573                         var_to_reg_int(s1, src, REG_ITMP1);
3574                         M_BLTZ(s1, 0);
3575                         codegen_addxcheckarefs(mcodeptr);
3576                         break;
3577
3578                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3579                                       /* op1 = dimension, val.a = array descriptor    */
3580
3581                         /* check for negative sizes and copy sizes to stack if necessary  */
3582
3583                         MCODECHECK((iptr->op1 << 1) + 64);
3584
3585                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3586                                 var_to_reg_int(s2, src, REG_ITMP1);
3587                                 M_BLTZ(s2, 0);
3588                                 codegen_addxcheckarefs(mcodeptr);
3589
3590                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3591
3592                                 if (src->varkind != ARGVAR) {
3593                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3594                                         }
3595                                 }
3596
3597                         /* a0 = dimension count */
3598
3599                         ICONST(argintregs[0], iptr->op1);
3600
3601                         /* a1 = arraydescriptor */
3602
3603                         a = dseg_addaddress(iptr->val.a);
3604                         M_ALD(argintregs[1], REG_PV, a);
3605
3606                         /* a2 = pointer to dimensions = stack pointer */
3607
3608                         M_INTMOVE(REG_SP, argintregs[2]);
3609
3610                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3611                         M_ALD(REG_PV, REG_PV, a);
3612                         M_JSR(REG_RA, REG_PV);
3613                         s1 = (int)((u1*) mcodeptr - mcodebase);
3614                         if (s1 <= 32768)
3615                                 M_LDA (REG_PV, REG_RA, -s1);
3616                         else {
3617                                 s4 ml = -s1, mh = 0;
3618                                 while (ml < -32768) {ml += 65536; mh--;}
3619                                 M_LDA(REG_PV, REG_RA, ml);
3620                                 M_LDAH(REG_PV, REG_PV, mh);
3621                             }
3622                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3623                         M_INTMOVE(REG_RESULT, s1);
3624                         store_reg_to_var_int(iptr->dst, s1);
3625                         break;
3626
3627
3628                 default: error ("Unknown pseudo command: %d", iptr->opc);
3629
3630
3631
3632         } /* switch */
3633
3634         } /* for instruction */
3635
3636         /* copy values to interface registers */
3637
3638         src = bptr->outstack;
3639         len = bptr->outdepth;
3640         MCODECHECK(64+len);
3641         while (src) {
3642                 len--;
3643                 if ((src->varkind != STACKVAR)) {
3644                         s2 = src->type;
3645                         if (IS_FLT_DBL_TYPE(s2)) {
3646                                 var_to_reg_flt(s1, src, REG_FTMP1);
3647                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3648                                         M_FLTMOVE(s1,interfaces[len][s2].regoff);
3649                                         }
3650                                 else {
3651                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3652                                         }
3653                                 }
3654                         else {
3655                                 var_to_reg_int(s1, src, REG_ITMP1);
3656                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3657                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3658                                         }
3659                                 else {
3660                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3661                                         }
3662                                 }
3663                         }
3664                 src = src->prev;
3665                 }
3666         } /* if (bptr -> flags >= BBREACHED) */
3667         } /* for basic block */
3668
3669         /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
3670
3671         codegen_createlinenumbertable();
3672
3673         {
3674         /* generate bound check stubs */
3675
3676         s4 *xcodeptr = NULL;
3677
3678         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3679                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3680                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3681                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (4 + 4));
3682                         continue;
3683                 }
3684
3685
3686                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3687                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3688
3689                 MCODECHECK(8);
3690
3691                 M_MOV(xboundrefs->reg, REG_ITMP1);
3692                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos - 4);
3693
3694                 if (xcodeptr != NULL) {
3695                         M_BR(xcodeptr - mcodeptr - 1);
3696
3697                 } else {
3698                         xcodeptr = mcodeptr;
3699
3700                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3701                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3702
3703                         a = dseg_addaddress(string_java_lang_ArrayIndexOutOfBoundsException);
3704                         M_ALD(argintregs[0], REG_PV, a);
3705                         M_MOV(REG_ITMP1, argintregs[1]);
3706
3707                         a = dseg_addaddress(new_exception_int);
3708                         M_ALD(REG_PV, REG_PV, a);
3709                         M_JSR(REG_RA, REG_PV);
3710
3711                         /* recompute pv */
3712                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3713                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3714                         else {
3715                                 s4 ml = -s1, mh = 0;
3716                                 while (ml < -32768) { ml += 65536; mh--; }
3717                                 M_LDA(REG_PV, REG_RA, ml);
3718                                 M_LDAH(REG_PV, REG_PV, mh);
3719                         }
3720
3721                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3722
3723                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3724                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3725
3726                         a = dseg_addaddress(asm_handle_exception);
3727                         M_ALD(REG_ITMP3, REG_PV, a);
3728
3729                         M_JMP(REG_ZERO, REG_ITMP3);
3730                 }
3731         }
3732
3733         /* generate negative array size check stubs */
3734
3735         xcodeptr = NULL;
3736
3737         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3738                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3739                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3740                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3741                         continue;
3742                 }
3743
3744                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3745                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3746
3747                 MCODECHECK(8);
3748
3749                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos - 4);
3750
3751                 if (xcodeptr != NULL) {
3752                         M_BR(xcodeptr - mcodeptr - 1);
3753
3754                 } else {
3755                         xcodeptr = mcodeptr;
3756
3757                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3758                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3759
3760                         a = dseg_addaddress(string_java_lang_NegativeArraySizeException);
3761                         M_ALD(argintregs[0], REG_PV, a);
3762
3763                         a = dseg_addaddress(new_exception);
3764                         M_ALD(REG_PV, REG_PV, a);
3765                         M_JSR(REG_RA, REG_PV);
3766
3767                         /* recompute pv */
3768                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3769                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3770                         else {
3771                                 s4 ml = -s1, mh = 0;
3772                                 while (ml < -32768) { ml += 65536; mh--; }
3773                                 M_LDA(REG_PV, REG_RA, ml);
3774                                 M_LDAH(REG_PV, REG_PV, mh);
3775                         }
3776
3777                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3778
3779                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3780                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3781
3782                         a = dseg_addaddress(asm_handle_exception);
3783                         M_ALD(REG_ITMP3, REG_PV, a);
3784
3785                         M_JMP(REG_ZERO, REG_ITMP3);
3786                 }
3787         }
3788
3789         /* generate cast check stubs */
3790
3791         xcodeptr = NULL;
3792
3793         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3794                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3795                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3796                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3797                         continue;
3798                 }
3799
3800                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3801                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3802
3803                 MCODECHECK(8);
3804
3805                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos - 4);
3806
3807                 if (xcodeptr != NULL) {
3808                         M_BR(xcodeptr - mcodeptr - 1);
3809
3810                 } else {
3811                         xcodeptr = mcodeptr;
3812
3813                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3814                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3815
3816                         a = dseg_addaddress(string_java_lang_ClassCastException);
3817                         M_ALD(argintregs[0], REG_PV, a);
3818
3819                         a = dseg_addaddress(new_exception);
3820                         M_ALD(REG_PV, REG_PV, a);
3821                         M_JSR(REG_RA, REG_PV);
3822
3823                         /* recompute pv */
3824                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3825                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3826                         else {
3827                                 s4 ml = -s1, mh = 0;
3828                                 while (ml < -32768) { ml += 65536; mh--; }
3829                                 M_LDA(REG_PV, REG_RA, ml);
3830                                 M_LDAH(REG_PV, REG_PV, mh);
3831                         }
3832
3833                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3834
3835                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3836                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3837
3838                         a = dseg_addaddress(asm_handle_exception);
3839                         M_ALD(REG_ITMP3, REG_PV, a);
3840
3841                         M_JMP(REG_ZERO, REG_ITMP3);
3842                 }
3843         }
3844
3845         /* generate null pointer check stubs */
3846
3847         xcodeptr = NULL;
3848
3849         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3850                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3851                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3852                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3853                         continue;
3854                 }
3855
3856                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3857                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3858
3859                 MCODECHECK(8);
3860
3861                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3862
3863                 if (xcodeptr != NULL) {
3864                         M_BR(xcodeptr - mcodeptr - 1);
3865
3866                 } else {
3867                         xcodeptr = mcodeptr;
3868
3869                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3870                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3871
3872                         a = dseg_addaddress(string_java_lang_NullPointerException);
3873                         M_ALD(argintregs[0], REG_PV, a);
3874
3875                         a = dseg_addaddress(new_exception);
3876                         M_ALD(REG_PV, REG_PV, a);
3877                         M_JSR(REG_RA, REG_PV);
3878
3879                         /* recompute pv */
3880                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3881                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3882                         else {
3883                                 s4 ml = -s1, mh = 0;
3884                                 while (ml < -32768) { ml += 65536; mh--; }
3885                                 M_LDA(REG_PV, REG_RA, ml);
3886                                 M_LDAH(REG_PV, REG_PV, mh);
3887                         }
3888
3889                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3890
3891                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3892                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3893
3894                         a = dseg_addaddress(asm_handle_exception);
3895                         M_ALD(REG_ITMP3, REG_PV, a);
3896
3897                         M_JMP(REG_ZERO, REG_ITMP3);
3898                 }
3899         }
3900         }
3901
3902         codegen_finish((int)((u1*) mcodeptr - mcodebase));
3903 }
3904
3905
3906 /* function createcompilerstub *************************************************
3907
3908         creates a stub routine which calls the compiler
3909
3910 *******************************************************************************/
3911
3912 #define COMPSTUBSIZE    3
3913
3914 u1 *createcompilerstub(methodinfo *m)
3915 {
3916         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
3917         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
3918
3919                                             /* code for the stub                  */
3920         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
3921         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
3922                                                in reg 0 is used as method pointer */
3923         s[1] = (u8) m;                      /* literals to be adressed            */
3924         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3925
3926 #ifdef STATISTICS
3927         count_cstub_len += COMPSTUBSIZE * 8;
3928 #endif
3929
3930         return (u1 *) s;
3931 }
3932
3933
3934 /* function removecompilerstub *************************************************
3935
3936      deletes a compilerstub from memory  (simply by freeing it)
3937
3938 *******************************************************************************/
3939
3940 void removecompilerstub(u1 *stub)
3941 {
3942         CFREE(stub, COMPSTUBSIZE * 8);
3943 }
3944
3945
3946 /* function: createnativestub **************************************************
3947
3948         creates a stub routine which calls a native method
3949
3950 *******************************************************************************/
3951
3952 #define NATIVESTUBSIZE      44
3953 #define NATIVEVERBOSESIZE   39 + 13
3954 #define NATIVESTUBOFFSET    8
3955
3956 u1 *createnativestub(functionptr f, methodinfo *m)
3957 {
3958         u8 *s;                              /* memory pointer to hold the stub    */
3959         u8 *cs;
3960         s4 *mcodeptr;                       /* code generation pointer            */
3961         int stackframesize = 0;             /* size of stackframe if needed       */
3962         int disp;
3963         int stubsize;
3964
3965         reg_init();
3966         descriptor2types(m);                /* set paramcount and paramtypes      */
3967
3968         stubsize = runverbose ? NATIVESTUBSIZE + NATIVEVERBOSESIZE : NATIVESTUBSIZE;
3969         s = CNEW(u8, stubsize);             /* memory to hold the stub            */
3970         cs = s + NATIVESTUBOFFSET;
3971         mcodeptr = (s4 *) (cs);             /* code generation pointer            */
3972
3973         *(cs-1) = (u8) f;                   /* address of native method           */
3974         *(cs-2) = (u8) (&_exceptionptr);    /* address of exceptionptr            */
3975         *(cs-3) = (u8) asm_handle_nat_exception; /* addr of asm exception handler */
3976         *(cs-4) = (u8) (&env);              /* addr of jni_environement           */
3977         *(cs-5) = (u8) builtin_trace_args;
3978         *(cs-6) = (u8) m;
3979         *(cs-7) = (u8) builtin_displaymethodstop;
3980         *(cs-8) = (u8) m->class;
3981
3982         M_LDA(REG_SP, REG_SP, -8);          /* build up stackframe                */
3983         M_AST(REG_RA, REG_SP, 0);           /* store return address               */
3984
3985         /* max. 39 instructions */
3986         if (runverbose) {
3987                 int p;
3988                 int t;
3989                 M_LDA(REG_SP, REG_SP, -(14 * 8));
3990                 M_AST(REG_RA, REG_SP, 1 * 8);
3991
3992                 /* save integer argument registers */
3993                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
3994                         M_LST(argintregs[p], REG_SP,  (2 + p) * 8);
3995                 }
3996
3997                 /* save and copy float arguments into integer registers */
3998                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
3999                         t = m->paramtypes[p];
4000
4001                         if (IS_FLT_DBL_TYPE(t)) {
4002                                 if (IS_2_WORD_TYPE(t)) {
4003                                         M_DST(argfltregs[p], REG_SP, (8 + p) * 8);
4004                                         M_LLD(argintregs[p], REG_SP, (8 + p) * 8);
4005
4006                                 } else {
4007                                         M_FST(argfltregs[p], REG_SP, (8 + p) * 8);
4008                                         M_ILD(argintregs[p], REG_SP, (8 + p) * 8);
4009                                 }
4010
4011                         } else {
4012                                 M_DST(argfltregs[p], REG_SP, (8 + p) * 8);
4013                         }
4014                 }
4015
4016                 M_ALD(REG_ITMP1, REG_PV, -6 * 8);
4017                 M_AST(REG_ITMP1, REG_SP, 0);
4018                 M_ALD(REG_PV, REG_PV, -5 * 8);
4019                 M_JSR(REG_RA, REG_PV);
4020                 disp = -(int) (mcodeptr - (s4*) cs) * 4;
4021                 M_LDA(REG_PV, REG_RA, disp);
4022
4023                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
4024                         M_LLD(argintregs[p], REG_SP, (2 + p) * 8);
4025                 }
4026
4027                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
4028                         t = m->paramtypes[p];
4029
4030                         if (IS_FLT_DBL_TYPE(t)) {
4031                                 if (IS_2_WORD_TYPE(t)) {
4032                                         M_DLD(argfltregs[p], REG_SP, (8 + p) * 8);
4033
4034                                 } else {
4035                                         M_FLD(argfltregs[p], REG_SP, (8 + p) * 8);
4036                                 }
4037
4038                         } else {
4039                                 M_DLD(argfltregs[p], REG_SP, (8 + p) * 8);
4040                         }
4041                 }
4042
4043                 M_ALD(REG_RA, REG_SP, 1 * 8);
4044                 M_LDA(REG_SP, REG_SP, 14 * 8);
4045         }
4046
4047         /* save argument registers on stack -- if we have to */
4048         if ((m->flags & ACC_STATIC && m->paramcount > (INT_ARG_CNT - 2)) || m->paramcount > (INT_ARG_CNT - 1)) {
4049                 int i;
4050                 int paramshiftcnt = (m->flags & ACC_STATIC) ? 2 : 1;
4051                 int stackparamcnt = (m->paramcount > INT_ARG_CNT) ? m->paramcount - INT_ARG_CNT : 0;
4052
4053                 stackframesize = stackparamcnt + paramshiftcnt;
4054
4055                 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4056
4057                 /* copy stack arguments into new stack frame -- if any */
4058                 for (i = 0; i < stackparamcnt; i++) {
4059                         M_LLD(REG_ITMP1, REG_SP, (stackparamcnt + 1 + i) * 8);
4060                         M_LST(REG_ITMP1, REG_SP, (paramshiftcnt + i) * 8);
4061                 }
4062
4063                 if (m->flags & ACC_STATIC) {
4064                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4065                                 M_DST(argfltregs[5], REG_SP, 1 * 8);
4066                         } else {
4067                                 M_LST(argintregs[5], REG_SP, 1 * 8);
4068                         }
4069
4070                         if (IS_FLT_DBL_TYPE(m->paramtypes[4])) {
4071                                 M_DST(argfltregs[4], REG_SP, 0 * 8);
4072                         } else {
4073                                 M_LST(argintregs[4], REG_SP, 0 * 8);
4074                         }
4075
4076                 } else {
4077                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4078                                 M_DST(argfltregs[5], REG_SP, 0 * 8);
4079                         } else {
4080                                 M_LST(argintregs[5], REG_SP, 0 * 8);
4081                         }
4082                 }
4083         }
4084
4085         if (m->flags & ACC_STATIC) {
4086                 M_MOV(argintregs[3], argintregs[5]);
4087                 M_MOV(argintregs[2], argintregs[4]);
4088                 M_MOV(argintregs[1], argintregs[3]);
4089                 M_MOV(argintregs[0], argintregs[2]);
4090                 M_FMOV(argfltregs[3], argfltregs[5]);
4091                 M_FMOV(argfltregs[2], argfltregs[4]);
4092                 M_FMOV(argfltregs[1], argfltregs[3]);
4093                 M_FMOV(argfltregs[0], argfltregs[2]);
4094
4095                 /* put class into second argument register */
4096                 M_ALD(argintregs[1], REG_PV, -8 * 8);
4097
4098         } else {
4099                 M_MOV(argintregs[4], argintregs[5]);
4100                 M_MOV(argintregs[3], argintregs[4]);
4101                 M_MOV(argintregs[2], argintregs[3]);
4102                 M_MOV(argintregs[1], argintregs[2]);
4103                 M_MOV(argintregs[0], argintregs[1]);
4104                 M_FMOV(argfltregs[4], argfltregs[5]);
4105                 M_FMOV(argfltregs[3], argfltregs[4]);
4106                 M_FMOV(argfltregs[2], argfltregs[3]);
4107                 M_FMOV(argfltregs[1], argfltregs[2]);
4108                 M_FMOV(argfltregs[0], argfltregs[1]);
4109         }
4110
4111         /* put env into first argument register */
4112         M_ALD(argintregs[0], REG_PV, -4 * 8);
4113
4114         M_ALD(REG_PV, REG_PV, -1 * 8);      /* load adress of native method       */
4115         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4116         disp = -(int) (mcodeptr - (s4*) cs) * 4;
4117         M_LDA(REG_PV, REG_RA, disp);        /* recompute pv from ra               */
4118
4119         /* remove stackframe if there is one */
4120         if (stackframesize) {
4121                 M_LDA(REG_SP, REG_SP, stackframesize * 8);
4122         }
4123
4124         /* 13 instructions */
4125         if (runverbose) {
4126                 M_LDA(REG_SP, REG_SP, -(2 * 8));
4127                 M_ALD(argintregs[0], REG_PV, -6 * 8); /* load method adress           */
4128                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4129                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4130                 M_MOV(REG_RESULT, argintregs[1]);
4131                 M_FMOV(REG_FRESULT, argfltregs[2]);
4132                 M_FMOV(REG_FRESULT, argfltregs[3]);
4133                 M_ALD(REG_PV, REG_PV, -7 * 8);  /* builtin_displaymethodstop          */
4134                 M_JSR(REG_RA, REG_PV);
4135                 disp = -(int) (mcodeptr - (s4*) cs) * 4;
4136                 M_LDA(REG_PV, REG_RA, disp);
4137                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4138                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4139                 M_LDA(REG_SP, REG_SP, 2 * 8);
4140         }
4141
4142         M_ALD(REG_ITMP3, REG_PV, -2 * 8);   /* get address of exceptionptr        */
4143         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4144         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4145
4146         M_ALD(REG_RA, REG_SP, 0);           /* load return address                */
4147         M_LDA(REG_SP, REG_SP, 8);           /* remove stackframe                  */
4148         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4149
4150         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4151
4152         M_ALD(REG_RA, REG_SP, 0);           /* load return address                */
4153         M_LDA(REG_SP, REG_SP, 8);           /* remove stackframe                  */
4154         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4155         M_ALD(REG_ITMP3, REG_PV, -3 * 8);   /* load asm exception handler address */
4156         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4157
4158 #if 0
4159         dolog_plain("stubsize: %d (for %d params)\n", (int) (mcodeptr - (s4*) s), m->paramcount);
4160 #endif
4161
4162 #ifdef STATISTICS
4163         count_nstub_len += NATIVESTUBSIZE * 8;
4164 #endif
4165
4166         return (u1*) (s + NATIVESTUBOFFSET);
4167 }
4168
4169
4170 /* function: removenativestub **************************************************
4171
4172     removes a previously created native-stub from memory
4173
4174 *******************************************************************************/
4175
4176 void removenativestub(u1 *stub)
4177 {
4178         CFREE((u8*) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
4179 }
4180
4181
4182 /*
4183  * These are local overrides for various environment variables in Emacs.
4184  * Please do not remove this and leave it at the end of the file, where
4185  * Emacs will automagically detect them.
4186  * ---------------------------------------------------------------------
4187  * Local variables:
4188  * mode: c
4189  * indent-tabs-mode: t
4190  * c-basic-offset: 4
4191  * tab-width: 4
4192  * End:
4193  */