alpha/ngen.c

   1 /* alpha/ngen.c ****************************************************************
   2
   3         Copyright (c) 1997 A. Krall, R. Grafl, M. Gschwind, M. Probst
   4
   5         See file COPYRIGHT for information on usage and disclaimer of warranties
   6
   7         Contains the codegenerator for an Alpha processor.
   8         This module generates Alpha machine code for a sequence of
   9         pseudo commands (ICMDs).
  10
  11         Authors: Andreas  Krall      EMAIL: cacao@complang.tuwien.ac.at
  12                  Reinhard Grafl      EMAIL: cacao@complang.tuwien.ac.at
  13
  14         Last Change: $Id: ngen.c 115 1999-01-20 01:52:45Z phil $
  15
  16 *******************************************************************************/
  17
  18 #include "jitdef.h"   /* phil */
  19
  20 /* *****************************************************************************
  21
  22 Datatypes and Register Allocations:
  23 -----------------------------------
  24
  25 On 64-bit-machines (like the Alpha) all operands are stored in the
  26 registers in a 64-bit form, even when the correspondig JavaVM  operands
  27 only need 32 bits. This is done by a canonical representation:
  28
  29 32-bit integers are allways stored as sign-extended 64-bit values (this
  30 approach is directly supported by the Alpha architecture and is very easy
  31 to implement).
  32
  33 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  34 expanding the exponent and mantissa with zeroes. (also supported by the
  35 architecture)
  36
  37
  38 Stackframes:
  39
  40 The calling conventions and the layout of the stack is  explained in detail
  41 in the documention file: calling.doc
  42
  43 *******************************************************************************/
  44
  45
  46 /* additional functions and macros to generate code ***************************/
  47
  48 #define BlockPtrOfPC(pc)        block+block_index[pc]
  49
  50 #ifdef STATISTICS
  51 #define COUNT_SPILLS count_spills++
  52 #else
  53 #define COUNT_SPILLS
  54 #endif
  55
  56
  57 /* gen_nullptr_check(objreg) */
  58
  59 #ifdef SOFTNULLPTRCHECK
  60 #define gen_nullptr_check(objreg) \
  61         if (checknull) {\
  62         M_BEQZ((objreg), 0);\
  63         mcode_addxnullrefs(mcodeptr);\
  64         }
  65 #else
  66 #define gen_nullptr_check(objreg)
  67 #endif
  68
  69
  70 /* MCODECHECK(icnt) */
  71
  72 #define MCODECHECK(icnt) \
  73         if((mcodeptr+(icnt))>mcodeend)mcodeptr=mcode_increase((u1*)mcodeptr)
  74
  75 /* M_INTMOVE:
  76      generates an integer-move from register a to b.
  77      if a and b are the same int-register, no code will be generated.
  78 */
  79
  80 #define M_INTMOVE(a,b) if(a!=b){M_MOV(a,b);}
  81
  82
  83 /* M_FLTMOVE:
  84     generates a floating-point-move from register a to b.
  85     if a and b are the same float-register, no code will be generated
  86 */
  87
  88 #define M_FLTMOVE(a,b) if(a!=b){M_FMOV(a,b);}
  89
  90
  91 /* var_to_reg_xxx:
  92     this function generates code to fetch data from a pseudo-register
  93     into a real register.
  94     If the pseudo-register has actually been assigned to a real
  95     register, no code will be emitted, since following operations
  96     can use this register directly.
  97
  98     v: pseudoregister to be fetched from
  99     tempregnum: temporary register to be used if v is actually spilled to ram
 100
 101     return: the register number, where the operand can be found after
 102             fetching (this wil be either tempregnum or the register
 103             number allready given to v)
 104 */
 105
 106 #define var_to_reg_int(regnr,v,tempnr) { \
 107         if ((v)->flags & INMEMORY) \
 108                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 109         else regnr=(v)->regoff; \
 110 }
 111
 112
 113 #define var_to_reg_flt(regnr,v,tempnr) { \
 114         if ((v)->flags & INMEMORY) \
 115                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 116         else regnr=(v)->regoff; \
 117 }
 118
 119
 120 /* reg_of_var:
 121     This function determines a register, to which the result of an operation
 122     should go, when it is ultimatively intended to store the result in
 123     pseudoregister v.
 124     If v is assigned to an actual register, this register will be returned.
 125     Otherwise (when v is spilled) this function returns tempregnum.
 126     If not already done, regoff and flags are set in the stack location.
 127 */
 128
 129 static int reg_of_var(stackptr v, int tempregnum)
 130 {
 131         varinfo      *var;
 132
 133         switch (v->varkind) {
 134                 case TEMPVAR:
 135                         if (!(v->flags & INMEMORY))
 136                                 return(v->regoff);
 137                         break;
 138                 case STACKVAR:
 139                         var = &(interfaces[v->varnum][v->type]);
 140                         v->regoff = var->regoff;
 141                         if (!(var->flags & INMEMORY))
 142                                 return(var->regoff);
 143                         break;
 144                 case LOCALVAR:
 145                         var = &(locals[v->varnum][v->type]);
 146                         v->regoff = var->regoff;
 147                         if (!(var->flags & INMEMORY))
 148                                 return(var->regoff);
 149                         break;
 150                 case ARGVAR:
 151                         v->regoff = v->varnum;
 152                         if (IS_FLT_DBL_TYPE(v->type)) {
 153                                 if (v->varnum < fltreg_argnum) {
 154                                         v->regoff = argfltregs[v->varnum];
 155                                         return(argfltregs[v->varnum]);
 156                                         }
 157                                 }
 158                         else
 159                                 if (v->varnum < intreg_argnum) {
 160                                         v->regoff = argintregs[v->varnum];
 161                                         return(argintregs[v->varnum]);
 162                                         }
 163                         v->regoff -= intreg_argnum;
 164                         break;
 165                 }
 166         v->flags |= INMEMORY;
 167         return tempregnum;
 168 }
 169
 170
 171 /* store_reg_to_var_xxx:
 172     This function generates the code to store the result of an operation
 173     back into a spilled pseudo-variable.
 174     If the pseudo-variable has not been spilled in the first place, this
 175     function will generate nothing.
 176
 177     v ............ Pseudovariable
 178     tempregnum ... Number of the temporary registers as returned by
 179                    reg_of_var.
 180 */
 181
 182 #define store_reg_to_var_int(sptr, tempregnum) {       \
 183         if ((sptr)->flags & INMEMORY) {                    \
 184                 COUNT_SPILLS;                                  \
 185                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 186                 }                                              \
 187         }
 188
 189 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 190         if ((sptr)->flags & INMEMORY) {                    \
 191                 COUNT_SPILLS;                                  \
 192                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 193                 }                                              \
 194         }
 195
 196
 197 /* NullPointerException handlers and exception handling initialisation        */
 198
 199 typedef struct sigctx_struct {
 200
 201         long          sc_onstack;           /* sigstack state to restore          */
 202         long          sc_mask;              /* signal mask to restore             */
 203         long          sc_pc;                /* pc at time of signal               */
 204         long          sc_ps;                /* psl to retore                      */
 205         long          sc_regs[32];          /* processor regs 0 to 31             */
 206         long          sc_ownedfp;           /* fp has been used                   */
 207         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 208         unsigned long sc_fpcr;              /* floating point control register    */
 209         unsigned long sc_fp_control;        /* software fpcr                      */
 210                                             /* rest is unused                     */
 211         unsigned long sc_reserved1, sc_reserved2;
 212         unsigned long sc_ssize;
 213         char          *sc_sbase;
 214         unsigned long sc_traparg_a0;
 215         unsigned long sc_traparg_a1;
 216         unsigned long sc_traparg_a2;
 217         unsigned long sc_fp_trap_pc;
 218         unsigned long sc_fp_trigger_sum;
 219         unsigned long sc_fp_trigger_inst;
 220         unsigned long sc_retcode[2];
 221 } sigctx_struct;
 222
 223
 224 /* NullPointerException signal handler for hardware null pointer check */
 225
 226 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 227 {
 228         sigset_t nsig;
 229         int      instr;
 230         long     faultaddr;
 231
 232         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 233
 234         instr = *((int*)(sigctx->sc_pc));
 235         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 236
 237         if (faultaddr == 0) {
 238                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 239                 sigemptyset(&nsig);
 240                 sigaddset(&nsig, sig);
 241                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 242                 sigctx->sc_regs[REG_ITMP1_XPTR] =
 243                                             (long) proto_java_lang_NullPointerException;
 244                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 245                 sigctx->sc_pc = (long) asm_handle_nat_exception;
 246                 return;
 247                 }
 248         else {
 249                 faultaddr += (long) ((instr << 16) >> 16);
 250                 fprintf(stderr, "faulting address: 0x%16lx\n", faultaddr);
 251                 panic("Stack overflow");
 252                 }
 253 }
 254
 255
 256 #ifdef __osf__
 257
 258 void init_exceptions(void)
 259 {
 260
 261 #else /* Linux */
 262
 263 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 264         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 265         Digital Unix this is done automatically.
 266 */
 267
 268 #include <asm/fpu.h>
 269
 270 extern unsigned long ieee_get_fp_control();
 271 extern void ieee_set_fp_control(unsigned long fp_control);
 272
 273 void init_exceptions(void)
 274 {
 275 /* initialize floating point control */
 276
 277 ieee_set_fp_control(ieee_get_fp_control()
 278                     & ~IEEE_TRAP_ENABLE_INV
 279                     & ~IEEE_TRAP_ENABLE_DZE
 280 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 281                     & ~IEEE_TRAP_ENABLE_OVF);
 282 #endif
 283
 284         /* install signal handlers we need to convert to exceptions */
 285
 286         if (!checknull) {
 287
 288 #if defined(SIGSEGV)
 289                 signal(SIGSEGV, (void*) catch_NullPointerException);
 290 #endif
 291
 292 #if defined(SIGBUS)
 293                 signal(SIGBUS, (void*) catch_NullPointerException);
 294 #endif
 295                 }
 296 }
 297
 298
 299 /* function gen_mcode **********************************************************
 300
 301         generates machine code
 302
 303 *******************************************************************************/
 304
 305 #define         MethodPointer   -8
 306 #define         FrameSize       -12
 307 #define     IsSync          -16
 308 #define     IsLeaf          -20
 309 #define     IntSave         -24
 310 #define     FltSave         -28
 311 #define     ExTableSize     -32
 312 #define     ExTableStart    -32
 313
 314 #define     ExEntrySize     -32
 315 #define     ExStartPC       -8
 316 #define     ExEndPC         -16
 317 #define     ExHandlerPC     -24
 318 #define     ExCatchType     -32
 319
 320 static void gen_mcode()
 321 {
 322         int  len, s1, s2, s3, d, bbs;
 323         s4   a;
 324         s4          *mcodeptr;
 325         stackptr    src;
 326         varinfo     *var;
 327         basicblock  *bptr;
 328         instruction *iptr;
 329
 330         {
 331         int p, pa, t, l, r;
 332
 333         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 334
 335         /* space to save used callee saved registers */
 336
 337         savedregs_num += (savintregcnt - maxsavintreguse);
 338         savedregs_num += (savfltregcnt - maxsavfltreguse);
 339
 340         parentargs_base = maxmemuse + savedregs_num;
 341
 342 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 343
 344         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 345                 parentargs_base++;
 346
 347 #endif
 348
 349         /* create method header */
 350
 351         (void) dseg_addaddress(method);                         /* MethodPointer  */
 352         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 353
 354 #ifdef USE_THREADS
 355
 356         /* IsSync contains the offset relative to the stack pointer for the
 357            argument of monitor_exit used in the exception handler. Since the
 358            offset could be zero and give a wrong meaning of the flag it is
 359            offset by one.
 360         */
 361
 362         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 363                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 364         else
 365
 366 #endif
 367
 368         (void) dseg_adds4(0);                                   /* IsSync         */
 369
 370         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 371         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 372         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 373         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 374
 375         /* create exception table */
 376
 377         for (len = 0; len < exceptiontablelength; len++) {
 378                 dseg_addtarget(BlockPtrOfPC(extable[len].startpc));
 379                 dseg_addtarget(BlockPtrOfPC(extable[len].endpc));
 380                 dseg_addtarget(BlockPtrOfPC(extable[len].handlerpc));
 381                 (void) dseg_addaddress(extable[len].catchtype);
 382                 }
 383
 384         /* initialize mcode variables */
 385
 386         mcodeptr = (s4*) mcodebase;
 387         mcodeend = (s4*) (mcodebase + mcodesize);
 388         MCODECHECK(128 + mparamcount);
 389
 390         /* create stack frame (if necessary) */
 391
 392         if (parentargs_base)
 393                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 394
 395         /* save return address and used callee saved registers */
 396
 397         p = parentargs_base;
 398         if (!isleafmethod)
 399                 {p--;  M_AST (REG_RA, REG_SP, 8*p);}
 400         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 401                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 402         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 403                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 404
 405         /* save monitorenter argument */
 406
 407 #ifdef USE_THREADS
 408         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 409                 if (method->flags & ACC_STATIC) {
 410                         p = dseg_addaddress (class);
 411                         M_ALD(REG_ITMP1, REG_PV, p);
 412                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 413                         }
 414                 else {
 415                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 416                         }
 417                 }
 418 #endif
 419
 420         /* copy argument registers to stack and call trace function with pointer
 421            to arguments on stack. ToDo: save floating point registers !!!!!!!!!
 422         */
 423
 424         if (runverbose && isleafmethod) {
 425                 M_LDA (REG_SP, REG_SP, -(14*8));
 426                 M_AST(REG_RA, REG_SP, 1*8);
 427
 428                 M_LST(argintregs[0], REG_SP,  2*8);
 429                 M_LST(argintregs[1], REG_SP,  3*8);
 430                 M_LST(argintregs[2], REG_SP,  4*8);
 431                 M_LST(argintregs[3], REG_SP,  5*8);
 432                 M_LST(argintregs[4], REG_SP,  6*8);
 433                 M_LST(argintregs[5], REG_SP,  7*8);
 434
 435                 M_DST(argfltregs[0], REG_SP,  8*8);
 436                 M_DST(argfltregs[1], REG_SP,  9*8);
 437                 M_DST(argfltregs[2], REG_SP, 10*8);
 438                 M_DST(argfltregs[3], REG_SP, 11*8);
 439                 M_DST(argfltregs[4], REG_SP, 12*8);
 440                 M_DST(argfltregs[5], REG_SP, 13*8);
 441
 442                 p = dseg_addaddress (method);
 443                 M_ALD(REG_ITMP1, REG_PV, p);
 444                 M_AST(REG_ITMP1, REG_SP, 0);
 445                 p = dseg_addaddress ((void*) (builtin_trace_args));
 446                 M_ALD(REG_PV, REG_PV, p);
 447                 M_JSR(REG_RA, REG_PV);
 448                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 449                 M_ALD(REG_RA, REG_SP, 1*8);
 450
 451                 M_LLD(argintregs[0], REG_SP,  2*8);
 452                 M_LLD(argintregs[1], REG_SP,  3*8);
 453                 M_LLD(argintregs[2], REG_SP,  4*8);
 454                 M_LLD(argintregs[3], REG_SP,  5*8);
 455                 M_LLD(argintregs[4], REG_SP,  6*8);
 456                 M_LLD(argintregs[5], REG_SP,  7*8);
 457
 458                 M_DLD(argfltregs[0], REG_SP,  8*8);
 459                 M_DLD(argfltregs[1], REG_SP,  9*8);
 460                 M_DLD(argfltregs[2], REG_SP, 10*8);
 461                 M_DLD(argfltregs[3], REG_SP, 11*8);
 462                 M_DLD(argfltregs[4], REG_SP, 12*8);
 463                 M_DLD(argfltregs[5], REG_SP, 13*8);
 464
 465                 M_LDA (REG_SP, REG_SP, 14*8);
 466                 }
 467
 468         /* take arguments out of register or stack frame */
 469
 470         for (p = 0, l = 0; p < mparamcount; p++) {
 471                 t = mparamtypes[p];
 472                 var = &(locals[l][t]);
 473                 l++;
 474                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 475                         l++;
 476                 if (var->type < 0)
 477                         continue;
 478                 r = var->regoff;
 479                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 480                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 481                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 482                                         {M_INTMOVE (argintregs[p], r);}
 483                                 else                                 /* reg arg -> spilled    */
 484                                         M_LST (argintregs[p], REG_SP, 8 * r);
 485                                 }
 486                         else {                                   /* stack arguments       */
 487                                 pa = p - INT_ARG_CNT;
 488                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 489                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 490                                 else {                               /* stack arg -> spilled  */
 491                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 492                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 493                                         }
 494                                 }
 495                         }
 496                 else {                                       /* floating args         */
 497                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 498                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 499                                         {M_FLTMOVE (argfltregs[p], r);}
 500                                 else                                             /* reg arg -> spilled    */
 501                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 502                                 }
 503                         else {                                   /* stack arguments       */
 504                                 pa = p - FLT_ARG_CNT;
 505                                 if (!(var->flags & INMEMORY))        /* stack-arg -> register */
 506                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 507                                 else {                               /* stack-arg -> spilled  */
 508                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 509                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 510                                         }
 511                                 }
 512                         }
 513                 }  /* end for */
 514
 515         /* call trace function */
 516
 517         if (runverbose && !isleafmethod) {
 518                 M_LDA (REG_SP, REG_SP, -8);
 519                 p = dseg_addaddress (method);
 520                 M_ALD(REG_ITMP1, REG_PV, p);
 521                 M_AST(REG_ITMP1, REG_SP, 0);
 522                 p = dseg_addaddress ((void*) (builtin_trace_args));
 523                 M_ALD(REG_PV, REG_PV, p);
 524                 M_JSR(REG_RA, REG_PV);
 525                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 526                 M_LDA(REG_SP, REG_SP, 8);
 527                 }
 528
 529         /* call monitorenter function */
 530
 531 #ifdef USE_THREADS
 532         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 533                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 534                 M_ALD(REG_PV, REG_PV, p);
 535                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 536                 M_JSR(REG_RA, REG_PV);
 537                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 538                 }
 539 #endif
 540         }
 541
 542         /* end of header generation */
 543
 544         /* walk through all basic blocks */
 545
 546         for (bbs = block_count, bptr = block; --bbs >= 0; bptr++) {
 547                 bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
 548
 549                 if (bptr->flags >= BBREACHED) {
 550
 551                 /* branch resolving */
 552
 553                 {
 554                 branchref *brefs;
 555                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 556                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 557                                           brefs->branchpos, bptr->mpc);
 558                         }
 559                 }
 560
 561                 /* copy interface registers to their destination */
 562
 563                 src = bptr->instack;
 564                 len = bptr->indepth;
 565                 MCODECHECK(64+len);
 566                 while (src != NULL) {
 567                         len--;
 568                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 569                                 d = reg_of_var(src, REG_ITMP1);
 570                                 M_INTMOVE(REG_ITMP1, d);
 571                                 store_reg_to_var_int(src, d);
 572                                 }
 573                         else {
 574                                 d = reg_of_var(src, REG_IFTMP);
 575                                 if ((src->varkind != STACKVAR)) {
 576                                         s2 = src->type;
 577                                         if (IS_FLT_DBL_TYPE(s2)) {
 578                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 579                                                         s1 = interfaces[len][s2].regoff;
 580                                                         M_FLTMOVE(s1,d);
 581                                                         }
 582                                                 else {
 583                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 584                                                         }
 585                                                 store_reg_to_var_flt(src, d);
 586                                                 }
 587                                         else {
 588                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 589                                                         s1 = interfaces[len][s2].regoff;
 590                                                         M_INTMOVE(s1,d);
 591                                                         }
 592                                                 else {
 593                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 594                                                         }
 595                                                 store_reg_to_var_int(src, d);
 596                                                 }
 597                                         }
 598                                 }
 599                         src = src->prev;
 600                         }
 601
 602                 /* walk through all instructions */
 603
 604                 src = bptr->instack;
 605                 len = bptr->icount;
 606                 for (iptr = bptr->iinstr;
 607                     len > 0;
 608                     src = iptr->dst, len--, iptr++) {
 609
 610         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 611         switch (iptr->opc) {
 612
 613                 case ICMD_NOP:        /* ...  ==> ...                                 */
 614                         break;
 615
 616                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 617
 618                         var_to_reg_int(s1, src, REG_ITMP1);
 619                         M_BEQZ(s1, 0);
 620                         mcode_addxnullrefs(mcodeptr);
 621                         break;
 622
 623                 /* constant operations ************************************************/
 624
 625 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 626                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 627
 628 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 629                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 630
 631                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 632                                       /* op1 = 0, val.i = constant                    */
 633
 634                         d = reg_of_var(iptr->dst, REG_ITMP1);
 635                         ICONST(d, iptr->val.i);
 636                         store_reg_to_var_int(iptr->dst, d);
 637                         break;
 638
 639                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 640                                       /* op1 = 0, val.l = constant                    */
 641
 642                         d = reg_of_var(iptr->dst, REG_ITMP1);
 643                         LCONST(d, iptr->val.l);
 644                         store_reg_to_var_int(iptr->dst, d);
 645                         break;
 646
 647                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 648                                       /* op1 = 0, val.f = constant                    */
 649
 650                         d = reg_of_var (iptr->dst, REG_FTMP1);
 651                         a = dseg_addfloat (iptr->val.f);
 652                         M_FLD(d, REG_PV, a);
 653                         store_reg_to_var_flt (iptr->dst, d);
 654                         break;
 655
 656                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 657                                       /* op1 = 0, val.d = constant                    */
 658
 659                         d = reg_of_var (iptr->dst, REG_FTMP1);
 660                         a = dseg_adddouble (iptr->val.d);
 661                         M_DLD(d, REG_PV, a);
 662                         store_reg_to_var_flt (iptr->dst, d);
 663                         break;
 664
 665                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 666                                       /* op1 = 0, val.a = constant                    */
 667
 668                         d = reg_of_var(iptr->dst, REG_ITMP1);
 669                         if (iptr->val.a) {
 670                                 a = dseg_addaddress (iptr->val.a);
 671                                 M_ALD(d, REG_PV, a);
 672                                 }
 673                         else {
 674                                 M_INTMOVE(REG_ZERO, d);
 675                                 }
 676                         store_reg_to_var_int(iptr->dst, d);
 677                         break;
 678
 679
 680                 /* load/store operations **********************************************/
 681
 682                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 683                 case ICMD_LLOAD:      /* op1 = local variable                         */
 684                 case ICMD_ALOAD:
 685
 686                         d = reg_of_var(iptr->dst, REG_ITMP1);
 687                         if ((iptr->dst->varkind == LOCALVAR) &&
 688                             (iptr->dst->varnum == iptr->op1))
 689                                 break;
 690                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 691                         if (var->flags & INMEMORY)
 692                                 M_LLD(d, REG_SP, 8 * var->regoff);
 693                         else
 694                                 {M_INTMOVE(var->regoff,d);}
 695                         store_reg_to_var_int(iptr->dst, d);
 696                         break;
 697
 698                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 699                 case ICMD_DLOAD:      /* op1 = local variable                         */
 700
 701                         d = reg_of_var(iptr->dst, REG_FTMP1);
 702                         if ((iptr->dst->varkind == LOCALVAR) &&
 703                             (iptr->dst->varnum == iptr->op1))
 704                                 break;
 705                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 706                         if (var->flags & INMEMORY)
 707                                 M_DLD(d, REG_SP, 8 * var->regoff);
 708                         else
 709                                 {M_FLTMOVE(var->regoff,d);}
 710                         store_reg_to_var_flt(iptr->dst, d);
 711                         break;
 712
 713
 714                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 715                 case ICMD_LSTORE:     /* op1 = local variable                         */
 716                 case ICMD_ASTORE:
 717
 718                         if ((src->varkind == LOCALVAR) &&
 719                             (src->varnum == iptr->op1))
 720                                 break;
 721                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 722                         if (var->flags & INMEMORY) {
 723                                 var_to_reg_int(s1, src, REG_ITMP1);
 724                                 M_LST(s1, REG_SP, 8 * var->regoff);
 725                                 }
 726                         else {
 727                                 var_to_reg_int(s1, src, var->regoff);
 728                                 M_INTMOVE(s1, var->regoff);
 729                                 }
 730                         break;
 731
 732                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 733                 case ICMD_DSTORE:     /* op1 = local variable                         */
 734
 735                         if ((src->varkind == LOCALVAR) &&
 736                             (src->varnum == iptr->op1))
 737                                 break;
 738                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 739                         if (var->flags & INMEMORY) {
 740                                 var_to_reg_flt(s1, src, REG_FTMP1);
 741                                 M_DST(s1, REG_SP, 8 * var->regoff);
 742                                 }
 743                         else {
 744                                 var_to_reg_flt(s1, src, var->regoff);
 745                                 M_FLTMOVE(s1, var->regoff);
 746                                 }
 747                         break;
 748
 749
 750                 /* pop/dup/swap operations ********************************************/
 751
 752                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 753
 754                 case ICMD_POP:        /* ..., value  ==> ...                          */
 755                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 756                         break;
 757
 758 #define M_COPY(from,to) \
 759                         d = reg_of_var(to, REG_IFTMP); \
 760                         if ((from->regoff != to->regoff) || \
 761                             ((from->flags ^ to->flags) & INMEMORY)) { \
 762                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 763                                         var_to_reg_flt(s1, from, d); \
 764                                         M_FLTMOVE(s1,d); \
 765                                         store_reg_to_var_flt(to, d); \
 766                                         }\
 767                                 else { \
 768                                         var_to_reg_int(s1, from, d); \
 769                                         M_INTMOVE(s1,d); \
 770                                         store_reg_to_var_int(to, d); \
 771                                         }\
 772                                 }
 773
 774                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 775                         M_COPY(src, iptr->dst);
 776                         break;
 777
 778                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 779
 780                         M_COPY(src,       iptr->dst->prev->prev);
 781
 782                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 783
 784                         M_COPY(src,       iptr->dst);
 785                         M_COPY(src->prev, iptr->dst->prev);
 786                         break;
 787
 788                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 789
 790                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 791
 792                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 793
 794                         M_COPY(src,             iptr->dst);
 795                         M_COPY(src->prev,       iptr->dst->prev);
 796                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 797                         M_COPY(src, iptr->dst->prev->prev->prev);
 798                         break;
 799
 800                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 801
 802                         M_COPY(src,                   iptr->dst);
 803                         M_COPY(src->prev,             iptr->dst->prev);
 804                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 805                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 806                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 807                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 808                         break;
 809
 810                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 811
 812                         M_COPY(src, iptr->dst->prev);
 813                         M_COPY(src->prev, iptr->dst);
 814                         break;
 815
 816
 817                 /* integer operations *************************************************/
 818
 819                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 820
 821                         var_to_reg_int(s1, src, REG_ITMP1);
 822                         d = reg_of_var(iptr->dst, REG_ITMP3);
 823                         M_ISUB(REG_ZERO, s1, d);
 824                         store_reg_to_var_int(iptr->dst, d);
 825                         break;
 826
 827                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 828
 829                         var_to_reg_int(s1, src, REG_ITMP1);
 830                         d = reg_of_var(iptr->dst, REG_ITMP3);
 831                         M_LSUB(REG_ZERO, s1, d);
 832                         store_reg_to_var_int(iptr->dst, d);
 833                         break;
 834
 835                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 836
 837                         var_to_reg_int(s1, src, REG_ITMP1);
 838                         d = reg_of_var(iptr->dst, REG_ITMP3);
 839                         M_INTMOVE(s1, d);
 840                         store_reg_to_var_int(iptr->dst, d);
 841                         break;
 842
 843                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 844
 845                         var_to_reg_int(s1, src, REG_ITMP1);
 846                         d = reg_of_var(iptr->dst, REG_ITMP3);
 847                         M_IADD(s1, REG_ZERO, d );
 848                         store_reg_to_var_int(iptr->dst, d);
 849                         break;
 850
 851                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 852
 853                         var_to_reg_int(s1, src, REG_ITMP1);
 854                         d = reg_of_var(iptr->dst, REG_ITMP3);
 855                         if (has_ext_instr_set) {
 856                                 M_BSEXT(s1, d);
 857                                 }
 858                         else {
 859                                 M_SLL_IMM(s1, 56, d);
 860                                 M_SRA_IMM( d, 56, d);
 861                                 }
 862                         store_reg_to_var_int(iptr->dst, d);
 863                         break;
 864
 865                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 866
 867                         var_to_reg_int(s1, src, REG_ITMP1);
 868                         d = reg_of_var(iptr->dst, REG_ITMP3);
 869             M_CZEXT(s1, d);
 870                         store_reg_to_var_int(iptr->dst, d);
 871                         break;
 872
 873                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 874
 875                         var_to_reg_int(s1, src, REG_ITMP1);
 876                         d = reg_of_var(iptr->dst, REG_ITMP3);
 877                         if (has_ext_instr_set) {
 878                                 M_SSEXT(s1, d);
 879                                 }
 880                         else {
 881                                 M_SLL_IMM(s1, 48, d);
 882                                 M_SRA_IMM( d, 48, d);
 883                                 }
 884                         store_reg_to_var_int(iptr->dst, d);
 885                         break;
 886
 887
 888                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 889
 890                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 891                         var_to_reg_int(s2, src, REG_ITMP2);
 892                         d = reg_of_var(iptr->dst, REG_ITMP3);
 893                         M_IADD(s1, s2, d);
 894                         store_reg_to_var_int(iptr->dst, d);
 895                         break;
 896
 897                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 898                                       /* val.i = constant                             */
 899
 900                         var_to_reg_int(s1, src, REG_ITMP1);
 901                         d = reg_of_var(iptr->dst, REG_ITMP3);
 902                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 903                                 M_IADD_IMM(s1, iptr->val.i, d);
 904                                 }
 905                         else {
 906                                 ICONST(REG_ITMP2, iptr->val.i);
 907                                 M_IADD(s1, REG_ITMP2, d);
 908                                 }
 909                         store_reg_to_var_int(iptr->dst, d);
 910                         break;
 911
 912                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 913
 914                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 915                         var_to_reg_int(s2, src, REG_ITMP2);
 916                         d = reg_of_var(iptr->dst, REG_ITMP3);
 917                         M_LADD(s1, s2, d);
 918                         store_reg_to_var_int(iptr->dst, d);
 919                         break;
 920
 921                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 922                                       /* val.l = constant                             */
 923
 924                         var_to_reg_int(s1, src, REG_ITMP1);
 925                         d = reg_of_var(iptr->dst, REG_ITMP3);
 926                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 927                                 M_LADD_IMM(s1, iptr->val.l, d);
 928                                 }
 929                         else {
 930                                 LCONST(REG_ITMP2, iptr->val.l);
 931                                 M_LADD(s1, REG_ITMP2, d);
 932                                 }
 933                         store_reg_to_var_int(iptr->dst, d);
 934                         break;
 935
 936                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 937
 938                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 939                         var_to_reg_int(s2, src, REG_ITMP2);
 940                         d = reg_of_var(iptr->dst, REG_ITMP3);
 941                         M_ISUB(s1, s2, d);
 942                         store_reg_to_var_int(iptr->dst, d);
 943                         break;
 944
 945                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 946                                       /* val.i = constant                             */
 947
 948                         var_to_reg_int(s1, src, REG_ITMP1);
 949                         d = reg_of_var(iptr->dst, REG_ITMP3);
 950                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 951                                 M_ISUB_IMM(s1, iptr->val.i, d);
 952                                 }
 953                         else {
 954                                 ICONST(REG_ITMP2, iptr->val.i);
 955                                 M_ISUB(s1, REG_ITMP2, d);
 956                                 }
 957                         store_reg_to_var_int(iptr->dst, d);
 958                         break;
 959
 960                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 961
 962                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 963                         var_to_reg_int(s2, src, REG_ITMP2);
 964                         d = reg_of_var(iptr->dst, REG_ITMP3);
 965                         M_LSUB(s1, s2, d);
 966                         store_reg_to_var_int(iptr->dst, d);
 967                         break;
 968
 969                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 970                                       /* val.l = constant                             */
 971
 972                         var_to_reg_int(s1, src, REG_ITMP1);
 973                         d = reg_of_var(iptr->dst, REG_ITMP3);
 974                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 975                                 M_LSUB_IMM(s1, iptr->val.l, d);
 976                                 }
 977                         else {
 978                                 LCONST(REG_ITMP2, iptr->val.l);
 979                                 M_LSUB(s1, REG_ITMP2, d);
 980                                 }
 981                         store_reg_to_var_int(iptr->dst, d);
 982                         break;
 983
 984                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 985
 986                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 987                         var_to_reg_int(s2, src, REG_ITMP2);
 988                         d = reg_of_var(iptr->dst, REG_ITMP3);
 989                         M_IMUL(s1, s2, d);
 990                         store_reg_to_var_int(iptr->dst, d);
 991                         break;
 992
 993                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 994                                       /* val.i = constant                             */
 995
 996                         var_to_reg_int(s1, src, REG_ITMP1);
 997                         d = reg_of_var(iptr->dst, REG_ITMP3);
 998                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 999                                 M_IMUL_IMM(s1, iptr->val.i, d);
1000                                 }
1001                         else {
1002                                 ICONST(REG_ITMP2, iptr->val.i);
1003                                 M_IMUL(s1, REG_ITMP2, d);
1004                                 }
1005                         store_reg_to_var_int(iptr->dst, d);
1006                         break;
1007
1008                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1009
1010                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1011                         var_to_reg_int(s2, src, REG_ITMP2);
1012                         d = reg_of_var(iptr->dst, REG_ITMP3);
1013                         M_LMUL (s1, s2, d);
1014                         store_reg_to_var_int(iptr->dst, d);
1015                         break;
1016
1017                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
1018                                       /* val.l = constant                             */
1019
1020                         var_to_reg_int(s1, src, REG_ITMP1);
1021                         d = reg_of_var(iptr->dst, REG_ITMP3);
1022                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1023                                 M_LMUL_IMM(s1, iptr->val.l, d);
1024                                 }
1025                         else {
1026                                 LCONST(REG_ITMP2, iptr->val.l);
1027                                 M_LMUL(s1, REG_ITMP2, d);
1028                                 }
1029                         store_reg_to_var_int(iptr->dst, d);
1030                         break;
1031
1032                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1033                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1034
1035                         var_to_reg_int(s1, src, REG_ITMP1);
1036                         d = reg_of_var(iptr->dst, REG_ITMP3);
1037                         if (iptr->val.i <= 15) {
1038                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
1039                                 M_CMOVGE(s1, s1, REG_ITMP2);
1040                                 }
1041                         else {
1042                                 M_SRA_IMM(s1, 63, REG_ITMP2);
1043                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1044                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
1045                                 }
1046                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
1047                         store_reg_to_var_int(iptr->dst, d);
1048                         break;
1049
1050                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1051
1052                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1053                         var_to_reg_int(s2, src, REG_ITMP2);
1054                         d = reg_of_var(iptr->dst, REG_ITMP3);
1055                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1056                         M_SLL(s1, REG_ITMP3, d);
1057                         M_IADD(d, REG_ZERO, d);
1058                         store_reg_to_var_int(iptr->dst, d);
1059                         break;
1060
1061                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1062                                       /* val.i = constant                             */
1063
1064                         var_to_reg_int(s1, src, REG_ITMP1);
1065                         d = reg_of_var(iptr->dst, REG_ITMP3);
1066                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1067                         M_IADD(d, REG_ZERO, d);
1068                         store_reg_to_var_int(iptr->dst, d);
1069                         break;
1070
1071                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1072
1073                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1074                         var_to_reg_int(s2, src, REG_ITMP2);
1075                         d = reg_of_var(iptr->dst, REG_ITMP3);
1076                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1077                         M_SRA(s1, REG_ITMP3, d);
1078                         store_reg_to_var_int(iptr->dst, d);
1079                         break;
1080
1081                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1082                                       /* val.i = constant                             */
1083
1084                         var_to_reg_int(s1, src, REG_ITMP1);
1085                         d = reg_of_var(iptr->dst, REG_ITMP3);
1086                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1087                         store_reg_to_var_int(iptr->dst, d);
1088                         break;
1089
1090                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1091
1092                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1093                         var_to_reg_int(s2, src, REG_ITMP2);
1094                         d = reg_of_var(iptr->dst, REG_ITMP3);
1095                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1096             M_IZEXT(s1, d);
1097                         M_SRL(d, REG_ITMP2, d);
1098                         M_IADD(d, REG_ZERO, d);
1099                         store_reg_to_var_int(iptr->dst, d);
1100                         break;
1101
1102                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1103                                       /* val.i = constant                             */
1104
1105                         var_to_reg_int(s1, src, REG_ITMP1);
1106                         d = reg_of_var(iptr->dst, REG_ITMP3);
1107             M_IZEXT(s1, d);
1108                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1109                         M_IADD(d, REG_ZERO, d);
1110                         store_reg_to_var_int(iptr->dst, d);
1111                         break;
1112
1113                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1114
1115                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1116                         var_to_reg_int(s2, src, REG_ITMP2);
1117                         d = reg_of_var(iptr->dst, REG_ITMP3);
1118                         M_SLL(s1, s2, d);
1119                         store_reg_to_var_int(iptr->dst, d);
1120                         break;
1121
1122                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1123                                       /* val.l = constant                             */
1124
1125                         var_to_reg_int(s1, src, REG_ITMP1);
1126                         d = reg_of_var(iptr->dst, REG_ITMP3);
1127                         M_SLL_IMM(s1, iptr->val.l & 0x3f, d);
1128                         store_reg_to_var_int(iptr->dst, d);
1129                         break;
1130
1131                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1132
1133                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1134                         var_to_reg_int(s2, src, REG_ITMP2);
1135                         d = reg_of_var(iptr->dst, REG_ITMP3);
1136                         M_SRA(s1, s2, d);
1137                         store_reg_to_var_int(iptr->dst, d);
1138                         break;
1139
1140                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1141                                       /* val.l = constant                             */
1142
1143                         var_to_reg_int(s1, src, REG_ITMP1);
1144                         d = reg_of_var(iptr->dst, REG_ITMP3);
1145                         M_SRA_IMM(s1, iptr->val.l & 0x3f, d);
1146                         store_reg_to_var_int(iptr->dst, d);
1147                         break;
1148
1149                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1150
1151                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1152                         var_to_reg_int(s2, src, REG_ITMP2);
1153                         d = reg_of_var(iptr->dst, REG_ITMP3);
1154                         M_SRL(s1, s2, d);
1155                         store_reg_to_var_int(iptr->dst, d);
1156                         break;
1157
1158                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1159                                       /* val.l = constant                             */
1160
1161                         var_to_reg_int(s1, src, REG_ITMP1);
1162                         d = reg_of_var(iptr->dst, REG_ITMP3);
1163                         M_SRL_IMM(s1, iptr->val.l & 0x3f, d);
1164                         store_reg_to_var_int(iptr->dst, d);
1165                         break;
1166
1167                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1168                 case ICMD_LAND:
1169
1170                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1171                         var_to_reg_int(s2, src, REG_ITMP2);
1172                         d = reg_of_var(iptr->dst, REG_ITMP3);
1173                         M_AND(s1, s2, d);
1174                         store_reg_to_var_int(iptr->dst, d);
1175                         break;
1176
1177                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1178                                       /* val.i = constant                             */
1179
1180                         var_to_reg_int(s1, src, REG_ITMP1);
1181                         d = reg_of_var(iptr->dst, REG_ITMP3);
1182                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1183                                 M_AND_IMM(s1, iptr->val.i, d);
1184                                 }
1185                         else if (iptr->val.i == 0xffff) {
1186                                 M_CZEXT(s1, d);
1187                                 }
1188                         else if (iptr->val.i == 0xffffff) {
1189                                 M_ZAPNOT_IMM(s1, 0x07, d);
1190                                 }
1191                         else {
1192                                 ICONST(REG_ITMP2, iptr->val.i);
1193                                 M_AND(s1, REG_ITMP2, d);
1194                                 }
1195                         store_reg_to_var_int(iptr->dst, d);
1196                         break;
1197
1198                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1199                                       /* val.i = constant                             */
1200
1201                         var_to_reg_int(s1, src, REG_ITMP1);
1202                         d = reg_of_var(iptr->dst, REG_ITMP3);
1203                         if (s1 == d) {
1204                                 M_MOV(s1, REG_ITMP1);
1205                                 s1 = REG_ITMP1;
1206                                 }
1207                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1208                                 M_AND_IMM(s1, iptr->val.i, d);
1209                                 M_BGEZ(s1, 3);
1210                                 M_ISUB(REG_ZERO, s1, d);
1211                                 M_AND_IMM(d, iptr->val.i, d);
1212                                 }
1213                         else if (iptr->val.i == 0xffff) {
1214                                 M_CZEXT(s1, d);
1215                                 M_BGEZ(s1, 3);
1216                                 M_ISUB(REG_ZERO, s1, d);
1217                                 M_CZEXT(d, d);
1218                                 }
1219                         else if (iptr->val.i == 0xffffff) {
1220                                 M_ZAPNOT_IMM(s1, 0x07, d);
1221                                 M_BGEZ(s1, 3);
1222                                 M_ISUB(REG_ZERO, s1, d);
1223                                 M_ZAPNOT_IMM(d, 0x07, d);
1224                                 }
1225                         else {
1226                                 ICONST(REG_ITMP2, iptr->val.i);
1227                                 M_AND(s1, REG_ITMP2, d);
1228                                 M_BGEZ(s1, 3);
1229                                 M_ISUB(REG_ZERO, s1, d);
1230                                 M_AND(d, REG_ITMP2, d);
1231                                 }
1232                         M_ISUB(REG_ZERO, d, d);
1233                         store_reg_to_var_int(iptr->dst, d);
1234                         break;
1235
1236                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1237
1238 /*          b = value & 0xffff;
1239                         a = value >> 16;
1240                         a = ((b - a) & 0xffff) + (b < a);
1241 */
1242                         var_to_reg_int(s1, src, REG_ITMP1);
1243                         d = reg_of_var(iptr->dst, REG_ITMP3);
1244                         if (s1 == d) {
1245                                 M_MOV(s1, REG_ITMP3);
1246                                 s1 = REG_ITMP3;
1247                                 }
1248                         M_BLTZ(s1, 7);
1249             M_CZEXT(s1, REG_ITMP2);
1250                         M_SRA_IMM(s1, 16, d);
1251                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1252                         M_ISUB(REG_ITMP2, d, d);
1253             M_CZEXT(d, d);
1254                         M_IADD(d, REG_ITMP1, d);
1255                         M_BR(11 + (s1 == REG_ITMP1));
1256                         M_ISUB(REG_ZERO, s1, REG_ITMP1);
1257             M_CZEXT(REG_ITMP1, REG_ITMP2);
1258                         M_SRA_IMM(REG_ITMP1, 16, d);
1259                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1260                         M_ISUB(REG_ITMP2, d, d);
1261             M_CZEXT(d, d);
1262                         M_IADD(d, REG_ITMP1, d);
1263                         M_ISUB(REG_ZERO, d, d);
1264                         if (s1 == REG_ITMP1) {
1265                                 var_to_reg_int(s1, src, REG_ITMP1);
1266                                 }
1267                         M_SLL_IMM(s1, 33, REG_ITMP2);
1268                         M_CMPEQ(REG_ITMP2, REG_ZERO, REG_ITMP2);
1269                         M_ISUB(d, REG_ITMP2, d);
1270                         store_reg_to_var_int(iptr->dst, d);
1271                         break;
1272
1273                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1274                                       /* val.l = constant                             */
1275
1276                         var_to_reg_int(s1, src, REG_ITMP1);
1277                         d = reg_of_var(iptr->dst, REG_ITMP3);
1278                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1279                                 M_AND_IMM(s1, iptr->val.l, d);
1280                                 }
1281                         else if (iptr->val.l == 0xffffL) {
1282                                 M_CZEXT(s1, d);
1283                                 }
1284                         else if (iptr->val.l == 0xffffffL) {
1285                                 M_ZAPNOT_IMM(s1, 0x07, d);
1286                                 }
1287                         else if (iptr->val.l == 0xffffffffL) {
1288                                 M_IZEXT(s1, d);
1289                                 }
1290                         else if (iptr->val.l == 0xffffffffffL) {
1291                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1292                                 }
1293                         else if (iptr->val.l == 0xffffffffffffL) {
1294                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1295                                 }
1296                         else if (iptr->val.l == 0xffffffffffffffL) {
1297                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1298                                 }
1299                         else {
1300                                 LCONST(REG_ITMP2, iptr->val.l);
1301                                 M_AND(s1, REG_ITMP2, d);
1302                                 }
1303                         store_reg_to_var_int(iptr->dst, d);
1304                         break;
1305
1306                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1307                                       /* val.l = constant                             */
1308
1309                         var_to_reg_int(s1, src, REG_ITMP1);
1310                         d = reg_of_var(iptr->dst, REG_ITMP3);
1311                         if (s1 == d) {
1312                                 M_MOV(s1, REG_ITMP1);
1313                                 s1 = REG_ITMP1;
1314                                 }
1315                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1316                                 M_AND_IMM(s1, iptr->val.l, d);
1317                                 M_BGEZ(s1, 3);
1318                                 M_LSUB(REG_ZERO, s1, d);
1319                                 M_AND_IMM(d, iptr->val.l, d);
1320                                 }
1321                         else if (iptr->val.l == 0xffffL) {
1322                                 M_CZEXT(s1, d);
1323                                 M_BGEZ(s1, 3);
1324                                 M_LSUB(REG_ZERO, s1, d);
1325                                 M_CZEXT(d, d);
1326                                 }
1327                         else if (iptr->val.l == 0xffffffL) {
1328                                 M_ZAPNOT_IMM(s1, 0x07, d);
1329                                 M_BGEZ(s1, 3);
1330                                 M_LSUB(REG_ZERO, s1, d);
1331                                 M_ZAPNOT_IMM(d, 0x07, d);
1332                                 }
1333                         else if (iptr->val.l == 0xffffffffL) {
1334                                 M_IZEXT(s1, d);
1335                                 M_BGEZ(s1, 3);
1336                                 M_LSUB(REG_ZERO, s1, d);
1337                                 M_IZEXT(d, d);
1338                                 }
1339                         else if (iptr->val.l == 0xffffffffffL) {
1340                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1341                                 M_BGEZ(s1, 3);
1342                                 M_LSUB(REG_ZERO, s1, d);
1343                                 M_ZAPNOT_IMM(d, 0x1f, d);
1344                                 }
1345                         else if (iptr->val.l == 0xffffffffffffL) {
1346                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1347                                 M_BGEZ(s1, 3);
1348                                 M_LSUB(REG_ZERO, s1, d);
1349                                 M_ZAPNOT_IMM(d, 0x3f, d);
1350                                 }
1351                         else if (iptr->val.l == 0xffffffffffffffL) {
1352                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1353                                 M_BGEZ(s1, 3);
1354                                 M_LSUB(REG_ZERO, s1, d);
1355                                 M_ZAPNOT_IMM(d, 0x7f, d);
1356                                 }
1357                         else {
1358                                 LCONST(REG_ITMP2, iptr->val.l);
1359                                 M_AND(s1, REG_ITMP2, d);
1360                                 M_BGEZ(s1, 3);
1361                                 M_LSUB(REG_ZERO, s1, d);
1362                                 M_AND(d, REG_ITMP2, d);
1363                                 }
1364                         M_LSUB(REG_ZERO, d, d);
1365                         store_reg_to_var_int(iptr->dst, d);
1366                         break;
1367
1368                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1369
1370                         var_to_reg_int(s1, src, REG_ITMP1);
1371                         d = reg_of_var(iptr->dst, REG_ITMP3);
1372                         if (s1 == d) {
1373                                 M_MOV(s1, REG_ITMP3);
1374                                 s1 = REG_ITMP3;
1375                                 }
1376                         M_CZEXT(s1, REG_ITMP2);
1377                         M_SRA_IMM(s1, 16, d);
1378                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1379                         M_LSUB(REG_ITMP2, d, d);
1380             M_CZEXT(d, d);
1381                         M_LADD(d, REG_ITMP1, d);
1382                         M_LDA(REG_ITMP2, REG_ZERO, -1);
1383                         M_SRL_IMM(REG_ITMP2, 33, REG_ITMP2);
1384                         if (s1 == REG_ITMP1) {
1385                                 var_to_reg_int(s1, src, REG_ITMP1);
1386                                 }
1387                         M_CMPULT(s1, REG_ITMP2, REG_ITMP2);
1388                         M_BNEZ(REG_ITMP2, 11);
1389                         M_LDA(d, REG_ZERO, -257);
1390                         M_ZAPNOT_IMM(d, 0xcd, d);
1391                         M_LSUB(REG_ZERO, s1, REG_ITMP2);
1392                         M_CMOVGE(s1, s1, REG_ITMP2);
1393                         M_UMULH(REG_ITMP2, d, REG_ITMP2);
1394                         M_SRL_IMM(REG_ITMP2, 16, REG_ITMP2);
1395                         M_LSUB(REG_ZERO, REG_ITMP2, d);
1396                         M_CMOVGE(s1, REG_ITMP2, d);
1397                         M_SLL_IMM(d, 16, REG_ITMP2);
1398                         M_LADD(d, REG_ITMP2, d);
1399                         M_LSUB(s1, d, d);
1400                         store_reg_to_var_int(iptr->dst, d);
1401                         break;
1402
1403                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1404                 case ICMD_LOR:
1405
1406                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1407                         var_to_reg_int(s2, src, REG_ITMP2);
1408                         d = reg_of_var(iptr->dst, REG_ITMP3);
1409                         M_OR( s1,s2, d);
1410                         store_reg_to_var_int(iptr->dst, d);
1411                         break;
1412
1413                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1414                                       /* val.i = constant                             */
1415
1416                         var_to_reg_int(s1, src, REG_ITMP1);
1417                         d = reg_of_var(iptr->dst, REG_ITMP3);
1418                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1419                                 M_OR_IMM(s1, iptr->val.i, d);
1420                                 }
1421                         else {
1422                                 ICONST(REG_ITMP2, iptr->val.i);
1423                                 M_OR(s1, REG_ITMP2, d);
1424                                 }
1425                         store_reg_to_var_int(iptr->dst, d);
1426                         break;
1427
1428                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1429                                       /* val.l = constant                             */
1430
1431                         var_to_reg_int(s1, src, REG_ITMP1);
1432                         d = reg_of_var(iptr->dst, REG_ITMP3);
1433                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1434                                 M_OR_IMM(s1, iptr->val.l, d);
1435                                 }
1436                         else {
1437                                 LCONST(REG_ITMP2, iptr->val.l);
1438                                 M_OR(s1, REG_ITMP2, d);
1439                                 }
1440                         store_reg_to_var_int(iptr->dst, d);
1441                         break;
1442
1443                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1444                 case ICMD_LXOR:
1445
1446                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1447                         var_to_reg_int(s2, src, REG_ITMP2);
1448                         d = reg_of_var(iptr->dst, REG_ITMP3);
1449                         M_XOR(s1, s2, d);
1450                         store_reg_to_var_int(iptr->dst, d);
1451                         break;
1452
1453                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1454                                       /* val.i = constant                             */
1455
1456                         var_to_reg_int(s1, src, REG_ITMP1);
1457                         d = reg_of_var(iptr->dst, REG_ITMP3);
1458                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1459                                 M_XOR_IMM(s1, iptr->val.i, d);
1460                                 }
1461                         else {
1462                                 ICONST(REG_ITMP2, iptr->val.i);
1463                                 M_XOR(s1, REG_ITMP2, d);
1464                                 }
1465                         store_reg_to_var_int(iptr->dst, d);
1466                         break;
1467
1468                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1469                                       /* val.l = constant                             */
1470
1471                         var_to_reg_int(s1, src, REG_ITMP1);
1472                         d = reg_of_var(iptr->dst, REG_ITMP3);
1473                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1474                                 M_XOR_IMM(s1, iptr->val.l, d);
1475                                 }
1476                         else {
1477                                 LCONST(REG_ITMP2, iptr->val.l);
1478                                 M_XOR(s1, REG_ITMP2, d);
1479                                 }
1480                         store_reg_to_var_int(iptr->dst, d);
1481                         break;
1482
1483
1484                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1485
1486                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1487                         var_to_reg_int(s2, src, REG_ITMP2);
1488                         d = reg_of_var(iptr->dst, REG_ITMP3);
1489                         M_CMPLT(s1, s2, REG_ITMP3);
1490                         M_CMPLT(s2, s1, REG_ITMP1);
1491                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1492                         store_reg_to_var_int(iptr->dst, d);
1493                         break;
1494
1495
1496                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1497                                       /* op1 = variable, val.i = constant             */
1498
1499                         var = &(locals[iptr->op1][TYPE_INT]);
1500                         if (var->flags & INMEMORY) {
1501                                 s1 = REG_ITMP1;
1502                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1503                                 }
1504                         else
1505                                 s1 = var->regoff;
1506                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1507                                 M_IADD_IMM(s1, iptr->val.i, s1);
1508                                 }
1509                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1510                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1511                                 }
1512                         else {
1513                                 M_LDA (s1, s1, iptr->val.i);
1514                                 M_IADD(s1, REG_ZERO, s1);
1515                                 }
1516                         if (var->flags & INMEMORY)
1517                                 M_LST(s1, REG_SP, 8 * var->regoff);
1518                         break;
1519
1520
1521                 /* floating operations ************************************************/
1522
1523                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1524
1525                         var_to_reg_flt(s1, src, REG_FTMP1);
1526                         d = reg_of_var(iptr->dst, REG_FTMP3);
1527                         M_FMOVN(s1, d);
1528                         store_reg_to_var_flt(iptr->dst, d);
1529                         break;
1530
1531                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1532
1533                         var_to_reg_flt(s1, src, REG_FTMP1);
1534                         d = reg_of_var(iptr->dst, REG_FTMP3);
1535                         M_FMOVN(s1, d);
1536                         store_reg_to_var_flt(iptr->dst, d);
1537                         break;
1538
1539                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1540
1541                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1542                         var_to_reg_flt(s2, src, REG_FTMP2);
1543                         d = reg_of_var(iptr->dst, REG_FTMP3);
1544                         if (checkfloats) {
1545                                 M_FADDS(s1, s2, d);
1546                                 M_TRAPB;
1547                                 }
1548                         else {
1549                                 M_FADD(s1, s2, d);
1550                                 }
1551                         store_reg_to_var_flt(iptr->dst, d);
1552                         break;
1553
1554                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1555
1556                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1557                         var_to_reg_flt(s2, src, REG_FTMP2);
1558                         d = reg_of_var(iptr->dst, REG_FTMP3);
1559                         if (checkfloats) {
1560                                 M_DADDS(s1, s2, d);
1561                                 M_TRAPB;
1562                                 }
1563                         else {
1564                                 M_DADD(s1, s2, d);
1565                                 }
1566                         store_reg_to_var_flt(iptr->dst, d);
1567                         break;
1568
1569                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1570
1571                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1572                         var_to_reg_flt(s2, src, REG_FTMP2);
1573                         d = reg_of_var(iptr->dst, REG_FTMP3);
1574                         if (checkfloats) {
1575                                 M_FSUBS(s1, s2, d);
1576                                 M_TRAPB;
1577                                 }
1578                         else {
1579                                 M_FSUB(s1, s2, d);
1580                                 }
1581                         store_reg_to_var_flt(iptr->dst, d);
1582                         break;
1583
1584                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1585
1586                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1587                         var_to_reg_flt(s2, src, REG_FTMP2);
1588                         d = reg_of_var(iptr->dst, REG_FTMP3);
1589                         if (checkfloats) {
1590                                 M_DSUBS(s1, s2, d);
1591                                 M_TRAPB;
1592                                 }
1593                         else {
1594                                 M_DSUB(s1, s2, d);
1595                                 }
1596                         store_reg_to_var_flt(iptr->dst, d);
1597                         break;
1598
1599                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1600
1601                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1602                         var_to_reg_flt(s2, src, REG_FTMP2);
1603                         d = reg_of_var(iptr->dst, REG_FTMP3);
1604                         if (checkfloats) {
1605                                 M_FMULS(s1, s2, d);
1606                                 M_TRAPB;
1607                                 }
1608                         else {
1609                                 M_FMUL(s1, s2, d);
1610                                 }
1611                         store_reg_to_var_flt(iptr->dst, d);
1612                         break;
1613
1614                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1615
1616                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1617                         var_to_reg_flt(s2, src, REG_FTMP2);
1618                         d = reg_of_var(iptr->dst, REG_FTMP3);
1619                         if (checkfloats) {
1620                                 M_DMULS(s1, s2, d);
1621                                 M_TRAPB;
1622                                 }
1623                         else {
1624                                 M_DMUL(s1, s2, d);
1625                                 }
1626                         store_reg_to_var_flt(iptr->dst, d);
1627                         break;
1628
1629                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1630
1631                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1632                         var_to_reg_flt(s2, src, REG_FTMP2);
1633                         d = reg_of_var(iptr->dst, REG_FTMP3);
1634                         if (checkfloats) {
1635                                 M_FDIVS(s1, s2, d);
1636                                 M_TRAPB;
1637                                 }
1638                         else {
1639                                 M_FDIV(s1, s2, d);
1640                                 }
1641                         store_reg_to_var_flt(iptr->dst, d);
1642                         break;
1643
1644                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1645
1646                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1647                         var_to_reg_flt(s2, src, REG_FTMP2);
1648                         d = reg_of_var(iptr->dst, REG_FTMP3);
1649                         if (checkfloats) {
1650                                 M_DDIVS(s1, s2, d);
1651                                 M_TRAPB;
1652                                 }
1653                         else {
1654                                 M_DDIV(s1, s2, d);
1655                                 }
1656                         store_reg_to_var_flt(iptr->dst, d);
1657                         break;
1658
1659                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1660
1661                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1662                         var_to_reg_flt(s2, src, REG_FTMP2);
1663                         d = reg_of_var(iptr->dst, REG_FTMP3);
1664                         if (checkfloats) {
1665                                 M_FDIVS(s1,s2, REG_FTMP3);
1666                                 M_TRAPB;
1667                                 M_CVTDL_CS(REG_FTMP3, REG_FTMP3); /* round to integer */
1668                                 M_TRAPB;
1669                                 M_CVTLF(REG_FTMP3, REG_FTMP3);
1670                                 M_FMULS(REG_FTMP3, s2, REG_FTMP3);
1671                                 M_TRAPB;
1672                                 M_FSUBS(s1, REG_FTMP3, d);
1673                                 M_TRAPB;
1674                                 }
1675                         else {
1676                                 M_FDIV(s1,s2, REG_FTMP3);
1677                                 M_CVTDL_C(REG_FTMP3, REG_FTMP3); /* round to integer */
1678                                 M_CVTLF(REG_FTMP3, REG_FTMP3);
1679                                 M_FMUL(REG_FTMP3, s2, REG_FTMP3);
1680                                 M_FSUB(s1, REG_FTMP3, d);
1681                                 }
1682                         store_reg_to_var_flt(iptr->dst, d);
1683                     break;
1684
1685                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1686
1687                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1688                         var_to_reg_flt(s2, src, REG_FTMP2);
1689                         d = reg_of_var(iptr->dst, REG_FTMP3);
1690                         if (checkfloats) {
1691                                 M_DDIVS(s1,s2, REG_FTMP3);
1692                                 M_TRAPB;
1693                                 M_CVTDL_CS(REG_FTMP3, REG_FTMP3); /* round to integer */
1694                                 M_TRAPB;
1695                                 M_CVTLD(REG_FTMP3, REG_FTMP3);
1696                                 M_DMULS(REG_FTMP3, s2, REG_FTMP3);
1697                                 M_TRAPB;
1698                                 M_DSUBS(s1, REG_FTMP3, d);
1699                                 M_TRAPB;
1700                                 }
1701                         else {
1702                                 M_DDIV(s1,s2, REG_FTMP3);
1703                                 M_CVTDL_C(REG_FTMP3, REG_FTMP3); /* round to integer */
1704                                 M_CVTLD(REG_FTMP3, REG_FTMP3);
1705                                 M_DMUL(REG_FTMP3, s2, REG_FTMP3);
1706                                 M_DSUB(s1, REG_FTMP3, d);
1707                                 }
1708                         store_reg_to_var_flt(iptr->dst, d);
1709                     break;
1710
1711                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1712                 case ICMD_L2F:
1713                         var_to_reg_int(s1, src, REG_ITMP1);
1714                         d = reg_of_var(iptr->dst, REG_FTMP3);
1715                         a = dseg_adddouble(0.0);
1716                         M_LST (s1, REG_PV, a);
1717                         M_DLD (d, REG_PV, a);
1718                         M_CVTLF(d, d);
1719                         store_reg_to_var_flt(iptr->dst, d);
1720                         break;
1721
1722                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1723                 case ICMD_L2D:
1724                         var_to_reg_int(s1, src, REG_ITMP1);
1725                         d = reg_of_var(iptr->dst, REG_FTMP3);
1726                         a = dseg_adddouble(0.0);
1727                         M_LST (s1, REG_PV, a);
1728                         M_DLD (d, REG_PV, a);
1729                         M_CVTLD(d, d);
1730                         store_reg_to_var_flt(iptr->dst, d);
1731                         break;
1732
1733                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1734                 case ICMD_D2I:
1735                         var_to_reg_flt(s1, src, REG_FTMP1);
1736                         d = reg_of_var(iptr->dst, REG_ITMP3);
1737                         a = dseg_adddouble(0.0);
1738                         if (checkfloats) {
1739                                 M_CVTDL_CS(s1, REG_FTMP1);
1740                                 M_TRAPB;
1741                                 M_CVTLIS(REG_FTMP1, REG_FTMP2);
1742                                 M_TRAPB;
1743                                 }
1744                         else {
1745                                 M_CVTDL_C(s1, REG_FTMP1);
1746                                 M_CVTLI(REG_FTMP1, REG_FTMP2);
1747                                 }
1748                         M_DST (REG_FTMP1, REG_PV, a);
1749                         M_ILD (d, REG_PV, a);
1750                         store_reg_to_var_int(iptr->dst, d);
1751                         break;
1752
1753                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1754                 case ICMD_D2L:
1755                         var_to_reg_flt(s1, src, REG_FTMP1);
1756                         d = reg_of_var(iptr->dst, REG_ITMP3);
1757                         a = dseg_adddouble(0.0);
1758                         if (checkfloats) {
1759                                 M_CVTDL_CS(s1, REG_FTMP1);
1760                                 M_TRAPB;
1761                                 }
1762                         else {
1763                                 M_CVTDL_C(s1, REG_FTMP1);
1764                                 }
1765                         M_DST (REG_FTMP1, REG_PV, a);
1766                         M_LLD (d, REG_PV, a);
1767                         store_reg_to_var_int(iptr->dst, d);
1768                         break;
1769
1770                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1771
1772                         var_to_reg_flt(s1, src, REG_FTMP1);
1773                         d = reg_of_var(iptr->dst, REG_FTMP3);
1774                         M_FLTMOVE(s1, d);
1775                         store_reg_to_var_flt(iptr->dst, d);
1776                         break;
1777
1778                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1779
1780                         var_to_reg_flt(s1, src, REG_FTMP1);
1781                         d = reg_of_var(iptr->dst, REG_FTMP3);
1782                         if (checkfloats) {
1783                                 M_CVTDFS(s1, d);
1784                                 M_TRAPB;
1785                                 }
1786                         else {
1787                                 M_CVTDF(s1, d);
1788                                 }
1789                         store_reg_to_var_flt(iptr->dst, d);
1790                         break;
1791
1792                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1793                 case ICMD_DCMPL:
1794                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1795                         var_to_reg_flt(s2, src, REG_FTMP2);
1796                         d = reg_of_var(iptr->dst, REG_ITMP3);
1797                         if (checkfloats) {
1798                                 M_LSUB_IMM(REG_ZERO, 1, d);
1799                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1800                                 M_TRAPB;
1801                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1802                                 M_CLR   (d);
1803                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1804                                 M_TRAPB;
1805                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1806                                 M_LADD_IMM(REG_ZERO, 1, d);
1807                                 }
1808                         else {
1809                                 M_LSUB_IMM(REG_ZERO, 1, d);
1810                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1811                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1812                                 M_CLR   (d);
1813                                 M_FCMPLT(s2, s1, REG_FTMP3);
1814                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1815                                 M_LADD_IMM(REG_ZERO, 1, d);
1816                                 }
1817                         store_reg_to_var_int(iptr->dst, d);
1818                         break;
1819
1820                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1821                 case ICMD_DCMPG:
1822                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1823                         var_to_reg_flt(s2, src, REG_FTMP2);
1824                         d = reg_of_var(iptr->dst, REG_ITMP3);
1825                         if (checkfloats) {
1826                                 M_LADD_IMM(REG_ZERO, 1, d);
1827                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1828                                 M_TRAPB;
1829                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1830                                 M_CLR   (d);
1831                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1832                                 M_TRAPB;
1833                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1834                                 M_LSUB_IMM(REG_ZERO, 1, d);
1835                                 }
1836                         else {
1837                                 M_LADD_IMM(REG_ZERO, 1, d);
1838                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1839                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1840                                 M_CLR   (d);
1841                                 M_FCMPLT(s1, s2, REG_FTMP3);
1842                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1843                                 M_LSUB_IMM(REG_ZERO, 1, d);
1844                                 }
1845                         store_reg_to_var_int(iptr->dst, d);
1846                         break;
1847
1848
1849                 /* memory operations **************************************************/
1850
1851 #define gen_bound_check \
1852                         if (checkbounds) {\
1853                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1854                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1855                                 M_BEQZ(REG_ITMP3, 0);\
1856                                 mcode_addxboundrefs(mcodeptr);\
1857                                 }
1858
1859                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1860
1861                         var_to_reg_int(s1, src, REG_ITMP1);
1862                         d = reg_of_var(iptr->dst, REG_ITMP3);
1863                         gen_nullptr_check(s1);
1864                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1865                         store_reg_to_var_int(iptr->dst, d);
1866                         break;
1867
1868                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1869
1870                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1871                         var_to_reg_int(s2, src, REG_ITMP2);
1872                         d = reg_of_var(iptr->dst, REG_ITMP3);
1873                         if (iptr->op1 == 0) {
1874                                 gen_nullptr_check(s1);
1875                                 gen_bound_check;
1876                                 }
1877                         M_SAADDQ(s2, s1, REG_ITMP1);
1878                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1879                         store_reg_to_var_int(iptr->dst, d);
1880                         break;
1881
1882                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1883
1884                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1885                         var_to_reg_int(s2, src, REG_ITMP2);
1886                         d = reg_of_var(iptr->dst, REG_ITMP3);
1887                         if (iptr->op1 == 0) {
1888                                 gen_nullptr_check(s1);
1889                                 gen_bound_check;
1890                                 }
1891                         M_S8ADDQ(s2, s1, REG_ITMP1);
1892                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1893                         store_reg_to_var_int(iptr->dst, d);
1894                         break;
1895
1896                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1897
1898                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1899                         var_to_reg_int(s2, src, REG_ITMP2);
1900                         d = reg_of_var(iptr->dst, REG_ITMP3);
1901                         if (iptr->op1 == 0) {
1902                                 gen_nullptr_check(s1);
1903                                 gen_bound_check;
1904                                 }
1905                         M_S4ADDQ(s2, s1, REG_ITMP1);
1906                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1907                         store_reg_to_var_int(iptr->dst, d);
1908                         break;
1909
1910                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1911
1912                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1913                         var_to_reg_int(s2, src, REG_ITMP2);
1914                         d = reg_of_var(iptr->dst, REG_FTMP3);
1915                         if (iptr->op1 == 0) {
1916                                 gen_nullptr_check(s1);
1917                                 gen_bound_check;
1918                                 }
1919                         M_S4ADDQ(s2, s1, REG_ITMP1);
1920                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1921                         store_reg_to_var_flt(iptr->dst, d);
1922                         break;
1923
1924                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1925
1926                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1927                         var_to_reg_int(s2, src, REG_ITMP2);
1928                         d = reg_of_var(iptr->dst, REG_FTMP3);
1929                         if (iptr->op1 == 0) {
1930                                 gen_nullptr_check(s1);
1931                                 gen_bound_check;
1932                                 }
1933                         M_S8ADDQ(s2, s1, REG_ITMP1);
1934                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1935                         store_reg_to_var_flt(iptr->dst, d);
1936                         break;
1937
1938                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1939
1940                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1941                         var_to_reg_int(s2, src, REG_ITMP2);
1942                         d = reg_of_var(iptr->dst, REG_ITMP3);
1943                         if (iptr->op1 == 0) {
1944                                 gen_nullptr_check(s1);
1945                                 gen_bound_check;
1946                                 }
1947                         if (has_ext_instr_set) {
1948                                 M_LADD(s2, s1, REG_ITMP1);
1949                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1950                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1951                                 }
1952                         else {
1953                                 M_LADD (s2, s1, REG_ITMP1);
1954                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1955                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1956                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1957                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1958                                 }
1959                         store_reg_to_var_int(iptr->dst, d);
1960                         break;
1961
1962                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1963
1964                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1965                         var_to_reg_int(s2, src, REG_ITMP2);
1966                         d = reg_of_var(iptr->dst, REG_ITMP3);
1967                         if (iptr->op1 == 0) {
1968                                 gen_nullptr_check(s1);
1969                                 gen_bound_check;
1970                                 }
1971                         if (has_ext_instr_set) {
1972                                 M_LADD(s2, s1, REG_ITMP1);
1973                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1974                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1975                                 M_SSEXT(d, d);
1976                                 }
1977                         else {
1978                                 M_LADD(s2, s1, REG_ITMP1);
1979                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1980                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1981                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1982                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1983                                 M_SRA_IMM(d, 48, d);
1984                                 }
1985                         store_reg_to_var_int(iptr->dst, d);
1986                         break;
1987
1988                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1989
1990                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1991                         var_to_reg_int(s2, src, REG_ITMP2);
1992                         d = reg_of_var(iptr->dst, REG_ITMP3);
1993                         if (iptr->op1 == 0) {
1994                                 gen_nullptr_check(s1);
1995                                 gen_bound_check;
1996                                 }
1997                         if (has_ext_instr_set) {
1998                                 M_LADD   (s2, s1, REG_ITMP1);
1999                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
2000                                 M_BSEXT  (d, d);
2001                                 }
2002                         else {
2003                                 M_LADD(s2, s1, REG_ITMP1);
2004                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2005                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
2006                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2007                                 M_SRA_IMM(d, 56, d);
2008                                 }
2009                         store_reg_to_var_int(iptr->dst, d);
2010                         break;
2011
2012
2013                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
2014
2015                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2016                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2017                         if (iptr->op1 == 0) {
2018                                 gen_nullptr_check(s1);
2019                                 gen_bound_check;
2020                                 }
2021                         var_to_reg_int(s3, src, REG_ITMP3);
2022                         M_SAADDQ(s2, s1, REG_ITMP1);
2023                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2024                         break;
2025
2026                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
2027
2028                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2029                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2030                         if (iptr->op1 == 0) {
2031                                 gen_nullptr_check(s1);
2032                                 gen_bound_check;
2033                                 }
2034                         var_to_reg_int(s3, src, REG_ITMP3);
2035                         M_S8ADDQ(s2, s1, REG_ITMP1);
2036                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
2037                         break;
2038
2039                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
2040
2041                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2042                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2043                         if (iptr->op1 == 0) {
2044                                 gen_nullptr_check(s1);
2045                                 gen_bound_check;
2046                                 }
2047                         var_to_reg_int(s3, src, REG_ITMP3);
2048                         M_S4ADDQ(s2, s1, REG_ITMP1);
2049                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
2050                         break;
2051
2052                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
2053
2054                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2055                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2056                         if (iptr->op1 == 0) {
2057                                 gen_nullptr_check(s1);
2058                                 gen_bound_check;
2059                                 }
2060                         var_to_reg_flt(s3, src, REG_FTMP3);
2061                         M_S4ADDQ(s2, s1, REG_ITMP1);
2062                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2063                         break;
2064
2065                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
2066
2067                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2068                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2069                         if (iptr->op1 == 0) {
2070                                 gen_nullptr_check(s1);
2071                                 gen_bound_check;
2072                                 }
2073                         var_to_reg_flt(s3, src, REG_FTMP3);
2074                         M_S8ADDQ(s2, s1, REG_ITMP1);
2075                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2076                         break;
2077
2078                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
2079
2080                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2081                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2082                         if (iptr->op1 == 0) {
2083                                 gen_nullptr_check(s1);
2084                                 gen_bound_check;
2085                                 }
2086                         var_to_reg_int(s3, src, REG_ITMP3);
2087                         if (has_ext_instr_set) {
2088                                 M_LADD(s2, s1, REG_ITMP1);
2089                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2090                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
2091                                 }
2092                         else {
2093                                 M_LADD (s2, s1, REG_ITMP1);
2094                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2095                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2096                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2097                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2098                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2099                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2100                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2101                                 }
2102                         break;
2103
2104                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
2105
2106                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2107                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2108                         if (iptr->op1 == 0) {
2109                                 gen_nullptr_check(s1);
2110                                 gen_bound_check;
2111                                 }
2112                         var_to_reg_int(s3, src, REG_ITMP3);
2113                         if (has_ext_instr_set) {
2114                                 M_LADD(s2, s1, REG_ITMP1);
2115                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2116                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2117                                 }
2118                         else {
2119                                 M_LADD (s2, s1, REG_ITMP1);
2120                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2121                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2122                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2123                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2124                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2125                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2126                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2127                                 }
2128                         break;
2129
2130                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2131
2132                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2133                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2134                         if (iptr->op1 == 0) {
2135                                 gen_nullptr_check(s1);
2136                                 gen_bound_check;
2137                                 }
2138                         var_to_reg_int(s3, src, REG_ITMP3);
2139                         if (has_ext_instr_set) {
2140                                 M_LADD(s2, s1, REG_ITMP1);
2141                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2142                                 }
2143                         else {
2144                                 M_LADD (s2, s1, REG_ITMP1);
2145                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2146                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2147                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
2148                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2149                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2150                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2151                                 }
2152                         break;
2153
2154
2155                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2156                                       /* op1 = type, val.a = field address            */
2157
2158                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2159                         M_ALD(REG_ITMP1, REG_PV, a);
2160                         switch (iptr->op1) {
2161                                 case TYPE_INT:
2162                                         var_to_reg_int(s2, src, REG_ITMP2);
2163                                         M_IST(s2, REG_ITMP1, 0);
2164                                         break;
2165                                 case TYPE_LNG:
2166                                         var_to_reg_int(s2, src, REG_ITMP2);
2167                                         M_LST(s2, REG_ITMP1, 0);
2168                                         break;
2169                                 case TYPE_ADR:
2170                                         var_to_reg_int(s2, src, REG_ITMP2);
2171                                         M_AST(s2, REG_ITMP1, 0);
2172                                         break;
2173                                 case TYPE_FLT:
2174                                         var_to_reg_flt(s2, src, REG_FTMP2);
2175                                         M_FST(s2, REG_ITMP1, 0);
2176                                         break;
2177                                 case TYPE_DBL:
2178                                         var_to_reg_flt(s2, src, REG_FTMP2);
2179                                         M_DST(s2, REG_ITMP1, 0);
2180                                         break;
2181                                 default: panic ("internal error");
2182                                 }
2183                         break;
2184
2185                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2186                                       /* op1 = type, val.a = field address            */
2187
2188                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2189                         M_ALD(REG_ITMP1, REG_PV, a);
2190                         switch (iptr->op1) {
2191                                 case TYPE_INT:
2192                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2193                                         M_ILD(d, REG_ITMP1, 0);
2194                                         store_reg_to_var_int(iptr->dst, d);
2195                                         break;
2196                                 case TYPE_LNG:
2197                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2198                                         M_LLD(d, REG_ITMP1, 0);
2199                                         store_reg_to_var_int(iptr->dst, d);
2200                                         break;
2201                                 case TYPE_ADR:
2202                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2203                                         M_ALD(d, REG_ITMP1, 0);
2204                                         store_reg_to_var_int(iptr->dst, d);
2205                                         break;
2206                                 case TYPE_FLT:
2207                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2208                                         M_FLD(d, REG_ITMP1, 0);
2209                                         store_reg_to_var_flt(iptr->dst, d);
2210                                         break;
2211                                 case TYPE_DBL:
2212                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2213                                         M_DLD(d, REG_ITMP1, 0);
2214                                         store_reg_to_var_flt(iptr->dst, d);
2215                                         break;
2216                                 default: panic ("internal error");
2217                                 }
2218                         break;
2219
2220
2221                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2222                                       /* op1 = type, val.i = field offset             */
2223
2224                         a = ((fieldinfo *)(iptr->val.a))->offset;
2225                         switch (iptr->op1) {
2226                                 case TYPE_INT:
2227                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2228                                         var_to_reg_int(s2, src, REG_ITMP2);
2229                                         gen_nullptr_check(s1);
2230                                         M_IST(s2, s1, a);
2231                                         break;
2232                                 case TYPE_LNG:
2233                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2234                                         var_to_reg_int(s2, src, REG_ITMP2);
2235                                         gen_nullptr_check(s1);
2236                                         M_LST(s2, s1, a);
2237                                         break;
2238                                 case TYPE_ADR:
2239                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2240                                         var_to_reg_int(s2, src, REG_ITMP2);
2241                                         gen_nullptr_check(s1);
2242                                         M_AST(s2, s1, a);
2243                                         break;
2244                                 case TYPE_FLT:
2245                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2246                                         var_to_reg_flt(s2, src, REG_FTMP2);
2247                                         gen_nullptr_check(s1);
2248                                         M_FST(s2, s1, a);
2249                                         break;
2250                                 case TYPE_DBL:
2251                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2252                                         var_to_reg_flt(s2, src, REG_FTMP2);
2253                                         gen_nullptr_check(s1);
2254                                         M_DST(s2, s1, a);
2255                                         break;
2256                                 default: panic ("internal error");
2257                                 }
2258                         break;
2259
2260                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2261                                       /* op1 = type, val.i = field offset             */
2262
2263                         a = ((fieldinfo *)(iptr->val.a))->offset;
2264                         switch (iptr->op1) {
2265                                 case TYPE_INT:
2266                                         var_to_reg_int(s1, src, REG_ITMP1);
2267                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2268                                         gen_nullptr_check(s1);
2269                                         M_ILD(d, s1, a);
2270                                         store_reg_to_var_int(iptr->dst, d);
2271                                         break;
2272                                 case TYPE_LNG:
2273                                         var_to_reg_int(s1, src, REG_ITMP1);
2274                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2275                                         gen_nullptr_check(s1);
2276                                         M_LLD(d, s1, a);
2277                                         store_reg_to_var_int(iptr->dst, d);
2278                                         break;
2279                                 case TYPE_ADR:
2280                                         var_to_reg_int(s1, src, REG_ITMP1);
2281                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2282                                         gen_nullptr_check(s1);
2283                                         M_ALD(d, s1, a);
2284                                         store_reg_to_var_int(iptr->dst, d);
2285                                         break;
2286                                 case TYPE_FLT:
2287                                         var_to_reg_int(s1, src, REG_ITMP1);
2288                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2289                                         gen_nullptr_check(s1);
2290                                         M_FLD(d, s1, a);
2291                                         store_reg_to_var_flt(iptr->dst, d);
2292                                         break;
2293                                 case TYPE_DBL:
2294                                         var_to_reg_int(s1, src, REG_ITMP1);
2295                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2296                                         gen_nullptr_check(s1);
2297                                         M_DLD(d, s1, a);
2298                                         store_reg_to_var_flt(iptr->dst, d);
2299                                         break;
2300                                 default: panic ("internal error");
2301                                 }
2302                         break;
2303
2304
2305                 /* branch operations **************************************************/
2306
2307 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2308
2309                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2310
2311                         var_to_reg_int(s1, src, REG_ITMP1);
2312                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2313                         a = dseg_addaddress(asm_handle_exception);
2314                         M_ALD(REG_ITMP2, REG_PV, a);
2315                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2316                         ALIGNCODENOP;
2317                         break;
2318
2319                 case ICMD_GOTO:         /* ... ==> ...                                */
2320                                         /* op1 = target JavaVM pc                     */
2321                         M_BR(0);
2322                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2323                         ALIGNCODENOP;
2324                         break;
2325
2326                 case ICMD_JSR:          /* ... ==> ...                                */
2327                                         /* op1 = target JavaVM pc                     */
2328
2329                         M_BSR(REG_ITMP1, 0);
2330                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2331                         break;
2332
2333                 case ICMD_RET:          /* ... ==> ...                                */
2334                                         /* op1 = local variable                       */
2335
2336                         var = &(locals[iptr->op1][TYPE_ADR]);
2337                         if (var->flags & INMEMORY) {
2338                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2339                                 M_RET(REG_ZERO, REG_ITMP1);
2340                                 }
2341                         else
2342                                 M_RET(REG_ZERO, var->regoff);
2343                         ALIGNCODENOP;
2344                         break;
2345
2346                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2347                                         /* op1 = target JavaVM pc                     */
2348
2349                         var_to_reg_int(s1, src, REG_ITMP1);
2350                         M_BEQZ(s1, 0);
2351                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2352                         break;
2353
2354                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2355                                         /* op1 = target JavaVM pc                     */
2356
2357                         var_to_reg_int(s1, src, REG_ITMP1);
2358                         M_BNEZ(s1, 0);
2359                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2360                         break;
2361
2362                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2363                                         /* op1 = target JavaVM pc, val.i = constant   */
2364
2365                         var_to_reg_int(s1, src, REG_ITMP1);
2366                         if (iptr->val.i == 0) {
2367                                 M_BEQZ(s1, 0);
2368                                 }
2369                         else {
2370                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2371                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2372                                         }
2373                                 else {
2374                                         ICONST(REG_ITMP2, iptr->val.i);
2375                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2376                                         }
2377                                 M_BNEZ(REG_ITMP1, 0);
2378                                 }
2379                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2380                         break;
2381
2382                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2383                                         /* op1 = target JavaVM pc, val.i = constant   */
2384
2385                         var_to_reg_int(s1, src, REG_ITMP1);
2386                         if (iptr->val.i == 0) {
2387                                 M_BLTZ(s1, 0);
2388                                 }
2389                         else {
2390                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2391                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2392                                         }
2393                                 else {
2394                                         ICONST(REG_ITMP2, iptr->val.i);
2395                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2396                                         }
2397                                 M_BNEZ(REG_ITMP1, 0);
2398                                 }
2399                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2400                         break;
2401
2402                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2403                                         /* op1 = target JavaVM pc, val.i = constant   */
2404
2405                         var_to_reg_int(s1, src, REG_ITMP1);
2406                         if (iptr->val.i == 0) {
2407                                 M_BLEZ(s1, 0);
2408                                 }
2409                         else {
2410                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2411                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2412                                         }
2413                                 else {
2414                                         ICONST(REG_ITMP2, iptr->val.i);
2415                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2416                                         }
2417                                 M_BNEZ(REG_ITMP1, 0);
2418                                 }
2419                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2420                         break;
2421
2422                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2423                                         /* op1 = target JavaVM pc, val.i = constant   */
2424
2425                         var_to_reg_int(s1, src, REG_ITMP1);
2426                         if (iptr->val.i == 0) {
2427                                 M_BNEZ(s1, 0);
2428                                 }
2429                         else {
2430                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2431                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2432                                         }
2433                                 else {
2434                                         ICONST(REG_ITMP2, iptr->val.i);
2435                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2436                                         }
2437                                 M_BEQZ(REG_ITMP1, 0);
2438                                 }
2439                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2440                         break;
2441
2442                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2443                                         /* op1 = target JavaVM pc, val.i = constant   */
2444
2445                         var_to_reg_int(s1, src, REG_ITMP1);
2446                         if (iptr->val.i == 0) {
2447                                 M_BGTZ(s1, 0);
2448                                 }
2449                         else {
2450                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2451                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2452                                         }
2453                                 else {
2454                                         ICONST(REG_ITMP2, iptr->val.i);
2455                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2456                                         }
2457                                 M_BEQZ(REG_ITMP1, 0);
2458                                 }
2459                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2460                         break;
2461
2462                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2463                                         /* op1 = target JavaVM pc, val.i = constant   */
2464
2465                         var_to_reg_int(s1, src, REG_ITMP1);
2466                         if (iptr->val.i == 0) {
2467                                 M_BGEZ(s1, 0);
2468                                 }
2469                         else {
2470                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2471                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2472                                         }
2473                                 else {
2474                                         ICONST(REG_ITMP2, iptr->val.i);
2475                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2476                                         }
2477                                 M_BEQZ(REG_ITMP1, 0);
2478                                 }
2479                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2480                         break;
2481
2482                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2483                                         /* op1 = target JavaVM pc, val.l = constant   */
2484
2485                         var_to_reg_int(s1, src, REG_ITMP1);
2486                         if (iptr->val.l == 0) {
2487                                 M_BEQZ(s1, 0);
2488                                 }
2489                         else {
2490                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2491                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2492                                         }
2493                                 else {
2494                                         LCONST(REG_ITMP2, iptr->val.l);
2495                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2496                                         }
2497                                 M_BNEZ(REG_ITMP1, 0);
2498                                 }
2499                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2500                         break;
2501
2502                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2503                                         /* op1 = target JavaVM pc, val.l = constant   */
2504
2505                         var_to_reg_int(s1, src, REG_ITMP1);
2506                         if (iptr->val.l == 0) {
2507                                 M_BLTZ(s1, 0);
2508                                 }
2509                         else {
2510                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2511                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2512                                         }
2513                                 else {
2514                                         LCONST(REG_ITMP2, iptr->val.l);
2515                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2516                                         }
2517                                 M_BNEZ(REG_ITMP1, 0);
2518                                 }
2519                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2520                         break;
2521
2522                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2523                                         /* op1 = target JavaVM pc, val.l = constant   */
2524
2525                         var_to_reg_int(s1, src, REG_ITMP1);
2526                         if (iptr->val.l == 0) {
2527                                 M_BLEZ(s1, 0);
2528                                 }
2529                         else {
2530                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2531                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2532                                         }
2533                                 else {
2534                                         LCONST(REG_ITMP2, iptr->val.l);
2535                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2536                                         }
2537                                 M_BNEZ(REG_ITMP1, 0);
2538                                 }
2539                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2540                         break;
2541
2542                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2543                                         /* op1 = target JavaVM pc, val.l = constant   */
2544
2545                         var_to_reg_int(s1, src, REG_ITMP1);
2546                         if (iptr->val.l == 0) {
2547                                 M_BNEZ(s1, 0);
2548                                 }
2549                         else {
2550                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2551                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2552                                         }
2553                                 else {
2554                                         LCONST(REG_ITMP2, iptr->val.l);
2555                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2556                                         }
2557                                 M_BEQZ(REG_ITMP1, 0);
2558                                 }
2559                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2560                         break;
2561
2562                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2563                                         /* op1 = target JavaVM pc, val.l = constant   */
2564
2565                         var_to_reg_int(s1, src, REG_ITMP1);
2566                         if (iptr->val.l == 0) {
2567                                 M_BGTZ(s1, 0);
2568                                 }
2569                         else {
2570                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2571                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2572                                         }
2573                                 else {
2574                                         LCONST(REG_ITMP2, iptr->val.l);
2575                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2576                                         }
2577                                 M_BEQZ(REG_ITMP1, 0);
2578                                 }
2579                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2580                         break;
2581
2582                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2583                                         /* op1 = target JavaVM pc, val.l = constant   */
2584
2585                         var_to_reg_int(s1, src, REG_ITMP1);
2586                         if (iptr->val.l == 0) {
2587                                 M_BGEZ(s1, 0);
2588                                 }
2589                         else {
2590                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2591                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2592                                         }
2593                                 else {
2594                                         LCONST(REG_ITMP2, iptr->val.l);
2595                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2596                                         }
2597                                 M_BEQZ(REG_ITMP1, 0);
2598                                 }
2599                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2600                         break;
2601
2602                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2603                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2604                 case ICMD_IF_ACMPEQ:
2605
2606                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2607                         var_to_reg_int(s2, src, REG_ITMP2);
2608                         M_CMPEQ(s1, s2, REG_ITMP1);
2609                         M_BNEZ(REG_ITMP1, 0);
2610                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2611                         break;
2612
2613                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2614                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2615                 case ICMD_IF_ACMPNE:
2616
2617                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2618                         var_to_reg_int(s2, src, REG_ITMP2);
2619                         M_CMPEQ(s1, s2, REG_ITMP1);
2620                         M_BEQZ(REG_ITMP1, 0);
2621                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2622                         break;
2623
2624                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2625                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2626
2627                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2628                         var_to_reg_int(s2, src, REG_ITMP2);
2629                         M_CMPLT(s1, s2, REG_ITMP1);
2630                         M_BNEZ(REG_ITMP1, 0);
2631                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2632                         break;
2633
2634                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2635                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2636
2637                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2638                         var_to_reg_int(s2, src, REG_ITMP2);
2639                         M_CMPLE(s1, s2, REG_ITMP1);
2640                         M_BEQZ(REG_ITMP1, 0);
2641                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2642                         break;
2643
2644                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2645                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2646
2647                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2648                         var_to_reg_int(s2, src, REG_ITMP2);
2649                         M_CMPLE(s1, s2, REG_ITMP1);
2650                         M_BNEZ(REG_ITMP1, 0);
2651                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2652                         break;
2653
2654                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2655                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2656
2657                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2658                         var_to_reg_int(s2, src, REG_ITMP2);
2659                         M_CMPLT(s1, s2, REG_ITMP1);
2660                         M_BEQZ(REG_ITMP1, 0);
2661                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2662                         break;
2663
2664                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2665
2666                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2667                         break;
2668
2669                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2670                                         /* val.i = constant                           */
2671
2672                         var_to_reg_int(s1, src, REG_ITMP1);
2673                         d = reg_of_var(iptr->dst, REG_ITMP3);
2674                         s3 = iptr->val.i;
2675                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2676                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2677                                         M_CMPEQ(s1, REG_ZERO, d);
2678                                         store_reg_to_var_int(iptr->dst, d);
2679                                         break;
2680                                         }
2681                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2682                                         M_CMPEQ(s1, REG_ZERO, d);
2683                                         M_XOR_IMM(d, 1, d);
2684                                         store_reg_to_var_int(iptr->dst, d);
2685                                         break;
2686                                         }
2687                                 if (s1 == d) {
2688                                         M_MOV(s1, REG_ITMP1);
2689                                         s1 = REG_ITMP1;
2690                                         }
2691                                 ICONST(d, iptr[1].val.i);
2692                                 }
2693                         if ((s3 >= 0) && (s3 <= 255)) {
2694                                 M_CMOVEQ_IMM(s1, s3, d);
2695                                 }
2696                         else {
2697                                 ICONST(REG_ITMP2, s3);
2698                                 M_CMOVEQ(s1, REG_ITMP2, d);
2699                                 }
2700                         store_reg_to_var_int(iptr->dst, d);
2701                         break;
2702
2703                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2704                                         /* val.i = constant                           */
2705
2706                         var_to_reg_int(s1, src, REG_ITMP1);
2707                         d = reg_of_var(iptr->dst, REG_ITMP3);
2708                         s3 = iptr->val.i;
2709                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2710                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2711                                         M_CMPEQ(s1, REG_ZERO, d);
2712                                         store_reg_to_var_int(iptr->dst, d);
2713                                         break;
2714                                         }
2715                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2716                                         M_CMPEQ(s1, REG_ZERO, d);
2717                                         M_XOR_IMM(d, 1, d);
2718                                         store_reg_to_var_int(iptr->dst, d);
2719                                         break;
2720                                         }
2721                                 if (s1 == d) {
2722                                         M_MOV(s1, REG_ITMP1);
2723                                         s1 = REG_ITMP1;
2724                                         }
2725                                 ICONST(d, iptr[1].val.i);
2726                                 }
2727                         if ((s3 >= 0) && (s3 <= 255)) {
2728                                 M_CMOVNE_IMM(s1, s3, d);
2729                                 }
2730                         else {
2731                                 ICONST(REG_ITMP2, s3);
2732                                 M_CMOVNE(s1, REG_ITMP2, d);
2733                                 }
2734                         store_reg_to_var_int(iptr->dst, d);
2735                         break;
2736
2737                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2738                                         /* val.i = constant                           */
2739
2740                         var_to_reg_int(s1, src, REG_ITMP1);
2741                         d = reg_of_var(iptr->dst, REG_ITMP3);
2742                         s3 = iptr->val.i;
2743                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2744                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2745                                         M_CMPLT(s1, REG_ZERO, d);
2746                                         store_reg_to_var_int(iptr->dst, d);
2747                                         break;
2748                                         }
2749                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2750                                         M_CMPLE(REG_ZERO, s1, d);
2751                                         store_reg_to_var_int(iptr->dst, d);
2752                                         break;
2753                                         }
2754                                 if (s1 == d) {
2755                                         M_MOV(s1, REG_ITMP1);
2756                                         s1 = REG_ITMP1;
2757                                         }
2758                                 ICONST(d, iptr[1].val.i);
2759                                 }
2760                         if ((s3 >= 0) && (s3 <= 255)) {
2761                                 M_CMOVLT_IMM(s1, s3, d);
2762                                 }
2763                         else {
2764                                 ICONST(REG_ITMP2, s3);
2765                                 M_CMOVLT(s1, REG_ITMP2, d);
2766                                 }
2767                         store_reg_to_var_int(iptr->dst, d);
2768                         break;
2769
2770                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2771                                         /* val.i = constant                           */
2772
2773                         var_to_reg_int(s1, src, REG_ITMP1);
2774                         d = reg_of_var(iptr->dst, REG_ITMP3);
2775                         s3 = iptr->val.i;
2776                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2777                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2778                                         M_CMPLE(REG_ZERO, s1, d);
2779                                         store_reg_to_var_int(iptr->dst, d);
2780                                         break;
2781                                         }
2782                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2783                                         M_CMPLT(s1, REG_ZERO, d);
2784                                         store_reg_to_var_int(iptr->dst, d);
2785                                         break;
2786                                         }
2787                                 if (s1 == d) {
2788                                         M_MOV(s1, REG_ITMP1);
2789                                         s1 = REG_ITMP1;
2790                                         }
2791                                 ICONST(d, iptr[1].val.i);
2792                                 }
2793                         if ((s3 >= 0) && (s3 <= 255)) {
2794                                 M_CMOVGE_IMM(s1, s3, d);
2795                                 }
2796                         else {
2797                                 ICONST(REG_ITMP2, s3);
2798                                 M_CMOVGE(s1, REG_ITMP2, d);
2799                                 }
2800                         store_reg_to_var_int(iptr->dst, d);
2801                         break;
2802
2803                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2804                                         /* val.i = constant                           */
2805
2806                         var_to_reg_int(s1, src, REG_ITMP1);
2807                         d = reg_of_var(iptr->dst, REG_ITMP3);
2808                         s3 = iptr->val.i;
2809                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2810                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2811                                         M_CMPLT(REG_ZERO, s1, d);
2812                                         store_reg_to_var_int(iptr->dst, d);
2813                                         break;
2814                                         }
2815                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2816                                         M_CMPLE(s1, REG_ZERO, d);
2817                                         store_reg_to_var_int(iptr->dst, d);
2818                                         break;
2819                                         }
2820                                 if (s1 == d) {
2821                                         M_MOV(s1, REG_ITMP1);
2822                                         s1 = REG_ITMP1;
2823                                         }
2824                                 ICONST(d, iptr[1].val.i);
2825                                 }
2826                         if ((s3 >= 0) && (s3 <= 255)) {
2827                                 M_CMOVGT_IMM(s1, s3, d);
2828                                 }
2829                         else {
2830                                 ICONST(REG_ITMP2, s3);
2831                                 M_CMOVGT(s1, REG_ITMP2, d);
2832                                 }
2833                         store_reg_to_var_int(iptr->dst, d);
2834                         break;
2835
2836                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2837                                         /* val.i = constant                           */
2838
2839                         var_to_reg_int(s1, src, REG_ITMP1);
2840                         d = reg_of_var(iptr->dst, REG_ITMP3);
2841                         s3 = iptr->val.i;
2842                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2843                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2844                                         M_CMPLE(s1, REG_ZERO, d);
2845                                         store_reg_to_var_int(iptr->dst, d);
2846                                         break;
2847                                         }
2848                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2849                                         M_CMPLT(REG_ZERO, s1, d);
2850                                         store_reg_to_var_int(iptr->dst, d);
2851                                         break;
2852                                         }
2853                                 if (s1 == d) {
2854                                         M_MOV(s1, REG_ITMP1);
2855                                         s1 = REG_ITMP1;
2856                                         }
2857                                 ICONST(d, iptr[1].val.i);
2858                                 }
2859                         if ((s3 >= 0) && (s3 <= 255)) {
2860                                 M_CMOVLE_IMM(s1, s3, d);
2861                                 }
2862                         else {
2863                                 ICONST(REG_ITMP2, s3);
2864                                 M_CMOVLE(s1, REG_ITMP2, d);
2865                                 }
2866                         store_reg_to_var_int(iptr->dst, d);
2867                         break;
2868
2869
2870                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2871                 case ICMD_LRETURN:
2872                 case ICMD_ARETURN:
2873
2874 #ifdef USE_THREADS
2875                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2876                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2877                                 M_ALD(REG_PV, REG_PV, a);
2878                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
2879                                 M_JSR(REG_RA, REG_PV);
2880                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
2881                                 }
2882 #endif
2883                         var_to_reg_int(s1, src, REG_RESULT);
2884                         M_INTMOVE(s1, REG_RESULT);
2885                         goto nowperformreturn;
2886
2887                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2888                 case ICMD_DRETURN:
2889
2890 #ifdef USE_THREADS
2891                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2892                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2893                                 M_ALD(REG_PV, REG_PV, a);
2894                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
2895                                 M_JSR(REG_RA, REG_PV);
2896                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
2897                                 }
2898 #endif
2899                         var_to_reg_flt(s1, src, REG_FRESULT);
2900                         M_FLTMOVE(s1, REG_FRESULT);
2901                         goto nowperformreturn;
2902
2903                 case ICMD_RETURN:      /* ...  ==> ...                                */
2904
2905 #ifdef USE_THREADS
2906                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2907                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2908                                 M_ALD(REG_PV, REG_PV, a);
2909                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
2910                                 M_JSR(REG_RA, REG_PV);
2911                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
2912                                 }
2913 #endif
2914
2915 nowperformreturn:
2916                         {
2917                         int r, p;
2918
2919                         p = parentargs_base;
2920
2921                         /* restore return address                                         */
2922
2923                         if (!isleafmethod)
2924                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
2925
2926                         /* restore saved registers                                        */
2927
2928                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
2929                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
2930                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
2931                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
2932
2933                         /* deallocate stack                                               */
2934
2935                         if (parentargs_base)
2936                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
2937
2938                         /* call trace function */
2939
2940                         if (runverbose) {
2941                                 M_LDA (REG_SP, REG_SP, -24);
2942                                 M_AST(REG_RA, REG_SP, 0);
2943                                 M_LST(REG_RESULT, REG_SP, 8);
2944                                 M_DST(REG_FRESULT, REG_SP,16);
2945                                 a = dseg_addaddress (method);
2946                                 M_ALD(argintregs[0], REG_PV, a);
2947                                 M_MOV(REG_RESULT, argintregs[1]);
2948                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);
2949                                 a = dseg_addaddress ((void*) (builtin_displaymethodstop));
2950                                 M_ALD(REG_PV, REG_PV, a);
2951                                 M_JSR (REG_RA, REG_PV);
2952                                 s1 = (int)((u1*) mcodeptr - mcodebase);
2953                                 if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
2954                                 else {
2955                                         s4 ml=-s1, mh=0;
2956                                         while (ml<-32768) { ml+=65536; mh--; }
2957                                         M_LDA (REG_PV, REG_RA, ml );
2958                                         M_LDAH (REG_PV, REG_PV, mh );
2959                                         }
2960                                 M_DLD(REG_FRESULT, REG_SP,16);
2961                                 M_LLD(REG_RESULT, REG_SP, 8);
2962                                 M_ALD(REG_RA, REG_SP, 0);
2963                                 M_LDA (REG_SP, REG_SP, 24);
2964                                 }
2965
2966                         M_RET(REG_ZERO, REG_RA);
2967                         ALIGNCODENOP;
2968                         }
2969                         break;
2970
2971
2972                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2973                         {
2974                         s4 i, l, *s4ptr;
2975
2976                         s4ptr = iptr->val.a;
2977                         l = s4ptr[1];                          /* low     */
2978                         i = s4ptr[2];                          /* high    */
2979
2980                         var_to_reg_int(s1, src, REG_ITMP1);
2981                         if (l == 0)
2982                                 {M_INTMOVE(s1, REG_ITMP1);}
2983                         else if (l <= 32768) {
2984                                 M_LDA(REG_ITMP1, s1, -l);
2985                                 }
2986                         else {
2987                                 ICONST(REG_ITMP2, l);
2988                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2989                                 }
2990                         i = i - l + 1;
2991
2992                         /* range check */
2993
2994                         if (i <= 256)
2995                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
2996                         else {
2997                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
2998                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
2999                                 }
3000                         M_BEQZ(REG_ITMP2, 0);
3001                         mcode_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr);
3002
3003                         /* build jump table top down and use address of lowest entry */
3004
3005                         s4ptr += 3 + i;
3006                         while (--i >= 0) {
3007                                 dseg_addtarget(BlockPtrOfPC(*--s4ptr));
3008                                 }
3009                         }
3010
3011                         /* length of dataseg after last dseg_addtarget is used by load */
3012
3013                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3014                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
3015                         M_JMP(REG_ZERO, REG_ITMP2);
3016                         ALIGNCODENOP;
3017                         break;
3018
3019
3020                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3021                         {
3022                         s4 i, l, val, *s4ptr;
3023
3024                         s4ptr = iptr->val.a;
3025                         l = s4ptr[0];                          /* default  */
3026                         i = s4ptr[1];                          /* count    */
3027
3028                         MCODECHECK((i<<2)+8);
3029                         var_to_reg_int(s1, src, REG_ITMP1);
3030                         while (--i >= 0) {
3031                                 s4ptr += 2;
3032                                 val = s4ptr[0];
3033                                 if ((val >= 0) && (val <= 255)) {
3034                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3035                                         }
3036                                 else {
3037                                         if ((val >= -32768) && (val <= 32767)) {
3038                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3039                                                 }
3040                                         else {
3041                                                 a = dseg_adds4 (val);
3042                                                 M_ILD(REG_ITMP2, REG_PV, a);
3043                                                 }
3044                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3045                                         }
3046                                 M_BNEZ(REG_ITMP2, 0);
3047                                 mcode_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr);
3048                                 }
3049
3050                         M_BR(0);
3051                         mcode_addreference(BlockPtrOfPC(l), mcodeptr);
3052                         ALIGNCODENOP;
3053                         break;
3054                         }
3055
3056
3057                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3058                                         /* op1 = return type, val.a = function pointer*/
3059                         s3 = 3;
3060                         goto gen_method;
3061
3062                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3063                                         /* op1 = return type, val.a = function pointer*/
3064                         s3 = 2;
3065                         goto gen_method;
3066
3067                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3068                                         /* op1 = return type, val.a = function pointer*/
3069                         s3 = 1;
3070                         goto gen_method;
3071
3072                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3073                                         /* op1 = arg count, val.a = method pointer    */
3074
3075                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3076                                         /* op1 = arg count, val.a = method pointer    */
3077
3078                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3079                                         /* op1 = arg count, val.a = method pointer    */
3080
3081                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3082                                         /* op1 = arg count, val.a = method pointer    */
3083
3084                         s3 = iptr->op1;
3085
3086 gen_method: {
3087                         methodinfo   *m;
3088                         classinfo    *ci;
3089
3090                         MCODECHECK((s3 << 1) + 64);
3091
3092                         /* copy arguments to registers or stack location                  */
3093
3094                         for (; --s3 >= 0; src = src->prev) {
3095                                 if (src->varkind == ARGVAR)
3096                                         continue;
3097                                 if (IS_INT_LNG_TYPE(src->type)) {
3098                                         if (s3 < INT_ARG_CNT) {
3099                                                 s1 = argintregs[s3];
3100                                                 var_to_reg_int(d, src, s1);
3101                                                 M_INTMOVE(d, s1);
3102                                                 }
3103                                         else  {
3104                                                 var_to_reg_int(d, src, REG_ITMP1);
3105                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3106                                                 }
3107                                         }
3108                                 else
3109                                         if (s3 < FLT_ARG_CNT) {
3110                                                 s1 = argfltregs[s3];
3111                                                 var_to_reg_flt(d, src, s1);
3112                                                 M_FLTMOVE(d, s1);
3113                                                 }
3114                                         else {
3115                                                 var_to_reg_flt(d, src, REG_FTMP1);
3116                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3117                                                 }
3118                                 } /* end of for */
3119
3120                         m = iptr->val.a;
3121                         switch (iptr->opc) {
3122                                 case ICMD_BUILTIN3:
3123                                 case ICMD_BUILTIN2:
3124                                 case ICMD_BUILTIN1:
3125                                         a = dseg_addaddress ((void*) (m));
3126
3127                                         M_ALD(REG_PV, REG_PV, a); /* Pointer to built-in-function */
3128                                         d = iptr->op1;
3129                                         goto makeactualcall;
3130
3131                                 case ICMD_INVOKESTATIC:
3132                                 case ICMD_INVOKESPECIAL:
3133                                         a = dseg_addaddress (m->stubroutine);
3134
3135                                         M_ALD(REG_PV, REG_PV, a );       /* method pointer in r27 */
3136
3137                                         d = m->returntype;
3138                                         goto makeactualcall;
3139
3140                                 case ICMD_INVOKEVIRTUAL:
3141
3142                                         gen_nullptr_check(argintregs[0]);
3143                                         M_ALD(REG_METHODPTR, argintregs[0],
3144                                                                  OFFSET(java_objectheader, vftbl));
3145                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
3146                                                                 sizeof(methodptr) * m->vftblindex);
3147
3148                                         d = m->returntype;
3149                                         goto makeactualcall;
3150
3151                                 case ICMD_INVOKEINTERFACE:
3152                                         ci = m->class;
3153
3154                                         gen_nullptr_check(argintregs[0]);
3155                                         M_ALD(REG_METHODPTR, argintregs[0],
3156                                                                  OFFSET(java_objectheader, vftbl));
3157                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
3158                                               OFFSET(vftbl, interfacetable[0]) -
3159                                               sizeof(methodptr*) * ci->index);
3160                                         M_ALD(REG_PV, REG_METHODPTR,
3161                                                             sizeof(methodptr) * (m - ci->methods));
3162
3163                                         d = m->returntype;
3164                                         goto makeactualcall;
3165
3166                                 default:
3167                                         d = 0;
3168                                         sprintf (logtext, "Unkown ICMD-Command: %d", iptr->opc);
3169                                         error ();
3170                                 }
3171
3172 makeactualcall:
3173
3174                         M_JSR (REG_RA, REG_PV);
3175
3176                         /* recompute pv */
3177
3178                         s1 = (int)((u1*) mcodeptr - mcodebase);
3179                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3180                         else {
3181                                 s4 ml=-s1, mh=0;
3182                                 while (ml<-32768) { ml+=65536; mh--; }
3183                                 M_LDA (REG_PV, REG_RA, ml );
3184                                 M_LDAH (REG_PV, REG_PV, mh );
3185                                 }
3186
3187                         /* d contains return type */
3188
3189                         if (d != TYPE_VOID) {
3190                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3191                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3192                                         M_INTMOVE(REG_RESULT, s1);
3193                                         store_reg_to_var_int(iptr->dst, s1);
3194                                         }
3195                                 else {
3196                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3197                                         M_FLTMOVE(REG_FRESULT, s1);
3198                                         store_reg_to_var_flt(iptr->dst, s1);
3199                                         }
3200                                 }
3201                         }
3202                         break;
3203
3204
3205                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3206
3207                                       /* op1:   0 == array, 1 == class                */
3208                                       /* val.a: (classinfo*) superclass               */
3209
3210 /*          superclass is an interface:
3211  *
3212  *          return (sub != NULL) &&
3213  *                 (sub->vftbl->interfacetablelength > super->index) &&
3214  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3215  *
3216  *          superclass is a class:
3217  *
3218  *          return ((sub != NULL) && (0
3219  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3220  *                  super->vftbl->diffvall));
3221  */
3222
3223                         {
3224                         classinfo *super = (classinfo*) iptr->val.a;
3225
3226                         var_to_reg_int(s1, src, REG_ITMP1);
3227                         d = reg_of_var(iptr->dst, REG_ITMP3);
3228                         if (s1 == d) {
3229                                 M_MOV(s1, REG_ITMP1);
3230                                 s1 = REG_ITMP1;
3231                                 }
3232                         M_CLR(d);
3233                         if (iptr->op1) {                               /* class/interface */
3234                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3235                                         M_BEQZ(s1, 6);
3236                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3237                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3238                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3239                                         M_BLEZ(REG_ITMP2, 2);
3240                                         M_ALD(REG_ITMP1, REG_ITMP1,
3241                                               OFFSET(vftbl, interfacetable[0]) -
3242                                               super->index * sizeof(methodptr*));
3243                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3244                                         }
3245                                 else {                                     /* class           */
3246                                         s2 = super->vftbl->diffval;
3247                                         M_BEQZ(s1, 4 + (s2 > 255));
3248                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3249                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3250                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3251                                         if (s2 <= 255)
3252                                                 M_CMPULE_IMM(REG_ITMP1, s2, d);
3253                                         else {
3254                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3255                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3256                                                 }
3257                                         }
3258                                 }
3259                         else
3260                                 panic ("internal error: no inlined array instanceof");
3261                         }
3262                         store_reg_to_var_int(iptr->dst, d);
3263                         break;
3264
3265                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3266
3267                                       /* op1:   0 == array, 1 == class                */
3268                                       /* val.a: (classinfo*) superclass               */
3269
3270 /*          superclass is an interface:
3271  *
3272  *          OK if ((sub == NULL) ||
3273  *                 (sub->vftbl->interfacetablelength > super->index) &&
3274  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3275  *
3276  *          superclass is a class:
3277  *
3278  *          OK if ((sub == NULL) || (0
3279  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3280  *                 super->vftbl->diffvall));
3281  */
3282
3283                         {
3284                         classinfo *super = (classinfo*) iptr->val.a;
3285
3286                         d = reg_of_var(iptr->dst, REG_ITMP3);
3287                         var_to_reg_int(s1, src, d);
3288                         if (iptr->op1) {                               /* class/interface */
3289                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3290                                         M_BEQZ(s1, 6);
3291                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3292                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3293                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3294                                         M_BLEZ(REG_ITMP2, 0);
3295                                         mcode_addxcastrefs(mcodeptr);
3296                                         M_ALD(REG_ITMP2, REG_ITMP1,
3297                                               OFFSET(vftbl, interfacetable[0]) -
3298                                               super->index * sizeof(methodptr*));
3299                                         M_BEQZ(REG_ITMP2, 0);
3300                                         mcode_addxcastrefs(mcodeptr);
3301                                         }
3302                                 else {                                     /* class           */
3303                                         s2 = super->vftbl->diffval;
3304                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3305                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3306                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3307                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3308                                         if (s2 == 0) {
3309                                                 M_BNEZ(REG_ITMP1, 0);
3310                                                 }
3311                                         else if (s2 <= 255) {
3312                                                 M_CMPULE_IMM(REG_ITMP1, s2, REG_ITMP2);
3313                                                 M_BEQZ(REG_ITMP2, 0);
3314                                                 }
3315                                         else {
3316                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3317                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3318                                                 M_BEQZ(REG_ITMP2, 0);
3319                                                 }
3320                                         mcode_addxcastrefs(mcodeptr);
3321                                         }
3322                                 }
3323                         else
3324                                 panic ("internal error: no inlined array checkcast");
3325                         }
3326                         M_INTMOVE(s1, d);
3327                         store_reg_to_var_int(iptr->dst, d);
3328                         break;
3329
3330                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3331
3332                         var_to_reg_int(s1, src, REG_ITMP1);
3333                         M_BLTZ(s1, 0);
3334                         mcode_addxcheckarefs(mcodeptr);
3335                         break;
3336
3337                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3338                                       /* op1 = dimension, val.a = array descriptor    */
3339
3340                         /* check for negative sizes and copy sizes to stack if necessary  */
3341
3342                         MCODECHECK((iptr->op1 << 1) + 64);
3343
3344                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3345                                 var_to_reg_int(s2, src, REG_ITMP1);
3346                                 M_BLTZ(s2, 0);
3347                                 mcode_addxcheckarefs(mcodeptr);
3348
3349                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3350
3351                                 if (src->varkind != ARGVAR) {
3352                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3353                                         }
3354                                 }
3355
3356                         /* a0 = dimension count */
3357
3358                         ICONST(argintregs[0], iptr->op1);
3359
3360                         /* a1 = arraydescriptor */
3361
3362                         a = dseg_addaddress(iptr->val.a);
3363                         M_ALD(argintregs[1], REG_PV, a);
3364
3365                         /* a2 = pointer to dimensions = stack pointer */
3366
3367                         M_INTMOVE(REG_SP, argintregs[2]);
3368
3369                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3370                         M_ALD(REG_PV, REG_PV, a);
3371                         M_JSR(REG_RA, REG_PV);
3372                         s1 = (int)((u1*) mcodeptr - mcodebase);
3373                         if (s1 <= 32768)
3374                                 M_LDA (REG_PV, REG_RA, -s1);
3375                         else {
3376                                 s4 ml = -s1, mh = 0;
3377                                 while (ml < -32768) {ml += 65536; mh--;}
3378                                 M_LDA(REG_PV, REG_RA, ml);
3379                                 M_LDAH(REG_PV, REG_PV, mh);
3380                                 }
3381                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3382                         M_INTMOVE(REG_RESULT, s1);
3383                         store_reg_to_var_int(iptr->dst, s1);
3384                         break;
3385
3386
3387                 default: sprintf (logtext, "Unknown pseudo command: %d", iptr->opc);
3388                          error();
3389         } /* switch */
3390         } /* for instruction */
3391
3392         /* copy values to interface registers */
3393
3394         src = bptr->outstack;
3395         len = bptr->outdepth;
3396         MCODECHECK(64+len);
3397         while (src) {
3398                 len--;
3399                 if ((src->varkind != STACKVAR)) {
3400                         s2 = src->type;
3401                         if (IS_FLT_DBL_TYPE(s2)) {
3402                                 var_to_reg_flt(s1, src, REG_FTMP1);
3403                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3404                                         M_FLTMOVE(s1,interfaces[len][s2].regoff);
3405                                         }
3406                                 else {
3407                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3408                                         }
3409                                 }
3410                         else {
3411                                 var_to_reg_int(s1, src, REG_ITMP1);
3412                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3413                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3414                                         }
3415                                 else {
3416                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3417                                         }
3418                                 }
3419                         }
3420                 src = src->prev;
3421                 }
3422         } /* if (bptr -> flags >= BBREACHED) */
3423         } /* for basic block */
3424
3425         bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
3426
3427         {
3428         /* generate bound check stubs */
3429
3430         s4 *xcodeptr = NULL;
3431
3432         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3433                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3434                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3435                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3436                         continue;
3437                         }
3438
3439                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3440                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3441
3442                 MCODECHECK(8);
3443
3444                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos - 4);
3445
3446                 if (xcodeptr != NULL) {
3447                         M_BR((xcodeptr-mcodeptr)-1);
3448                         }
3449                 else {
3450                         xcodeptr = mcodeptr;
3451
3452                         a = dseg_addaddress(proto_java_lang_ArrayIndexOutOfBoundsException);
3453                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3454
3455                         a = dseg_addaddress(asm_handle_exception);
3456                         M_ALD(REG_ITMP3, REG_PV, a);
3457
3458                         M_JMP(REG_ZERO, REG_ITMP3);
3459                         }
3460                 }
3461
3462         /* generate negative array size check stubs */
3463
3464         xcodeptr = NULL;
3465
3466         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3467                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3468                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3469                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3470                         continue;
3471                         }
3472
3473                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3474                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3475
3476                 MCODECHECK(8);
3477
3478                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos - 4);
3479
3480                 if (xcodeptr != NULL) {
3481                         M_BR((xcodeptr-mcodeptr)-1);
3482                         }
3483                 else {
3484                         xcodeptr = mcodeptr;
3485
3486                         a = dseg_addaddress(proto_java_lang_NegativeArraySizeException);
3487                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3488
3489                         a = dseg_addaddress(asm_handle_exception);
3490                         M_ALD(REG_ITMP3, REG_PV, a);
3491
3492                         M_JMP(REG_ZERO, REG_ITMP3);
3493                         }
3494                 }
3495
3496         /* generate cast check stubs */
3497
3498         xcodeptr = NULL;
3499
3500         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3501                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3502                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3503                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3504                         continue;
3505                         }
3506
3507                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3508                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3509
3510                 MCODECHECK(8);
3511
3512                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos - 4);
3513
3514                 if (xcodeptr != NULL) {
3515                         M_BR((xcodeptr-mcodeptr)-1);
3516                         }
3517                 else {
3518                         xcodeptr = mcodeptr;
3519
3520                         a = dseg_addaddress(proto_java_lang_ClassCastException);
3521                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3522
3523                         a = dseg_addaddress(asm_handle_exception);
3524                         M_ALD(REG_ITMP3, REG_PV, a);
3525
3526                         M_JMP(REG_ZERO, REG_ITMP3);
3527                         }
3528                 }
3529
3530
3531 #ifdef SOFTNULLPTRCHECK
3532
3533         /* generate null pointer check stubs */
3534
3535         xcodeptr = NULL;
3536
3537         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3538                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3539                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3540                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3541                         continue;
3542                         }
3543
3544                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3545                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3546
3547                 MCODECHECK(8);
3548
3549                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3550
3551                 if (xcodeptr != NULL) {
3552                         M_BR((xcodeptr-mcodeptr)-1);
3553                         }
3554                 else {
3555                         xcodeptr = mcodeptr;
3556
3557                         a = dseg_addaddress(proto_java_lang_NullPointerException);
3558                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3559
3560                         a = dseg_addaddress(asm_handle_exception);
3561                         M_ALD(REG_ITMP3, REG_PV, a);
3562
3563                         M_JMP(REG_ZERO, REG_ITMP3);
3564                         }
3565                 }
3566
3567 #endif
3568         }
3569
3570         mcode_finish((int)((u1*) mcodeptr - mcodebase));
3571 }
3572
3573
3574 /* redefinition of code generation macros (compiling into array) **************/
3575
3576 /*
3577 These macros are newly defined to allow code generation into an array.
3578 This is necessary, because the original M_.. macros generate code by
3579 calling 'mcode_adds4' that uses an additional data structure to
3580 receive the code.
3581
3582 For a faster (but less flexible) version to generate code, these
3583 macros directly use the (s4* p) - pointer to put the code directly
3584 in a locally defined array.
3585 This makes sense only for the stub-generation-routines below.
3586 */
3587
3588 #undef M_OP3
3589 #define M_OP3(op,fu,a,b,c,const) \
3590         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<(16-3*(const)))| \
3591         ((const)<<12)|((fu)<<5)|((c)) )
3592 #undef M_FOP3
3593 #define M_FOP3(op,fu,a,b,c) \
3594         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<16)|((fu)<<5)|(c) )
3595 #undef M_BRA
3596 #define M_BRA(op,a,disp) \
3597         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((disp)&0x1fffff) )
3598 #undef M_MEM
3599 #define M_MEM(op,a,b,disp) \
3600         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<16)|((disp)&0xffff) )
3601
3602
3603 /* function createcompilerstub *************************************************
3604
3605         creates a stub routine which calls the compiler
3606
3607 *******************************************************************************/
3608
3609 #define COMPSTUBSIZE 3
3610
3611 u1 *createcompilerstub (methodinfo *m)
3612 {
3613         u8 *s = CNEW (u8, COMPSTUBSIZE);    /* memory to hold the stub            */
3614         s4 *p = (s4*) s;                    /* code generation pointer            */
3615
3616                                             /* code for the stub                  */
3617         M_ALD (REG_PV, REG_PV, 16);         /* load pointer to the compiler       */
3618         M_JMP (0, REG_PV);                  /* jump to the compiler, return address
3619                                                in reg 0 is used as method pointer */
3620         s[1] = (u8) m;                      /* literals to be adressed            */
3621         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3622
3623 #ifdef STATISTICS
3624         count_cstub_len += COMPSTUBSIZE * 8;
3625 #endif
3626
3627         return (u1*) s;
3628 }
3629
3630
3631 /* function removecompilerstub *************************************************
3632
3633      deletes a compilerstub from memory  (simply by freeing it)
3634
3635 *******************************************************************************/
3636
3637 void removecompilerstub (u1 *stub)
3638 {
3639         CFREE (stub, COMPSTUBSIZE * 8);
3640 }
3641
3642
3643 /* function: createnativestub **************************************************
3644
3645         creates a stub routine which calls a native method
3646
3647 *******************************************************************************/
3648
3649 #define NATIVESTUBSIZE 11
3650
3651 u1 *createnativestub (functionptr f, methodinfo *m)
3652 {
3653         u8 *s = CNEW (u8, NATIVESTUBSIZE);  /* memory to hold the stub            */
3654         s4 *p = (s4*) s;                    /* code generation pointer            */
3655
3656         M_LDA  (REG_SP, REG_SP, -8);        /* build up stackframe                */
3657         M_AST  (REG_RA, REG_SP, 0);         /* store return address               */
3658
3659         M_ALD  (REG_PV, REG_PV, 8*8);       /* load adress of native method       */
3660         M_JSR  (REG_RA, REG_PV);            /* call native method                 */
3661
3662         M_LDA  (REG_PV, REG_RA, -4*4);      /* recompute pv from ra               */
3663         M_ALD  (REG_ITMP3, REG_PV, 9*8);    /* get address of exceptionptr        */
3664
3665         M_ALD  (REG_RA, REG_SP, 0);         /* load return address                */
3666         M_ALD  (REG_ITMP1, REG_ITMP3, 0);   /* load exception into reg. itmp1     */
3667
3668         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe                  */
3669         M_BNEZ (REG_ITMP1, 1);              /* if no exception then return        */
3670
3671         M_RET  (REG_ZERO, REG_RA);          /* return to caller                   */
3672
3673         M_AST  (REG_ZERO, REG_ITMP3, 0);    /* store NULL into exceptionptr       */
3674         M_LDA  (REG_ITMP2, REG_RA, -4);     /* move fault address into reg. itmp2 */
3675
3676         M_ALD  (REG_ITMP3, REG_PV,10*8);    /* load asm exception handler address */
3677         M_JMP  (REG_ZERO, REG_ITMP3);       /* jump to asm exception handler      */
3678
3679
3680         s[8] = (u8) f;                      /* address of native method           */
3681         s[9] = (u8) (&exceptionptr);        /* address of exceptionptr            */
3682         s[10]= (u8) (asm_handle_nat_exception); /* addr of asm exception handler  */
3683
3684 #ifdef STATISTICS
3685         count_nstub_len += NATIVESTUBSIZE * 8;
3686 #endif
3687
3688         return (u1*) s;
3689 }
3690
3691
3692 /* function: removenativestub **************************************************
3693
3694     removes a previously created native-stub from memory
3695
3696 *******************************************************************************/
3697
3698 void removenativestub (u1 *stub)
3699 {
3700         CFREE (stub, NATIVESTUBSIZE * 8);
3701 }
3702
3703
3704 /*
3705  * These are local overrides for various environment variables in Emacs.
3706  * Please do not remove this and leave it at the end of the file, where
3707  * Emacs will automagically detect them.
3708  * ---------------------------------------------------------------------
3709  * Local variables:
3710  * mode: c
3711  * indent-tabs-mode: t
3712  * c-basic-offset: 4
3713  * tab-width: 4
3714  * End:
3715  */