alpha/ngen.c

   1 /* alpha/ngen.c ****************************************************************
   2
   3         Copyright (c) 1997 A. Krall, R. Grafl, M. Gschwind, M. Probst
   4
   5         See file COPYRIGHT for information on usage and disclaimer of warranties
   6
   7         Contains the codegenerator for an Alpha processor.
   8         This module generates Alpha machine code for a sequence of
   9         pseudo commands (ICMDs).
  10
  11         Authors: Andreas  Krall      EMAIL: cacao@complang.tuwien.ac.at
  12                  Reinhard Grafl      EMAIL: cacao@complang.tuwien.ac.at
  13
  14         Last Change: $Id: ngen.c 132 1999-09-27 15:54:42Z chris $
  15
  16 *******************************************************************************/
  17
  18 #include "jitdef.h"   /* phil */
  19
  20 /* *****************************************************************************
  21
  22 Datatypes and Register Allocations:
  23 -----------------------------------
  24
  25 On 64-bit-machines (like the Alpha) all operands are stored in the
  26 registers in a 64-bit form, even when the correspondig JavaVM  operands
  27 only need 32 bits. This is done by a canonical representation:
  28
  29 32-bit integers are allways stored as sign-extended 64-bit values (this
  30 approach is directly supported by the Alpha architecture and is very easy
  31 to implement).
  32
  33 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  34 expanding the exponent and mantissa with zeroes. (also supported by the
  35 architecture)
  36
  37
  38 Stackframes:
  39
  40 The calling conventions and the layout of the stack is  explained in detail
  41 in the documention file: calling.doc
  42
  43 *******************************************************************************/
  44
  45
  46 /* additional functions and macros to generate code ***************************/
  47
  48 /* #define BlockPtrOfPC(pc)        block+block_index[pc] */
  49 #define BlockPtrOfPC(pc)  ((basicblock *) iptr->target)
  50
  51
  52 #ifdef STATISTICS
  53 #define COUNT_SPILLS count_spills++
  54 #else
  55 #define COUNT_SPILLS
  56 #endif
  57
  58
  59 /* gen_nullptr_check(objreg) */
  60
  61 #ifdef SOFTNULLPTRCHECK
  62 #define gen_nullptr_check(objreg) \
  63         if (checknull) {\
  64         M_BEQZ((objreg), 0);\
  65         mcode_addxnullrefs(mcodeptr);\
  66         }
  67 #else
  68 #define gen_nullptr_check(objreg)
  69 #endif
  70
  71
  72 /* MCODECHECK(icnt) */
  73
  74 #define MCODECHECK(icnt) \
  75         if((mcodeptr+(icnt))>mcodeend)mcodeptr=mcode_increase((u1*)mcodeptr)
  76
  77 /* M_INTMOVE:
  78      generates an integer-move from register a to b.
  79      if a and b are the same int-register, no code will be generated.
  80 */
  81
  82 #define M_INTMOVE(a,b) if(a!=b){M_MOV(a,b);}
  83
  84
  85 /* M_FLTMOVE:
  86     generates a floating-point-move from register a to b.
  87     if a and b are the same float-register, no code will be generated
  88 */
  89
  90 #define M_FLTMOVE(a,b) if(a!=b){M_FMOV(a,b);}
  91
  92
  93 /* var_to_reg_xxx:
  94     this function generates code to fetch data from a pseudo-register
  95     into a real register.
  96     If the pseudo-register has actually been assigned to a real
  97     register, no code will be emitted, since following operations
  98     can use this register directly.
  99
 100     v: pseudoregister to be fetched from
 101     tempregnum: temporary register to be used if v is actually spilled to ram
 102
 103     return: the register number, where the operand can be found after
 104             fetching (this wil be either tempregnum or the register
 105             number allready given to v)
 106 */
 107
 108 #define var_to_reg_int(regnr,v,tempnr) { \
 109         if ((v)->flags & INMEMORY) \
 110                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 111         else regnr=(v)->regoff; \
 112 }
 113
 114
 115 #define var_to_reg_flt(regnr,v,tempnr) { \
 116         if ((v)->flags & INMEMORY) \
 117                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 118         else regnr=(v)->regoff; \
 119 }
 120
 121
 122 /* reg_of_var:
 123     This function determines a register, to which the result of an operation
 124     should go, when it is ultimatively intended to store the result in
 125     pseudoregister v.
 126     If v is assigned to an actual register, this register will be returned.
 127     Otherwise (when v is spilled) this function returns tempregnum.
 128     If not already done, regoff and flags are set in the stack location.
 129 */
 130
 131 static int reg_of_var(stackptr v, int tempregnum)
 132 {
 133         varinfo      *var;
 134
 135         switch (v->varkind) {
 136                 case TEMPVAR:
 137                         if (!(v->flags & INMEMORY))
 138                                 return(v->regoff);
 139                         break;
 140                 case STACKVAR:
 141                         var = &(interfaces[v->varnum][v->type]);
 142                         v->regoff = var->regoff;
 143                         if (!(var->flags & INMEMORY))
 144                                 return(var->regoff);
 145                         break;
 146                 case LOCALVAR:
 147                         var = &(locals[v->varnum][v->type]);
 148                         v->regoff = var->regoff;
 149                         if (!(var->flags & INMEMORY))
 150                                 return(var->regoff);
 151                         break;
 152                 case ARGVAR:
 153                         v->regoff = v->varnum;
 154                         if (IS_FLT_DBL_TYPE(v->type)) {
 155                                 if (v->varnum < fltreg_argnum) {
 156                                         v->regoff = argfltregs[v->varnum];
 157                                         return(argfltregs[v->varnum]);
 158                                         }
 159                                 }
 160                         else
 161                                 if (v->varnum < intreg_argnum) {
 162                                         v->regoff = argintregs[v->varnum];
 163                                         return(argintregs[v->varnum]);
 164                                         }
 165                         v->regoff -= intreg_argnum;
 166                         break;
 167                 }
 168         v->flags |= INMEMORY;
 169         return tempregnum;
 170 }
 171
 172
 173 /* store_reg_to_var_xxx:
 174     This function generates the code to store the result of an operation
 175     back into a spilled pseudo-variable.
 176     If the pseudo-variable has not been spilled in the first place, this
 177     function will generate nothing.
 178
 179     v ............ Pseudovariable
 180     tempregnum ... Number of the temporary registers as returned by
 181                    reg_of_var.
 182 */
 183
 184 #define store_reg_to_var_int(sptr, tempregnum) {       \
 185         if ((sptr)->flags & INMEMORY) {                    \
 186                 COUNT_SPILLS;                                  \
 187                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 188                 }                                              \
 189         }
 190
 191 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 192         if ((sptr)->flags & INMEMORY) {                    \
 193                 COUNT_SPILLS;                                  \
 194                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 195                 }                                              \
 196         }
 197
 198
 199 /* NullPointerException handlers and exception handling initialisation        */
 200
 201 typedef struct sigctx_struct {
 202
 203         long          sc_onstack;           /* sigstack state to restore          */
 204         long          sc_mask;              /* signal mask to restore             */
 205         long          sc_pc;                /* pc at time of signal               */
 206         long          sc_ps;                /* psl to retore                      */
 207         long          sc_regs[32];          /* processor regs 0 to 31             */
 208         long          sc_ownedfp;           /* fp has been used                   */
 209         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 210         unsigned long sc_fpcr;              /* floating point control register    */
 211         unsigned long sc_fp_control;        /* software fpcr                      */
 212                                             /* rest is unused                     */
 213         unsigned long sc_reserved1, sc_reserved2;
 214         unsigned long sc_ssize;
 215         char          *sc_sbase;
 216         unsigned long sc_traparg_a0;
 217         unsigned long sc_traparg_a1;
 218         unsigned long sc_traparg_a2;
 219         unsigned long sc_fp_trap_pc;
 220         unsigned long sc_fp_trigger_sum;
 221         unsigned long sc_fp_trigger_inst;
 222         unsigned long sc_retcode[2];
 223 } sigctx_struct;
 224
 225
 226 /* NullPointerException signal handler for hardware null pointer check */
 227
 228 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 229 {
 230         sigset_t nsig;
 231         int      instr;
 232         long     faultaddr;
 233
 234         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 235
 236         instr = *((int*)(sigctx->sc_pc));
 237         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 238
 239         if (faultaddr == 0) {
 240                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 241                 sigemptyset(&nsig);
 242                 sigaddset(&nsig, sig);
 243                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 244                 sigctx->sc_regs[REG_ITMP1_XPTR] =
 245                                             (long) proto_java_lang_NullPointerException;
 246                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 247                 sigctx->sc_pc = (long) asm_handle_nat_exception;
 248                 return;
 249                 }
 250         else {
 251                 faultaddr += (long) ((instr << 16) >> 16);
 252                 fprintf(stderr, "faulting address: 0x%16lx\n", faultaddr);
 253                 panic("Stack overflow");
 254                 }
 255 }
 256
 257
 258 #ifdef __osf__
 259
 260 void init_exceptions(void)
 261 {
 262
 263 #else /* Linux */
 264
 265 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 266         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 267         Digital Unix this is done automatically.
 268 */
 269
 270 #include <asm/fpu.h>
 271
 272 extern unsigned long ieee_get_fp_control();
 273 extern void ieee_set_fp_control(unsigned long fp_control);
 274
 275 void init_exceptions(void)
 276 {
 277 /* initialize floating point control */
 278
 279 ieee_set_fp_control(ieee_get_fp_control()
 280                     & ~IEEE_TRAP_ENABLE_INV
 281                     & ~IEEE_TRAP_ENABLE_DZE
 282 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 283                     & ~IEEE_TRAP_ENABLE_OVF);
 284 #endif
 285
 286         /* install signal handlers we need to convert to exceptions */
 287
 288         if (!checknull) {
 289
 290 #if defined(SIGSEGV)
 291                 signal(SIGSEGV, (void*) catch_NullPointerException);
 292 #endif
 293
 294 #if defined(SIGBUS)
 295                 signal(SIGBUS, (void*) catch_NullPointerException);
 296 #endif
 297                 }
 298 }
 299
 300
 301 /* function gen_mcode **********************************************************
 302
 303         generates machine code
 304
 305 *******************************************************************************/
 306
 307 #define         MethodPointer   -8
 308 #define         FrameSize       -12
 309 #define     IsSync          -16
 310 #define     IsLeaf          -20
 311 #define     IntSave         -24
 312 #define     FltSave         -28
 313 #define     ExTableSize     -32
 314 #define     ExTableStart    -32
 315
 316 #define     ExEntrySize     -32
 317 #define     ExStartPC       -8
 318 #define     ExEndPC         -16
 319 #define     ExHandlerPC     -24
 320 #define     ExCatchType     -32
 321
 322 static void gen_mcode()
 323 {
 324         int  len, s1, s2, s3, d, bbs;
 325         s4   a;
 326         s4          *mcodeptr;
 327         stackptr    src;
 328         varinfo     *var;
 329         basicblock  *bptr;
 330         instruction *iptr;
 331         xtable *ex;
 332
 333         {
 334         int p, pa, t, l, r;
 335
 336         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 337
 338         /* space to save used callee saved registers */
 339
 340         savedregs_num += (savintregcnt - maxsavintreguse);
 341         savedregs_num += (savfltregcnt - maxsavfltreguse);
 342
 343         parentargs_base = maxmemuse + savedregs_num;
 344
 345 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 346
 347         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 348                 parentargs_base++;
 349
 350 #endif
 351
 352         /* create method header */
 353
 354         (void) dseg_addaddress(method);                         /* MethodPointer  */
 355         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 356
 357 #ifdef USE_THREADS
 358
 359         /* IsSync contains the offset relative to the stack pointer for the
 360            argument of monitor_exit used in the exception handler. Since the
 361            offset could be zero and give a wrong meaning of the flag it is
 362            offset by one.
 363         */
 364
 365         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 366                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 367         else
 368
 369 #endif
 370
 371         (void) dseg_adds4(0);                                   /* IsSync         */
 372
 373         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 374         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 375         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 376         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 377
 378         /* create exception table */
 379
 380         for (ex = extable; ex != NULL; ex = ex->down) {
 381
 382 #ifdef LOOP_DEBUG
 383                 if (ex->start != NULL)
 384                         printf("adding start - %d - ", ex->start->debug_nr);
 385                 else {
 386                         printf("PANIC - start is NULL");
 387                         exit(-1);
 388                 }
 389 #endif
 390
 391                 dseg_addtarget(ex->start);
 392
 393 #ifdef LOOP_DEBUG
 394                 if (ex->end != NULL)
 395                         printf("adding end - %d - ", ex->end->debug_nr);
 396                 else {
 397                         printf("PANIC - end is NULL");
 398                         exit(-1);
 399                 }
 400 #endif
 401
 402                 dseg_addtarget(ex->end);
 403
 404 #ifdef LOOP_DEBUG
 405                 if (ex->handler != NULL)
 406                         printf("adding handler - %d\n", ex->handler->debug_nr);
 407                 else {
 408                         printf("PANIC - handler is NULL");
 409                         exit(-1);
 410                 }
 411 #endif
 412
 413                 dseg_addtarget(ex->handler);
 414
 415                 (void) dseg_addaddress(ex->catchtype);
 416                 }
 417
 418         /* initialize mcode variables */
 419
 420         mcodeptr = (s4*) mcodebase;
 421         mcodeend = (s4*) (mcodebase + mcodesize);
 422         MCODECHECK(128 + mparamcount);
 423
 424         /* create stack frame (if necessary) */
 425
 426         if (parentargs_base)
 427                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 428
 429         /* save return address and used callee saved registers */
 430
 431         p = parentargs_base;
 432         if (!isleafmethod)
 433                 {p--;  M_AST (REG_RA, REG_SP, 8*p);}
 434         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 435                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 436         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 437                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 438
 439         /* save monitorenter argument */
 440
 441 #ifdef USE_THREADS
 442         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 443                 if (method->flags & ACC_STATIC) {
 444                         p = dseg_addaddress (class);
 445                         M_ALD(REG_ITMP1, REG_PV, p);
 446                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 447                         }
 448                 else {
 449                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 450                         }
 451                 }
 452 #endif
 453
 454         /* copy argument registers to stack and call trace function with pointer
 455            to arguments on stack. ToDo: save floating point registers !!!!!!!!!
 456         */
 457
 458         if (runverbose && isleafmethod) {
 459                 M_LDA (REG_SP, REG_SP, -(14*8));
 460                 M_AST(REG_RA, REG_SP, 1*8);
 461
 462                 M_LST(argintregs[0], REG_SP,  2*8);
 463                 M_LST(argintregs[1], REG_SP,  3*8);
 464                 M_LST(argintregs[2], REG_SP,  4*8);
 465                 M_LST(argintregs[3], REG_SP,  5*8);
 466                 M_LST(argintregs[4], REG_SP,  6*8);
 467                 M_LST(argintregs[5], REG_SP,  7*8);
 468
 469                 M_DST(argfltregs[0], REG_SP,  8*8);
 470                 M_DST(argfltregs[1], REG_SP,  9*8);
 471                 M_DST(argfltregs[2], REG_SP, 10*8);
 472                 M_DST(argfltregs[3], REG_SP, 11*8);
 473                 M_DST(argfltregs[4], REG_SP, 12*8);
 474                 M_DST(argfltregs[5], REG_SP, 13*8);
 475
 476                 p = dseg_addaddress (method);
 477                 M_ALD(REG_ITMP1, REG_PV, p);
 478                 M_AST(REG_ITMP1, REG_SP, 0);
 479                 p = dseg_addaddress ((void*) (builtin_trace_args));
 480                 M_ALD(REG_PV, REG_PV, p);
 481                 M_JSR(REG_RA, REG_PV);
 482                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 483                 M_ALD(REG_RA, REG_SP, 1*8);
 484
 485                 M_LLD(argintregs[0], REG_SP,  2*8);
 486                 M_LLD(argintregs[1], REG_SP,  3*8);
 487                 M_LLD(argintregs[2], REG_SP,  4*8);
 488                 M_LLD(argintregs[3], REG_SP,  5*8);
 489                 M_LLD(argintregs[4], REG_SP,  6*8);
 490                 M_LLD(argintregs[5], REG_SP,  7*8);
 491
 492                 M_DLD(argfltregs[0], REG_SP,  8*8);
 493                 M_DLD(argfltregs[1], REG_SP,  9*8);
 494                 M_DLD(argfltregs[2], REG_SP, 10*8);
 495                 M_DLD(argfltregs[3], REG_SP, 11*8);
 496                 M_DLD(argfltregs[4], REG_SP, 12*8);
 497                 M_DLD(argfltregs[5], REG_SP, 13*8);
 498
 499                 M_LDA (REG_SP, REG_SP, 14*8);
 500                 }
 501
 502         /* take arguments out of register or stack frame */
 503
 504         for (p = 0, l = 0; p < mparamcount; p++) {
 505                 t = mparamtypes[p];
 506                 var = &(locals[l][t]);
 507                 l++;
 508                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 509                         l++;
 510                 if (var->type < 0)
 511                         continue;
 512                 r = var->regoff;
 513                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 514                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 515                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 516                                         {M_INTMOVE (argintregs[p], r);}
 517                                 else                                 /* reg arg -> spilled    */
 518                                         M_LST (argintregs[p], REG_SP, 8 * r);
 519                                 }
 520                         else {                                   /* stack arguments       */
 521                                 pa = p - INT_ARG_CNT;
 522                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 523                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 524                                 else {                               /* stack arg -> spilled  */
 525                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 526                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 527                                         }
 528                                 }
 529                         }
 530                 else {                                       /* floating args         */
 531                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 532                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 533                                         {M_FLTMOVE (argfltregs[p], r);}
 534                                 else                                             /* reg arg -> spilled    */
 535                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 536                                 }
 537                         else {                                   /* stack arguments       */
 538                                 pa = p - FLT_ARG_CNT;
 539                                 if (!(var->flags & INMEMORY))        /* stack-arg -> register */
 540                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 541                                 else {                               /* stack-arg -> spilled  */
 542                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 543                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 544                                         }
 545                                 }
 546                         }
 547                 }  /* end for */
 548
 549         /* call trace function */
 550
 551         if (runverbose && !isleafmethod) {
 552                 M_LDA (REG_SP, REG_SP, -8);
 553                 p = dseg_addaddress (method);
 554                 M_ALD(REG_ITMP1, REG_PV, p);
 555                 M_AST(REG_ITMP1, REG_SP, 0);
 556                 p = dseg_addaddress ((void*) (builtin_trace_args));
 557                 M_ALD(REG_PV, REG_PV, p);
 558                 M_JSR(REG_RA, REG_PV);
 559                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 560                 M_LDA(REG_SP, REG_SP, 8);
 561                 }
 562
 563         /* call monitorenter function */
 564
 565 #ifdef USE_THREADS
 566         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 567                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 568                 M_ALD(REG_PV, REG_PV, p);
 569                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 570                 M_JSR(REG_RA, REG_PV);
 571                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 572                 }
 573 #endif
 574         }
 575
 576         /* end of header generation */
 577
 578         /* walk through all basic blocks */
 579         for (/* bbs = block_count, */ bptr = block; /* --bbs >= 0 */ bptr != NULL; bptr = bptr->next) {
 580
 581                 bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
 582
 583                 if (bptr->flags >= BBREACHED) {
 584
 585                 /* branch resolving */
 586
 587                 {
 588                 branchref *brefs;
 589                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 590                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 591                                           brefs->branchpos, bptr->mpc);
 592                         }
 593                 }
 594
 595                 /* copy interface registers to their destination */
 596
 597                 src = bptr->instack;
 598                 len = bptr->indepth;
 599                 MCODECHECK(64+len);
 600                 while (src != NULL) {
 601                         len--;
 602                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 603                                 d = reg_of_var(src, REG_ITMP1);
 604                                 M_INTMOVE(REG_ITMP1, d);
 605                                 store_reg_to_var_int(src, d);
 606                                 }
 607                         else {
 608                                 d = reg_of_var(src, REG_IFTMP);
 609                                 if ((src->varkind != STACKVAR)) {
 610                                         s2 = src->type;
 611                                         if (IS_FLT_DBL_TYPE(s2)) {
 612                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 613                                                         s1 = interfaces[len][s2].regoff;
 614                                                         M_FLTMOVE(s1,d);
 615                                                         }
 616                                                 else {
 617                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 618                                                         }
 619                                                 store_reg_to_var_flt(src, d);
 620                                                 }
 621                                         else {
 622                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 623                                                         s1 = interfaces[len][s2].regoff;
 624                                                         M_INTMOVE(s1,d);
 625                                                         }
 626                                                 else {
 627                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 628                                                         }
 629                                                 store_reg_to_var_int(src, d);
 630                                                 }
 631                                         }
 632                                 }
 633                         src = src->prev;
 634                         }
 635
 636                 /* walk through all instructions */
 637
 638                 src = bptr->instack;
 639                 len = bptr->icount;
 640                 for (iptr = bptr->iinstr;
 641                     len > 0;
 642                     src = iptr->dst, len--, iptr++) {
 643
 644         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 645         switch (iptr->opc) {
 646
 647                 case ICMD_NOP:        /* ...  ==> ...                                 */
 648                         break;
 649
 650                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 651
 652                         var_to_reg_int(s1, src, REG_ITMP1);
 653                         M_BEQZ(s1, 0);
 654                         mcode_addxnullrefs(mcodeptr);
 655                         break;
 656
 657                 /* constant operations ************************************************/
 658
 659 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 660                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 661
 662 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 663                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 664
 665                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 666                                       /* op1 = 0, val.i = constant                    */
 667
 668                         d = reg_of_var(iptr->dst, REG_ITMP1);
 669                         ICONST(d, iptr->val.i);
 670                         store_reg_to_var_int(iptr->dst, d);
 671                         break;
 672
 673                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 674                                       /* op1 = 0, val.l = constant                    */
 675
 676                         d = reg_of_var(iptr->dst, REG_ITMP1);
 677                         LCONST(d, iptr->val.l);
 678                         store_reg_to_var_int(iptr->dst, d);
 679                         break;
 680
 681                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 682                                       /* op1 = 0, val.f = constant                    */
 683
 684                         d = reg_of_var (iptr->dst, REG_FTMP1);
 685                         a = dseg_addfloat (iptr->val.f);
 686                         M_FLD(d, REG_PV, a);
 687                         store_reg_to_var_flt (iptr->dst, d);
 688                         break;
 689
 690                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 691                                       /* op1 = 0, val.d = constant                    */
 692
 693                         d = reg_of_var (iptr->dst, REG_FTMP1);
 694                         a = dseg_adddouble (iptr->val.d);
 695                         M_DLD(d, REG_PV, a);
 696                         store_reg_to_var_flt (iptr->dst, d);
 697                         break;
 698
 699                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 700                                       /* op1 = 0, val.a = constant                    */
 701
 702                         d = reg_of_var(iptr->dst, REG_ITMP1);
 703                         if (iptr->val.a) {
 704                                 a = dseg_addaddress (iptr->val.a);
 705                                 M_ALD(d, REG_PV, a);
 706                                 }
 707                         else {
 708                                 M_INTMOVE(REG_ZERO, d);
 709                                 }
 710                         store_reg_to_var_int(iptr->dst, d);
 711                         break;
 712
 713
 714                 /* load/store operations **********************************************/
 715
 716                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 717                 case ICMD_LLOAD:      /* op1 = local variable                         */
 718                 case ICMD_ALOAD:
 719
 720                         d = reg_of_var(iptr->dst, REG_ITMP1);
 721                         if ((iptr->dst->varkind == LOCALVAR) &&
 722                             (iptr->dst->varnum == iptr->op1))
 723                                 break;
 724                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 725                         if (var->flags & INMEMORY)
 726                                 M_LLD(d, REG_SP, 8 * var->regoff);
 727                         else
 728                                 {M_INTMOVE(var->regoff,d);}
 729                         store_reg_to_var_int(iptr->dst, d);
 730                         break;
 731
 732                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 733                 case ICMD_DLOAD:      /* op1 = local variable                         */
 734
 735                         d = reg_of_var(iptr->dst, REG_FTMP1);
 736                         if ((iptr->dst->varkind == LOCALVAR) &&
 737                             (iptr->dst->varnum == iptr->op1))
 738                                 break;
 739                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 740                         if (var->flags & INMEMORY)
 741                                 M_DLD(d, REG_SP, 8 * var->regoff);
 742                         else
 743                                 {M_FLTMOVE(var->regoff,d);}
 744                         store_reg_to_var_flt(iptr->dst, d);
 745                         break;
 746
 747
 748                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 749                 case ICMD_LSTORE:     /* op1 = local variable                         */
 750                 case ICMD_ASTORE:
 751
 752                         if ((src->varkind == LOCALVAR) &&
 753                             (src->varnum == iptr->op1))
 754                                 break;
 755                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 756                         if (var->flags & INMEMORY) {
 757                                 var_to_reg_int(s1, src, REG_ITMP1);
 758                                 M_LST(s1, REG_SP, 8 * var->regoff);
 759                                 }
 760                         else {
 761                                 var_to_reg_int(s1, src, var->regoff);
 762                                 M_INTMOVE(s1, var->regoff);
 763                                 }
 764                         break;
 765
 766                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 767                 case ICMD_DSTORE:     /* op1 = local variable                         */
 768
 769                         if ((src->varkind == LOCALVAR) &&
 770                             (src->varnum == iptr->op1))
 771                                 break;
 772                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 773                         if (var->flags & INMEMORY) {
 774                                 var_to_reg_flt(s1, src, REG_FTMP1);
 775                                 M_DST(s1, REG_SP, 8 * var->regoff);
 776                                 }
 777                         else {
 778                                 var_to_reg_flt(s1, src, var->regoff);
 779                                 M_FLTMOVE(s1, var->regoff);
 780                                 }
 781                         break;
 782
 783
 784                 /* pop/dup/swap operations ********************************************/
 785
 786                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 787
 788                 case ICMD_POP:        /* ..., value  ==> ...                          */
 789                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 790                         break;
 791
 792 #define M_COPY(from,to) \
 793                         d = reg_of_var(to, REG_IFTMP); \
 794                         if ((from->regoff != to->regoff) || \
 795                             ((from->flags ^ to->flags) & INMEMORY)) { \
 796                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 797                                         var_to_reg_flt(s1, from, d); \
 798                                         M_FLTMOVE(s1,d); \
 799                                         store_reg_to_var_flt(to, d); \
 800                                         }\
 801                                 else { \
 802                                         var_to_reg_int(s1, from, d); \
 803                                         M_INTMOVE(s1,d); \
 804                                         store_reg_to_var_int(to, d); \
 805                                         }\
 806                                 }
 807
 808                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 809                         M_COPY(src, iptr->dst);
 810                         break;
 811
 812                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 813
 814                         M_COPY(src,       iptr->dst->prev->prev);
 815
 816                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 817
 818                         M_COPY(src,       iptr->dst);
 819                         M_COPY(src->prev, iptr->dst->prev);
 820                         break;
 821
 822                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 823
 824                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 825
 826                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 827
 828                         M_COPY(src,             iptr->dst);
 829                         M_COPY(src->prev,       iptr->dst->prev);
 830                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 831                         M_COPY(src, iptr->dst->prev->prev->prev);
 832                         break;
 833
 834                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 835
 836                         M_COPY(src,                   iptr->dst);
 837                         M_COPY(src->prev,             iptr->dst->prev);
 838                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 839                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 840                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 841                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 842                         break;
 843
 844                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 845
 846                         M_COPY(src, iptr->dst->prev);
 847                         M_COPY(src->prev, iptr->dst);
 848                         break;
 849
 850
 851                 /* integer operations *************************************************/
 852
 853                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 854
 855                         var_to_reg_int(s1, src, REG_ITMP1);
 856                         d = reg_of_var(iptr->dst, REG_ITMP3);
 857                         M_ISUB(REG_ZERO, s1, d);
 858                         store_reg_to_var_int(iptr->dst, d);
 859                         break;
 860
 861                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 862
 863                         var_to_reg_int(s1, src, REG_ITMP1);
 864                         d = reg_of_var(iptr->dst, REG_ITMP3);
 865                         M_LSUB(REG_ZERO, s1, d);
 866                         store_reg_to_var_int(iptr->dst, d);
 867                         break;
 868
 869                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 870
 871                         var_to_reg_int(s1, src, REG_ITMP1);
 872                         d = reg_of_var(iptr->dst, REG_ITMP3);
 873                         M_INTMOVE(s1, d);
 874                         store_reg_to_var_int(iptr->dst, d);
 875                         break;
 876
 877                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 878
 879                         var_to_reg_int(s1, src, REG_ITMP1);
 880                         d = reg_of_var(iptr->dst, REG_ITMP3);
 881                         M_IADD(s1, REG_ZERO, d );
 882                         store_reg_to_var_int(iptr->dst, d);
 883                         break;
 884
 885                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 886
 887                         var_to_reg_int(s1, src, REG_ITMP1);
 888                         d = reg_of_var(iptr->dst, REG_ITMP3);
 889                         if (has_ext_instr_set) {
 890                                 M_BSEXT(s1, d);
 891                                 }
 892                         else {
 893                                 M_SLL_IMM(s1, 56, d);
 894                                 M_SRA_IMM( d, 56, d);
 895                                 }
 896                         store_reg_to_var_int(iptr->dst, d);
 897                         break;
 898
 899                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 900
 901                         var_to_reg_int(s1, src, REG_ITMP1);
 902                         d = reg_of_var(iptr->dst, REG_ITMP3);
 903             M_CZEXT(s1, d);
 904                         store_reg_to_var_int(iptr->dst, d);
 905                         break;
 906
 907                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 908
 909                         var_to_reg_int(s1, src, REG_ITMP1);
 910                         d = reg_of_var(iptr->dst, REG_ITMP3);
 911                         if (has_ext_instr_set) {
 912                                 M_SSEXT(s1, d);
 913                                 }
 914                         else {
 915                                 M_SLL_IMM(s1, 48, d);
 916                                 M_SRA_IMM( d, 48, d);
 917                                 }
 918                         store_reg_to_var_int(iptr->dst, d);
 919                         break;
 920
 921
 922                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 923
 924                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 925                         var_to_reg_int(s2, src, REG_ITMP2);
 926                         d = reg_of_var(iptr->dst, REG_ITMP3);
 927                         M_IADD(s1, s2, d);
 928                         store_reg_to_var_int(iptr->dst, d);
 929                         break;
 930
 931                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 932                                       /* val.i = constant                             */
 933
 934                         var_to_reg_int(s1, src, REG_ITMP1);
 935                         d = reg_of_var(iptr->dst, REG_ITMP3);
 936                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 937                                 M_IADD_IMM(s1, iptr->val.i, d);
 938                                 }
 939                         else {
 940                                 ICONST(REG_ITMP2, iptr->val.i);
 941                                 M_IADD(s1, REG_ITMP2, d);
 942                                 }
 943                         store_reg_to_var_int(iptr->dst, d);
 944                         break;
 945
 946                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 947
 948                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 949                         var_to_reg_int(s2, src, REG_ITMP2);
 950                         d = reg_of_var(iptr->dst, REG_ITMP3);
 951                         M_LADD(s1, s2, d);
 952                         store_reg_to_var_int(iptr->dst, d);
 953                         break;
 954
 955                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 956                                       /* val.l = constant                             */
 957
 958                         var_to_reg_int(s1, src, REG_ITMP1);
 959                         d = reg_of_var(iptr->dst, REG_ITMP3);
 960                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 961                                 M_LADD_IMM(s1, iptr->val.l, d);
 962                                 }
 963                         else {
 964                                 LCONST(REG_ITMP2, iptr->val.l);
 965                                 M_LADD(s1, REG_ITMP2, d);
 966                                 }
 967                         store_reg_to_var_int(iptr->dst, d);
 968                         break;
 969
 970                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 971
 972                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 973                         var_to_reg_int(s2, src, REG_ITMP2);
 974                         d = reg_of_var(iptr->dst, REG_ITMP3);
 975                         M_ISUB(s1, s2, d);
 976                         store_reg_to_var_int(iptr->dst, d);
 977                         break;
 978
 979                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 980                                       /* val.i = constant                             */
 981
 982                         var_to_reg_int(s1, src, REG_ITMP1);
 983                         d = reg_of_var(iptr->dst, REG_ITMP3);
 984                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 985                                 M_ISUB_IMM(s1, iptr->val.i, d);
 986                                 }
 987                         else {
 988                                 ICONST(REG_ITMP2, iptr->val.i);
 989                                 M_ISUB(s1, REG_ITMP2, d);
 990                                 }
 991                         store_reg_to_var_int(iptr->dst, d);
 992                         break;
 993
 994                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 995
 996                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 997                         var_to_reg_int(s2, src, REG_ITMP2);
 998                         d = reg_of_var(iptr->dst, REG_ITMP3);
 999                         M_LSUB(s1, s2, d);
1000                         store_reg_to_var_int(iptr->dst, d);
1001                         break;
1002
1003                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
1004                                       /* val.l = constant                             */
1005
1006                         var_to_reg_int(s1, src, REG_ITMP1);
1007                         d = reg_of_var(iptr->dst, REG_ITMP3);
1008                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1009                                 M_LSUB_IMM(s1, iptr->val.l, d);
1010                                 }
1011                         else {
1012                                 LCONST(REG_ITMP2, iptr->val.l);
1013                                 M_LSUB(s1, REG_ITMP2, d);
1014                                 }
1015                         store_reg_to_var_int(iptr->dst, d);
1016                         break;
1017
1018                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1019
1020                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1021                         var_to_reg_int(s2, src, REG_ITMP2);
1022                         d = reg_of_var(iptr->dst, REG_ITMP3);
1023                         M_IMUL(s1, s2, d);
1024                         store_reg_to_var_int(iptr->dst, d);
1025                         break;
1026
1027                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
1028                                       /* val.i = constant                             */
1029
1030                         var_to_reg_int(s1, src, REG_ITMP1);
1031                         d = reg_of_var(iptr->dst, REG_ITMP3);
1032                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1033                                 M_IMUL_IMM(s1, iptr->val.i, d);
1034                                 }
1035                         else {
1036                                 ICONST(REG_ITMP2, iptr->val.i);
1037                                 M_IMUL(s1, REG_ITMP2, d);
1038                                 }
1039                         store_reg_to_var_int(iptr->dst, d);
1040                         break;
1041
1042                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1043
1044                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1045                         var_to_reg_int(s2, src, REG_ITMP2);
1046                         d = reg_of_var(iptr->dst, REG_ITMP3);
1047                         M_LMUL (s1, s2, d);
1048                         store_reg_to_var_int(iptr->dst, d);
1049                         break;
1050
1051                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
1052                                       /* val.l = constant                             */
1053
1054                         var_to_reg_int(s1, src, REG_ITMP1);
1055                         d = reg_of_var(iptr->dst, REG_ITMP3);
1056                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1057                                 M_LMUL_IMM(s1, iptr->val.l, d);
1058                                 }
1059                         else {
1060                                 LCONST(REG_ITMP2, iptr->val.l);
1061                                 M_LMUL(s1, REG_ITMP2, d);
1062                                 }
1063                         store_reg_to_var_int(iptr->dst, d);
1064                         break;
1065
1066                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1067                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1068
1069                         var_to_reg_int(s1, src, REG_ITMP1);
1070                         d = reg_of_var(iptr->dst, REG_ITMP3);
1071                         if (iptr->val.i <= 15) {
1072                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
1073                                 M_CMOVGE(s1, s1, REG_ITMP2);
1074                                 }
1075                         else {
1076                                 M_SRA_IMM(s1, 63, REG_ITMP2);
1077                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1078                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
1079                                 }
1080                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
1081                         store_reg_to_var_int(iptr->dst, d);
1082                         break;
1083
1084                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1085
1086                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1087                         var_to_reg_int(s2, src, REG_ITMP2);
1088                         d = reg_of_var(iptr->dst, REG_ITMP3);
1089                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1090                         M_SLL(s1, REG_ITMP3, d);
1091                         M_IADD(d, REG_ZERO, d);
1092                         store_reg_to_var_int(iptr->dst, d);
1093                         break;
1094
1095                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1096                                       /* val.i = constant                             */
1097
1098                         var_to_reg_int(s1, src, REG_ITMP1);
1099                         d = reg_of_var(iptr->dst, REG_ITMP3);
1100                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1101                         M_IADD(d, REG_ZERO, d);
1102                         store_reg_to_var_int(iptr->dst, d);
1103                         break;
1104
1105                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1106
1107                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1108                         var_to_reg_int(s2, src, REG_ITMP2);
1109                         d = reg_of_var(iptr->dst, REG_ITMP3);
1110                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1111                         M_SRA(s1, REG_ITMP3, d);
1112                         store_reg_to_var_int(iptr->dst, d);
1113                         break;
1114
1115                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1116                                       /* val.i = constant                             */
1117
1118                         var_to_reg_int(s1, src, REG_ITMP1);
1119                         d = reg_of_var(iptr->dst, REG_ITMP3);
1120                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1121                         store_reg_to_var_int(iptr->dst, d);
1122                         break;
1123
1124                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1125
1126                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1127                         var_to_reg_int(s2, src, REG_ITMP2);
1128                         d = reg_of_var(iptr->dst, REG_ITMP3);
1129                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1130             M_IZEXT(s1, d);
1131                         M_SRL(d, REG_ITMP2, d);
1132                         M_IADD(d, REG_ZERO, d);
1133                         store_reg_to_var_int(iptr->dst, d);
1134                         break;
1135
1136                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1137                                       /* val.i = constant                             */
1138
1139                         var_to_reg_int(s1, src, REG_ITMP1);
1140                         d = reg_of_var(iptr->dst, REG_ITMP3);
1141             M_IZEXT(s1, d);
1142                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1143                         M_IADD(d, REG_ZERO, d);
1144                         store_reg_to_var_int(iptr->dst, d);
1145                         break;
1146
1147                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1148
1149                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1150                         var_to_reg_int(s2, src, REG_ITMP2);
1151                         d = reg_of_var(iptr->dst, REG_ITMP3);
1152                         M_SLL(s1, s2, d);
1153                         store_reg_to_var_int(iptr->dst, d);
1154                         break;
1155
1156                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1157                                       /* val.l = constant                             */
1158
1159                         var_to_reg_int(s1, src, REG_ITMP1);
1160                         d = reg_of_var(iptr->dst, REG_ITMP3);
1161                         M_SLL_IMM(s1, iptr->val.l & 0x3f, d);
1162                         store_reg_to_var_int(iptr->dst, d);
1163                         break;
1164
1165                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1166
1167                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1168                         var_to_reg_int(s2, src, REG_ITMP2);
1169                         d = reg_of_var(iptr->dst, REG_ITMP3);
1170                         M_SRA(s1, s2, d);
1171                         store_reg_to_var_int(iptr->dst, d);
1172                         break;
1173
1174                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1175                                       /* val.l = constant                             */
1176
1177                         var_to_reg_int(s1, src, REG_ITMP1);
1178                         d = reg_of_var(iptr->dst, REG_ITMP3);
1179                         M_SRA_IMM(s1, iptr->val.l & 0x3f, d);
1180                         store_reg_to_var_int(iptr->dst, d);
1181                         break;
1182
1183                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1184
1185                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1186                         var_to_reg_int(s2, src, REG_ITMP2);
1187                         d = reg_of_var(iptr->dst, REG_ITMP3);
1188                         M_SRL(s1, s2, d);
1189                         store_reg_to_var_int(iptr->dst, d);
1190                         break;
1191
1192                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1193                                       /* val.l = constant                             */
1194
1195                         var_to_reg_int(s1, src, REG_ITMP1);
1196                         d = reg_of_var(iptr->dst, REG_ITMP3);
1197                         M_SRL_IMM(s1, iptr->val.l & 0x3f, d);
1198                         store_reg_to_var_int(iptr->dst, d);
1199                         break;
1200
1201                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1202                 case ICMD_LAND:
1203
1204                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1205                         var_to_reg_int(s2, src, REG_ITMP2);
1206                         d = reg_of_var(iptr->dst, REG_ITMP3);
1207                         M_AND(s1, s2, d);
1208                         store_reg_to_var_int(iptr->dst, d);
1209                         break;
1210
1211                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1212                                       /* val.i = constant                             */
1213
1214                         var_to_reg_int(s1, src, REG_ITMP1);
1215                         d = reg_of_var(iptr->dst, REG_ITMP3);
1216                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1217                                 M_AND_IMM(s1, iptr->val.i, d);
1218                                 }
1219                         else if (iptr->val.i == 0xffff) {
1220                                 M_CZEXT(s1, d);
1221                                 }
1222                         else if (iptr->val.i == 0xffffff) {
1223                                 M_ZAPNOT_IMM(s1, 0x07, d);
1224                                 }
1225                         else {
1226                                 ICONST(REG_ITMP2, iptr->val.i);
1227                                 M_AND(s1, REG_ITMP2, d);
1228                                 }
1229                         store_reg_to_var_int(iptr->dst, d);
1230                         break;
1231
1232                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1233                                       /* val.i = constant                             */
1234
1235                         var_to_reg_int(s1, src, REG_ITMP1);
1236                         d = reg_of_var(iptr->dst, REG_ITMP3);
1237                         if (s1 == d) {
1238                                 M_MOV(s1, REG_ITMP1);
1239                                 s1 = REG_ITMP1;
1240                                 }
1241                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1242                                 M_AND_IMM(s1, iptr->val.i, d);
1243                                 M_BGEZ(s1, 3);
1244                                 M_ISUB(REG_ZERO, s1, d);
1245                                 M_AND_IMM(d, iptr->val.i, d);
1246                                 }
1247                         else if (iptr->val.i == 0xffff) {
1248                                 M_CZEXT(s1, d);
1249                                 M_BGEZ(s1, 3);
1250                                 M_ISUB(REG_ZERO, s1, d);
1251                                 M_CZEXT(d, d);
1252                                 }
1253                         else if (iptr->val.i == 0xffffff) {
1254                                 M_ZAPNOT_IMM(s1, 0x07, d);
1255                                 M_BGEZ(s1, 3);
1256                                 M_ISUB(REG_ZERO, s1, d);
1257                                 M_ZAPNOT_IMM(d, 0x07, d);
1258                                 }
1259                         else {
1260                                 ICONST(REG_ITMP2, iptr->val.i);
1261                                 M_AND(s1, REG_ITMP2, d);
1262                                 M_BGEZ(s1, 3);
1263                                 M_ISUB(REG_ZERO, s1, d);
1264                                 M_AND(d, REG_ITMP2, d);
1265                                 }
1266                         M_ISUB(REG_ZERO, d, d);
1267                         store_reg_to_var_int(iptr->dst, d);
1268                         break;
1269
1270                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1271
1272 /*          b = value & 0xffff;
1273                         a = value >> 16;
1274                         a = ((b - a) & 0xffff) + (b < a);
1275 */
1276                         var_to_reg_int(s1, src, REG_ITMP1);
1277                         d = reg_of_var(iptr->dst, REG_ITMP3);
1278                         if (s1 == d) {
1279                                 M_MOV(s1, REG_ITMP3);
1280                                 s1 = REG_ITMP3;
1281                                 }
1282                         M_BLTZ(s1, 7);
1283             M_CZEXT(s1, REG_ITMP2);
1284                         M_SRA_IMM(s1, 16, d);
1285                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1286                         M_ISUB(REG_ITMP2, d, d);
1287             M_CZEXT(d, d);
1288                         M_IADD(d, REG_ITMP1, d);
1289                         M_BR(11 + (s1 == REG_ITMP1));
1290                         M_ISUB(REG_ZERO, s1, REG_ITMP1);
1291             M_CZEXT(REG_ITMP1, REG_ITMP2);
1292                         M_SRA_IMM(REG_ITMP1, 16, d);
1293                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1294                         M_ISUB(REG_ITMP2, d, d);
1295             M_CZEXT(d, d);
1296                         M_IADD(d, REG_ITMP1, d);
1297                         M_ISUB(REG_ZERO, d, d);
1298                         if (s1 == REG_ITMP1) {
1299                                 var_to_reg_int(s1, src, REG_ITMP1);
1300                                 }
1301                         M_SLL_IMM(s1, 33, REG_ITMP2);
1302                         M_CMPEQ(REG_ITMP2, REG_ZERO, REG_ITMP2);
1303                         M_ISUB(d, REG_ITMP2, d);
1304                         store_reg_to_var_int(iptr->dst, d);
1305                         break;
1306
1307                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1308                                       /* val.l = constant                             */
1309
1310                         var_to_reg_int(s1, src, REG_ITMP1);
1311                         d = reg_of_var(iptr->dst, REG_ITMP3);
1312                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1313                                 M_AND_IMM(s1, iptr->val.l, d);
1314                                 }
1315                         else if (iptr->val.l == 0xffffL) {
1316                                 M_CZEXT(s1, d);
1317                                 }
1318                         else if (iptr->val.l == 0xffffffL) {
1319                                 M_ZAPNOT_IMM(s1, 0x07, d);
1320                                 }
1321                         else if (iptr->val.l == 0xffffffffL) {
1322                                 M_IZEXT(s1, d);
1323                                 }
1324                         else if (iptr->val.l == 0xffffffffffL) {
1325                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1326                                 }
1327                         else if (iptr->val.l == 0xffffffffffffL) {
1328                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1329                                 }
1330                         else if (iptr->val.l == 0xffffffffffffffL) {
1331                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1332                                 }
1333                         else {
1334                                 LCONST(REG_ITMP2, iptr->val.l);
1335                                 M_AND(s1, REG_ITMP2, d);
1336                                 }
1337                         store_reg_to_var_int(iptr->dst, d);
1338                         break;
1339
1340                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1341                                       /* val.l = constant                             */
1342
1343                         var_to_reg_int(s1, src, REG_ITMP1);
1344                         d = reg_of_var(iptr->dst, REG_ITMP3);
1345                         if (s1 == d) {
1346                                 M_MOV(s1, REG_ITMP1);
1347                                 s1 = REG_ITMP1;
1348                                 }
1349                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1350                                 M_AND_IMM(s1, iptr->val.l, d);
1351                                 M_BGEZ(s1, 3);
1352                                 M_LSUB(REG_ZERO, s1, d);
1353                                 M_AND_IMM(d, iptr->val.l, d);
1354                                 }
1355                         else if (iptr->val.l == 0xffffL) {
1356                                 M_CZEXT(s1, d);
1357                                 M_BGEZ(s1, 3);
1358                                 M_LSUB(REG_ZERO, s1, d);
1359                                 M_CZEXT(d, d);
1360                                 }
1361                         else if (iptr->val.l == 0xffffffL) {
1362                                 M_ZAPNOT_IMM(s1, 0x07, d);
1363                                 M_BGEZ(s1, 3);
1364                                 M_LSUB(REG_ZERO, s1, d);
1365                                 M_ZAPNOT_IMM(d, 0x07, d);
1366                                 }
1367                         else if (iptr->val.l == 0xffffffffL) {
1368                                 M_IZEXT(s1, d);
1369                                 M_BGEZ(s1, 3);
1370                                 M_LSUB(REG_ZERO, s1, d);
1371                                 M_IZEXT(d, d);
1372                                 }
1373                         else if (iptr->val.l == 0xffffffffffL) {
1374                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1375                                 M_BGEZ(s1, 3);
1376                                 M_LSUB(REG_ZERO, s1, d);
1377                                 M_ZAPNOT_IMM(d, 0x1f, d);
1378                                 }
1379                         else if (iptr->val.l == 0xffffffffffffL) {
1380                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1381                                 M_BGEZ(s1, 3);
1382                                 M_LSUB(REG_ZERO, s1, d);
1383                                 M_ZAPNOT_IMM(d, 0x3f, d);
1384                                 }
1385                         else if (iptr->val.l == 0xffffffffffffffL) {
1386                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1387                                 M_BGEZ(s1, 3);
1388                                 M_LSUB(REG_ZERO, s1, d);
1389                                 M_ZAPNOT_IMM(d, 0x7f, d);
1390                                 }
1391                         else {
1392                                 LCONST(REG_ITMP2, iptr->val.l);
1393                                 M_AND(s1, REG_ITMP2, d);
1394                                 M_BGEZ(s1, 3);
1395                                 M_LSUB(REG_ZERO, s1, d);
1396                                 M_AND(d, REG_ITMP2, d);
1397                                 }
1398                         M_LSUB(REG_ZERO, d, d);
1399                         store_reg_to_var_int(iptr->dst, d);
1400                         break;
1401
1402                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1403
1404                         var_to_reg_int(s1, src, REG_ITMP1);
1405                         d = reg_of_var(iptr->dst, REG_ITMP3);
1406                         if (s1 == d) {
1407                                 M_MOV(s1, REG_ITMP3);
1408                                 s1 = REG_ITMP3;
1409                                 }
1410                         M_CZEXT(s1, REG_ITMP2);
1411                         M_SRA_IMM(s1, 16, d);
1412                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1413                         M_LSUB(REG_ITMP2, d, d);
1414             M_CZEXT(d, d);
1415                         M_LADD(d, REG_ITMP1, d);
1416                         M_LDA(REG_ITMP2, REG_ZERO, -1);
1417                         M_SRL_IMM(REG_ITMP2, 33, REG_ITMP2);
1418                         if (s1 == REG_ITMP1) {
1419                                 var_to_reg_int(s1, src, REG_ITMP1);
1420                                 }
1421                         M_CMPULT(s1, REG_ITMP2, REG_ITMP2);
1422                         M_BNEZ(REG_ITMP2, 11);
1423                         M_LDA(d, REG_ZERO, -257);
1424                         M_ZAPNOT_IMM(d, 0xcd, d);
1425                         M_LSUB(REG_ZERO, s1, REG_ITMP2);
1426                         M_CMOVGE(s1, s1, REG_ITMP2);
1427                         M_UMULH(REG_ITMP2, d, REG_ITMP2);
1428                         M_SRL_IMM(REG_ITMP2, 16, REG_ITMP2);
1429                         M_LSUB(REG_ZERO, REG_ITMP2, d);
1430                         M_CMOVGE(s1, REG_ITMP2, d);
1431                         M_SLL_IMM(d, 16, REG_ITMP2);
1432                         M_LADD(d, REG_ITMP2, d);
1433                         M_LSUB(s1, d, d);
1434                         store_reg_to_var_int(iptr->dst, d);
1435                         break;
1436
1437                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1438                 case ICMD_LOR:
1439
1440                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1441                         var_to_reg_int(s2, src, REG_ITMP2);
1442                         d = reg_of_var(iptr->dst, REG_ITMP3);
1443                         M_OR( s1,s2, d);
1444                         store_reg_to_var_int(iptr->dst, d);
1445                         break;
1446
1447                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1448                                       /* val.i = constant                             */
1449
1450                         var_to_reg_int(s1, src, REG_ITMP1);
1451                         d = reg_of_var(iptr->dst, REG_ITMP3);
1452                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1453                                 M_OR_IMM(s1, iptr->val.i, d);
1454                                 }
1455                         else {
1456                                 ICONST(REG_ITMP2, iptr->val.i);
1457                                 M_OR(s1, REG_ITMP2, d);
1458                                 }
1459                         store_reg_to_var_int(iptr->dst, d);
1460                         break;
1461
1462                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1463                                       /* val.l = constant                             */
1464
1465                         var_to_reg_int(s1, src, REG_ITMP1);
1466                         d = reg_of_var(iptr->dst, REG_ITMP3);
1467                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1468                                 M_OR_IMM(s1, iptr->val.l, d);
1469                                 }
1470                         else {
1471                                 LCONST(REG_ITMP2, iptr->val.l);
1472                                 M_OR(s1, REG_ITMP2, d);
1473                                 }
1474                         store_reg_to_var_int(iptr->dst, d);
1475                         break;
1476
1477                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1478                 case ICMD_LXOR:
1479
1480                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1481                         var_to_reg_int(s2, src, REG_ITMP2);
1482                         d = reg_of_var(iptr->dst, REG_ITMP3);
1483                         M_XOR(s1, s2, d);
1484                         store_reg_to_var_int(iptr->dst, d);
1485                         break;
1486
1487                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1488                                       /* val.i = constant                             */
1489
1490                         var_to_reg_int(s1, src, REG_ITMP1);
1491                         d = reg_of_var(iptr->dst, REG_ITMP3);
1492                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1493                                 M_XOR_IMM(s1, iptr->val.i, d);
1494                                 }
1495                         else {
1496                                 ICONST(REG_ITMP2, iptr->val.i);
1497                                 M_XOR(s1, REG_ITMP2, d);
1498                                 }
1499                         store_reg_to_var_int(iptr->dst, d);
1500                         break;
1501
1502                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1503                                       /* val.l = constant                             */
1504
1505                         var_to_reg_int(s1, src, REG_ITMP1);
1506                         d = reg_of_var(iptr->dst, REG_ITMP3);
1507                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1508                                 M_XOR_IMM(s1, iptr->val.l, d);
1509                                 }
1510                         else {
1511                                 LCONST(REG_ITMP2, iptr->val.l);
1512                                 M_XOR(s1, REG_ITMP2, d);
1513                                 }
1514                         store_reg_to_var_int(iptr->dst, d);
1515                         break;
1516
1517
1518                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1519
1520                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1521                         var_to_reg_int(s2, src, REG_ITMP2);
1522                         d = reg_of_var(iptr->dst, REG_ITMP3);
1523                         M_CMPLT(s1, s2, REG_ITMP3);
1524                         M_CMPLT(s2, s1, REG_ITMP1);
1525                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1526                         store_reg_to_var_int(iptr->dst, d);
1527                         break;
1528
1529
1530                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1531                                       /* op1 = variable, val.i = constant             */
1532
1533                         var = &(locals[iptr->op1][TYPE_INT]);
1534                         if (var->flags & INMEMORY) {
1535                                 s1 = REG_ITMP1;
1536                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1537                                 }
1538                         else
1539                                 s1 = var->regoff;
1540                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1541                                 M_IADD_IMM(s1, iptr->val.i, s1);
1542                                 }
1543                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1544                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1545                                 }
1546                         else {
1547                                 M_LDA (s1, s1, iptr->val.i);
1548                                 M_IADD(s1, REG_ZERO, s1);
1549                                 }
1550                         if (var->flags & INMEMORY)
1551                                 M_LST(s1, REG_SP, 8 * var->regoff);
1552                         break;
1553
1554
1555                 /* floating operations ************************************************/
1556
1557                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1558
1559                         var_to_reg_flt(s1, src, REG_FTMP1);
1560                         d = reg_of_var(iptr->dst, REG_FTMP3);
1561                         M_FMOVN(s1, d);
1562                         store_reg_to_var_flt(iptr->dst, d);
1563                         break;
1564
1565                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1566
1567                         var_to_reg_flt(s1, src, REG_FTMP1);
1568                         d = reg_of_var(iptr->dst, REG_FTMP3);
1569                         M_FMOVN(s1, d);
1570                         store_reg_to_var_flt(iptr->dst, d);
1571                         break;
1572
1573                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1574
1575                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1576                         var_to_reg_flt(s2, src, REG_FTMP2);
1577                         d = reg_of_var(iptr->dst, REG_FTMP3);
1578                         if (checkfloats) {
1579                                 M_FADDS(s1, s2, d);
1580                                 M_TRAPB;
1581                                 }
1582                         else {
1583                                 M_FADD(s1, s2, d);
1584                                 }
1585                         store_reg_to_var_flt(iptr->dst, d);
1586                         break;
1587
1588                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1589
1590                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1591                         var_to_reg_flt(s2, src, REG_FTMP2);
1592                         d = reg_of_var(iptr->dst, REG_FTMP3);
1593                         if (checkfloats) {
1594                                 M_DADDS(s1, s2, d);
1595                                 M_TRAPB;
1596                                 }
1597                         else {
1598                                 M_DADD(s1, s2, d);
1599                                 }
1600                         store_reg_to_var_flt(iptr->dst, d);
1601                         break;
1602
1603                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1604
1605                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1606                         var_to_reg_flt(s2, src, REG_FTMP2);
1607                         d = reg_of_var(iptr->dst, REG_FTMP3);
1608                         if (checkfloats) {
1609                                 M_FSUBS(s1, s2, d);
1610                                 M_TRAPB;
1611                                 }
1612                         else {
1613                                 M_FSUB(s1, s2, d);
1614                                 }
1615                         store_reg_to_var_flt(iptr->dst, d);
1616                         break;
1617
1618                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1619
1620                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1621                         var_to_reg_flt(s2, src, REG_FTMP2);
1622                         d = reg_of_var(iptr->dst, REG_FTMP3);
1623                         if (checkfloats) {
1624                                 M_DSUBS(s1, s2, d);
1625                                 M_TRAPB;
1626                                 }
1627                         else {
1628                                 M_DSUB(s1, s2, d);
1629                                 }
1630                         store_reg_to_var_flt(iptr->dst, d);
1631                         break;
1632
1633                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1634
1635                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1636                         var_to_reg_flt(s2, src, REG_FTMP2);
1637                         d = reg_of_var(iptr->dst, REG_FTMP3);
1638                         if (checkfloats) {
1639                                 M_FMULS(s1, s2, d);
1640                                 M_TRAPB;
1641                                 }
1642                         else {
1643                                 M_FMUL(s1, s2, d);
1644                                 }
1645                         store_reg_to_var_flt(iptr->dst, d);
1646                         break;
1647
1648                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1649
1650                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1651                         var_to_reg_flt(s2, src, REG_FTMP2);
1652                         d = reg_of_var(iptr->dst, REG_FTMP3);
1653                         if (checkfloats) {
1654                                 M_DMULS(s1, s2, d);
1655                                 M_TRAPB;
1656                                 }
1657                         else {
1658                                 M_DMUL(s1, s2, d);
1659                                 }
1660                         store_reg_to_var_flt(iptr->dst, d);
1661                         break;
1662
1663                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1664
1665                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1666                         var_to_reg_flt(s2, src, REG_FTMP2);
1667                         d = reg_of_var(iptr->dst, REG_FTMP3);
1668                         if (checkfloats) {
1669                                 M_FDIVS(s1, s2, d);
1670                                 M_TRAPB;
1671                                 }
1672                         else {
1673                                 M_FDIV(s1, s2, d);
1674                                 }
1675                         store_reg_to_var_flt(iptr->dst, d);
1676                         break;
1677
1678                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1679
1680                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1681                         var_to_reg_flt(s2, src, REG_FTMP2);
1682                         d = reg_of_var(iptr->dst, REG_FTMP3);
1683                         if (checkfloats) {
1684                                 M_DDIVS(s1, s2, d);
1685                                 M_TRAPB;
1686                                 }
1687                         else {
1688                                 M_DDIV(s1, s2, d);
1689                                 }
1690                         store_reg_to_var_flt(iptr->dst, d);
1691                         break;
1692
1693                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1694
1695                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1696                         var_to_reg_flt(s2, src, REG_FTMP2);
1697                         d = reg_of_var(iptr->dst, REG_FTMP3);
1698                         if (checkfloats) {
1699                                 M_FDIVS(s1,s2, REG_FTMP3);
1700                                 M_TRAPB;
1701                                 M_CVTDL_CS(REG_FTMP3, REG_FTMP3); /* round to integer */
1702                                 M_TRAPB;
1703                                 M_CVTLF(REG_FTMP3, REG_FTMP3);
1704                                 M_FMULS(REG_FTMP3, s2, REG_FTMP3);
1705                                 M_TRAPB;
1706                                 M_FSUBS(s1, REG_FTMP3, d);
1707                                 M_TRAPB;
1708                                 }
1709                         else {
1710                                 M_FDIV(s1,s2, REG_FTMP3);
1711                                 M_CVTDL_C(REG_FTMP3, REG_FTMP3); /* round to integer */
1712                                 M_CVTLF(REG_FTMP3, REG_FTMP3);
1713                                 M_FMUL(REG_FTMP3, s2, REG_FTMP3);
1714                                 M_FSUB(s1, REG_FTMP3, d);
1715                                 }
1716                         store_reg_to_var_flt(iptr->dst, d);
1717                     break;
1718
1719                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1720
1721                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1722                         var_to_reg_flt(s2, src, REG_FTMP2);
1723                         d = reg_of_var(iptr->dst, REG_FTMP3);
1724                         if (checkfloats) {
1725                                 M_DDIVS(s1,s2, REG_FTMP3);
1726                                 M_TRAPB;
1727                                 M_CVTDL_CS(REG_FTMP3, REG_FTMP3); /* round to integer */
1728                                 M_TRAPB;
1729                                 M_CVTLD(REG_FTMP3, REG_FTMP3);
1730                                 M_DMULS(REG_FTMP3, s2, REG_FTMP3);
1731                                 M_TRAPB;
1732                                 M_DSUBS(s1, REG_FTMP3, d);
1733                                 M_TRAPB;
1734                                 }
1735                         else {
1736                                 M_DDIV(s1,s2, REG_FTMP3);
1737                                 M_CVTDL_C(REG_FTMP3, REG_FTMP3); /* round to integer */
1738                                 M_CVTLD(REG_FTMP3, REG_FTMP3);
1739                                 M_DMUL(REG_FTMP3, s2, REG_FTMP3);
1740                                 M_DSUB(s1, REG_FTMP3, d);
1741                                 }
1742                         store_reg_to_var_flt(iptr->dst, d);
1743                     break;
1744
1745                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1746                 case ICMD_L2F:
1747                         var_to_reg_int(s1, src, REG_ITMP1);
1748                         d = reg_of_var(iptr->dst, REG_FTMP3);
1749                         a = dseg_adddouble(0.0);
1750                         M_LST (s1, REG_PV, a);
1751                         M_DLD (d, REG_PV, a);
1752                         M_CVTLF(d, d);
1753                         store_reg_to_var_flt(iptr->dst, d);
1754                         break;
1755
1756                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1757                 case ICMD_L2D:
1758                         var_to_reg_int(s1, src, REG_ITMP1);
1759                         d = reg_of_var(iptr->dst, REG_FTMP3);
1760                         a = dseg_adddouble(0.0);
1761                         M_LST (s1, REG_PV, a);
1762                         M_DLD (d, REG_PV, a);
1763                         M_CVTLD(d, d);
1764                         store_reg_to_var_flt(iptr->dst, d);
1765                         break;
1766
1767                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1768                 case ICMD_D2I:
1769                         var_to_reg_flt(s1, src, REG_FTMP1);
1770                         d = reg_of_var(iptr->dst, REG_ITMP3);
1771                         a = dseg_adddouble(0.0);
1772                         if (checkfloats) {
1773                                 M_CVTDL_CS(s1, REG_FTMP1);
1774                                 M_TRAPB;
1775                                 M_CVTLIS(REG_FTMP1, REG_FTMP2);
1776                                 M_TRAPB;
1777                                 }
1778                         else {
1779                                 M_CVTDL_C(s1, REG_FTMP1);
1780                                 M_CVTLI(REG_FTMP1, REG_FTMP2);
1781                                 }
1782                         M_DST (REG_FTMP1, REG_PV, a);
1783                         M_ILD (d, REG_PV, a);
1784                         store_reg_to_var_int(iptr->dst, d);
1785                         break;
1786
1787                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1788                 case ICMD_D2L:
1789                         var_to_reg_flt(s1, src, REG_FTMP1);
1790                         d = reg_of_var(iptr->dst, REG_ITMP3);
1791                         a = dseg_adddouble(0.0);
1792                         if (checkfloats) {
1793                                 M_CVTDL_CS(s1, REG_FTMP1);
1794                                 M_TRAPB;
1795                                 }
1796                         else {
1797                                 M_CVTDL_C(s1, REG_FTMP1);
1798                                 }
1799                         M_DST (REG_FTMP1, REG_PV, a);
1800                         M_LLD (d, REG_PV, a);
1801                         store_reg_to_var_int(iptr->dst, d);
1802                         break;
1803
1804                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1805
1806                         var_to_reg_flt(s1, src, REG_FTMP1);
1807                         d = reg_of_var(iptr->dst, REG_FTMP3);
1808                         M_FLTMOVE(s1, d);
1809                         store_reg_to_var_flt(iptr->dst, d);
1810                         break;
1811
1812                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1813
1814                         var_to_reg_flt(s1, src, REG_FTMP1);
1815                         d = reg_of_var(iptr->dst, REG_FTMP3);
1816                         if (checkfloats) {
1817                                 M_CVTDFS(s1, d);
1818                                 M_TRAPB;
1819                                 }
1820                         else {
1821                                 M_CVTDF(s1, d);
1822                                 }
1823                         store_reg_to_var_flt(iptr->dst, d);
1824                         break;
1825
1826                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1827                 case ICMD_DCMPL:
1828                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1829                         var_to_reg_flt(s2, src, REG_FTMP2);
1830                         d = reg_of_var(iptr->dst, REG_ITMP3);
1831                         if (checkfloats) {
1832                                 M_LSUB_IMM(REG_ZERO, 1, d);
1833                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1834                                 M_TRAPB;
1835                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1836                                 M_CLR   (d);
1837                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1838                                 M_TRAPB;
1839                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1840                                 M_LADD_IMM(REG_ZERO, 1, d);
1841                                 }
1842                         else {
1843                                 M_LSUB_IMM(REG_ZERO, 1, d);
1844                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1845                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1846                                 M_CLR   (d);
1847                                 M_FCMPLT(s2, s1, REG_FTMP3);
1848                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1849                                 M_LADD_IMM(REG_ZERO, 1, d);
1850                                 }
1851                         store_reg_to_var_int(iptr->dst, d);
1852                         break;
1853
1854                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1855                 case ICMD_DCMPG:
1856                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1857                         var_to_reg_flt(s2, src, REG_FTMP2);
1858                         d = reg_of_var(iptr->dst, REG_ITMP3);
1859                         if (checkfloats) {
1860                                 M_LADD_IMM(REG_ZERO, 1, d);
1861                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1862                                 M_TRAPB;
1863                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1864                                 M_CLR   (d);
1865                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1866                                 M_TRAPB;
1867                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1868                                 M_LSUB_IMM(REG_ZERO, 1, d);
1869                                 }
1870                         else {
1871                                 M_LADD_IMM(REG_ZERO, 1, d);
1872                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1873                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1874                                 M_CLR   (d);
1875                                 M_FCMPLT(s1, s2, REG_FTMP3);
1876                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1877                                 M_LSUB_IMM(REG_ZERO, 1, d);
1878                                 }
1879                         store_reg_to_var_int(iptr->dst, d);
1880                         break;
1881
1882
1883                 /* memory operations **************************************************/
1884
1885                         /* #define gen_bound_check \
1886                         if (checkbounds) {\
1887                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1888                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1889                                 M_BEQZ(REG_ITMP3, 0);\
1890                                 mcode_addxboundrefs(mcodeptr);\
1891                                 }
1892                         */
1893
1894 #define gen_bound_check \
1895             if (checkbounds) { \
1896                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1897                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1898                                 M_BEQZ(REG_ITMP3, 0);\
1899                                 mcode_addxboundrefs(mcodeptr); \
1900                 }
1901
1902                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1903
1904                         var_to_reg_int(s1, src, REG_ITMP1);
1905                         d = reg_of_var(iptr->dst, REG_ITMP3);
1906                         gen_nullptr_check(s1);
1907                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1908                         store_reg_to_var_int(iptr->dst, d);
1909                         break;
1910
1911                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1912
1913                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1914                         var_to_reg_int(s2, src, REG_ITMP2);
1915                         d = reg_of_var(iptr->dst, REG_ITMP3);
1916                         if (iptr->op1 == 0) {
1917                                 gen_nullptr_check(s1);
1918                                 gen_bound_check;
1919                                 }
1920                         M_SAADDQ(s2, s1, REG_ITMP1);
1921                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1922                         store_reg_to_var_int(iptr->dst, d);
1923                         break;
1924
1925                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1926
1927                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1928                         var_to_reg_int(s2, src, REG_ITMP2);
1929                         d = reg_of_var(iptr->dst, REG_ITMP3);
1930                         if (iptr->op1 == 0) {
1931                                 gen_nullptr_check(s1);
1932                                 gen_bound_check;
1933                                 }
1934                         M_S8ADDQ(s2, s1, REG_ITMP1);
1935                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1936                         store_reg_to_var_int(iptr->dst, d);
1937                         break;
1938
1939                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1940
1941                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1942                         var_to_reg_int(s2, src, REG_ITMP2);
1943                         d = reg_of_var(iptr->dst, REG_ITMP3);
1944                         if (iptr->op1 == 0) {
1945                                 gen_nullptr_check(s1);
1946                                 gen_bound_check;
1947                                 }
1948
1949                         M_S4ADDQ(s2, s1, REG_ITMP1);
1950                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1951                         store_reg_to_var_int(iptr->dst, d);
1952                         break;
1953
1954                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1955
1956                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1957                         var_to_reg_int(s2, src, REG_ITMP2);
1958                         d = reg_of_var(iptr->dst, REG_FTMP3);
1959                         if (iptr->op1 == 0) {
1960                                 gen_nullptr_check(s1);
1961                                 gen_bound_check;
1962                                 }
1963                         M_S4ADDQ(s2, s1, REG_ITMP1);
1964                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1965                         store_reg_to_var_flt(iptr->dst, d);
1966                         break;
1967
1968                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1969
1970                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1971                         var_to_reg_int(s2, src, REG_ITMP2);
1972                         d = reg_of_var(iptr->dst, REG_FTMP3);
1973                         if (iptr->op1 == 0) {
1974                                 gen_nullptr_check(s1);
1975                                 gen_bound_check;
1976                                 }
1977                         M_S8ADDQ(s2, s1, REG_ITMP1);
1978                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1979                         store_reg_to_var_flt(iptr->dst, d);
1980                         break;
1981
1982                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1983
1984                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1985                         var_to_reg_int(s2, src, REG_ITMP2);
1986                         d = reg_of_var(iptr->dst, REG_ITMP3);
1987                         if (iptr->op1 == 0) {
1988                                 gen_nullptr_check(s1);
1989                                 gen_bound_check;
1990                                 }
1991                         if (has_ext_instr_set) {
1992                                 M_LADD(s2, s1, REG_ITMP1);
1993                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1994                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1995                                 }
1996                         else {
1997                                 M_LADD (s2, s1, REG_ITMP1);
1998                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1999                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2000                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2001                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
2002                                 }
2003                         store_reg_to_var_int(iptr->dst, d);
2004                         break;
2005
2006                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
2007
2008                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2009                         var_to_reg_int(s2, src, REG_ITMP2);
2010                         d = reg_of_var(iptr->dst, REG_ITMP3);
2011                         if (iptr->op1 == 0) {
2012                                 gen_nullptr_check(s1);
2013                                 gen_bound_check;
2014                                 }
2015                         if (has_ext_instr_set) {
2016                                 M_LADD(s2, s1, REG_ITMP1);
2017                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2018                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
2019                                 M_SSEXT(d, d);
2020                                 }
2021                         else {
2022                                 M_LADD(s2, s1, REG_ITMP1);
2023                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2024                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2025                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
2026                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2027                                 M_SRA_IMM(d, 48, d);
2028                                 }
2029                         store_reg_to_var_int(iptr->dst, d);
2030                         break;
2031
2032                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
2033
2034                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2035                         var_to_reg_int(s2, src, REG_ITMP2);
2036                         d = reg_of_var(iptr->dst, REG_ITMP3);
2037                         if (iptr->op1 == 0) {
2038                                 gen_nullptr_check(s1);
2039                                 gen_bound_check;
2040                                 }
2041                         if (has_ext_instr_set) {
2042                                 M_LADD   (s2, s1, REG_ITMP1);
2043                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
2044                                 M_BSEXT  (d, d);
2045                                 }
2046                         else {
2047                                 M_LADD(s2, s1, REG_ITMP1);
2048                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2049                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
2050                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2051                                 M_SRA_IMM(d, 56, d);
2052                                 }
2053                         store_reg_to_var_int(iptr->dst, d);
2054                         break;
2055
2056
2057                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
2058
2059                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2060                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2061                         if (iptr->op1 == 0) {
2062                                 gen_nullptr_check(s1);
2063                                 gen_bound_check;
2064                                 }
2065                         var_to_reg_int(s3, src, REG_ITMP3);
2066                         M_SAADDQ(s2, s1, REG_ITMP1);
2067                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2068                         break;
2069
2070                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
2071
2072                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2073                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2074                         if (iptr->op1 == 0) {
2075                                 gen_nullptr_check(s1);
2076                                 gen_bound_check;
2077                                 }
2078                         var_to_reg_int(s3, src, REG_ITMP3);
2079                         M_S8ADDQ(s2, s1, REG_ITMP1);
2080                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
2081                         break;
2082
2083                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
2084
2085                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2086                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2087                         if (iptr->op1 == 0) {
2088                                 gen_nullptr_check(s1);
2089                                 gen_bound_check;
2090                                 }
2091
2092                         var_to_reg_int(s3, src, REG_ITMP3);
2093                         M_S4ADDQ(s2, s1, REG_ITMP1);
2094                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
2095                         break;
2096
2097                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
2098
2099                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2100                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2101                         if (iptr->op1 == 0) {
2102                                 gen_nullptr_check(s1);
2103                                 gen_bound_check;
2104                                 }
2105                         var_to_reg_flt(s3, src, REG_FTMP3);
2106                         M_S4ADDQ(s2, s1, REG_ITMP1);
2107                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2108                         break;
2109
2110                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
2111
2112                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2113                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2114                         if (iptr->op1 == 0) {
2115                                 gen_nullptr_check(s1);
2116                                 gen_bound_check;
2117                                 }
2118                         var_to_reg_flt(s3, src, REG_FTMP3);
2119                         M_S8ADDQ(s2, s1, REG_ITMP1);
2120                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2121                         break;
2122
2123                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
2124
2125                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2126                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2127                         if (iptr->op1 == 0) {
2128                                 gen_nullptr_check(s1);
2129                                 gen_bound_check;
2130                                 }
2131                         var_to_reg_int(s3, src, REG_ITMP3);
2132                         if (has_ext_instr_set) {
2133                                 M_LADD(s2, s1, REG_ITMP1);
2134                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2135                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
2136                                 }
2137                         else {
2138                                 M_LADD (s2, s1, REG_ITMP1);
2139                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2140                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2141                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2142                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2143                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2144                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2145                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2146                                 }
2147                         break;
2148
2149                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
2150
2151                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2152                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2153                         if (iptr->op1 == 0) {
2154                                 gen_nullptr_check(s1);
2155                                 gen_bound_check;
2156                                 }
2157                         var_to_reg_int(s3, src, REG_ITMP3);
2158                         if (has_ext_instr_set) {
2159                                 M_LADD(s2, s1, REG_ITMP1);
2160                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2161                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2162                                 }
2163                         else {
2164                                 M_LADD (s2, s1, REG_ITMP1);
2165                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2166                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2167                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2168                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2169                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2170                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2171                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2172                                 }
2173                         break;
2174
2175                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2176
2177                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2178                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2179                         if (iptr->op1 == 0) {
2180                                 gen_nullptr_check(s1);
2181                                 gen_bound_check;
2182                                 }
2183                         var_to_reg_int(s3, src, REG_ITMP3);
2184                         if (has_ext_instr_set) {
2185                                 M_LADD(s2, s1, REG_ITMP1);
2186                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2187                                 }
2188                         else {
2189                                 M_LADD (s2, s1, REG_ITMP1);
2190                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2191                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2192                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
2193                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2194                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2195                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2196                                 }
2197                         break;
2198
2199
2200                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2201                                       /* op1 = type, val.a = field address            */
2202
2203                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2204                         M_ALD(REG_ITMP1, REG_PV, a);
2205                         switch (iptr->op1) {
2206                                 case TYPE_INT:
2207                                         var_to_reg_int(s2, src, REG_ITMP2);
2208                                         M_IST(s2, REG_ITMP1, 0);
2209                                         break;
2210                                 case TYPE_LNG:
2211                                         var_to_reg_int(s2, src, REG_ITMP2);
2212                                         M_LST(s2, REG_ITMP1, 0);
2213                                         break;
2214                                 case TYPE_ADR:
2215                                         var_to_reg_int(s2, src, REG_ITMP2);
2216                                         M_AST(s2, REG_ITMP1, 0);
2217                                         break;
2218                                 case TYPE_FLT:
2219                                         var_to_reg_flt(s2, src, REG_FTMP2);
2220                                         M_FST(s2, REG_ITMP1, 0);
2221                                         break;
2222                                 case TYPE_DBL:
2223                                         var_to_reg_flt(s2, src, REG_FTMP2);
2224                                         M_DST(s2, REG_ITMP1, 0);
2225                                         break;
2226                                 default: panic ("internal error");
2227                                 }
2228                         break;
2229
2230                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2231                                       /* op1 = type, val.a = field address            */
2232
2233                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2234                         M_ALD(REG_ITMP1, REG_PV, a);
2235                         switch (iptr->op1) {
2236                                 case TYPE_INT:
2237                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2238                                         M_ILD(d, REG_ITMP1, 0);
2239                                         store_reg_to_var_int(iptr->dst, d);
2240                                         break;
2241                                 case TYPE_LNG:
2242                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2243                                         M_LLD(d, REG_ITMP1, 0);
2244                                         store_reg_to_var_int(iptr->dst, d);
2245                                         break;
2246                                 case TYPE_ADR:
2247                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2248                                         M_ALD(d, REG_ITMP1, 0);
2249                                         store_reg_to_var_int(iptr->dst, d);
2250                                         break;
2251                                 case TYPE_FLT:
2252                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2253                                         M_FLD(d, REG_ITMP1, 0);
2254                                         store_reg_to_var_flt(iptr->dst, d);
2255                                         break;
2256                                 case TYPE_DBL:
2257                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2258                                         M_DLD(d, REG_ITMP1, 0);
2259                                         store_reg_to_var_flt(iptr->dst, d);
2260                                         break;
2261                                 default: panic ("internal error");
2262                                 }
2263                         break;
2264
2265
2266                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2267                                       /* op1 = type, val.i = field offset             */
2268
2269                         a = ((fieldinfo *)(iptr->val.a))->offset;
2270                         switch (iptr->op1) {
2271                                 case TYPE_INT:
2272                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2273                                         var_to_reg_int(s2, src, REG_ITMP2);
2274                                         gen_nullptr_check(s1);
2275                                         M_IST(s2, s1, a);
2276                                         break;
2277                                 case TYPE_LNG:
2278                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2279                                         var_to_reg_int(s2, src, REG_ITMP2);
2280                                         gen_nullptr_check(s1);
2281                                         M_LST(s2, s1, a);
2282                                         break;
2283                                 case TYPE_ADR:
2284                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2285                                         var_to_reg_int(s2, src, REG_ITMP2);
2286                                         gen_nullptr_check(s1);
2287                                         M_AST(s2, s1, a);
2288                                         break;
2289                                 case TYPE_FLT:
2290                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2291                                         var_to_reg_flt(s2, src, REG_FTMP2);
2292                                         gen_nullptr_check(s1);
2293                                         M_FST(s2, s1, a);
2294                                         break;
2295                                 case TYPE_DBL:
2296                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2297                                         var_to_reg_flt(s2, src, REG_FTMP2);
2298                                         gen_nullptr_check(s1);
2299                                         M_DST(s2, s1, a);
2300                                         break;
2301                                 default: panic ("internal error");
2302                                 }
2303                         break;
2304
2305                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2306                                       /* op1 = type, val.i = field offset             */
2307
2308                         a = ((fieldinfo *)(iptr->val.a))->offset;
2309                         switch (iptr->op1) {
2310                                 case TYPE_INT:
2311                                         var_to_reg_int(s1, src, REG_ITMP1);
2312                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2313                                         gen_nullptr_check(s1);
2314                                         M_ILD(d, s1, a);
2315                                         store_reg_to_var_int(iptr->dst, d);
2316                                         break;
2317                                 case TYPE_LNG:
2318                                         var_to_reg_int(s1, src, REG_ITMP1);
2319                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2320                                         gen_nullptr_check(s1);
2321                                         M_LLD(d, s1, a);
2322                                         store_reg_to_var_int(iptr->dst, d);
2323                                         break;
2324                                 case TYPE_ADR:
2325                                         var_to_reg_int(s1, src, REG_ITMP1);
2326                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2327                                         gen_nullptr_check(s1);
2328                                         M_ALD(d, s1, a);
2329                                         store_reg_to_var_int(iptr->dst, d);
2330                                         break;
2331                                 case TYPE_FLT:
2332                                         var_to_reg_int(s1, src, REG_ITMP1);
2333                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2334                                         gen_nullptr_check(s1);
2335                                         M_FLD(d, s1, a);
2336                                         store_reg_to_var_flt(iptr->dst, d);
2337                                         break;
2338                                 case TYPE_DBL:
2339                                         var_to_reg_int(s1, src, REG_ITMP1);
2340                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2341                                         gen_nullptr_check(s1);
2342                                         M_DLD(d, s1, a);
2343                                         store_reg_to_var_flt(iptr->dst, d);
2344                                         break;
2345                                 default: panic ("internal error");
2346                                 }
2347                         break;
2348
2349
2350                 /* branch operations **************************************************/
2351
2352 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2353
2354                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2355
2356                         var_to_reg_int(s1, src, REG_ITMP1);
2357                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2358                         a = dseg_addaddress(asm_handle_exception);
2359                         M_ALD(REG_ITMP2, REG_PV, a);
2360                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2361                         ALIGNCODENOP;
2362                         break;
2363
2364                 case ICMD_GOTO:         /* ... ==> ...                                */
2365                                         /* op1 = target JavaVM pc                     */
2366                         M_BR(0);
2367                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2368                         ALIGNCODENOP;
2369                         break;
2370
2371                 case ICMD_JSR:          /* ... ==> ...                                */
2372                                         /* op1 = target JavaVM pc                     */
2373
2374                         M_BSR(REG_ITMP1, 0);
2375                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2376                         break;
2377
2378                 case ICMD_RET:          /* ... ==> ...                                */
2379                                         /* op1 = local variable                       */
2380
2381                         var = &(locals[iptr->op1][TYPE_ADR]);
2382                         if (var->flags & INMEMORY) {
2383                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2384                                 M_RET(REG_ZERO, REG_ITMP1);
2385                                 }
2386                         else
2387                                 M_RET(REG_ZERO, var->regoff);
2388                         ALIGNCODENOP;
2389                         break;
2390
2391                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2392                                         /* op1 = target JavaVM pc                     */
2393
2394                         var_to_reg_int(s1, src, REG_ITMP1);
2395                         M_BEQZ(s1, 0);
2396                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2397                         break;
2398
2399                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2400                                         /* op1 = target JavaVM pc                     */
2401
2402                         var_to_reg_int(s1, src, REG_ITMP1);
2403                         M_BNEZ(s1, 0);
2404                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2405                         break;
2406
2407                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2408                                         /* op1 = target JavaVM pc, val.i = constant   */
2409
2410                         var_to_reg_int(s1, src, REG_ITMP1);
2411                         if (iptr->val.i == 0) {
2412                                 M_BEQZ(s1, 0);
2413                                 }
2414                         else {
2415                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2416                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2417                                         }
2418                                 else {
2419                                         ICONST(REG_ITMP2, iptr->val.i);
2420                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2421                                         }
2422                                 M_BNEZ(REG_ITMP1, 0);
2423                                 }
2424                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2425                         break;
2426
2427                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2428                                         /* op1 = target JavaVM pc, val.i = constant   */
2429
2430                         var_to_reg_int(s1, src, REG_ITMP1);
2431                         if (iptr->val.i == 0) {
2432                                 M_BLTZ(s1, 0);
2433                                 }
2434                         else {
2435                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2436                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2437                                         }
2438                                 else {
2439                                         ICONST(REG_ITMP2, iptr->val.i);
2440                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2441                                         }
2442                                 M_BNEZ(REG_ITMP1, 0);
2443                                 }
2444                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2445                         break;
2446
2447                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2448                                         /* op1 = target JavaVM pc, val.i = constant   */
2449
2450                         var_to_reg_int(s1, src, REG_ITMP1);
2451                         if (iptr->val.i == 0) {
2452                                 M_BLEZ(s1, 0);
2453                                 }
2454                         else {
2455                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2456                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2457                                         }
2458                                 else {
2459                                         ICONST(REG_ITMP2, iptr->val.i);
2460                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2461                                         }
2462                                 M_BNEZ(REG_ITMP1, 0);
2463                                 }
2464                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2465                         break;
2466
2467                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2468                                         /* op1 = target JavaVM pc, val.i = constant   */
2469
2470                         var_to_reg_int(s1, src, REG_ITMP1);
2471                         if (iptr->val.i == 0) {
2472                                 M_BNEZ(s1, 0);
2473                                 }
2474                         else {
2475                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2476                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2477                                         }
2478                                 else {
2479                                         ICONST(REG_ITMP2, iptr->val.i);
2480                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2481                                         }
2482                                 M_BEQZ(REG_ITMP1, 0);
2483                                 }
2484                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2485                         break;
2486
2487                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2488                                         /* op1 = target JavaVM pc, val.i = constant   */
2489
2490                         var_to_reg_int(s1, src, REG_ITMP1);
2491                         if (iptr->val.i == 0) {
2492                                 M_BGTZ(s1, 0);
2493                                 }
2494                         else {
2495                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2496                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2497                                         }
2498                                 else {
2499                                         ICONST(REG_ITMP2, iptr->val.i);
2500                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2501                                         }
2502                                 M_BEQZ(REG_ITMP1, 0);
2503                                 }
2504                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2505                         break;
2506
2507                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2508                                         /* op1 = target JavaVM pc, val.i = constant   */
2509
2510                         var_to_reg_int(s1, src, REG_ITMP1);
2511                         if (iptr->val.i == 0) {
2512                                 M_BGEZ(s1, 0);
2513                                 }
2514                         else {
2515                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2516                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2517                                         }
2518                                 else {
2519                                         ICONST(REG_ITMP2, iptr->val.i);
2520                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2521                                         }
2522                                 M_BEQZ(REG_ITMP1, 0);
2523                                 }
2524                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2525                         break;
2526
2527                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2528                                         /* op1 = target JavaVM pc, val.l = constant   */
2529
2530                         var_to_reg_int(s1, src, REG_ITMP1);
2531                         if (iptr->val.l == 0) {
2532                                 M_BEQZ(s1, 0);
2533                                 }
2534                         else {
2535                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2536                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2537                                         }
2538                                 else {
2539                                         LCONST(REG_ITMP2, iptr->val.l);
2540                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2541                                         }
2542                                 M_BNEZ(REG_ITMP1, 0);
2543                                 }
2544                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2545                         break;
2546
2547                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2548                                         /* op1 = target JavaVM pc, val.l = constant   */
2549
2550                         var_to_reg_int(s1, src, REG_ITMP1);
2551                         if (iptr->val.l == 0) {
2552                                 M_BLTZ(s1, 0);
2553                                 }
2554                         else {
2555                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2556                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2557                                         }
2558                                 else {
2559                                         LCONST(REG_ITMP2, iptr->val.l);
2560                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2561                                         }
2562                                 M_BNEZ(REG_ITMP1, 0);
2563                                 }
2564                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2565                         break;
2566
2567                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2568                                         /* op1 = target JavaVM pc, val.l = constant   */
2569
2570                         var_to_reg_int(s1, src, REG_ITMP1);
2571                         if (iptr->val.l == 0) {
2572                                 M_BLEZ(s1, 0);
2573                                 }
2574                         else {
2575                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2576                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2577                                         }
2578                                 else {
2579                                         LCONST(REG_ITMP2, iptr->val.l);
2580                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2581                                         }
2582                                 M_BNEZ(REG_ITMP1, 0);
2583                                 }
2584                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2585                         break;
2586
2587                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2588                                         /* op1 = target JavaVM pc, val.l = constant   */
2589
2590                         var_to_reg_int(s1, src, REG_ITMP1);
2591                         if (iptr->val.l == 0) {
2592                                 M_BNEZ(s1, 0);
2593                                 }
2594                         else {
2595                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2596                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2597                                         }
2598                                 else {
2599                                         LCONST(REG_ITMP2, iptr->val.l);
2600                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2601                                         }
2602                                 M_BEQZ(REG_ITMP1, 0);
2603                                 }
2604                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2605                         break;
2606
2607                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2608                                         /* op1 = target JavaVM pc, val.l = constant   */
2609
2610                         var_to_reg_int(s1, src, REG_ITMP1);
2611                         if (iptr->val.l == 0) {
2612                                 M_BGTZ(s1, 0);
2613                                 }
2614                         else {
2615                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2616                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2617                                         }
2618                                 else {
2619                                         LCONST(REG_ITMP2, iptr->val.l);
2620                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2621                                         }
2622                                 M_BEQZ(REG_ITMP1, 0);
2623                                 }
2624                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2625                         break;
2626
2627                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2628                                         /* op1 = target JavaVM pc, val.l = constant   */
2629
2630                         var_to_reg_int(s1, src, REG_ITMP1);
2631                         if (iptr->val.l == 0) {
2632                                 M_BGEZ(s1, 0);
2633                                 }
2634                         else {
2635                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2636                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2637                                         }
2638                                 else {
2639                                         LCONST(REG_ITMP2, iptr->val.l);
2640                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2641                                         }
2642                                 M_BEQZ(REG_ITMP1, 0);
2643                                 }
2644                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2645                         break;
2646
2647                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2648                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2649                 case ICMD_IF_ACMPEQ:
2650
2651                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2652                         var_to_reg_int(s2, src, REG_ITMP2);
2653                         M_CMPEQ(s1, s2, REG_ITMP1);
2654                         M_BNEZ(REG_ITMP1, 0);
2655                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2656                         break;
2657
2658                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2659                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2660                 case ICMD_IF_ACMPNE:
2661
2662                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2663                         var_to_reg_int(s2, src, REG_ITMP2);
2664                         M_CMPEQ(s1, s2, REG_ITMP1);
2665                         M_BEQZ(REG_ITMP1, 0);
2666                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2667                         break;
2668
2669                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2670                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2671
2672                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2673                         var_to_reg_int(s2, src, REG_ITMP2);
2674                         M_CMPLT(s1, s2, REG_ITMP1);
2675                         M_BNEZ(REG_ITMP1, 0);
2676                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2677                         break;
2678
2679                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2680                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2681
2682                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2683                         var_to_reg_int(s2, src, REG_ITMP2);
2684                         M_CMPLE(s1, s2, REG_ITMP1);
2685                         M_BEQZ(REG_ITMP1, 0);
2686                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2687                         break;
2688
2689                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2690                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2691
2692                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2693                         var_to_reg_int(s2, src, REG_ITMP2);
2694                         M_CMPLE(s1, s2, REG_ITMP1);
2695                         M_BNEZ(REG_ITMP1, 0);
2696                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2697                         break;
2698
2699                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2700                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2701
2702                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2703                         var_to_reg_int(s2, src, REG_ITMP2);
2704                         M_CMPLT(s1, s2, REG_ITMP1);
2705                         M_BEQZ(REG_ITMP1, 0);
2706                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2707                         break;
2708
2709                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2710
2711                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2712                         break;
2713
2714                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2715                                         /* val.i = constant                           */
2716
2717                         var_to_reg_int(s1, src, REG_ITMP1);
2718                         d = reg_of_var(iptr->dst, REG_ITMP3);
2719                         s3 = iptr->val.i;
2720                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2721                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2722                                         M_CMPEQ(s1, REG_ZERO, d);
2723                                         store_reg_to_var_int(iptr->dst, d);
2724                                         break;
2725                                         }
2726                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2727                                         M_CMPEQ(s1, REG_ZERO, d);
2728                                         M_XOR_IMM(d, 1, d);
2729                                         store_reg_to_var_int(iptr->dst, d);
2730                                         break;
2731                                         }
2732                                 if (s1 == d) {
2733                                         M_MOV(s1, REG_ITMP1);
2734                                         s1 = REG_ITMP1;
2735                                         }
2736                                 ICONST(d, iptr[1].val.i);
2737                                 }
2738                         if ((s3 >= 0) && (s3 <= 255)) {
2739                                 M_CMOVEQ_IMM(s1, s3, d);
2740                                 }
2741                         else {
2742                                 ICONST(REG_ITMP2, s3);
2743                                 M_CMOVEQ(s1, REG_ITMP2, d);
2744                                 }
2745                         store_reg_to_var_int(iptr->dst, d);
2746                         break;
2747
2748                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2749                                         /* val.i = constant                           */
2750
2751                         var_to_reg_int(s1, src, REG_ITMP1);
2752                         d = reg_of_var(iptr->dst, REG_ITMP3);
2753                         s3 = iptr->val.i;
2754                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2755                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2756                                         M_CMPEQ(s1, REG_ZERO, d);
2757                                         store_reg_to_var_int(iptr->dst, d);
2758                                         break;
2759                                         }
2760                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2761                                         M_CMPEQ(s1, REG_ZERO, d);
2762                                         M_XOR_IMM(d, 1, d);
2763                                         store_reg_to_var_int(iptr->dst, d);
2764                                         break;
2765                                         }
2766                                 if (s1 == d) {
2767                                         M_MOV(s1, REG_ITMP1);
2768                                         s1 = REG_ITMP1;
2769                                         }
2770                                 ICONST(d, iptr[1].val.i);
2771                                 }
2772                         if ((s3 >= 0) && (s3 <= 255)) {
2773                                 M_CMOVNE_IMM(s1, s3, d);
2774                                 }
2775                         else {
2776                                 ICONST(REG_ITMP2, s3);
2777                                 M_CMOVNE(s1, REG_ITMP2, d);
2778                                 }
2779                         store_reg_to_var_int(iptr->dst, d);
2780                         break;
2781
2782                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2783                                         /* val.i = constant                           */
2784
2785                         var_to_reg_int(s1, src, REG_ITMP1);
2786                         d = reg_of_var(iptr->dst, REG_ITMP3);
2787                         s3 = iptr->val.i;
2788                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2789                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2790                                         M_CMPLT(s1, REG_ZERO, d);
2791                                         store_reg_to_var_int(iptr->dst, d);
2792                                         break;
2793                                         }
2794                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2795                                         M_CMPLE(REG_ZERO, s1, d);
2796                                         store_reg_to_var_int(iptr->dst, d);
2797                                         break;
2798                                         }
2799                                 if (s1 == d) {
2800                                         M_MOV(s1, REG_ITMP1);
2801                                         s1 = REG_ITMP1;
2802                                         }
2803                                 ICONST(d, iptr[1].val.i);
2804                                 }
2805                         if ((s3 >= 0) && (s3 <= 255)) {
2806                                 M_CMOVLT_IMM(s1, s3, d);
2807                                 }
2808                         else {
2809                                 ICONST(REG_ITMP2, s3);
2810                                 M_CMOVLT(s1, REG_ITMP2, d);
2811                                 }
2812                         store_reg_to_var_int(iptr->dst, d);
2813                         break;
2814
2815                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2816                                         /* val.i = constant                           */
2817
2818                         var_to_reg_int(s1, src, REG_ITMP1);
2819                         d = reg_of_var(iptr->dst, REG_ITMP3);
2820                         s3 = iptr->val.i;
2821                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2822                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2823                                         M_CMPLE(REG_ZERO, s1, d);
2824                                         store_reg_to_var_int(iptr->dst, d);
2825                                         break;
2826                                         }
2827                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2828                                         M_CMPLT(s1, REG_ZERO, d);
2829                                         store_reg_to_var_int(iptr->dst, d);
2830                                         break;
2831                                         }
2832                                 if (s1 == d) {
2833                                         M_MOV(s1, REG_ITMP1);
2834                                         s1 = REG_ITMP1;
2835                                         }
2836                                 ICONST(d, iptr[1].val.i);
2837                                 }
2838                         if ((s3 >= 0) && (s3 <= 255)) {
2839                                 M_CMOVGE_IMM(s1, s3, d);
2840                                 }
2841                         else {
2842                                 ICONST(REG_ITMP2, s3);
2843                                 M_CMOVGE(s1, REG_ITMP2, d);
2844                                 }
2845                         store_reg_to_var_int(iptr->dst, d);
2846                         break;
2847
2848                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2849                                         /* val.i = constant                           */
2850
2851                         var_to_reg_int(s1, src, REG_ITMP1);
2852                         d = reg_of_var(iptr->dst, REG_ITMP3);
2853                         s3 = iptr->val.i;
2854                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2855                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2856                                         M_CMPLT(REG_ZERO, s1, d);
2857                                         store_reg_to_var_int(iptr->dst, d);
2858                                         break;
2859                                         }
2860                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2861                                         M_CMPLE(s1, REG_ZERO, d);
2862                                         store_reg_to_var_int(iptr->dst, d);
2863                                         break;
2864                                         }
2865                                 if (s1 == d) {
2866                                         M_MOV(s1, REG_ITMP1);
2867                                         s1 = REG_ITMP1;
2868                                         }
2869                                 ICONST(d, iptr[1].val.i);
2870                                 }
2871                         if ((s3 >= 0) && (s3 <= 255)) {
2872                                 M_CMOVGT_IMM(s1, s3, d);
2873                                 }
2874                         else {
2875                                 ICONST(REG_ITMP2, s3);
2876                                 M_CMOVGT(s1, REG_ITMP2, d);
2877                                 }
2878                         store_reg_to_var_int(iptr->dst, d);
2879                         break;
2880
2881                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2882                                         /* val.i = constant                           */
2883
2884                         var_to_reg_int(s1, src, REG_ITMP1);
2885                         d = reg_of_var(iptr->dst, REG_ITMP3);
2886                         s3 = iptr->val.i;
2887                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2888                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2889                                         M_CMPLE(s1, REG_ZERO, d);
2890                                         store_reg_to_var_int(iptr->dst, d);
2891                                         break;
2892                                         }
2893                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2894                                         M_CMPLT(REG_ZERO, s1, d);
2895                                         store_reg_to_var_int(iptr->dst, d);
2896                                         break;
2897                                         }
2898                                 if (s1 == d) {
2899                                         M_MOV(s1, REG_ITMP1);
2900                                         s1 = REG_ITMP1;
2901                                         }
2902                                 ICONST(d, iptr[1].val.i);
2903                                 }
2904                         if ((s3 >= 0) && (s3 <= 255)) {
2905                                 M_CMOVLE_IMM(s1, s3, d);
2906                                 }
2907                         else {
2908                                 ICONST(REG_ITMP2, s3);
2909                                 M_CMOVLE(s1, REG_ITMP2, d);
2910                                 }
2911                         store_reg_to_var_int(iptr->dst, d);
2912                         break;
2913
2914
2915                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2916                 case ICMD_LRETURN:
2917                 case ICMD_ARETURN:
2918
2919 #ifdef USE_THREADS
2920                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2921                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2922                                 M_ALD(REG_PV, REG_PV, a);
2923                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
2924                                 M_JSR(REG_RA, REG_PV);
2925                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
2926                                 }
2927 #endif
2928                         var_to_reg_int(s1, src, REG_RESULT);
2929                         M_INTMOVE(s1, REG_RESULT);
2930                         goto nowperformreturn;
2931
2932                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2933                 case ICMD_DRETURN:
2934
2935 #ifdef USE_THREADS
2936                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2937                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2938                                 M_ALD(REG_PV, REG_PV, a);
2939                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
2940                                 M_JSR(REG_RA, REG_PV);
2941                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
2942                                 }
2943 #endif
2944                         var_to_reg_flt(s1, src, REG_FRESULT);
2945                         M_FLTMOVE(s1, REG_FRESULT);
2946                         goto nowperformreturn;
2947
2948                 case ICMD_RETURN:      /* ...  ==> ...                                */
2949
2950 #ifdef USE_THREADS
2951                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2952                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2953                                 M_ALD(REG_PV, REG_PV, a);
2954                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
2955                                 M_JSR(REG_RA, REG_PV);
2956                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
2957                                 }
2958 #endif
2959
2960 nowperformreturn:
2961                         {
2962                         int r, p;
2963
2964                         p = parentargs_base;
2965
2966                         /* restore return address                                         */
2967
2968                         if (!isleafmethod)
2969                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
2970
2971                         /* restore saved registers                                        */
2972
2973                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
2974                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
2975                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
2976                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
2977
2978                         /* deallocate stack                                               */
2979
2980                         if (parentargs_base)
2981                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
2982
2983                         /* call trace function */
2984
2985                         if (runverbose) {
2986                                 M_LDA (REG_SP, REG_SP, -24);
2987                                 M_AST(REG_RA, REG_SP, 0);
2988                                 M_LST(REG_RESULT, REG_SP, 8);
2989                                 M_DST(REG_FRESULT, REG_SP,16);
2990                                 a = dseg_addaddress (method);
2991                                 M_ALD(argintregs[0], REG_PV, a);
2992                                 M_MOV(REG_RESULT, argintregs[1]);
2993                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);
2994                                 a = dseg_addaddress ((void*) (builtin_displaymethodstop));
2995                                 M_ALD(REG_PV, REG_PV, a);
2996                                 M_JSR (REG_RA, REG_PV);
2997                                 s1 = (int)((u1*) mcodeptr - mcodebase);
2998                                 if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
2999                                 else {
3000                                         s4 ml=-s1, mh=0;
3001                                         while (ml<-32768) { ml+=65536; mh--; }
3002                                         M_LDA (REG_PV, REG_RA, ml );
3003                                         M_LDAH (REG_PV, REG_PV, mh );
3004                                         }
3005                                 M_DLD(REG_FRESULT, REG_SP,16);
3006                                 M_LLD(REG_RESULT, REG_SP, 8);
3007                                 M_ALD(REG_RA, REG_SP, 0);
3008                                 M_LDA (REG_SP, REG_SP, 24);
3009                                 }
3010
3011                         M_RET(REG_ZERO, REG_RA);
3012                         ALIGNCODENOP;
3013                         }
3014                         break;
3015
3016
3017                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3018                         {
3019                         s4 i, l, *s4ptr;
3020                         void **tptr;
3021
3022                         tptr = (void **) iptr->target;
3023
3024                         s4ptr = iptr->val.a;
3025                         l = s4ptr[1];                          /* low     */
3026                         i = s4ptr[2];                          /* high    */
3027
3028                         var_to_reg_int(s1, src, REG_ITMP1);
3029                         if (l == 0)
3030                                 {M_INTMOVE(s1, REG_ITMP1);}
3031                         else if (l <= 32768) {
3032                                 M_LDA(REG_ITMP1, s1, -l);
3033                                 }
3034                         else {
3035                                 ICONST(REG_ITMP2, l);
3036                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3037                                 }
3038                         i = i - l + 1;
3039
3040                         /* range check */
3041
3042                         if (i <= 256)
3043                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3044                         else {
3045                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3046                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3047                                 }
3048                         M_BEQZ(REG_ITMP2, 0);
3049
3050
3051                         /* mcode_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3052                         mcode_addreference((basicblock *) tptr[0], mcodeptr);
3053
3054                         /* build jump table top down and use address of lowest entry */
3055
3056                         /* s4ptr += 3 + i; */
3057                         tptr += i;
3058
3059                         while (--i >= 0) {
3060                                 /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
3061                                 dseg_addtarget((basicblock *) tptr[0]);
3062                                 --tptr;
3063                                 }
3064                         }
3065
3066                         /* length of dataseg after last dseg_addtarget is used by load */
3067
3068                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3069                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
3070                         M_JMP(REG_ZERO, REG_ITMP2);
3071                         ALIGNCODENOP;
3072                         break;
3073
3074
3075                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3076                         {
3077                         s4 i, l, val, *s4ptr;
3078                         void **tptr;
3079
3080                         tptr = (void **) iptr->target;
3081
3082                         s4ptr = iptr->val.a;
3083                         l = s4ptr[0];                          /* default  */
3084                         i = s4ptr[1];                          /* count    */
3085
3086                         MCODECHECK((i<<2)+8);
3087                         var_to_reg_int(s1, src, REG_ITMP1);
3088                         while (--i >= 0) {
3089                                 s4ptr += 2;
3090                                 ++tptr;
3091
3092                                 val = s4ptr[0];
3093                                 if ((val >= 0) && (val <= 255)) {
3094                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3095                                         }
3096                                 else {
3097                                         if ((val >= -32768) && (val <= 32767)) {
3098                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3099                                                 }
3100                                         else {
3101                                                 a = dseg_adds4 (val);
3102                                                 M_ILD(REG_ITMP2, REG_PV, a);
3103                                                 }
3104                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3105                                         }
3106                                 M_BNEZ(REG_ITMP2, 0);
3107                                 /* mcode_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3108                                 mcode_addreference((basicblock *) tptr[0], mcodeptr);
3109                                 }
3110
3111                         M_BR(0);
3112                         /* mcode_addreference(BlockPtrOfPC(l), mcodeptr); */
3113
3114                         tptr = (void **) iptr->target;
3115                         mcode_addreference((basicblock *) tptr[0], mcodeptr);
3116
3117                         ALIGNCODENOP;
3118                         break;
3119                         }
3120
3121
3122                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3123                                         /* op1 = return type, val.a = function pointer*/
3124                         s3 = 3;
3125                         goto gen_method;
3126
3127                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3128                                         /* op1 = return type, val.a = function pointer*/
3129                         s3 = 2;
3130                         goto gen_method;
3131
3132                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3133                                         /* op1 = return type, val.a = function pointer*/
3134                         s3 = 1;
3135                         goto gen_method;
3136
3137                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3138                                         /* op1 = arg count, val.a = method pointer    */
3139
3140                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3141                                         /* op1 = arg count, val.a = method pointer    */
3142
3143                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3144                                         /* op1 = arg count, val.a = method pointer    */
3145
3146                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3147                                         /* op1 = arg count, val.a = method pointer    */
3148
3149                         s3 = iptr->op1;
3150
3151 gen_method: {
3152                         methodinfo   *m;
3153                         classinfo    *ci;
3154
3155                         MCODECHECK((s3 << 1) + 64);
3156
3157                         /* copy arguments to registers or stack location                  */
3158
3159                         for (; --s3 >= 0; src = src->prev) {
3160                                 if (src->varkind == ARGVAR)
3161                                         continue;
3162                                 if (IS_INT_LNG_TYPE(src->type)) {
3163                                         if (s3 < INT_ARG_CNT) {
3164                                                 s1 = argintregs[s3];
3165                                                 var_to_reg_int(d, src, s1);
3166                                                 M_INTMOVE(d, s1);
3167                                                 }
3168                                         else  {
3169                                                 var_to_reg_int(d, src, REG_ITMP1);
3170                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3171                                                 }
3172                                         }
3173                                 else
3174                                         if (s3 < FLT_ARG_CNT) {
3175                                                 s1 = argfltregs[s3];
3176                                                 var_to_reg_flt(d, src, s1);
3177                                                 M_FLTMOVE(d, s1);
3178                                                 }
3179                                         else {
3180                                                 var_to_reg_flt(d, src, REG_FTMP1);
3181                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3182                                                 }
3183                                 } /* end of for */
3184
3185                         m = iptr->val.a;
3186                         switch (iptr->opc) {
3187                                 case ICMD_BUILTIN3:
3188                                 case ICMD_BUILTIN2:
3189                                 case ICMD_BUILTIN1:
3190                                         a = dseg_addaddress ((void*) (m));
3191
3192                                         M_ALD(REG_PV, REG_PV, a); /* Pointer to built-in-function */
3193                                         d = iptr->op1;
3194                                         goto makeactualcall;
3195
3196                                 case ICMD_INVOKESTATIC:
3197                                 case ICMD_INVOKESPECIAL:
3198                                         a = dseg_addaddress (m->stubroutine);
3199
3200                                         M_ALD(REG_PV, REG_PV, a );       /* method pointer in r27 */
3201
3202                                         d = m->returntype;
3203                                         goto makeactualcall;
3204
3205                                 case ICMD_INVOKEVIRTUAL:
3206
3207                                         gen_nullptr_check(argintregs[0]);
3208                                         M_ALD(REG_METHODPTR, argintregs[0],
3209                                                                  OFFSET(java_objectheader, vftbl));
3210                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
3211                                                                 sizeof(methodptr) * m->vftblindex);
3212
3213                                         d = m->returntype;
3214                                         goto makeactualcall;
3215
3216                                 case ICMD_INVOKEINTERFACE:
3217                                         ci = m->class;
3218
3219                                         gen_nullptr_check(argintregs[0]);
3220                                         M_ALD(REG_METHODPTR, argintregs[0],
3221                                                                  OFFSET(java_objectheader, vftbl));
3222                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
3223                                               OFFSET(vftbl, interfacetable[0]) -
3224                                               sizeof(methodptr*) * ci->index);
3225                                         M_ALD(REG_PV, REG_METHODPTR,
3226                                                             sizeof(methodptr) * (m - ci->methods));
3227
3228                                         d = m->returntype;
3229                                         goto makeactualcall;
3230
3231                                 default:
3232                                         d = 0;
3233                                         sprintf (logtext, "Unkown ICMD-Command: %d", iptr->opc);
3234                                         error ();
3235                                 }
3236
3237 makeactualcall:
3238
3239                         M_JSR (REG_RA, REG_PV);
3240
3241                         /* recompute pv */
3242
3243                         s1 = (int)((u1*) mcodeptr - mcodebase);
3244                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3245                         else {
3246                                 s4 ml=-s1, mh=0;
3247                                 while (ml<-32768) { ml+=65536; mh--; }
3248                                 M_LDA (REG_PV, REG_RA, ml );
3249                                 M_LDAH (REG_PV, REG_PV, mh );
3250                                 }
3251
3252                         /* d contains return type */
3253
3254                         if (d != TYPE_VOID) {
3255                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3256                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3257                                         M_INTMOVE(REG_RESULT, s1);
3258                                         store_reg_to_var_int(iptr->dst, s1);
3259                                         }
3260                                 else {
3261                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3262                                         M_FLTMOVE(REG_FRESULT, s1);
3263                                         store_reg_to_var_flt(iptr->dst, s1);
3264                                         }
3265                                 }
3266                         }
3267                         break;
3268
3269
3270                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3271
3272                                       /* op1:   0 == array, 1 == class                */
3273                                       /* val.a: (classinfo*) superclass               */
3274
3275 /*          superclass is an interface:
3276  *
3277  *          return (sub != NULL) &&
3278  *                 (sub->vftbl->interfacetablelength > super->index) &&
3279  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3280  *
3281  *          superclass is a class:
3282  *
3283  *          return ((sub != NULL) && (0
3284  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3285  *                  super->vftbl->diffvall));
3286  */
3287
3288                         {
3289                         classinfo *super = (classinfo*) iptr->val.a;
3290
3291                         var_to_reg_int(s1, src, REG_ITMP1);
3292                         d = reg_of_var(iptr->dst, REG_ITMP3);
3293                         if (s1 == d) {
3294                                 M_MOV(s1, REG_ITMP1);
3295                                 s1 = REG_ITMP1;
3296                                 }
3297                         M_CLR(d);
3298                         if (iptr->op1) {                               /* class/interface */
3299                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3300                                         M_BEQZ(s1, 6);
3301                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3302                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3303                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3304                                         M_BLEZ(REG_ITMP2, 2);
3305                                         M_ALD(REG_ITMP1, REG_ITMP1,
3306                                               OFFSET(vftbl, interfacetable[0]) -
3307                                               super->index * sizeof(methodptr*));
3308                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3309                                         }
3310                                 else {                                     /* class           */
3311                                         s2 = super->vftbl->diffval;
3312                                         M_BEQZ(s1, 4 + (s2 > 255));
3313                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3314                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3315                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3316                                         if (s2 <= 255)
3317                                                 M_CMPULE_IMM(REG_ITMP1, s2, d);
3318                                         else {
3319                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3320                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3321                                                 }
3322                                         }
3323                                 }
3324                         else
3325                                 panic ("internal error: no inlined array instanceof");
3326                         }
3327                         store_reg_to_var_int(iptr->dst, d);
3328                         break;
3329
3330                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3331
3332                                       /* op1:   0 == array, 1 == class                */
3333                                       /* val.a: (classinfo*) superclass               */
3334
3335 /*          superclass is an interface:
3336  *
3337  *          OK if ((sub == NULL) ||
3338  *                 (sub->vftbl->interfacetablelength > super->index) &&
3339  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3340  *
3341  *          superclass is a class:
3342  *
3343  *          OK if ((sub == NULL) || (0
3344  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3345  *                 super->vftbl->diffvall));
3346  */
3347
3348                         {
3349                         classinfo *super = (classinfo*) iptr->val.a;
3350
3351                         d = reg_of_var(iptr->dst, REG_ITMP3);
3352                         var_to_reg_int(s1, src, d);
3353                         if (iptr->op1) {                               /* class/interface */
3354                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3355                                         M_BEQZ(s1, 6);
3356                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3357                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3358                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3359                                         M_BLEZ(REG_ITMP2, 0);
3360                                         mcode_addxcastrefs(mcodeptr);
3361                                         M_ALD(REG_ITMP2, REG_ITMP1,
3362                                               OFFSET(vftbl, interfacetable[0]) -
3363                                               super->index * sizeof(methodptr*));
3364                                         M_BEQZ(REG_ITMP2, 0);
3365                                         mcode_addxcastrefs(mcodeptr);
3366                                         }
3367                                 else {                                     /* class           */
3368                                         s2 = super->vftbl->diffval;
3369                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3370                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3371                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3372                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3373                                         if (s2 == 0) {
3374                                                 M_BNEZ(REG_ITMP1, 0);
3375                                                 }
3376                                         else if (s2 <= 255) {
3377                                                 M_CMPULE_IMM(REG_ITMP1, s2, REG_ITMP2);
3378                                                 M_BEQZ(REG_ITMP2, 0);
3379                                                 }
3380                                         else {
3381                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3382                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3383                                                 M_BEQZ(REG_ITMP2, 0);
3384                                                 }
3385                                         mcode_addxcastrefs(mcodeptr);
3386                                         }
3387                                 }
3388                         else
3389                                 panic ("internal error: no inlined array checkcast");
3390                         }
3391                         M_INTMOVE(s1, d);
3392                         store_reg_to_var_int(iptr->dst, d);
3393                         break;
3394
3395                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3396
3397                         var_to_reg_int(s1, src, REG_ITMP1);
3398                         M_BLTZ(s1, 0);
3399                         mcode_addxcheckarefs(mcodeptr);
3400                         break;
3401
3402                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3403                                       /* op1 = dimension, val.a = array descriptor    */
3404
3405                         /* check for negative sizes and copy sizes to stack if necessary  */
3406
3407                         MCODECHECK((iptr->op1 << 1) + 64);
3408
3409                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3410                                 var_to_reg_int(s2, src, REG_ITMP1);
3411                                 M_BLTZ(s2, 0);
3412                                 mcode_addxcheckarefs(mcodeptr);
3413
3414                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3415
3416                                 if (src->varkind != ARGVAR) {
3417                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3418                                         }
3419                                 }
3420
3421                         /* a0 = dimension count */
3422
3423                         ICONST(argintregs[0], iptr->op1);
3424
3425                         /* a1 = arraydescriptor */
3426
3427                         a = dseg_addaddress(iptr->val.a);
3428                         M_ALD(argintregs[1], REG_PV, a);
3429
3430                         /* a2 = pointer to dimensions = stack pointer */
3431
3432                         M_INTMOVE(REG_SP, argintregs[2]);
3433
3434                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3435                         M_ALD(REG_PV, REG_PV, a);
3436                         M_JSR(REG_RA, REG_PV);
3437                         s1 = (int)((u1*) mcodeptr - mcodebase);
3438                         if (s1 <= 32768)
3439                                 M_LDA (REG_PV, REG_RA, -s1);
3440                         else {
3441                                 s4 ml = -s1, mh = 0;
3442                                 while (ml < -32768) {ml += 65536; mh--;}
3443                                 M_LDA(REG_PV, REG_RA, ml);
3444                                 M_LDAH(REG_PV, REG_PV, mh);
3445                             }
3446                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3447                         M_INTMOVE(REG_RESULT, s1);
3448                         store_reg_to_var_int(iptr->dst, s1);
3449                         break;
3450
3451
3452                 default: sprintf (logtext, "Unknown pseudo command: %d", iptr->opc);
3453                          error();
3454
3455
3456
3457         } /* switch */
3458
3459         } /* for instruction */
3460
3461         /* copy values to interface registers */
3462
3463         src = bptr->outstack;
3464         len = bptr->outdepth;
3465         MCODECHECK(64+len);
3466         while (src) {
3467                 len--;
3468                 if ((src->varkind != STACKVAR)) {
3469                         s2 = src->type;
3470                         if (IS_FLT_DBL_TYPE(s2)) {
3471                                 var_to_reg_flt(s1, src, REG_FTMP1);
3472                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3473                                         M_FLTMOVE(s1,interfaces[len][s2].regoff);
3474                                         }
3475                                 else {
3476                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3477                                         }
3478                                 }
3479                         else {
3480                                 var_to_reg_int(s1, src, REG_ITMP1);
3481                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3482                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3483                                         }
3484                                 else {
3485                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3486                                         }
3487                                 }
3488                         }
3489                 src = src->prev;
3490                 }
3491         } /* if (bptr -> flags >= BBREACHED) */
3492         } /* for basic block */
3493
3494         /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
3495
3496         {
3497         /* generate bound check stubs */
3498
3499         s4 *xcodeptr = NULL;
3500
3501         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3502                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3503                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3504                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3505                         continue;
3506                         }
3507
3508
3509                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3510                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3511
3512                 MCODECHECK(8);
3513
3514                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos - 4);
3515
3516                 if (xcodeptr != NULL) {
3517                         M_BR((xcodeptr-mcodeptr)-1);
3518                         }
3519                 else {
3520                         xcodeptr = mcodeptr;
3521
3522                         a = dseg_addaddress(proto_java_lang_ArrayIndexOutOfBoundsException);
3523                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3524
3525                         a = dseg_addaddress(asm_handle_exception);
3526                         M_ALD(REG_ITMP3, REG_PV, a);
3527
3528                         M_JMP(REG_ZERO, REG_ITMP3);
3529                         }
3530                 }
3531
3532         /* generate negative array size check stubs */
3533
3534         xcodeptr = NULL;
3535
3536         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3537                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3538                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3539                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3540                         continue;
3541                         }
3542
3543                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3544                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3545
3546                 MCODECHECK(8);
3547
3548                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos - 4);
3549
3550                 if (xcodeptr != NULL) {
3551                         M_BR((xcodeptr-mcodeptr)-1);
3552                         }
3553                 else {
3554                         xcodeptr = mcodeptr;
3555
3556                         a = dseg_addaddress(proto_java_lang_NegativeArraySizeException);
3557                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3558
3559                         a = dseg_addaddress(asm_handle_exception);
3560                         M_ALD(REG_ITMP3, REG_PV, a);
3561
3562                         M_JMP(REG_ZERO, REG_ITMP3);
3563                         }
3564                 }
3565
3566         /* generate cast check stubs */
3567
3568         xcodeptr = NULL;
3569
3570         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3571                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3572                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3573                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3574                         continue;
3575                         }
3576
3577                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3578                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3579
3580                 MCODECHECK(8);
3581
3582                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos - 4);
3583
3584                 if (xcodeptr != NULL) {
3585                         M_BR((xcodeptr-mcodeptr)-1);
3586                         }
3587                 else {
3588                         xcodeptr = mcodeptr;
3589
3590                         a = dseg_addaddress(proto_java_lang_ClassCastException);
3591                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3592
3593                         a = dseg_addaddress(asm_handle_exception);
3594                         M_ALD(REG_ITMP3, REG_PV, a);
3595
3596                         M_JMP(REG_ZERO, REG_ITMP3);
3597                         }
3598                 }
3599
3600
3601 #ifdef SOFTNULLPTRCHECK
3602
3603         /* generate null pointer check stubs */
3604
3605         xcodeptr = NULL;
3606
3607         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3608                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3609                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3610                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3611                         continue;
3612                         }
3613
3614                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3615                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3616
3617                 MCODECHECK(8);
3618
3619                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3620
3621                 if (xcodeptr != NULL) {
3622                         M_BR((xcodeptr-mcodeptr)-1);
3623                         }
3624                 else {
3625                         xcodeptr = mcodeptr;
3626
3627                         a = dseg_addaddress(proto_java_lang_NullPointerException);
3628                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3629
3630                         a = dseg_addaddress(asm_handle_exception);
3631                         M_ALD(REG_ITMP3, REG_PV, a);
3632
3633                         M_JMP(REG_ZERO, REG_ITMP3);
3634                         }
3635                 }
3636
3637 #endif
3638         }
3639
3640         mcode_finish((int)((u1*) mcodeptr - mcodebase));
3641 }
3642
3643
3644 /* redefinition of code generation macros (compiling into array) **************/
3645
3646 /*
3647 These macros are newly defined to allow code generation into an array.
3648 This is necessary, because the original M_.. macros generate code by
3649 calling 'mcode_adds4' that uses an additional data structure to
3650 receive the code.
3651
3652 For a faster (but less flexible) version to generate code, these
3653 macros directly use the (s4* p) - pointer to put the code directly
3654 in a locally defined array.
3655 This makes sense only for the stub-generation-routines below.
3656 */
3657
3658 #undef M_OP3
3659 #define M_OP3(op,fu,a,b,c,const) \
3660         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<(16-3*(const)))| \
3661         ((const)<<12)|((fu)<<5)|((c)) )
3662 #undef M_FOP3
3663 #define M_FOP3(op,fu,a,b,c) \
3664         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<16)|((fu)<<5)|(c) )
3665 #undef M_BRA
3666 #define M_BRA(op,a,disp) \
3667         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((disp)&0x1fffff) )
3668 #undef M_MEM
3669 #define M_MEM(op,a,b,disp) \
3670         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<16)|((disp)&0xffff) )
3671
3672
3673 /* function createcompilerstub *************************************************
3674
3675         creates a stub routine which calls the compiler
3676
3677 *******************************************************************************/
3678
3679 #define COMPSTUBSIZE 3
3680
3681 u1 *createcompilerstub (methodinfo *m)
3682 {
3683         u8 *s = CNEW (u8, COMPSTUBSIZE);    /* memory to hold the stub            */
3684         s4 *p = (s4*) s;                    /* code generation pointer            */
3685
3686                                             /* code for the stub                  */
3687         M_ALD (REG_PV, REG_PV, 16);         /* load pointer to the compiler       */
3688         M_JMP (0, REG_PV);                  /* jump to the compiler, return address
3689                                                in reg 0 is used as method pointer */
3690         s[1] = (u8) m;                      /* literals to be adressed            */
3691         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3692
3693 #ifdef STATISTICS
3694         count_cstub_len += COMPSTUBSIZE * 8;
3695 #endif
3696
3697         return (u1*) s;
3698 }
3699
3700
3701 /* function removecompilerstub *************************************************
3702
3703      deletes a compilerstub from memory  (simply by freeing it)
3704
3705 *******************************************************************************/
3706
3707 void removecompilerstub (u1 *stub)
3708 {
3709         CFREE (stub, COMPSTUBSIZE * 8);
3710 }
3711
3712
3713 /* function: createnativestub **************************************************
3714
3715         creates a stub routine which calls a native method
3716
3717 *******************************************************************************/
3718
3719 #define NATIVESTUBSIZE 11
3720
3721 u1 *createnativestub (functionptr f, methodinfo *m)
3722 {
3723         u8 *s = CNEW (u8, NATIVESTUBSIZE);  /* memory to hold the stub            */
3724         s4 *p = (s4*) s;                    /* code generation pointer            */
3725
3726         M_LDA  (REG_SP, REG_SP, -8);        /* build up stackframe                */
3727         M_AST  (REG_RA, REG_SP, 0);         /* store return address               */
3728
3729         M_ALD  (REG_PV, REG_PV, 8*8);       /* load adress of native method       */
3730         M_JSR  (REG_RA, REG_PV);            /* call native method                 */
3731
3732         M_LDA  (REG_PV, REG_RA, -4*4);      /* recompute pv from ra               */
3733         M_ALD  (REG_ITMP3, REG_PV, 9*8);    /* get address of exceptionptr        */
3734
3735         M_ALD  (REG_RA, REG_SP, 0);         /* load return address                */
3736         M_ALD  (REG_ITMP1, REG_ITMP3, 0);   /* load exception into reg. itmp1     */
3737
3738         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe                  */
3739         M_BNEZ (REG_ITMP1, 1);              /* if no exception then return        */
3740
3741         M_RET  (REG_ZERO, REG_RA);          /* return to caller                   */
3742
3743         M_AST  (REG_ZERO, REG_ITMP3, 0);    /* store NULL into exceptionptr       */
3744         M_LDA  (REG_ITMP2, REG_RA, -4);     /* move fault address into reg. itmp2 */
3745
3746         M_ALD  (REG_ITMP3, REG_PV,10*8);    /* load asm exception handler address */
3747         M_JMP  (REG_ZERO, REG_ITMP3);       /* jump to asm exception handler      */
3748
3749
3750         s[8] = (u8) f;                      /* address of native method           */
3751         s[9] = (u8) (&exceptionptr);        /* address of exceptionptr            */
3752         s[10]= (u8) (asm_handle_nat_exception); /* addr of asm exception handler  */
3753
3754 #ifdef STATISTICS
3755         count_nstub_len += NATIVESTUBSIZE * 8;
3756 #endif
3757
3758         return (u1*) s;
3759 }
3760
3761
3762 /* function: removenativestub **************************************************
3763
3764     removes a previously created native-stub from memory
3765
3766 *******************************************************************************/
3767
3768 void removenativestub (u1 *stub)
3769 {
3770         CFREE (stub, NATIVESTUBSIZE * 8);
3771 }
3772
3773
3774 /*
3775  * These are local overrides for various environment variables in Emacs.
3776  * Please do not remove this and leave it at the end of the file, where
3777  * Emacs will automagically detect them.
3778  * ---------------------------------------------------------------------
3779  * Local variables:
3780  * mode: c
3781  * indent-tabs-mode: t
3782  * c-basic-offset: 4
3783  * tab-width: 4
3784  * End:
3785  */