The GPIOs used for UART2 RX and TX were reversed.
[coreboot.git] / src / southbridge / amd /
drwxr-xr-x   ..
drwxr-xr-x - amd8111
drwxr-xr-x - amd8131-disable
drwxr-xr-x - amd8131
drwxr-xr-x - amd8132
drwxr-xr-x - amd8151
drwxr-xr-x - cs5530
drwxr-xr-x - cs5535
drwxr-xr-x - cs5536