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(parent: cbb8d8a) | patch
The GPIOs used for UART2 RX and TX were reversed.
authorMarc Jones <marc.jones@amd.com>
Tue, 19 Jun 2007 22:07:16 +0000 (22:07 +0000)
committerUwe Hermann <uwe@hermann-uwe.de>
Tue, 19 Jun 2007 22:07:16 +0000 (22:07 +0000)
commitc72ff11281233c097441e809a52b560b1a131196
tree14dcb58ccb114ed7f6fcc1b0d61ed5e8c82a138dtree | snapshot
parentcbb8d8ad24cf356d67f8f3a29014342252b9a5b1commit | diff
The GPIOs used for UART2 RX and TX were reversed.

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2726 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
src/southbridge/amd/cs5536/cs5536.c diff | blob | history
my coreboot WIP stuff (asus m5a99x-evo board)