Enable caching for ROM area in model_6ex/cache_as_ram.inc
[coreboot.git] / src / cpu / intel / microcode /
drwxr-xr-x   ..
-rw-r--r-- 26 Makefile.inc
-rw-r--r-- 2418 microcode.c
-rwxr-xr-x 2723 update-microcodes.sh