wurms gitweb - coreboot.git/search

2009-07-10	Ed Swierk	Apparently I'm not the only one who forgets which way... Signed-off-by: Ed Swierk <eswierk@aristanetworks.com>	commit \| commitdiff \| tree
2008-10-29	Ed Swierk	Enable SPI boot flash support on EP80579, which has... Signed-off-by: Ed Swierk <eswierk@aristanetworks.com> Acked-by: Ed Swierk <eswierk@aristanetworks.com>	commit \| commitdiff \| tree
2008-10-13	Ed Swierk	Add support for the Intel EP80579 (Tolapai) Development... Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-09-24	Ed Swierk	Support for the memory controller and PCIe interface... Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-09-03	Ed Swierk	Tidy up identifiers, per Uwe's suggestion. Trivial. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-08-28	Ed Swierk	Add definitions for DDR2 SPD registers. Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-08-28	Ed Swierk	Eric Biederman believes that he and Tom Zimmerman of... Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-08-25	Ed Swierk	This patch adds PCI device IDs for the Intel EP80579... Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-08-25	Ed Swierk	This patch modifies the Intel 3100 southbridge code... Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-08-25	Ed Swierk	This patch implements support for the CPU core of the... Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-05-07	Ed Swierk	Implement GPIO configuration routines for the Intel... Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-05-07	Ed Swierk	Fix a typo in lbtdump output (trivial). Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-04-30	Ed Swierk	By default, the Intel 3100 LPC interface enables only... Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-04-18	Ed Swierk	Replace buildtarget's check for --build-id with something Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-04-18	Ed Swierk	Alter buildtarget to invoke the cross-compiler when Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-04-07	Ed Swierk	ST M50FW016 and ST M50FW040 support the 82802ab command... Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-04-01	Ed Swierk	Setting an integrated southbridge device (like SATA... Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-04-01	Joseph Smith	Remove i82801DB files that I meant to delete in r3206. Acked-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-04-01	Ed Swierk	Tiny style fix for consistency (trivial). Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-04-01	Joseph Smith	Removal of i82801DB (ICH4) Acked-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree
2008-04-01	Ed Swierk	The early init code of several Intel southbridge chipsets... Signed-off-by: Ed Swierk <eswierk@arastra.com>	commit \| commitdiff \| tree

my coreboot WIP stuff (asus m5a99x-evo board)

RSS Atom