memory and pci up!
[coreboot.git] / src / northbridge / via /
2004-04-17 Greg Watsonupdated
2004-04-17 Greg Watsonstart of epia-m port
2003-11-05 Ronald G. Minnichfixes for epia, attempts to fix arima
2003-10-23 Ronald G. Minnichfixes from SONE
2003-10-22 Ronald G. Minnichfixes for EPIA.
2003-10-11 Eric Biederman - O2, enums, and switch statements work in romcc
2003-10-03 Eric Biederman- Modify the code to C style indenting.
2003-10-02 Ronald G. MinnichSome timing in here, but we don't set; it breaks.
2003-10-02 Ronald G. Minnichram size now set from SPD.
2003-10-02 Ronald G. MinnichFirst SPD code in and working!
2003-10-02 Ronald G. Minnichsuccess. It boots as a bproc slave now.
2003-09-30 Ronald G. MinnichThe epia now works.
2003-09-27 Ronald G. Minnichok that's it. I think this might work.
2003-09-27 Ronald G. Minnicha few tweaks etc.
2003-09-26 Ronald G. Minnichit's getting through the 8601 but the values are still...
2003-09-26 Ronald G. Minnichsomething is wrong here but not sure what.
2003-09-26 Ronald G. Minnichjust to get us back where we were.
2003-09-26 Ronald G. Minnichvia epia; also yh lu tyan.
2003-09-25 Ronald G. Minnichfirst cut at 8601 support