new port: island aruma

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1905 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/mainboard/island/aruma/Config.lb b/src/mainboard/island/aruma/Config.lb
new file mode 100644 (file)
index 0000000..a2c7d7d
--- /dev/null
+++ b/src/mainboard/island/aruma/Config.lb
@@ -0,0 +1,345 @@
+##
+## Compute the location and size of where this firmware image
+## (linuxBIOS plus bootloader) will live in the boot rom chip.
+##
+if USE_FALLBACK_IMAGE
+       default ROM_SECTION_SIZE   = FALLBACK_SIZE
+       default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
+else
+       default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
+       default ROM_SECTION_OFFSET = 0
+end
+
+##
+## Compute the start location and size size of
+## The linuxBIOS bootloader.
+##
+default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
+default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
+
+##
+## Compute where this copy of linuxBIOS will start in the boot rom
+##
+default _ROMBASE      = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
+
+##
+## Compute a range of ROM that can cached to speed up linuxBIOS,
+## execution speed.
+##
+## XIP_ROM_SIZE must be a power of 2.
+## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
+##
+default XIP_ROM_SIZE=65536
+default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
+
+arch i386 end 
+
+##
+## Build the objects we have code for in this directory.
+##
+
+driver mainboard.o
+if HAVE_MP_TABLE object mptable.o end
+if HAVE_PIRQ_TABLE object irq_tables.o end
+if HAVE_ACPI_TABLES
+ object acpi_tables.o 
+ object fadt.o
+ object dsdt.o
+end
+
+
+##
+## Romcc output
+##
+makerule ./failover.E
+       depends "$(MAINBOARD)/failover.c ./romcc" 
+       action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
+end
+
+makerule ./failover.inc
+       depends "$(MAINBOARD)/failover.c ./romcc"
+       action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
+end
+
+makerule ./auto.E 
+       depends "$(MAINBOARD)/auto.c option_table.h ./romcc" 
+       action  "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+end
+makerule ./auto.inc 
+       depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
+       action  "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+end
+
+##
+## Build our 16 bit and 32 bit linuxBIOS entry code
+##
+mainboardinit cpu/x86/16bit/entry16.inc
+mainboardinit cpu/x86/32bit/entry32.inc
+ldscript /cpu/x86/16bit/entry16.lds
+ldscript /cpu/x86/32bit/entry32.lds
+
+##
+## Build our reset vector (This is where linuxBIOS is entered)
+##
+if USE_FALLBACK_IMAGE 
+       mainboardinit cpu/x86/16bit/reset16.inc 
+       ldscript /cpu/x86/16bit/reset16.lds 
+else
+       mainboardinit cpu/x86/32bit/reset32.inc 
+       ldscript /cpu/x86/32bit/reset32.lds 
+end
+
+### Should this be in the northbridge code?
+mainboardinit arch/i386/lib/cpu_reset.inc
+
+##
+## Include an id string (For safe flashing)
+##
+mainboardinit arch/i386/lib/id.inc
+ldscript /arch/i386/lib/id.lds
+
+###
+### This is the early phase of linuxBIOS startup 
+### Things are delicate and we test to see if we should
+### failover to another image.
+###
+if USE_FALLBACK_IMAGE
+       ldscript /arch/i386/lib/failover.lds 
+       mainboardinit ./failover.inc
+end
+
+###
+### O.k. We aren't just an intermediary anymore!
+###
+
+##
+## Setup RAM
+##
+mainboardinit cpu/x86/fpu/enable_fpu.inc
+mainboardinit cpu/x86/mmx/enable_mmx.inc
+mainboardinit cpu/x86/sse/enable_sse.inc
+mainboardinit ./auto.inc
+mainboardinit cpu/x86/sse/disable_sse.inc
+mainboardinit cpu/x86/mmx/disable_mmx.inc
+
+##
+## Include the secondary Configuration files 
+##
+dir /pc80
+config chip.h
+
+# config for arima/hdama
+chip northbridge/amd/amdk8/root_complex
+       device pci_domain 0 on
+           chip northbridge/amd/amdk8
+               device pci 18.0 on end #  device pci 18.0 
+               device pci 18.0 on 
+                       #  devices on link 1, link 1 == LDT 1 
+                       chip southbridge/amd/amd8131
+                               # the on/off keyword is mandatory
+                               device pci 0.0 on end
+                               device pci 0.1 on end
+                               device pci 1.0 on end
+                               device pci 1.1 on end
+                       end # 8131
+                       chip southbridge/amd/amd8111
+                               # this "device pci 0.0" is the parent the next one
+                               # PCI bridge
+                               device pci 0.0 on
+                                       device pci 0.0 on end
+                                       device pci 0.1 on end
+                                       device pci 0.2 off end
+                                       device pci 1.0 off end
+                                       #chip drivers/ati/ragexl
+                                       chip drivers/pci/onboard
+                                               device pci 4.0 on end
+                                               register "rom_address" = "0xfff80000"
+                                       end
+                               end
+                               device pci 1.0 on
+                                       chip superio/winbond/w83627hf
+                                               device pnp 2e.0 on #  Floppy
+                                                        io 0x60 = 0x3f0
+                                                        irq 0x70 = 6
+                                                        drq 0x74 = 2
+                                                end
+                                                device pnp 2e.1 off #  Parallel Port
+                                                        io 0x60 = 0x378
+                                                        irq 0x70 = 7
+                                                end
+                                                device pnp 2e.2 on #  Com1
+                                                        io 0x60 = 0x3f8
+                                                        irq 0x70 = 4
+                                                end
+                                                device pnp 2e.3 off #  Com2
+                                                        io 0x60 = 0x2f8
+                                                        irq 0x70 = 3
+                                                end
+                                                device pnp 2e.5 on #  Keyboard
+                                                        io 0x60 = 0x60
+                                                        io 0x62 = 0x64
+                                                        irq 0x70 = 1
+                                                        irq 0x72 = 12
+                                                end
+                                                device pnp 2e.6 off #  CIR
+                                                        io 0x60 = 0x100
+                                                end
+                                                device pnp 2e.7 off # GAME_MIDI_GIPO1
+                                                        io 0x60 = 0x201
+                                                        io 0x62 = 0x330
+                                                        irq 0x70 = 9
+                                                end
+                                                device pnp 2e.8 off end # GPIO2
+                                                device pnp 2e.9 off end # GPIO3
+                                                device pnp 2e.a off end #  ACPI
+                                                device pnp 2e.b on #  HW Monitor
+                                                        io 0x60 = 0x290
+                                                        irq 0x70 = 5
+                                                end
+                                       end
+                               end
+                               device pci 1.1 on end
+                               device pci 1.2 on end
+                               device pci 1.3 on 
+                                       chip drivers/generic/generic
+                                               #phillips pca9545 smbus mux
+                                               device i2c 70 on 
+                                                       # analog_devices adm1026        
+                                                       chip drivers/generic/generic
+                                                               device i2c 2c on end
+                                                       end
+                                               end
+                                               device i2c 70 on end
+                                               device i2c 70 on end
+                                               device i2c 70 on end
+                                       end
+#                                      chip drivers/generic/generic #dimm 0-0-0
+#                                              device i2c 50 on end
+#                                      end
+#                                      chip drivers/generic/generic #dimm 0-0-1
+#                                              device i2c 51 on end
+#                                      end 
+#                                      chip drivers/generic/generic #dimm 0-1-0
+#                                              device i2c 52 on end
+#                                      end 
+#                                      chip drivers/generic/generic #dimm 0-1-1
+#                                              device i2c 53 on end
+#                                      end 
+#                                      chip drivers/generic/generic #dimm 1-0-0
+#                                              device i2c 54 on end 
+#                                      end
+#                                      chip drivers/generic/generic #dimm 1-0-1
+#                                              device i2c 55 on end
+#                                      end 
+#                                      chip drivers/generic/generic #dimm 1-1-0
+#                                              device i2c 56 on end
+#                                      end 
+#                                      chip drivers/generic/generic #dimm 1-1-1
+#                                              device i2c 57 on end
+#                                      end 
+                               end
+                               device pci 1.5 off end
+                               device pci 1.6 on end
+                               register "ide0_enable" = "1"
+                               register "ide1_enable" = "1"
+                       end # 8111
+               end # LDT1
+               device pci 18.0 on end # LDT2
+               device pci 18.1 on end
+               device pci 18.2 on end
+               device pci 18.3 on end
+           end
+
+               chip northbridge/amd/amdk8
+                       device pci 19.0 on end # LDT0
+                       device pci 19.0 on end # LDT1
+                       device pci 19.0 on # LDT2
+                               chip southbridge/amd/amd8131
+                                       # the on/off keyword is mandatory
+                                       device pci 0.0 on end
+                                       device pci 0.1 on end
+                                       device pci 1.0 on end
+                                       device pci 1.1 on end
+                               end
+                               chip southbridge/amd/amd8131
+                                       # the on/off keyword is mandatory
+                                       device pci 0.0 on end
+                                       device pci 0.1 on end
+                                       device pci 1.0 on end
+                                       device pci 1.1 on end
+                               end
+                       end # LDT2
+                       device pci 19.1 on end
+                       device pci 19.2 on end
+                       device pci 19.3 on end
+               end
+
+                chip northbridge/amd/amdk8
+                        device pci 1a.0 on end
+                        device pci 1a.0 on end
+                        device pci 1a.0 on # LDT2
+                               chip southbridge/amd/amd8131
+                                       # the on/off keyword is mandatory
+                                       device pci 0.0 on end
+                                       device pci 0.1 on end
+                                       device pci 1.0 on end
+                                       device pci 1.1 on end
+                               end
+                               chip southbridge/amd/amd8131
+                                       # the on/off keyword is mandatory
+                                       device pci 0.0 on end
+                                       device pci 0.1 on end
+                                       device pci 1.0 on end
+                                       device pci 1.1 on end
+                               end
+
+                       end # LDT2
+                        device pci 1a.1 on end
+                        device pci 1a.2 on end
+                        device pci 1a.3 on end
+                end
+
+                chip northbridge/amd/amdk8
+                        device pci 1b.0 on end
+                        device pci 1b.0 on # LDT1
+                               chip southbridge/amd/amd8131
+                                       # the on/off keyword is mandatory
+                                       device pci 0.0 on end
+                                       device pci 0.1 on end
+                                       device pci 1.0 on end
+                                       device pci 1.1 on end
+                               end
+                               chip southbridge/amd/amd8131
+                                       # the on/off keyword is mandatory
+                                       device pci 0.0 on end
+                                       device pci 0.1 on end
+                                       device pci 1.0 on end
+                                       device pci 1.1 on end
+                               end
+
+                       end
+                        device pci 1b.0 on end
+                        device pci 1b.1 on end
+                        device pci 1b.2 on end
+                        device pci 1b.3 on end
+                end
+
+
+       end 
+       device apic_cluster 0 on
+               chip cpu/amd/socket_940
+                       device apic 0 on end
+               end
+               chip cpu/amd/socket_940
+                       device apic 1 on end
+               end
+               chip cpu/amd/socket_940
+                       device apic 2 on end
+               end
+               chip cpu/amd/socket_940
+                       device apic 3 on end
+               end
+
+       end
+end
+

diff --git a/src/mainboard/island/aruma/Options.lb b/src/mainboard/island/aruma/Options.lb
new file mode 100644 (file)
index 0000000..9a338c8
--- /dev/null
+++ b/src/mainboard/island/aruma/Options.lb
@@ -0,0 +1,227 @@
+uses HAVE_MP_TABLE
+uses HAVE_PIRQ_TABLE
+uses HAVE_ACPI_TABLES
+uses USE_FALLBACK_IMAGE
+uses HAVE_FALLBACK_BOOT
+uses HAVE_HARD_RESET
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
+uses IRQ_SLOT_COUNT
+uses HAVE_OPTION_TABLE
+uses CONFIG_MAX_CPUS
+uses CONFIG_IOAPIC
+uses CONFIG_SMP
+uses FALLBACK_SIZE
+uses ROM_SIZE
+uses ROM_SECTION_SIZE
+uses ROM_IMAGE_SIZE
+uses ROM_SECTION_SIZE
+uses ROM_SECTION_OFFSET
+uses CONFIG_ROM_STREAM
+uses CONFIG_ROM_STREAM_START
+uses PAYLOAD_SIZE
+uses _ROMBASE
+uses XIP_ROM_SIZE
+uses XIP_ROM_BASE
+uses STACK_SIZE
+uses HEAP_SIZE
+uses USE_OPTION_TABLE
+uses LB_CKS_RANGE_START
+uses LB_CKS_RANGE_END
+uses LB_CKS_LOC
+uses MAINBOARD
+uses MAINBOARD_PART_NUMBER
+uses MAINBOARD_VENDOR
+uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+uses LINUXBIOS_EXTRA_VERSION
+uses _RAMBASE
+uses CC
+uses HOSTCC
+uses TTYS0_BAUD
+uses TTYS0_BASE
+uses TTYS0_LCS
+uses DEFAULT_CONSOLE_LOGLEVEL
+uses MAXIMUM_CONSOLE_LOGLEVEL
+uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
+uses CONFIG_CONSOLE_SERIAL8250
+uses HAVE_INIT_TIMER
+uses CONFIG_GDB_STUB
+uses CONFIG_CONSOLE_VGA
+uses CONFIG_PCI_ROM_RUN
+
+###
+### Build options
+###
+
+##
+## ROM_SIZE is the size of boot ROM that this board will use.
+##
+default ROM_SIZE=524288
+
+##
+## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
+##
+#default FALLBACK_SIZE=131072
+# 256k
+default FALLBACK_SIZE=0x40000
+
+##
+## Build code for the fallback boot
+##
+default HAVE_FALLBACK_BOOT=1
+
+##
+## incoherent_ht.c does all the work. we don't want hard reset.
+##
+default HAVE_HARD_RESET=0
+
+##
+## Funky hard reset implementation
+## 
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=4
+default HARD_RESET_FUNCTION=0
+
+##
+## Build code to export a programmable irq routing table
+##
+default HAVE_PIRQ_TABLE=1
+default IRQ_SLOT_COUNT=23
+
+##
+## Build code to export an x86 MP table
+## Useful for specifying IRQ routing values
+##
+default HAVE_MP_TABLE=1
+default HAVE_ACPI_TABLES=1
+
+##
+## Build code to export a CMOS option table
+##
+default HAVE_OPTION_TABLE=1
+
+##
+## Move the default LinuxBIOS cmos range off of AMD RTC registers
+##
+default LB_CKS_RANGE_START=49
+default LB_CKS_RANGE_END=122
+default LB_CKS_LOC=123
+
+##
+## Build code for SMP support
+## Only worry about 2 micro processors
+##
+default CONFIG_SMP=1
+default CONFIG_MAX_CPUS=4
+default ALLOW_HT_OVERCLOCKING=1
+
+##
+## Build code to setup a generic IOAPIC
+##
+default CONFIG_IOAPIC=1
+
+##
+## Clean up the motherboard id strings
+##
+default MAINBOARD_PART_NUMBER="ARUMA"
+default MAINBOARD_VENDOR="ISLAND"
+default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1022
+default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x36c0
+
+
+###
+### LinuxBIOS layout values
+###
+
+## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
+default ROM_IMAGE_SIZE = 65536
+
+##
+## Use a small 8K stack
+##
+default STACK_SIZE=0x2000
+
+##
+## Use a 32K heap
+##
+default HEAP_SIZE=0x8000
+
+##
+## Only use the option table in a normal image
+##
+default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
+
+##
+## LinuxBIOS C code runs at this location in RAM
+##
+default _RAMBASE=0x00004000
+
+##
+## Load the payload from the ROM
+##
+default CONFIG_ROM_STREAM = 1
+
+###
+### Defaults of options that you may want to override in the target config file
+### 
+
+##
+## The default compiler
+##
+default CC="gcc -m32"
+default HOSTCC="gcc"
+
+##
+## The Serial Console
+##
+
+# To Enable the Serial Console
+default CONFIG_CONSOLE_SERIAL8250=1
+
+## Select the serial console baud rate
+#default TTYS0_BAUD=115200
+#default TTYS0_BAUD=57600
+#default TTYS0_BAUD=38400
+default TTYS0_BAUD=19200
+#default TTYS0_BAUD=9600
+#default TTYS0_BAUD=4800
+#default TTYS0_BAUD=2400
+#default TTYS0_BAUD=1200
+
+# Select the serial console base port
+default TTYS0_BASE=0x3f8
+
+# Select the serial protocol
+# This defaults to 8 data bits, 1 stop bit, and no parity
+default TTYS0_LCS=0x3
+
+##
+### Select the linuxBIOS loglevel
+##
+## EMERG      1   system is unusable               
+## ALERT      2   action must be taken immediately 
+## CRIT       3   critical conditions              
+## ERR        4   error conditions                 
+## WARNING    5   warning conditions               
+## NOTICE     6   normal but significant condition 
+## INFO       7   informational                    
+## DEBUG      8   debug-level messages             
+## SPEW       9   Way too many details             
+
+## Request this level of debugging output
+default  DEFAULT_CONSOLE_LOGLEVEL=8
+## At a maximum only compile in this level of debugging
+default  MAXIMUM_CONSOLE_LOGLEVEL=8
+
+##
+## Select power on after power fail setting
+default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
+
+#VGA
+default CONFIG_CONSOLE_VGA=1
+default CONFIG_PCI_ROM_RUN=1
+
+### End Options.lb
+end

diff --git a/src/mainboard/island/aruma/acpi_tables.c b/src/mainboard/island/aruma/acpi_tables.c
new file mode 100644 (file)
index 0000000..b5a7b88
--- /dev/null
+++ b/src/mainboard/island/aruma/acpi_tables.c
@@ -0,0 +1,130 @@
+/*
+ * Island Aruma ACPI support
+ * written by Stefan Reinauer <stepan@openbios.org>
+ *  (C) 2005 Stefan Reinauer
+ */
+
+#include <console/console.h>
+#include <string.h>
+#include <arch/acpi.h>
+#include <device/pci.h>
+
+extern unsigned char AmlCode[];
+extern unsigned char oem_config[];
+
+#define IO_APIC_ADDR   0xfec00000UL
+
+unsigned long acpi_dump_apics(unsigned long current)
+{
+       unsigned int gsi_base=0x18;
+       /* create all subtables for 4p */
+       /* CPUs are called 1234 in regular bios */
+       current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 16);
+       current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 17);
+       current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 2, 18);
+       current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 3, 19);
+       
+       /* Write 8111 IOAPIC */
+       current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, 1,
+                       IO_APIC_ADDR, 0);
+
+        /* Write all 8131 IOAPICs */
+        /* (8131: bus, dev, fn) , id, version */
+        ACPI_WRITE_MADT_IOAPIC(0x01,1,1, 2);
+        ACPI_WRITE_MADT_IOAPIC(0x01,2,1, 3);
+        ACPI_WRITE_MADT_IOAPIC(0x05,1,1, 4);
+        ACPI_WRITE_MADT_IOAPIC(0x05,2,1, 5);
+        ACPI_WRITE_MADT_IOAPIC(0x05,3,1, 6);
+        ACPI_WRITE_MADT_IOAPIC(0x05,4,1, 7);
+        ACPI_WRITE_MADT_IOAPIC(0x0c,1,1, 8);
+        ACPI_WRITE_MADT_IOAPIC(0x0c,2,1, 9);
+        ACPI_WRITE_MADT_IOAPIC(0x0c,3,1, 10);
+        ACPI_WRITE_MADT_IOAPIC(0x0c,4,1, 11);
+        ACPI_WRITE_MADT_IOAPIC(0x11,1,1, 12);
+        ACPI_WRITE_MADT_IOAPIC(0x11,2,1, 13);
+        ACPI_WRITE_MADT_IOAPIC(0x11,3,1, 14);
+        ACPI_WRITE_MADT_IOAPIC(0x11,4,1, 15);
+       
+       current += acpi_create_madt_irqoverride( (acpi_madt_irqoverride_t *)
+                       current, 1, 0, 2, 0 );
+
+       current += acpi_create_madt_irqoverride( (acpi_madt_irqoverride_t *)
+                       current, 1, 0, 2, 0 );
+
+       return current;
+}
+
+unsigned long write_acpi_tables(unsigned long start)
+{
+       unsigned long current;
+       acpi_rsdp_t *rsdp;
+       acpi_rsdt_t *rsdt;
+       acpi_hpet_t *hpet;
+       acpi_madt_t *madt;
+       acpi_fadt_t *fadt;
+       acpi_facs_t *facs;
+       acpi_header_t *dsdt;
+       acpi_header_t *oemb;
+       
+       /* Align ACPI tables to 16byte */
+       start   = ( start + 0x0f ) & -0x10;
+       current = start;
+       
+       printk_info("ACPI: Writing ACPI tables at %lx...\n", start);
+
+       /* We need at least an RSDP and an RSDT Table */
+       rsdp = (acpi_rsdp_t *) current;
+       current += sizeof(acpi_rsdp_t);
+       rsdt = (acpi_rsdt_t *) current;
+       current += sizeof(acpi_rsdt_t);
+
+       /* clear all table memory */
+       memset((void *)start, 0, current - start);
+       
+       acpi_write_rsdp(rsdp, rsdt);
+       acpi_write_rsdt(rsdt);
+       
+       /*
+        * We explicitly add these tables later on:
+        */
+       printk_debug("ACPI:    * HPET\n");
+
+       hpet = (acpi_hpet_t *) current;
+       current += sizeof(acpi_hpet_t);
+       acpi_create_hpet(hpet);
+       acpi_add_table(rsdt,hpet);
+
+       /* If we want to use HPET Timers Linux wants an MADT */
+       printk_debug("ACPI:    * MADT\n");
+
+       madt = (acpi_madt_t *) current;
+       acpi_create_madt(madt);
+       current+=madt->header.length;
+       acpi_add_table(rsdt,madt);
+
+       printk_debug("ACPI:    * FACS\n");
+       facs = (acpi_facs_t *) current;
+       current += sizeof(acpi_facs_t);
+       acpi_create_facs(facs);
+
+       dsdt = (acpi_header_t *)current;
+       current += ((acpi_header_t *)AmlCode)->length;
+       memcpy((void *)dsdt,(void *)AmlCode, \
+                       ((acpi_header_t *)AmlCode)->length);
+
+       /* recalculate checksum */
+       dsdt->checksum = 0;
+       dsdt->checksum = acpi_checksum(dsdt,dsdt->length);
+       printk_debug("ACPI:    * DSDT @ %08x Length %x\n",dsdt,dsdt->length);
+       printk_debug("ACPI:    * FADT\n");
+
+       fadt = (acpi_fadt_t *) current;
+       current += sizeof(acpi_fadt_t);
+
+       acpi_create_fadt(fadt,facs,dsdt);
+       acpi_add_table(rsdt,fadt);
+
+       printk_info("ACPI: done.\n");
+       return current;
+}
+

diff --git a/src/mainboard/island/aruma/auto.c b/src/mainboard/island/aruma/auto.c
new file mode 100644 (file)
index 0000000..1c904bc
--- /dev/null
+++ b/src/mainboard/island/aruma/auto.c
@@ -0,0 +1,203 @@
+#define ASSEMBLY 1
+#define ENABLE_APIC_EXT_ID 1
+#define APIC_ID_OFFSET 0x10
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <arch/io.h>
+#include <device/pnp_def.h>
+#include <arch/romcc_io.h>
+#include <cpu/x86/lapic.h>
+#include <arch/cpu.h>
+#include "option_table.h"
+#include "pc80/mc146818rtc_early.c"
+#include "pc80/serial.c"
+#include "arch/i386/lib/console.c"
+#include "ram/ramtest.c"
+#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
+#include "northbridge/amd/amdk8/raminit.h"
+#include "cpu/amd/model_fxx/apic_timer.c"
+#include "lib/delay.c"
+#include "cpu/x86/lapic/boot_cpu.c"
+#include "northbridge/amd/amdk8/reset_test.c"
+#include "northbridge/amd/amdk8/debug.c"
+#include "northbridge/amd/amdk8/incoherent_ht.c"
+#include "northbridge/amd/amdk8/cpu_rev.c"
+#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
+#include "cpu/amd/mtrr/amd_earlymtrr.c"
+#include "cpu/x86/bist.h"
+
+#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
+
+static void hard_reset(void)
+{
+       set_bios_reset();
+       pci_write_config8(PCI_DEV(0, 0x04, 3), 0x41, 0xf1);
+       outb(0x0e, 0x0cf9);
+}
+
+static void soft_reset(void)
+{
+       set_bios_reset();
+       pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1);
+}
+
+/*
+ * GPIO28 of 8111 will control H0_MEMRESET_L
+ * GPIO29 of 8111 will control H1_MEMRESET_L
+ */
+static void memreset_setup(void)
+{
+       if (is_cpu_pre_c0()) {
+               /* Set the memreset low */
+               outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 
+                               SMBUS_IO_BASE + 0xc0 + 28);
+               /* Ensure the BIOS has control of the memory lines */
+               outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0),
+                               SMBUS_IO_BASE + 0xc0 + 29);
+       } else {
+               /* Ensure the CPU has controll of the memory lines */
+               outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0),
+                               SMBUS_IO_BASE + 0xc0 + 29);
+       }
+}
+
+static void memreset(int controllers, const struct mem_controller *ctrl)
+{
+       if (is_cpu_pre_c0()) {
+               udelay(800);
+               /* Set memreset_high */
+               outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 
+                               SMBUS_IO_BASE + 0xc0 + 28);
+               udelay(90);
+       }
+}
+
+static inline void activate_spd_rom(const struct mem_controller *ctrl)
+{
+#define SMBUS_SWITCH1 0x71
+#define SMBUS_SWITCH2 0x73
+       /* Switch 1: pca 9545, Switch 2: pca 9543 */
+       unsigned device = (ctrl->channel0[0]) >> 8;
+       /* Disable all outputs on SMBus switch 1 */
+       smbus_send_byte(SMBUS_SWITCH1, 0x0);
+       /* Select SMBus switch 2 Channel 0/1 */
+       smbus_send_byte(SMBUS_SWITCH2, device);
+}
+
+static inline int spd_read_byte(unsigned device, unsigned address)
+{
+       return smbus_read_byte(device, address);
+}
+
+#include "northbridge/amd/amdk8/raminit.c"
+#include "northbridge/amd/amdk8/coherent_ht.c"
+#include "sdram/generic_sdram.c"
+#include "resourcemap.c"
+
+#define CHAN0 0x100
+#define CHAN1 0x200
+
+#define NODE_RAM(x)                    \
+       .node_id = 0+x,                 \
+       .f0 = PCI_DEV(0, 0x18+x, 0),    \
+       .f1 = PCI_DEV(0, 0x18+x, 1),    \
+       .f2 = PCI_DEV(0, 0x18+x, 2),    \
+       .f3 = PCI_DEV(0, 0x18+x, 3)
+
+static void main(unsigned long bist)
+{
+       static const struct mem_controller cpu[] = {
+       {        NODE_RAM(0),
+               .channel0 = { (0xa0>>1)|CHAN0, (0xa4>>1)|CHAN0, 0, 0 },
+               .channel1 = { (0xa2>>1)|CHAN0, (0xa6>>1)|CHAN0, 0, 0 } 
+       },
+       {       NODE_RAM(1),
+               .channel0 = { (0xa8>>1)|CHAN0, (0xac>>1)|CHAN0, 0, 0 },
+               .channel1 = { (0xaa>>1)|CHAN0, (0xae>>1)|CHAN0, 0, 0 }
+       },
+       {       NODE_RAM(2),
+               .channel0 = { (0xa0>>1)|CHAN1, (0xa4>>1)|CHAN1, 0, 0 },
+               .channel1 = { (0xa2>>1)|CHAN1, (0xa6>>1)|CHAN1, 0, 0 }
+       },
+       {       NODE_RAM(3),
+               .channel0 = { (0xa8>>1)|CHAN1, (0xac>>1)|CHAN1, 0, 0 },
+               .channel1 = { (0xaa>>1)|CHAN1, (0xae>>1)|CHAN1, 0, 0 }
+       } };
+
+       int needs_reset;
+
+       if (bist == 0) {
+               unsigned nodeid;
+               
+               /* Skip this if there was a built in self test failure */
+               amd_early_mtrr_init();
+               enable_lapic();
+               init_timer();
+
+               nodeid=lapicid() & 0xf;
+
+               
+#if ENABLE_APIC_EXT_ID == 1
+                enable_apic_ext_id(nodeid);
+                if(nodeid != 0) {
+                       /* CPU apicid is from 0x10 */
+                        lapic_write(LAPIC_ID, ( lapic_read(LAPIC_ID)
+                                               | (APIC_ID_OFFSET<<24) ) ); 
+                }
+#endif
+               if (cpu_init_detected(nodeid)) {
+                       asm volatile ("jmp __cpu_reset");
+               }
+               distinguish_cpu_resets(nodeid);
+               if (!boot_cpu()) {
+                       stop_this_cpu();
+               }
+       }
+       /* Setup the console */
+       w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
+       uart_init();
+       console_init();
+
+       /* Halt if there was a built in self test failure */
+       report_bist_failure(bist);
+
+       setup_aruma_resource_map();
+       needs_reset = setup_coherent_ht_domain();
+       needs_reset=ht_setup_chains_x();
+
+#if 0
+       dump_pci_devices();
+#endif
+#if 0
+        print_pci_devices();
+#endif
+       
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
+       if(read_option(CMOS_VSTART_amdk8_1GHz, CMOS_VLEN_amdk8_1GHz, 0)) 
+       {
+               print_debug("AMDK8 allowed at 1GHz\r\n");
+       } else {
+               print_debug("AMDK8 allowed at 800Hz only\r\n");
+       }
+       if(read_option(CMOS_VSTART_amd8131_800MHz, CMOS_VLEN_amd8131_800MHz, 0))
+       {
+               print_debug("AMD8131 allowed at 800MHz\r\n");
+       } else {
+               print_debug("AMD8131 allowed at 600Hz only\r\n");
+       }
+#endif
+       if (needs_reset) {
+               print_info("HyperT reset -\r\n");
+               soft_reset();
+       }
+
+       enable_smbus();
+
+       memreset_setup();
+       sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
+
+#if 0
+       /* Check the first 1M */
+       ram_check(0x00000000, 0x000100000);
+#endif
+}

diff --git a/src/mainboard/island/aruma/chip.h b/src/mainboard/island/aruma/chip.h
new file mode 100644 (file)
index 0000000..16e9116
--- /dev/null
+++ b/src/mainboard/island/aruma/chip.h
@@ -0,0 +1,5 @@
+extern struct chip_operations mainboard_island_aruma_ops;
+
+struct mainboard_island_aruma_config {
+       int nothing;
+};

diff --git a/src/mainboard/island/aruma/cmos.layout b/src/mainboard/island/aruma/cmos.layout
new file mode 100644 (file)
index 0000000..d0b05a9
--- /dev/null
+++ b/src/mainboard/island/aruma/cmos.layout
@@ -0,0 +1,101 @@
+entries
+
+#start-bit length  config config-ID    name
+#0            8       r       0        seconds
+#8            8       r       0        alarm_seconds
+#16           8       r       0        minutes
+#24           8       r       0        alarm_minutes
+#32           8       r       0        hours
+#40           8       r       0        alarm_hours
+#48           8       r       0        day_of_week
+#56           8       r       0        day_of_month
+#64           8       r       0        month
+#72           8       r       0        year
+#80           4       r       0        rate_select
+#84           3       r       0        REF_Clock
+#87           1       r       0        UIP
+#88           1       r       0        auto_switch_DST
+#89           1       r       0        24_hour_mode
+#90           1       r       0        binary_values_enable
+#91           1       r       0        square-wave_out_enable
+#92           1       r       0        update_finished_enable
+#93           1       r       0        alarm_interrupt_enable
+#94           1       r       0        periodic_interrupt_enable
+#95           1       r       0        disable_clock_updates
+#96         288       r       0        temporary_filler
+0          384       r       0        reserved_memory
+384          1       e       4        boot_option
+385          1       e       4        last_boot
+386          1       e       1        ECC_memory
+388          4       r       0        reboot_bits
+392          3       e       5        baud_rate
+395          1       e       1        hw_scrubber
+396          1       e       1        interleave_chip_selects
+397          2       e       8        max_mem_clock
+400          1       e       1        power_on_after_fail
+412          4       e       6        debug_level
+416          4       e       7        boot_first
+420          4       e       7        boot_second
+424          4       e       7        boot_third
+428          4       h       0        boot_index
+432         8       h       0        boot_countdown
+440          4       e       9        slow_cpu
+444          1       e       1        nmi
+445          1       e       1        iommu
+# These two can be used to control link speeds. byte 56
+449          1       e       1        amdk8_1GHz
+450          1       e       1        amd8131_800MHz
+#
+728        256       h       0        user_data
+984         16       h       0        check_sum
+# Reserve the extended AMD configuration registers
+1000        24       r       0        reserved_memory
+
+
+
+enumerations
+
+#ID value   text
+1     0     Disable
+1     1     Enable
+2     0     Enable
+2     1     Disable
+4     0     Fallback
+4     1     Normal
+5     0     115200
+5     1     57600
+5     2     38400
+5     3     19200
+5     4     9600
+5     5     4800
+5     6     2400
+5     7     1200
+6     6     Notice
+6     7     Info
+6     8     Debug
+6     9     Spew
+7     0     Network
+7     1     HDD
+7     2     Floppy
+7     8     Fallback_Network
+7     9     Fallback_HDD
+7     10    Fallback_Floppy
+#7     3     ROM
+8     0     200Mhz
+8     1     166Mhz
+8     2     133Mhz
+8     3     100Mhz
+9     0     off
+9     1     87.5%
+9     2     75.0%
+9     3     62.5%
+9     4     50.0%
+9     5     37.5%
+9     6     25.0%
+9     7     12.5%
+
+checksums
+
+checksum 392 983 984
+
+

diff --git a/src/mainboard/island/aruma/dsdt.c b/src/mainboard/island/aruma/dsdt.c
new file mode 100644 (file)
index 0000000..c71949f
--- /dev/null
+++ b/src/mainboard/island/aruma/dsdt.c
@@ -0,0 +1,1976 @@
+/*
+ * 
+ * Intel ACPI Component Architecture
+ * ASL Optimizing Compiler / AML Disassembler version 20040220 [May  7 2004]
+ * Copyright (C) 2000 - 2004 Intel Corporation
+ * Supports ACPI Specification Revision 2.0c
+ * 
+ * Compilation of "latest-dsdt.dsl" - Wed Jan 26 10:24:10 2005
+ * 
+ * C source code output
+ *
+ */
+unsigned char AmlCode[] = 
+{
+    0x44,0x53,0x44,0x54,0x40,0x3D,0x00,0x00,  /* 00000000    "DSDT@=.." */
+    0x01,0x06,0x4C,0x58,0x42,0x49,0x4F,0x53,  /* 00000008    "..LXBIOS" */
+    0x4C,0x58,0x42,0x49,0x4F,0x53,0x00,0x00,  /* 00000010    "LXBIOS.." */
+    0x17,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C,  /* 00000018    "....INTL" */
+    0x20,0x02,0x04,0x20,0x08,0x53,0x53,0x31,  /* 00000020    " .. .SS1" */
+    0x5F,0x01,0x08,0x53,0x53,0x32,0x5F,0x00,  /* 00000028    "_..SS2_." */
+    0x08,0x53,0x53,0x33,0x5F,0x00,0x08,0x53,  /* 00000030    ".SS3_..S" */
+    0x53,0x34,0x5F,0x01,0x08,0x4D,0x47,0x31,  /* 00000038    "S4_..MG1" */
+    0x42,0x00,0x08,0x4D,0x47,0x31,0x4C,0x00,  /* 00000040    "B..MG1L." */
+    0x08,0x4D,0x47,0x32,0x42,0x0C,0x00,0x00,  /* 00000048    ".MG2B..." */
+    0x00,0xAE,0x08,0x4D,0x47,0x32,0x4C,0x0C,  /* 00000050    "...MG2L." */
+    0x00,0x00,0x00,0x52,0x08,0x4D,0x47,0x33,  /* 00000058    "...R.MG3" */
+    0x42,0x0C,0x00,0x00,0x00,0xB1,0x08,0x4D,  /* 00000060    "B......M" */
+    0x47,0x33,0x4C,0x0C,0x00,0x00,0xC0,0x00,  /* 00000068    "G3L....." */
+    0x08,0x4D,0x47,0x34,0x42,0x0C,0x00,0x00,  /* 00000070    ".MG4B..." */
+    0xC0,0xB1,0x08,0x4D,0x47,0x34,0x4C,0x0C,  /* 00000078    "...MG4L." */
+    0x00,0x00,0x80,0x02,0x08,0x4D,0x47,0x35,  /* 00000080    ".....MG5" */
+    0x42,0x0C,0x00,0x00,0x40,0xB4,0x08,0x4D,  /* 00000088    "B...@..M" */
+    0x47,0x35,0x4C,0x0C,0x00,0x00,0x80,0x4A,  /* 00000090    "G5L....J" */
+    0x08,0x56,0x47,0x41,0x4F,0x00,0x08,0x53,  /* 00000098    ".VGAO..S" */
+    0x45,0x42,0x31,0x0A,0x05,0x08,0x53,0x55,  /* 000000A0    "EB1...SU" */
+    0x42,0x31,0x0A,0x0B,0x08,0x53,0x45,0x42,  /* 000000A8    "B1...SEB" */
+    0x32,0x0A,0x0C,0x08,0x53,0x55,0x42,0x32,  /* 000000B0    "2...SUB2" */
+    0x0A,0x10,0x08,0x53,0x45,0x42,0x33,0x0A,  /* 000000B8    "...SEB3." */
+    0x11,0x08,0x53,0x55,0x42,0x33,0x0A,0x15,  /* 000000C0    "..SUB3.." */
+    0x08,0x49,0x4F,0x42,0x30,0x0B,0x00,0xA0,  /* 000000C8    ".IOB0..." */
+    0x08,0x49,0x4F,0x4C,0x30,0x0B,0x00,0x10,  /* 000000D0    ".IOL0..." */
+    0x08,0x49,0x4F,0x42,0x31,0x0B,0x00,0xB0,  /* 000000D8    ".IOB1..." */
+    0x08,0x49,0x4F,0x4C,0x31,0x0B,0x00,0x20,  /* 000000E0    ".IOL1.. " */
+    0x08,0x49,0x4F,0x42,0x32,0x00,0x08,0x49,  /* 000000E8    ".IOB2..I" */
+    0x4F,0x4C,0x32,0x00,0x08,0x49,0x4F,0x42,  /* 000000F0    "OL2..IOB" */
+    0x33,0x00,0x08,0x49,0x4F,0x4C,0x33,0x00,  /* 000000F8    "3..IOL3." */
+    0x08,0x49,0x4F,0x53,0x54,0x0A,0x0B,0x08,  /* 00000100    ".IOST..." */
+    0x52,0x4F,0x4D,0x53,0x0C,0x00,0x00,0xF8,  /* 00000108    "ROMS...." */
+    0xFF,0x08,0x53,0x50,0x49,0x4F,0x0A,0x2E,  /* 00000110    "..SPIO.." */
+    0x08,0x49,0x4F,0x31,0x42,0x0B,0x80,0x06,  /* 00000118    ".IO1B..." */
+    0x08,0x49,0x4F,0x31,0x4C,0x0A,0x80,0x08,  /* 00000120    ".IO1L..." */
+    0x50,0x4D,0x42,0x53,0x0B,0x00,0x50,0x08,  /* 00000128    "PMBS..P." */
+    0x50,0x4D,0x4C,0x4E,0x0A,0xC0,0x08,0x47,  /* 00000130    "PMLN...G" */
+    0x50,0x42,0x53,0x0B,0xC0,0x50,0x08,0x47,  /* 00000138    "PBS..P.G" */
+    0x50,0x4C,0x4E,0x0A,0x20,0x08,0x53,0x4D,  /* 00000140    "PLN. .SM" */
+    0x42,0x53,0x0B,0xE0,0x50,0x08,0x53,0x4D,  /* 00000148    "BS..P.SM" */
+    0x42,0x4C,0x0A,0x20,0x08,0x41,0x50,0x43,  /* 00000150    "BL. .APC" */
+    0x42,0x0C,0x00,0x00,0xC0,0xFE,0x08,0x41,  /* 00000158    "B......A" */
+    0x50,0x43,0x4C,0x0B,0x00,0x10,0x14,0x0F,  /* 00000160    "PCL....." */
+    0x52,0x52,0x49,0x4F,0x04,0x70,0x0D,0x52,  /* 00000168    "RRIO.p.R" */
+    0x52,0x49,0x4F,0x00,0x5B,0x31,0x14,0x0F,  /* 00000170    "RIO.[1.." */
+    0x52,0x44,0x4D,0x41,0x03,0x70,0x0D,0x72,  /* 00000178    "RDMA.p.r" */
+    0x44,0x4D,0x41,0x00,0x5B,0x31,0x08,0x50,  /* 00000180    "DMA.[1.P" */
+    0x49,0x43,0x4D,0x00,0x14,0x48,0x04,0x5F,  /* 00000188    "ICM..H._" */
+    0x50,0x49,0x43,0x01,0xA0,0x09,0x68,0x70,  /* 00000190    "PIC...hp" */
+    0x0A,0xAA,0x44,0x42,0x47,0x38,0xA1,0x08,  /* 00000198    "..DBG8.." */
+    0x70,0x0A,0x55,0x44,0x42,0x47,0x38,0x5C,  /* 000001A0    "p.UDBG8\" */
+    0x2F,0x04,0x5F,0x53,0x42,0x5F,0x50,0x43,  /* 000001A8    "/._SB_PC" */
+    0x49,0x41,0x47,0x4F,0x4C,0x41,0x50,0x43,  /* 000001B0    "IAGOLAPC" */
+    0x4D,0x5F,0x68,0x5C,0x2F,0x04,0x5F,0x53,  /* 000001B8    "M_h\/._S" */
+    0x42,0x5F,0x50,0x43,0x49,0x41,0x47,0x4F,  /* 000001C0    "B_PCIAGO" */
+    0x4C,0x42,0x50,0x43,0x4D,0x5F,0x68,0x70,  /* 000001C8    "LBPCM_hp" */
+    0x68,0x50,0x49,0x43,0x4D,0x08,0x4F,0x53,  /* 000001D0    "hPICM.OS" */
+    0x56,0x52,0xFF,0x14,0x1F,0x4F,0x53,0x46,  /* 000001D8    "VR...OSF" */
+    0x4C,0x00,0xA0,0x0D,0x92,0x93,0x4F,0x53,  /* 000001E0    "L.....OS" */
+    0x56,0x52,0xFF,0xA4,0x4F,0x53,0x56,0x52,  /* 000001E8    "VR..OSVR" */
+    0x70,0x01,0x4F,0x53,0x56,0x52,0xA4,0x4F,  /* 000001F0    "p.OSVR.O" */
+    0x53,0x56,0x52,0x14,0x4E,0x04,0x4D,0x43,  /* 000001F8    "SVR.N.MC" */
+    0x54,0x48,0x02,0xA0,0x08,0x95,0x87,0x68,  /* 00000200    "TH.....h" */
+    0x87,0x69,0xA4,0x00,0x72,0x87,0x68,0x01,  /* 00000208    ".i..r.h." */
+    0x60,0x08,0x42,0x55,0x46,0x30,0x11,0x02,  /* 00000210    "`.BUF0.." */
+    0x60,0x08,0x42,0x55,0x46,0x31,0x11,0x02,  /* 00000218    "`.BUF1.." */
+    0x60,0x70,0x68,0x42,0x55,0x46,0x30,0x70,  /* 00000220    "`phBUF0p" */
+    0x69,0x42,0x55,0x46,0x31,0xA2,0x1A,0x60,  /* 00000228    "iBUF1..`" */
+    0x76,0x60,0xA0,0x15,0x92,0x93,0x83,0x88,  /* 00000230    "v`......" */
+    0x42,0x55,0x46,0x30,0x60,0x00,0x83,0x88,  /* 00000238    "BUF0`..." */
+    0x42,0x55,0x46,0x31,0x60,0x00,0xA4,0x00,  /* 00000240    "BUF1`..." */
+    0xA4,0x01,0x14,0x49,0x08,0x47,0x50,0x52,  /* 00000248    "...I.GPR" */
+    0x57,0x02,0x08,0x50,0x52,0x57,0x50,0x12,  /* 00000250    "W..PRWP." */
+    0x04,0x02,0x00,0x00,0x70,0x68,0x88,0x50,  /* 00000258    "....ph.P" */
+    0x52,0x57,0x50,0x00,0x00,0x70,0x69,0x88,  /* 00000260    "RWP..pi." */
+    0x50,0x52,0x57,0x50,0x01,0x00,0x70,0x00,  /* 00000268    "PRWP..p." */
+    0x60,0x7D,0x60,0x79,0x53,0x53,0x31,0x5F,  /* 00000270    "`}`ySS1_" */
+    0x01,0x00,0x60,0x7D,0x60,0x79,0x53,0x53,  /* 00000278    "..`}`ySS" */
+    0x32,0x5F,0x0A,0x02,0x00,0x60,0x7D,0x60,  /* 00000280    "2_...`}`" */
+    0x79,0x53,0x53,0x33,0x5F,0x0A,0x03,0x00,  /* 00000288    "ySS3_..." */
+    0x60,0x7D,0x60,0x79,0x53,0x53,0x34,0x5F,  /* 00000290    "`}`ySS4_" */
+    0x0A,0x04,0x00,0x60,0xA0,0x08,0x7B,0x79,  /* 00000298    "...`..{y" */
+    0x01,0x69,0x00,0x60,0x00,0xA1,0x29,0x7A,  /* 000002A0    ".i.`..)z" */
+    0x60,0x01,0x60,0xA0,0x18,0x91,0x93,0x4F,  /* 000002A8    "`.`....O" */
+    0x53,0x46,0x4C,0x01,0x93,0x4F,0x53,0x46,  /* 000002B0    "SFL..OSF" */
+    0x4C,0x0A,0x02,0x81,0x60,0x88,0x50,0x52,  /* 000002B8    "L...`.PR" */
+    0x57,0x50,0x01,0x00,0xA1,0x0A,0x82,0x60,  /* 000002C0    "WP.....`" */
+    0x88,0x50,0x52,0x57,0x50,0x01,0x00,0xA4,  /* 000002C8    ".PRWP..." */
+    0x50,0x52,0x57,0x50,0x08,0x57,0x41,0x4B,  /* 000002D0    "PRWP.WAK" */
+    0x50,0x12,0x04,0x02,0x00,0x00,0x5B,0x80,  /* 000002D8    "P.....[." */
+    0x44,0x45,0x42,0x30,0x01,0x0A,0x80,0x01,  /* 000002E0    "DEB0...." */
+    0x5B,0x81,0x0B,0x44,0x45,0x42,0x30,0x01,  /* 000002E8    "[..DEB0." */
+    0x44,0x42,0x47,0x38,0x08,0x5B,0x80,0x44,  /* 000002F0    "DBG8.[.D" */
+    0x45,0x42,0x31,0x01,0x0A,0x90,0x0A,0x02,  /* 000002F8    "EB1....." */
+    0x5B,0x81,0x0B,0x44,0x45,0x42,0x31,0x02,  /* 00000300    "[..DEB1." */
+    0x44,0x42,0x47,0x39,0x10,0x10,0x39,0x5F,  /* 00000308    "DBG9..9_" */
+    0x50,0x52,0x5F,0x5B,0x83,0x0B,0x43,0x50,  /* 00000310    "PR_[..CP" */
+    0x55,0x31,0x01,0x00,0x00,0x00,0x00,0x00,  /* 00000318    "U1......" */
+    0x5B,0x83,0x0B,0x43,0x50,0x55,0x32,0x02,  /* 00000320    "[..CPU2." */
+    0x00,0x00,0x00,0x00,0x00,0x5B,0x83,0x0B,  /* 00000328    ".....[.." */
+    0x43,0x50,0x55,0x33,0x03,0x00,0x00,0x00,  /* 00000330    "CPU3...." */
+    0x00,0x00,0x5B,0x83,0x0B,0x43,0x50,0x55,  /* 00000338    "..[..CPU" */
+    0x34,0x04,0x00,0x00,0x00,0x00,0x00,0x10,  /* 00000340    "4......." */
+    0x89,0x79,0x02,0x5F,0x53,0x42,0x5F,0x08,  /* 00000348    ".y._SB_." */
+    0x50,0x52,0x30,0x30,0x12,0x3C,0x04,0x12,  /* 00000350    "PR00.<.." */
+    0x0D,0x04,0x0C,0xFF,0xFF,0x07,0x00,0x00,  /* 00000358    "........" */
+    0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0D,0x04,  /* 00000360    "LNKA...." */
+    0x0C,0xFF,0xFF,0x07,0x00,0x01,0x4C,0x4E,  /* 00000368    "......LN" */
+    0x4B,0x42,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 00000370    "KB......" */
+    0xFF,0x07,0x00,0x0A,0x02,0x4C,0x4E,0x4B,  /* 00000378    ".....LNK" */
+    0x43,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 00000380    "C......." */
+    0x07,0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x44,  /* 00000388    "....LNKD" */
+    0x00,0x08,0x41,0x52,0x30,0x30,0x12,0x34,  /* 00000390    "..AR00.4" */
+    0x04,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x07,  /* 00000398    "........" */
+    0x00,0x00,0x00,0x0A,0x10,0x12,0x0B,0x04,  /* 000003A0    "........" */
+    0x0C,0xFF,0xFF,0x07,0x00,0x01,0x00,0x0A,  /* 000003A8    "........" */
+    0x11,0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x07,  /* 000003B0    "........" */
+    0x00,0x0A,0x02,0x00,0x0A,0x12,0x12,0x0C,  /* 000003B8    "........" */
+    0x04,0x0C,0xFF,0xFF,0x07,0x00,0x0A,0x03,  /* 000003C0    "........" */
+    0x00,0x0A,0x13,0x08,0x50,0x52,0x30,0x31,  /* 000003C8    "....PR01" */
+    0x12,0x2B,0x03,0x12,0x0C,0x04,0x0B,0xFF,  /* 000003D0    ".+......" */
+    0xFF,0x0A,0x03,0x4C,0x4E,0x4B,0x44,0x00,  /* 000003D8    "...LNKD." */
+    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x04,0x00,  /* 000003E0    "........" */
+    0x00,0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0D,  /* 000003E8    ".LNKA..." */
+    0x04,0x0C,0xFF,0xFF,0x05,0x00,0x00,0x4C,  /* 000003F0    ".......L" */
+    0x4E,0x4B,0x42,0x00,0x08,0x41,0x52,0x30,  /* 000003F8    "NKB..AR0" */
+    0x31,0x12,0x25,0x03,0x12,0x0A,0x04,0x0B,  /* 00000400    "1.%....." */
+    0xFF,0xFF,0x0A,0x03,0x00,0x0A,0x13,0x12,  /* 00000408    "........" */
+    0x0B,0x04,0x0C,0xFF,0xFF,0x04,0x00,0x00,  /* 00000410    "........" */
+    0x00,0x0A,0x10,0x12,0x0B,0x04,0x0C,0xFF,  /* 00000418    "........" */
+    0xFF,0x05,0x00,0x00,0x00,0x0A,0x11,0x08,  /* 00000420    "........" */
+    0x50,0x52,0x35,0x32,0x12,0x49,0x05,0x06,  /* 00000428    "PR52.I.." */
+    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 00000430    "........" */
+    0x00,0x4C,0x4E,0x4B,0x42,0x00,0x12,0x0D,  /* 00000438    ".LNKB..." */
+    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x01,0x4C,  /* 00000440    ".......L" */
+    0x4E,0x4B,0x43,0x00,0x12,0x0E,0x04,0x0C,  /* 00000448    "NKC....." */
+    0xFF,0xFF,0x01,0x00,0x0A,0x02,0x4C,0x4E,  /* 00000450    "......LN" */
+    0x4B,0x44,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 00000458    "KD......" */
+    0xFF,0x01,0x00,0x0A,0x03,0x4C,0x4E,0x4B,  /* 00000460    ".....LNK" */
+    0x41,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 00000468    "A......." */
+    0x02,0x00,0x00,0x4C,0x4E,0x4B,0x43,0x00,  /* 00000470    "...LNKC." */
+    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x02,0x00,  /* 00000478    "........" */
+    0x01,0x4C,0x4E,0x4B,0x44,0x00,0x08,0x41,  /* 00000480    ".LNKD..A" */
+    0x52,0x35,0x32,0x12,0x4D,0x04,0x06,0x12,  /* 00000488    "R52.M..." */
+    0x0B,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,  /* 00000490    "........" */
+    0x00,0x0A,0x21,0x12,0x0B,0x04,0x0C,0xFF,  /* 00000498    "..!....." */
+    0xFF,0x01,0x00,0x01,0x00,0x0A,0x22,0x12,  /* 000004A0    "......"." */
+    0x0C,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,  /* 000004A8    "........" */
+    0x02,0x00,0x0A,0x23,0x12,0x0C,0x04,0x0C,  /* 000004B0    "...#...." */
+    0xFF,0xFF,0x01,0x00,0x0A,0x03,0x00,0x0A,  /* 000004B8    "........" */
+    0x20,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x02,  /* 000004C0    " ......." */
+    0x00,0x00,0x00,0x0A,0x22,0x12,0x0B,0x04,  /* 000004C8    "...."..." */
+    0x0C,0xFF,0xFF,0x02,0x00,0x01,0x00,0x0A,  /* 000004D0    "........" */
+    0x23,0x08,0x50,0x52,0x35,0x33,0x12,0x49,  /* 000004D8    "#.PR53.I" */
+    0x05,0x06,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 000004E0    "........" */
+    0x01,0x00,0x00,0x4C,0x4E,0x4B,0x42,0x00,  /* 000004E8    "...LNKB." */
+    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 000004F0    "........" */
+    0x01,0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0E,  /* 000004F8    ".LNKC..." */
+    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x02,  /* 00000500    "........" */
+    0x4C,0x4E,0x4B,0x44,0x00,0x12,0x0E,0x04,  /* 00000508    "LNKD...." */
+    0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x03,0x4C,  /* 00000510    ".......L" */
+    0x4E,0x4B,0x41,0x00,0x12,0x0D,0x04,0x0C,  /* 00000518    "NKA....." */
+    0xFF,0xFF,0x02,0x00,0x00,0x4C,0x4E,0x4B,  /* 00000520    ".....LNK" */
+    0x43,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 00000528    "C......." */
+    0x02,0x00,0x01,0x4C,0x4E,0x4B,0x44,0x00,  /* 00000530    "...LNKD." */
+    0x08,0x41,0x52,0x35,0x33,0x12,0x4D,0x04,  /* 00000538    ".AR53.M." */
+    0x06,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000540    "........" */
+    0x00,0x00,0x00,0x0A,0x25,0x12,0x0B,0x04,  /* 00000548    "....%..." */
+    0x0C,0xFF,0xFF,0x01,0x00,0x01,0x00,0x0A,  /* 00000550    "........" */
+    0x26,0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000558    "&......." */
+    0x00,0x0A,0x02,0x00,0x0A,0x27,0x12,0x0C,  /* 00000560    ".....'.." */
+    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x03,  /* 00000568    "........" */
+    0x00,0x0A,0x24,0x12,0x0B,0x04,0x0C,0xFF,  /* 00000570    "..$....." */
+    0xFF,0x02,0x00,0x00,0x00,0x0A,0x26,0x12,  /* 00000578    "......&." */
+    0x0B,0x04,0x0C,0xFF,0xFF,0x02,0x00,0x01,  /* 00000580    "........" */
+    0x00,0x0A,0x27,0x08,0x50,0x52,0x35,0x34,  /* 00000588    "..'.PR54" */
+    0x12,0x49,0x05,0x06,0x12,0x0D,0x04,0x0C,  /* 00000590    ".I......" */
+    0xFF,0xFF,0x01,0x00,0x00,0x4C,0x4E,0x4B,  /* 00000598    ".....LNK" */
+    0x42,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 000005A0    "B......." */
+    0x01,0x00,0x01,0x4C,0x4E,0x4B,0x43,0x00,  /* 000005A8    "...LNKC." */
+    0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 000005B0    "........" */
+    0x0A,0x02,0x4C,0x4E,0x4B,0x44,0x00,0x12,  /* 000005B8    "..LNKD.." */
+    0x0E,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,  /* 000005C0    "........" */
+    0x03,0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0D,  /* 000005C8    ".LNKA..." */
+    0x04,0x0C,0xFF,0xFF,0x02,0x00,0x00,0x4C,  /* 000005D0    ".......L" */
+    0x4E,0x4B,0x43,0x00,0x12,0x0D,0x04,0x0C,  /* 000005D8    "NKC....." */
+    0xFF,0xFF,0x02,0x00,0x01,0x4C,0x4E,0x4B,  /* 000005E0    ".....LNK" */
+    0x44,0x00,0x08,0x41,0x52,0x35,0x34,0x12,  /* 000005E8    "D..AR54." */
+    0x4D,0x04,0x06,0x12,0x0B,0x04,0x0C,0xFF,  /* 000005F0    "M......." */
+    0xFF,0x01,0x00,0x00,0x00,0x0A,0x29,0x12,  /* 000005F8    "......)." */
+    0x0B,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x01,  /* 00000600    "........" */
+    0x00,0x0A,0x2A,0x12,0x0C,0x04,0x0C,0xFF,  /* 00000608    "..*....." */
+    0xFF,0x01,0x00,0x0A,0x02,0x00,0x0A,0x2B,  /* 00000610    ".......+" */
+    0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 00000618    "........" */
+    0x0A,0x03,0x00,0x0A,0x28,0x12,0x0B,0x04,  /* 00000620    "....(..." */
+    0x0C,0xFF,0xFF,0x02,0x00,0x00,0x00,0x0A,  /* 00000628    "........" */
+    0x2A,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x02,  /* 00000630    "*......." */
+    0x00,0x01,0x00,0x0A,0x2B,0x08,0x50,0x52,  /* 00000638    "....+.PR" */
+    0x35,0x35,0x12,0x49,0x05,0x06,0x12,0x0D,  /* 00000640    "55.I...." */
+    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,0x4C,  /* 00000648    ".......L" */
+    0x4E,0x4B,0x42,0x00,0x12,0x0D,0x04,0x0C,  /* 00000650    "NKB....." */
+    0xFF,0xFF,0x01,0x00,0x01,0x4C,0x4E,0x4B,  /* 00000658    ".....LNK" */
+    0x43,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 00000660    "C......." */
+    0x01,0x00,0x0A,0x02,0x4C,0x4E,0x4B,0x44,  /* 00000668    "....LNKD" */
+    0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000670    "........" */
+    0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x41,0x00,  /* 00000678    "...LNKA." */
+    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x02,0x00,  /* 00000680    "........" */
+    0x00,0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0D,  /* 00000688    ".LNKC..." */
+    0x04,0x0C,0xFF,0xFF,0x02,0x00,0x01,0x4C,  /* 00000690    ".......L" */
+    0x4E,0x4B,0x44,0x00,0x08,0x41,0x52,0x35,  /* 00000698    "NKD..AR5" */
+    0x35,0x12,0x4D,0x04,0x06,0x12,0x0B,0x04,  /* 000006A0    "5.M....." */
+    0x0C,0xFF,0xFF,0x01,0x00,0x00,0x00,0x0A,  /* 000006A8    "........" */
+    0x2D,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x01,  /* 000006B0    "-......." */
+    0x00,0x01,0x00,0x0A,0x2E,0x12,0x0C,0x04,  /* 000006B8    "........" */
+    0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x02,0x00,  /* 000006C0    "........" */
+    0x0A,0x2F,0x12,0x0C,0x04,0x0C,0xFF,0xFF,  /* 000006C8    "./......" */
+    0x01,0x00,0x0A,0x03,0x00,0x0A,0x2C,0x12,  /* 000006D0    "......,." */
+    0x0B,0x04,0x0C,0xFF,0xFF,0x02,0x00,0x00,  /* 000006D8    "........" */
+    0x00,0x0A,0x2E,0x12,0x0B,0x04,0x0C,0xFF,  /* 000006E0    "........" */
+    0xFF,0x02,0x00,0x01,0x00,0x0A,0x2F,0x08,  /* 000006E8    "....../." */
+    0x50,0x52,0x35,0x36,0x12,0x1E,0x02,0x12,  /* 000006F0    "PR56...." */
+    0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,  /* 000006F8    "........" */
+    0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0D,0x04,  /* 00000700    "LNKA...." */
+    0x0C,0xFF,0xFF,0x02,0x00,0x00,0x4C,0x4E,  /* 00000708    "......LN" */
+    0x4B,0x42,0x00,0x08,0x41,0x52,0x35,0x36,  /* 00000710    "KB..AR56" */
+    0x12,0x1A,0x02,0x12,0x0B,0x04,0x0C,0xFF,  /* 00000718    "........" */
+    0xFF,0x01,0x00,0x00,0x00,0x0A,0x30,0x12,  /* 00000720    "......0." */
+    0x0B,0x04,0x0C,0xFF,0xFF,0x02,0x00,0x00,  /* 00000728    "........" */
+    0x00,0x0A,0x31,0x08,0x50,0x52,0x35,0x37,  /* 00000730    "..1.PR57" */
+    0x12,0x3C,0x04,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000738    ".<......" */
+    0xFF,0x01,0x00,0x00,0x4C,0x4E,0x4B,0x41,  /* 00000740    "....LNKA" */
+    0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000748    "........" */
+    0x00,0x01,0x4C,0x4E,0x4B,0x42,0x00,0x12,  /* 00000750    "..LNKB.." */
+    0x0E,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,  /* 00000758    "........" */
+    0x02,0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0E,  /* 00000760    ".LNKC..." */
+    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x03,  /* 00000768    "........" */
+    0x4C,0x4E,0x4B,0x44,0x00,0x08,0x41,0x52,  /* 00000770    "LNKD..AR" */
+    0x35,0x37,0x12,0x34,0x04,0x12,0x0B,0x04,  /* 00000778    "57.4...." */
+    0x0C,0xFF,0xFF,0x01,0x00,0x00,0x00,0x0A,  /* 00000780    "........" */
+    0x34,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000788    "4......." */
+    0x00,0x01,0x00,0x0A,0x35,0x12,0x0C,0x04,  /* 00000790    "....5..." */
+    0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x02,0x00,  /* 00000798    "........" */
+    0x0A,0x36,0x12,0x0C,0x04,0x0C,0xFF,0xFF,  /* 000007A0    ".6......" */
+    0x01,0x00,0x0A,0x03,0x00,0x0A,0x37,0x08,  /* 000007A8    "......7." */
+    0x50,0x52,0x35,0x38,0x12,0x10,0x01,0x12,  /* 000007B0    "PR58...." */
+    0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,  /* 000007B8    "........" */
+    0x4C,0x4E,0x4B,0x41,0x00,0x08,0x41,0x52,  /* 000007C0    "LNKA..AR" */
+    0x35,0x38,0x12,0x0E,0x01,0x12,0x0B,0x04,  /* 000007C8    "58......" */
+    0x0C,0xFF,0xFF,0x01,0x00,0x00,0x00,0x0A,  /* 000007D0    "........" */
+    0x38,0x08,0x50,0x52,0x35,0x39,0x12,0x3C,  /* 000007D8    "8.PR59.<" */
+    0x04,0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x01,  /* 000007E0    "........" */
+    0x00,0x00,0x4C,0x4E,0x4B,0x41,0x00,0x12,  /* 000007E8    "..LNKA.." */
+    0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x01,  /* 000007F0    "........" */
+    0x4C,0x4E,0x4B,0x42,0x00,0x12,0x0E,0x04,  /* 000007F8    "LNKB...." */
+    0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x02,0x4C,  /* 00000800    ".......L" */
+    0x4E,0x4B,0x43,0x00,0x12,0x0E,0x04,0x0C,  /* 00000808    "NKC....." */
+    0xFF,0xFF,0x01,0x00,0x0A,0x03,0x4C,0x4E,  /* 00000810    "......LN" */
+    0x4B,0x44,0x00,0x08,0x41,0x52,0x35,0x39,  /* 00000818    "KD..AR59" */
+    0x12,0x34,0x04,0x12,0x0B,0x04,0x0C,0xFF,  /* 00000820    ".4......" */
+    0xFF,0x01,0x00,0x00,0x00,0x0A,0x3C,0x12,  /* 00000828    "......<." */
+    0x0B,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x01,  /* 00000830    "........" */
+    0x00,0x0A,0x3D,0x12,0x0C,0x04,0x0C,0xFF,  /* 00000838    "..=....." */
+    0xFF,0x01,0x00,0x0A,0x02,0x00,0x0A,0x3E,  /* 00000840    ".......>" */
+    0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 00000848    "........" */
+    0x0A,0x03,0x00,0x0A,0x3F,0x08,0x50,0x52,  /* 00000850    "....?.PR" */
+    0x35,0x41,0x12,0x1E,0x02,0x12,0x0D,0x04,  /* 00000858    "5A......" */
+    0x0C,0xFF,0xFF,0x01,0x00,0x00,0x4C,0x4E,  /* 00000860    "......LN" */
+    0x4B,0x41,0x00,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000868    "KA......" */
+    0xFF,0x02,0x00,0x00,0x4C,0x4E,0x4B,0x42,  /* 00000870    "....LNKB" */
+    0x00,0x08,0x41,0x52,0x35,0x41,0x12,0x1A,  /* 00000878    "..AR5A.." */
+    0x02,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000880    "........" */
+    0x00,0x00,0x00,0x0A,0x40,0x12,0x0B,0x04,  /* 00000888    "....@..." */
+    0x0C,0xFF,0xFF,0x02,0x00,0x00,0x00,0x0A,  /* 00000890    "........" */
+    0x41,0x08,0x50,0x52,0x35,0x42,0x12,0x3C,  /* 00000898    "A.PR5B.<" */
+    0x04,0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x01,  /* 000008A0    "........" */
+    0x00,0x00,0x4C,0x4E,0x4B,0x41,0x00,0x12,  /* 000008A8    "..LNKA.." */
+    0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x01,  /* 000008B0    "........" */
+    0x4C,0x4E,0x4B,0x42,0x00,0x12,0x0E,0x04,  /* 000008B8    "LNKB...." */
+    0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x02,0x4C,  /* 000008C0    ".......L" */
+    0x4E,0x4B,0x43,0x00,0x12,0x0E,0x04,0x0C,  /* 000008C8    "NKC....." */
+    0xFF,0xFF,0x01,0x00,0x0A,0x03,0x4C,0x4E,  /* 000008D0    "......LN" */
+    0x4B,0x44,0x00,0x08,0x41,0x52,0x35,0x42,  /* 000008D8    "KD..AR5B" */
+    0x12,0x34,0x04,0x12,0x0B,0x04,0x0C,0xFF,  /* 000008E0    ".4......" */
+    0xFF,0x01,0x00,0x00,0x00,0x0A,0x44,0x12,  /* 000008E8    "......D." */
+    0x0B,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x01,  /* 000008F0    "........" */
+    0x00,0x0A,0x45,0x12,0x0C,0x04,0x0C,0xFF,  /* 000008F8    "..E....." */
+    0xFF,0x01,0x00,0x0A,0x02,0x00,0x0A,0x46,  /* 00000900    ".......F" */
+    0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 00000908    "........" */
+    0x0A,0x03,0x00,0x0A,0x47,0x08,0x50,0x52,  /* 00000910    "....G.PR" */
+    0x35,0x43,0x12,0x10,0x01,0x12,0x0D,0x04,  /* 00000918    "5C......" */
+    0x0C,0xFF,0xFF,0x01,0x00,0x00,0x4C,0x4E,  /* 00000920    "......LN" */
+    0x4B,0x41,0x00,0x08,0x41,0x52,0x35,0x43,  /* 00000928    "KA..AR5C" */
+    0x12,0x0E,0x01,0x12,0x0B,0x04,0x0C,0xFF,  /* 00000930    "........" */
+    0xFF,0x01,0x00,0x00,0x00,0x0A,0x48,0x08,  /* 00000938    "......H." */
+    0x50,0x52,0x35,0x44,0x12,0x3C,0x04,0x12,  /* 00000940    "PR5D.<.." */
+    0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,  /* 00000948    "........" */
+    0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0D,0x04,  /* 00000950    "LNKA...." */
+    0x0C,0xFF,0xFF,0x01,0x00,0x01,0x4C,0x4E,  /* 00000958    "......LN" */
+    0x4B,0x42,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 00000960    "KB......" */
+    0xFF,0x01,0x00,0x0A,0x02,0x4C,0x4E,0x4B,  /* 00000968    ".....LNK" */
+    0x43,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 00000970    "C......." */
+    0x01,0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x44,  /* 00000978    "....LNKD" */
+    0x00,0x08,0x41,0x52,0x35,0x44,0x12,0x34,  /* 00000980    "..AR5D.4" */
+    0x04,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000988    "........" */
+    0x00,0x00,0x00,0x0A,0x4C,0x12,0x0B,0x04,  /* 00000990    "....L..." */
+    0x0C,0xFF,0xFF,0x01,0x00,0x01,0x00,0x0A,  /* 00000998    "........" */
+    0x4D,0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x01,  /* 000009A0    "M......." */
+    0x00,0x0A,0x02,0x00,0x0A,0x4E,0x12,0x0C,  /* 000009A8    ".....N.." */
+    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x03,  /* 000009B0    "........" */
+    0x00,0x0A,0x4F,0x08,0x50,0x52,0x53,0x41,  /* 000009B8    "..O.PRSA" */
+    0x11,0x09,0x0A,0x06,0x23,0xF8,0xDE,0x18,  /* 000009C0    "....#..." */
+    0x79,0x00,0x06,0x50,0x52,0x53,0x41,0x50,  /* 000009C8    "y..PRSAP" */
+    0x52,0x53,0x42,0x06,0x50,0x52,0x53,0x41,  /* 000009D0    "RSB.PRSA" */
+    0x50,0x52,0x53,0x43,0x06,0x50,0x52,0x53,  /* 000009D8    "PRSC.PRS" */
+    0x41,0x50,0x52,0x53,0x44,0x5B,0x82,0x2B,  /* 000009E0    "APRSD[.+" */
+    0x50,0x43,0x49,0x30,0x08,0x5F,0x48,0x49,  /* 000009E8    "PCI0._HI" */
+    0x44,0x0C,0x41,0xD0,0x0A,0x03,0x14,0x09,  /* 000009F0    "D.A....." */
+    0x5E,0x42,0x4E,0x30,0x30,0x00,0xA4,0x00,  /* 000009F8    "^BN00..." */
+    0x14,0x0B,0x5F,0x42,0x42,0x4E,0x00,0xA4,  /* 00000A00    ".._BBN.." */
+    0x42,0x4E,0x30,0x30,0x08,0x5F,0x55,0x49,  /* 00000A08    "BN00._UI" */
+    0x44,0x00,0x5B,0x82,0x8F,0xA5,0x01,0x50,  /* 00000A10    "D.[....P" */
+    0x43,0x49,0x41,0x08,0x5F,0x48,0x49,0x44,  /* 00000A18    "CIA._HID" */
+    0x0C,0x41,0xD0,0x0A,0x03,0x08,0x5F,0x41,  /* 00000A20    ".A...._A" */
+    0x44,0x52,0x0C,0x01,0x00,0x18,0x00,0x14,  /* 00000A28    "DR......" */
+    0x09,0x5E,0x42,0x4E,0x30,0x31,0x00,0xA4,  /* 00000A30    ".^BN01.." */
+    0x01,0x14,0x0B,0x5F,0x42,0x42,0x4E,0x00,  /* 00000A38    "..._BBN." */
+    0xA4,0x42,0x4E,0x30,0x31,0x08,0x5F,0x55,  /* 00000A40    ".BN01._U" */
+    0x49,0x44,0x00,0x14,0x16,0x5F,0x50,0x52,  /* 00000A48    "ID..._PR" */
+    0x54,0x00,0xA0,0x0A,0x50,0x49,0x43,0x4D,  /* 00000A50    "T...PICM" */
+    0xA4,0x41,0x52,0x30,0x30,0xA4,0x50,0x52,  /* 00000A58    ".AR00.PR" */
+    0x30,0x30,0x5B,0x82,0x47,0x09,0x50,0x43,  /* 00000A60    "00[.G.PC" */
+    0x49,0x31,0x08,0x5F,0x41,0x44,0x52,0x0C,  /* 00000A68    "I1._ADR." */
+    0x00,0x00,0x03,0x00,0x14,0x0F,0x5F,0x50,  /* 00000A70    "......_P" */
+    0x52,0x57,0x00,0xA4,0x47,0x50,0x52,0x57,  /* 00000A78    "RW..GPRW" */
+    0x0A,0x08,0x0A,0x04,0x14,0x16,0x5F,0x50,  /* 00000A80    "......_P" */
+    0x52,0x54,0x00,0xA0,0x0A,0x50,0x49,0x43,  /* 00000A88    "RT...PIC" */
+    0x4D,0xA4,0x41,0x52,0x30,0x31,0xA4,0x50,  /* 00000A90    "M.AR01.P" */
+    0x52,0x30,0x31,0x5B,0x82,0x2E,0x55,0x53,  /* 00000A98    "R01[..US" */
+    0x42,0x30,0x08,0x5F,0x41,0x44,0x52,0x00,  /* 00000AA0    "B0._ADR." */
+    0x14,0x12,0x5F,0x50,0x53,0x57,0x01,0x7B,  /* 00000AA8    ".._PSW.{" */
+    0x47,0x4E,0x42,0x4C,0x0B,0xFF,0x7F,0x47,  /* 00000AB0    "GNBL...G" */
+    0x4E,0x42,0x4C,0x14,0x0F,0x5F,0x50,0x52,  /* 00000AB8    "NBL.._PR" */
+    0x57,0x00,0xA4,0x47,0x50,0x52,0x57,0x0A,  /* 00000AC0    "W..GPRW." */
+    0x0F,0x0A,0x04,0x5B,0x82,0x2E,0x55,0x53,  /* 00000AC8    "...[..US" */
+    0x42,0x31,0x08,0x5F,0x41,0x44,0x52,0x01,  /* 00000AD0    "B1._ADR." */
+    0x14,0x12,0x5F,0x50,0x53,0x57,0x01,0x7B,  /* 00000AD8    ".._PSW.{" */
+    0x47,0x4E,0x42,0x4C,0x0B,0xFF,0x7F,0x47,  /* 00000AE0    "GNBL...G" */
+    0x4E,0x42,0x4C,0x14,0x0F,0x5F,0x50,0x52,  /* 00000AE8    "NBL.._PR" */
+    0x57,0x00,0xA4,0x47,0x50,0x52,0x57,0x0A,  /* 00000AF0    "W..GPRW." */
+    0x0F,0x0A,0x04,0x5B,0x82,0x42,0xF8,0x53,  /* 00000AF8    "...[.B.S" */
+    0x42,0x52,0x47,0x08,0x5F,0x41,0x44,0x52,  /* 00000B00    "BRG._ADR" */
+    0x0C,0x00,0x00,0x04,0x00,0x5B,0x82,0x2B,  /* 00000B08    ".....[.+" */
+    0x50,0x49,0x43,0x5F,0x08,0x5F,0x48,0x49,  /* 00000B10    "PIC_._HI" */
+    0x44,0x0B,0x41,0xD0,0x08,0x5F,0x43,0x52,  /* 00000B18    "D.A.._CR" */
+    0x53,0x11,0x18,0x0A,0x15,0x47,0x01,0x20,  /* 00000B20    "S....G. " */
+    0x00,0x20,0x00,0x00,0x02,0x47,0x01,0xA0,  /* 00000B28    ". ...G.." */
+    0x00,0xA0,0x00,0x00,0x02,0x22,0x04,0x00,  /* 00000B30    ".....".." */
+    0x79,0x00,0x5B,0x82,0x4E,0x04,0x44,0x4D,  /* 00000B38    "y.[.N.DM" */
+    0x41,0x44,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 00000B40    "AD._HID." */
+    0x41,0xD0,0x02,0x00,0x08,0x5F,0x43,0x52,  /* 00000B48    "A...._CR" */
+    0x53,0x11,0x38,0x0A,0x35,0x2A,0x10,0x04,  /* 00000B50    "S.8.5*.." */
+    0x47,0x01,0x00,0x00,0x00,0x00,0x00,0x10,  /* 00000B58    "G......." */
+    0x47,0x01,0x81,0x00,0x81,0x00,0x00,0x03,  /* 00000B60    "G......." */
+    0x47,0x01,0x87,0x00,0x87,0x00,0x00,0x01,  /* 00000B68    "G......." */
+    0x47,0x01,0x89,0x00,0x89,0x00,0x00,0x03,  /* 00000B70    "G......." */
+    0x47,0x01,0x8F,0x00,0x8F,0x00,0x00,0x01,  /* 00000B78    "G......." */
+    0x47,0x01,0xC0,0x00,0xC0,0x00,0x00,0x20,  /* 00000B80    "G...... " */
+    0x79,0x00,0x5B,0x82,0x47,0x05,0x54,0x4D,  /* 00000B88    "y.[.G.TM" */
+    0x52,0x5F,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 00000B90    "R_._HID." */
+    0x41,0xD0,0x01,0x00,0x08,0x43,0x52,0x53,  /* 00000B98    "A....CRS" */
+    0x5F,0x11,0x10,0x0A,0x0D,0x47,0x01,0x40,  /* 00000BA0    "_....G.@" */
+    0x00,0x40,0x00,0x00,0x04,0x22,0x01,0x00,  /* 00000BA8    ".@...".." */
+    0x79,0x00,0x08,0x43,0x52,0x53,0x31,0x11,  /* 00000BB0    "y..CRS1." */
+    0x0D,0x0A,0x0A,0x47,0x01,0x40,0x00,0x40,  /* 00000BB8    "...G.@.@" */
+    0x00,0x00,0x04,0x79,0x00,0x14,0x1D,0x5F,  /* 00000BC0    "...y..._" */
+    0x43,0x52,0x53,0x00,0xA0,0x11,0x5E,0x5E,  /* 00000BC8    "CRS...^^" */
+    0x2E,0x48,0x50,0x45,0x54,0x5F,0x53,0x54,  /* 00000BD0    ".HPET_ST" */
+    0x41,0xA4,0x43,0x52,0x53,0x31,0xA4,0x43,  /* 00000BD8    "A.CRS1.C" */
+    0x52,0x53,0x5F,0x5B,0x82,0x47,0x05,0x52,  /* 00000BE0    "RS_[.G.R" */
+    0x54,0x43,0x30,0x08,0x5F,0x48,0x49,0x44,  /* 00000BE8    "TC0._HID" */
+    0x0C,0x41,0xD0,0x0B,0x00,0x08,0x43,0x52,  /* 00000BF0    ".A....CR" */
+    0x53,0x5F,0x11,0x10,0x0A,0x0D,0x47,0x01,  /* 00000BF8    "S_....G." */
+    0x70,0x00,0x70,0x00,0x00,0x02,0x22,0x00,  /* 00000C00    "p.p..."." */
+    0x01,0x79,0x00,0x08,0x43,0x52,0x53,0x31,  /* 00000C08    ".y..CRS1" */
+    0x11,0x0D,0x0A,0x0A,0x47,0x01,0x70,0x00,  /* 00000C10    "....G.p." */
+    0x70,0x00,0x00,0x02,0x79,0x00,0x14,0x1D,  /* 00000C18    "p...y..." */
+    0x5F,0x43,0x52,0x53,0x00,0xA0,0x11,0x5E,  /* 00000C20    "_CRS...^" */
+    0x5E,0x2E,0x48,0x50,0x45,0x54,0x5F,0x53,  /* 00000C28    "^.HPET_S" */
+    0x54,0x41,0xA4,0x43,0x52,0x53,0x31,0xA4,  /* 00000C30    "TA.CRS1." */
+    0x43,0x52,0x53,0x5F,0x5B,0x82,0x42,0x05,  /* 00000C38    "CRS_[.B." */
+    0x50,0x53,0x32,0x4B,0x08,0x5F,0x48,0x49,  /* 00000C40    "PS2K._HI" */
+    0x44,0x0C,0x41,0xD0,0x03,0x03,0x08,0x5F,  /* 00000C48    "D.A...._" */
+    0x43,0x49,0x44,0x0C,0x41,0xD0,0x03,0x0B,  /* 00000C50    "CID.A..." */
+    0x14,0x19,0x5F,0x53,0x54,0x41,0x00,0x79,  /* 00000C58    ".._STA.y" */
+    0x01,0x0A,0x0A,0x60,0xA0,0x0B,0x7B,0x49,  /* 00000C60    "...`..{I" */
+    0x4F,0x53,0x54,0x60,0x00,0xA4,0x0A,0x0F,  /* 00000C68    "OST`...." */
+    0xA4,0x00,0x08,0x5F,0x43,0x52,0x53,0x11,  /* 00000C70    "..._CRS." */
+    0x18,0x0A,0x15,0x47,0x01,0x60,0x00,0x60,  /* 00000C78    "...G.`.`" */
+    0x00,0x00,0x01,0x47,0x01,0x64,0x00,0x64,  /* 00000C80    "...G.d.d" */
+    0x00,0x00,0x01,0x22,0x02,0x00,0x79,0x00,  /* 00000C88    "..."..y." */
+    0x14,0x14,0x2E,0x50,0x53,0x32,0x4B,0x5F,  /* 00000C90    "...PS2K_" */
+    0x50,0x52,0x57,0x00,0xA4,0x47,0x50,0x52,  /* 00000C98    "PRW..GPR" */
+    0x57,0x0A,0x08,0x0A,0x03,0x5B,0x82,0x41,  /* 00000CA0    "W....[.A" */
+    0x08,0x50,0x53,0x32,0x4D,0x08,0x5F,0x48,  /* 00000CA8    ".PS2M._H" */
+    0x49,0x44,0x0C,0x41,0xD0,0x0F,0x03,0x08,  /* 00000CB0    "ID.A...." */
+    0x5F,0x43,0x49,0x44,0x0C,0x41,0xD0,0x0F,  /* 00000CB8    "_CID.A.." */
+    0x13,0x14,0x19,0x5F,0x53,0x54,0x41,0x00,  /* 00000CC0    "..._STA." */
+    0x79,0x01,0x0A,0x0C,0x60,0xA0,0x0B,0x7B,  /* 00000CC8    "y...`..{" */
+    0x49,0x4F,0x53,0x54,0x60,0x00,0xA4,0x0A,  /* 00000CD0    "IOST`..." */
+    0x0F,0xA4,0x00,0x08,0x43,0x52,0x53,0x31,  /* 00000CD8    "....CRS1" */
+    0x11,0x08,0x0A,0x05,0x22,0x00,0x10,0x79,  /* 00000CE0    "...."..y" */
+    0x00,0x08,0x43,0x52,0x53,0x32,0x11,0x18,  /* 00000CE8    "..CRS2.." */
+    0x0A,0x15,0x47,0x01,0x60,0x00,0x60,0x00,  /* 00000CF0    "..G.`.`." */
+    0x00,0x01,0x47,0x01,0x64,0x00,0x64,0x00,  /* 00000CF8    "..G.d.d." */
+    0x00,0x01,0x22,0x00,0x10,0x79,0x00,0x14,  /* 00000D00    ".."..y.." */
+    0x20,0x5F,0x43,0x52,0x53,0x00,0x79,0x01,  /* 00000D08    " _CRS.y." */
+    0x0A,0x0A,0x60,0xA0,0x0D,0x7B,0x49,0x4F,  /* 00000D10    "..`..{IO" */
+    0x53,0x54,0x60,0x00,0xA4,0x43,0x52,0x53,  /* 00000D18    "ST`..CRS" */
+    0x31,0xA1,0x06,0xA4,0x43,0x52,0x53,0x32,  /* 00000D20    "1...CRS2" */
+    0x14,0x14,0x2E,0x50,0x53,0x32,0x4D,0x5F,  /* 00000D28    "...PS2M_" */
+    0x50,0x52,0x57,0x00,0xA4,0x47,0x50,0x52,  /* 00000D30    "PRW..GPR" */
+    0x57,0x0A,0x08,0x0A,0x03,0x5B,0x82,0x22,  /* 00000D38    "W....[."" */
+    0x53,0x50,0x4B,0x52,0x08,0x5F,0x48,0x49,  /* 00000D40    "SPKR._HI" */
+    0x44,0x0C,0x41,0xD0,0x08,0x00,0x08,0x5F,  /* 00000D48    "D.A...._" */
+    0x43,0x52,0x53,0x11,0x0D,0x0A,0x0A,0x47,  /* 00000D50    "CRS....G" */
+    0x01,0x61,0x00,0x61,0x00,0x00,0x01,0x79,  /* 00000D58    ".a.a...y" */
+    0x00,0x5B,0x82,0x25,0x43,0x4F,0x50,0x52,  /* 00000D60    ".[.%COPR" */
+    0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,  /* 00000D68    "._HID.A." */
+    0x0C,0x04,0x08,0x5F,0x43,0x52,0x53,0x11,  /* 00000D70    "..._CRS." */
+    0x10,0x0A,0x0D,0x47,0x01,0xF0,0x00,0xF0,  /* 00000D78    "...G...." */
+    0x00,0x00,0x10,0x22,0x00,0x20,0x79,0x00,  /* 00000D80    "...". y." */
+    0x5B,0x82,0x40,0x0B,0x55,0x41,0x52,0x31,  /* 00000D88    "[.@.UAR1" */
+    0x08,0x5F,0x55,0x49,0x44,0x01,0x08,0x5F,  /* 00000D90    "._UID.._" */
+    0x48,0x49,0x44,0x0C,0x41,0xD0,0x05,0x01,  /* 00000D98    "HID.A..." */
+    0x14,0x0C,0x5F,0x53,0x54,0x41,0x00,0xA4,  /* 00000DA0    ".._STA.." */
+    0x44,0x53,0x54,0x41,0x00,0x14,0x0C,0x5F,  /* 00000DA8    "DSTA..._" */
+    0x44,0x49,0x53,0x00,0x44,0x43,0x4E,0x54,  /* 00000DB0    "DIS.DCNT" */
+    0x00,0x00,0x14,0x0D,0x5F,0x43,0x52,0x53,  /* 00000DB8    "...._CRS" */
+    0x00,0xA4,0x44,0x43,0x52,0x53,0x00,0x00,  /* 00000DC0    "..DCRS.." */
+    0x14,0x0C,0x5F,0x53,0x52,0x53,0x01,0x44,  /* 00000DC8    ".._SRS.D" */
+    0x53,0x52,0x53,0x68,0x00,0x14,0x0B,0x5F,  /* 00000DD0    "SRSh..._" */
+    0x50,0x52,0x53,0x00,0xA4,0x43,0x4D,0x50,  /* 00000DD8    "PRS..CMP" */
+    0x52,0x08,0x43,0x4D,0x50,0x52,0x11,0x43,  /* 00000DE0    "R.CMPR.C" */
+    0x05,0x0A,0x4F,0x31,0x00,0x47,0x01,0xF8,  /* 00000DE8    "..O1.G.." */
+    0x03,0xF8,0x03,0x01,0x08,0x22,0x10,0x00,  /* 00000DF0    ".....".." */
+    0x2A,0x00,0x00,0x30,0x47,0x01,0xF8,0x03,  /* 00000DF8    "*..0G..." */
+    0xF8,0x03,0x01,0x08,0x22,0xF8,0x1C,0x2A,  /* 00000E00    "...."..*" */
+    0x00,0x00,0x30,0x47,0x01,0xF8,0x02,0xF8,  /* 00000E08    "..0G...." */
+    0x02,0x01,0x08,0x22,0xF8,0x1C,0x2A,0x00,  /* 00000E10    "..."..*." */
+    0x00,0x30,0x47,0x01,0xE8,0x03,0xE8,0x03,  /* 00000E18    ".0G....." */
+    0x01,0x08,0x22,0xF8,0x1C,0x2A,0x00,0x00,  /* 00000E20    ".."..*.." */
+    0x30,0x47,0x01,0xE8,0x02,0xE8,0x02,0x01,  /* 00000E28    "0G......" */
+    0x08,0x22,0xF8,0x1C,0x2A,0x00,0x00,0x38,  /* 00000E30    "."..*..8" */
+    0x79,0x00,0x5B,0x82,0x40,0x0F,0x55,0x41,  /* 00000E38    "y.[.@.UA" */
+    0x52,0x32,0x08,0x5F,0x55,0x49,0x44,0x0A,  /* 00000E40    "R2._UID." */
+    0x02,0x14,0x0C,0x5F,0x48,0x49,0x44,0x00,  /* 00000E48    "..._HID." */
+    0xA4,0x55,0x48,0x49,0x44,0x01,0x14,0x0C,  /* 00000E50    ".UHID..." */
+    0x5F,0x53,0x54,0x41,0x00,0xA4,0x44,0x53,  /* 00000E58    "_STA..DS" */
+    0x54,0x41,0x01,0x14,0x0C,0x5F,0x44,0x49,  /* 00000E60    "TA..._DI" */
+    0x53,0x00,0x44,0x43,0x4E,0x54,0x01,0x00,  /* 00000E68    "S.DCNT.." */
+    0x14,0x0D,0x5F,0x43,0x52,0x53,0x00,0xA4,  /* 00000E70    ".._CRS.." */
+    0x44,0x43,0x52,0x53,0x01,0x01,0x14,0x0C,  /* 00000E78    "DCRS...." */
+    0x5F,0x53,0x52,0x53,0x01,0x44,0x53,0x52,  /* 00000E80    "_SRS.DSR" */
+    0x53,0x68,0x01,0x14,0x0B,0x5F,0x50,0x52,  /* 00000E88    "Sh..._PR" */
+    0x53,0x00,0xA4,0x43,0x4D,0x50,0x52,0x08,  /* 00000E90    "S..CMPR." */
+    0x43,0x4D,0x50,0x52,0x11,0x4F,0x08,0x0A,  /* 00000E98    "CMPR.O.." */
+    0x8B,0x31,0x00,0x47,0x01,0xF8,0x02,0xF8,  /* 00000EA0    ".1.G...." */
+    0x02,0x01,0x08,0x22,0x08,0x00,0x2A,0x00,  /* 00000EA8    "..."..*." */
+    0x00,0x30,0x47,0x01,0xF8,0x03,0xF8,0x03,  /* 00000EB0    ".0G....." */
+    0x01,0x08,0x22,0xF8,0x1C,0x2A,0x00,0x00,  /* 00000EB8    ".."..*.." */
+    0x30,0x47,0x01,0xF8,0x02,0xF8,0x02,0x01,  /* 00000EC0    "0G......" */
+    0x08,0x22,0xF8,0x1C,0x2A,0x00,0x00,0x30,  /* 00000EC8    "."..*..0" */
+    0x47,0x01,0xE8,0x03,0xE8,0x03,0x01,0x08,  /* 00000ED0    "G......." */
+    0x22,0xF8,0x1C,0x2A,0x00,0x00,0x30,0x47,  /* 00000ED8    ""..*..0G" */
+    0x01,0xE8,0x02,0xE8,0x02,0x01,0x08,0x22,  /* 00000EE0    "......."" */
+    0xF8,0x1C,0x2A,0x00,0x00,0x30,0x47,0x01,  /* 00000EE8    "..*..0G." */
+    0xF8,0x03,0xF8,0x03,0x01,0x08,0x22,0xF8,  /* 00000EF0    "......"." */
+    0x1C,0x2A,0x0F,0x00,0x30,0x47,0x01,0xF8,  /* 00000EF8    ".*..0G.." */
+    0x02,0xF8,0x02,0x01,0x08,0x22,0xF8,0x1C,  /* 00000F00    ".....".." */
+    0x2A,0x0F,0x00,0x30,0x47,0x01,0xE8,0x03,  /* 00000F08    "*..0G..." */
+    0xE8,0x03,0x01,0x08,0x22,0xF8,0x1C,0x2A,  /* 00000F10    "...."..*" */
+    0x0F,0x00,0x30,0x47,0x01,0xE8,0x02,0xE8,  /* 00000F18    "..0G...." */
+    0x02,0x01,0x08,0x22,0xF8,0x1C,0x2A,0x0F,  /* 00000F20    "..."..*." */
+    0x00,0x38,0x79,0x00,0x5B,0x82,0x47,0x16,  /* 00000F28    ".8y.[.G." */
+    0x46,0x44,0x43,0x5F,0x08,0x5F,0x48,0x49,  /* 00000F30    "FDC_._HI" */
+    0x44,0x0C,0x41,0xD0,0x07,0x00,0x14,0x2A,  /* 00000F38    "D.A....*" */
+    0x5F,0x46,0x44,0x45,0x00,0x08,0x46,0x44,  /* 00000F40    "_FDE..FD" */
+    0x45,0x50,0x12,0x0A,0x05,0x00,0x00,0x0A,  /* 00000F48    "EP......" */
+    0x02,0x0A,0x02,0x0A,0x02,0xA0,0x0E,0x5F,  /* 00000F50    "......._" */
+    0x53,0x54,0x41,0x70,0x01,0x88,0x46,0x44,  /* 00000F58    "STAp..FD" */
+    0x45,0x50,0x00,0x00,0xA4,0x46,0x44,0x45,  /* 00000F60    "EP...FDE" */
+    0x50,0x14,0x0D,0x5F,0x53,0x54,0x41,0x00,  /* 00000F68    "P.._STA." */
+    0xA4,0x44,0x53,0x54,0x41,0x0A,0x03,0x14,  /* 00000F70    ".DSTA..." */
+    0x0D,0x5F,0x44,0x49,0x53,0x00,0x44,0x43,  /* 00000F78    "._DIS.DC" */
+    0x4E,0x54,0x0A,0x03,0x00,0x14,0x48,0x05,  /* 00000F80    "NT....H." */
+    0x5F,0x43,0x52,0x53,0x00,0x44,0x43,0x52,  /* 00000F88    "_CRS.DCR" */
+    0x53,0x0A,0x03,0x01,0x70,0x49,0x52,0x51,  /* 00000F90    "S...pIRQ" */
+    0x4D,0x49,0x52,0x51,0x45,0x70,0x44,0x4D,  /* 00000F98    "MIRQEpDM" */
+    0x41,0x4D,0x44,0x4D,0x41,0x45,0x70,0x49,  /* 00000FA0    "AMDMAEpI" */
+    0x4F,0x31,0x31,0x49,0x4F,0x32,0x31,0x70,  /* 00000FA8    "O11IO21p" */
+    0x49,0x4F,0x31,0x32,0x49,0x4F,0x32,0x32,  /* 00000FB0    "IO12IO22" */
+    0x70,0x0A,0x06,0x4C,0x45,0x4E,0x32,0x72,  /* 00000FB8    "p..LEN2r" */
+    0x49,0x4F,0x32,0x31,0x0A,0x07,0x49,0x4F,  /* 00000FC0    "IO21..IO" */
+    0x33,0x31,0x70,0x49,0x4F,0x33,0x31,0x49,  /* 00000FC8    "31pIO31I" */
+    0x4F,0x33,0x32,0x70,0x01,0x4C,0x45,0x4E,  /* 00000FD0    "O32p.LEN" */
+    0x33,0xA4,0x43,0x52,0x53,0x32,0x14,0x43,  /* 00000FD8    "3.CRS2.C" */
+    0x06,0x5F,0x53,0x52,0x53,0x01,0x44,0x53,  /* 00000FE0    "._SRS.DS" */
+    0x52,0x53,0x68,0x0A,0x03,0x8B,0x68,0x0A,  /* 00000FE8    "RSh...h." */
+    0x11,0x49,0x52,0x51,0x45,0x8C,0x68,0x0A,  /* 00000FF0    ".IRQE.h." */
+    0x14,0x44,0x4D,0x41,0x45,0x45,0x4E,0x46,  /* 00000FF8    ".DMAEENF" */
+    0x47,0x43,0x47,0x4C,0x44,0x0A,0x03,0xA0,  /* 00001000    "GCGLD..." */
+    0x12,0x49,0x52,0x51,0x45,0x82,0x49,0x52,  /* 00001008    ".IRQE.IR" */
+    0x51,0x45,0x60,0x74,0x60,0x01,0x49,0x4E,  /* 00001010    "QE`t`.IN" */
+    0x54,0x52,0xA1,0x07,0x70,0x00,0x49,0x4E,  /* 00001018    "TR..p.IN" */
+    0x54,0x52,0xA0,0x12,0x44,0x4D,0x41,0x45,  /* 00001020    "TR..DMAE" */
+    0x82,0x44,0x4D,0x41,0x45,0x60,0x74,0x60,  /* 00001028    ".DMAE`t`" */
+    0x01,0x44,0x4D,0x43,0x48,0xA1,0x08,0x70,  /* 00001030    ".DMCH..p" */
+    0x0A,0x04,0x44,0x4D,0x43,0x48,0x45,0x58,  /* 00001038    "..DMCHEX" */
+    0x46,0x47,0x08,0x5F,0x50,0x52,0x53,0x11,  /* 00001040    "FG._PRS." */
+    0x4D,0x04,0x0A,0x49,0x31,0x00,0x47,0x01,  /* 00001048    "M..I1.G." */
+    0xF0,0x03,0xF0,0x03,0x01,0x06,0x47,0x01,  /* 00001050    "......G." */
+    0xF7,0x03,0xF7,0x03,0x01,0x01,0x22,0x40,  /* 00001058    "......"@" */
+    0x00,0x2A,0x04,0x00,0x30,0x47,0x01,0xF0,  /* 00001060    ".*..0G.." */
+    0x03,0xF0,0x03,0x01,0x06,0x47,0x01,0xF7,  /* 00001068    ".....G.." */
+    0x03,0xF7,0x03,0x01,0x01,0x22,0xF8,0x1C,  /* 00001070    ".....".." */
+    0x2A,0x0F,0x00,0x30,0x47,0x01,0x70,0x03,  /* 00001078    "*..0G.p." */
+    0x70,0x03,0x01,0x06,0x47,0x01,0x77,0x03,  /* 00001080    "p...G.w." */
+    0x77,0x03,0x01,0x01,0x22,0xF8,0x1C,0x2A,  /* 00001088    "w..."..*" */
+    0x0F,0x00,0x38,0x79,0x00,0x5B,0x82,0x4D,  /* 00001090    "..8y.[.M" */
+    0x0D,0x53,0x49,0x4F,0x52,0x08,0x5F,0x48,  /* 00001098    ".SIOR._H" */
+    0x49,0x44,0x0C,0x41,0xD0,0x0C,0x02,0x14,  /* 000010A0    "ID.A...." */
+    0x0B,0x5F,0x55,0x49,0x44,0x00,0xA4,0x53,  /* 000010A8    "._UID..S" */
+    0x50,0x49,0x4F,0x08,0x43,0x52,0x53,0x5F,  /* 000010B0    "PIO.CRS_" */
+    0x11,0x1D,0x0A,0x1A,0x47,0x01,0x00,0x00,  /* 000010B8    "....G..." */
+    0x00,0x00,0x00,0x00,0x47,0x01,0x00,0x00,  /* 000010C0    "....G..." */
+    0x00,0x00,0x00,0x00,0x47,0x01,0x95,0x02,  /* 000010C8    "....G..." */
+    0x95,0x02,0x00,0x02,0x79,0x00,0x14,0x4D,  /* 000010D0    "....y..M" */
+    0x09,0x5F,0x43,0x52,0x53,0x00,0xA0,0x4D,  /* 000010D8    "._CRS..M" */
+    0x04,0x90,0x92,0x93,0x53,0x50,0x49,0x4F,  /* 000010E0    "....SPIO" */
+    0x0B,0xF0,0x03,0x94,0x53,0x50,0x49,0x4F,  /* 000010E8    "....SPIO" */
+    0x0A,0xF0,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 000010F0    "...CRS_." */
+    0x02,0x47,0x50,0x31,0x30,0x8B,0x43,0x52,  /* 000010F8    ".GP10.CR" */
+    0x53,0x5F,0x0A,0x04,0x47,0x50,0x31,0x31,  /* 00001100    "S_..GP11" */
+    0x8C,0x43,0x52,0x53,0x5F,0x0A,0x07,0x47,  /* 00001108    ".CRS_..G" */
+    0x50,0x4C,0x31,0x70,0x53,0x50,0x49,0x4F,  /* 00001110    "PL1pSPIO" */
+    0x47,0x50,0x31,0x30,0x70,0x53,0x50,0x49,  /* 00001118    "GP10pSPI" */
+    0x4F,0x47,0x50,0x31,0x31,0x70,0x0A,0x02,  /* 00001120    "OGP11p.." */
+    0x47,0x50,0x4C,0x31,0xA0,0x42,0x04,0x49,  /* 00001128    "GPL1.B.I" */
+    0x4F,0x31,0x42,0x8B,0x43,0x52,0x53,0x5F,  /* 00001130    "O1B.CRS_" */
+    0x0A,0x0A,0x47,0x50,0x32,0x30,0x8B,0x43,  /* 00001138    "..GP20.C" */
+    0x52,0x53,0x5F,0x0A,0x0C,0x47,0x50,0x32,  /* 00001140    "RS_..GP2" */
+    0x31,0x8C,0x43,0x52,0x53,0x5F,0x0A,0x0F,  /* 00001148    "1.CRS_.." */
+    0x47,0x50,0x4C,0x32,0x70,0x49,0x4F,0x31,  /* 00001150    "GPL2pIO1" */
+    0x42,0x47,0x50,0x32,0x30,0x70,0x49,0x4F,  /* 00001158    "BGP20pIO" */
+    0x31,0x42,0x47,0x50,0x32,0x31,0x70,0x49,  /* 00001160    "1BGP21pI" */
+    0x4F,0x31,0x4C,0x47,0x50,0x4C,0x32,0xA4,  /* 00001168    "O1LGPL2." */
+    0x43,0x52,0x53,0x5F,0x08,0x44,0x43,0x41,  /* 00001170    "CRS_.DCA" */
+    0x54,0x12,0x2A,0x15,0x0A,0x02,0x0A,0x03,  /* 00001178    "T.*....." */
+    0x01,0x00,0x0A,0xFF,0x0A,0x07,0x0A,0xFF,  /* 00001180    "........" */
+    0x0A,0xFF,0x0A,0x07,0x0A,0xFF,0x0A,0xFF,  /* 00001188    "........" */
+    0x0A,0xFF,0x0A,0xFF,0x0A,0xFF,0x0A,0xFF,  /* 00001190    "........" */
+    0x0A,0xFF,0x0A,0x06,0x0A,0x08,0x0A,0x09,  /* 00001198    "........" */
+    0x0A,0xFF,0x0A,0xFF,0x14,0x1A,0x45,0x4E,  /* 000011A0    "......EN" */
+    0x46,0x47,0x01,0x70,0x0A,0x87,0x49,0x4E,  /* 000011A8    "FG.p..IN" */
+    0x44,0x58,0x70,0x0A,0x87,0x49,0x4E,0x44,  /* 000011B0    "DXp..IND" */
+    0x58,0x70,0x68,0x4C,0x44,0x4E,0x5F,0x14,  /* 000011B8    "XphLDN_." */
+    0x0D,0x45,0x58,0x46,0x47,0x00,0x70,0x0A,  /* 000011C0    ".EXFG.p." */
+    0xAA,0x49,0x4E,0x44,0x58,0x14,0x1D,0x4C,  /* 000011C8    ".INDX..L" */
+    0x50,0x54,0x4D,0x01,0x45,0x4E,0x46,0x47,  /* 000011D0    "PTM.ENFG" */
+    0x43,0x47,0x4C,0x44,0x68,0x7B,0x4F,0x50,  /* 000011D8    "CGLDh{OP" */
+    0x54,0x30,0x0A,0x02,0x60,0x45,0x58,0x46,  /* 000011E0    "T0..`EXF" */
+    0x47,0xA4,0x60,0x14,0x2F,0x55,0x48,0x49,  /* 000011E8    "G.`./UHI" */
+    0x44,0x01,0xA0,0x22,0x93,0x68,0x01,0x45,  /* 000011F0    "D..".h.E" */
+    0x4E,0x46,0x47,0x43,0x47,0x4C,0x44,0x68,  /* 000011F8    "NFGCGLDh" */
+    0x7B,0x4F,0x50,0x54,0x31,0x0A,0x38,0x60,  /* 00001200    "{OPT1.8`" */
+    0x45,0x58,0x46,0x47,0xA0,0x08,0x60,0xA4,  /* 00001208    "EXFG..`." */
+    0x0C,0x41,0xD0,0x05,0x10,0xA4,0x0C,0x41,  /* 00001210    ".A.....A" */
+    0xD0,0x05,0x01,0x14,0x3E,0x53,0x49,0x4F,  /* 00001218    "....>SIO" */
+    0x4B,0x01,0x45,0x4E,0x46,0x47,0x0A,0x0A,  /* 00001220    "K.ENFG.." */
+    0x7B,0x0A,0xFF,0x4F,0x50,0x54,0x33,0x4F,  /* 00001228    "{..OPT3O" */
+    0x50,0x54,0x33,0x7B,0x68,0x0A,0x05,0x60,  /* 00001230    "PT3{h..`" */
+    0x7B,0x4F,0x50,0x54,0x39,0x0A,0xFA,0x4F,  /* 00001238    "{OPT9..O" */
+    0x50,0x54,0x39,0x7D,0x4F,0x50,0x54,0x39,  /* 00001240    "PT9}OPT9" */
+    0x60,0x4F,0x50,0x54,0x39,0x70,0x7B,0x68,  /* 00001248    "`OPT9p{h" */
+    0x01,0x00,0x41,0x43,0x54,0x52,0x45,0x58,  /* 00001250    "..ACTREX" */
+    0x46,0x47,0x14,0x2E,0x2E,0x50,0x53,0x32,  /* 00001258    "FG...PS2" */
+    0x4B,0x5F,0x50,0x53,0x57,0x01,0x45,0x4E,  /* 00001260    "K_PSW.EN" */
+    0x46,0x47,0x0A,0x0A,0x7B,0x4F,0x50,0x54,  /* 00001268    "FG..{OPT" */
+    0x36,0x0A,0xEF,0x4F,0x50,0x54,0x36,0xA0,  /* 00001270    "6..OPT6." */
+    0x0D,0x68,0x7D,0x4F,0x50,0x54,0x36,0x0A,  /* 00001278    ".h}OPT6." */
+    0x10,0x4F,0x50,0x54,0x36,0x45,0x58,0x46,  /* 00001280    ".OPT6EXF" */
+    0x47,0x14,0x2E,0x2E,0x50,0x53,0x32,0x4D,  /* 00001288    "G...PS2M" */
+    0x5F,0x50,0x53,0x57,0x01,0x45,0x4E,0x46,  /* 00001290    "_PSW.ENF" */
+    0x47,0x0A,0x0A,0x7B,0x4F,0x50,0x54,0x36,  /* 00001298    "G..{OPT6" */
+    0x0A,0xDF,0x4F,0x50,0x54,0x36,0xA0,0x0D,  /* 000012A0    "..OPT6.." */
+    0x68,0x7D,0x4F,0x50,0x54,0x36,0x0A,0x20,  /* 000012A8    "h}OPT6. " */
+    0x4F,0x50,0x54,0x36,0x45,0x58,0x46,0x47,  /* 000012B0    "OPT6EXFG" */
+    0x14,0x14,0x53,0x49,0x4F,0x53,0x01,0x70,  /* 000012B8    "..SIOS.p" */
+    0x0D,0x53,0x49,0x4F,0x53,0x00,0x5B,0x31,  /* 000012C0    ".SIOS.[1" */
+    0x53,0x49,0x4F,0x4B,0xFF,0x14,0x14,0x53,  /* 000012C8    "SIOK...S" */
+    0x49,0x4F,0x57,0x01,0x70,0x0D,0x53,0x49,  /* 000012D0    "IOW.p.SI" */
+    0x4F,0x57,0x00,0x5B,0x31,0x53,0x49,0x4F,  /* 000012D8    "OW.[1SIO" */
+    0x4B,0x00,0x14,0x3C,0x53,0x49,0x4F,0x48,  /* 000012E0    "K..<SIOH" */
+    0x00,0x70,0x0D,0x53,0x49,0x4F,0x48,0x00,  /* 000012E8    ".p.SIOH." */
+    0x5B,0x31,0x45,0x4E,0x46,0x47,0x0A,0x0A,  /* 000012F0    "[1ENFG.." */
+    0xA0,0x10,0x7B,0x4F,0x50,0x54,0x33,0x0A,  /* 000012F8    "..{OPT3." */
+    0x10,0x00,0x86,0x50,0x53,0x32,0x4B,0x0A,  /* 00001300    "...PS2K." */
+    0x02,0xA0,0x10,0x7B,0x4F,0x50,0x54,0x33,  /* 00001308    "...{OPT3" */
+    0x0A,0x20,0x00,0x86,0x50,0x53,0x32,0x4D,  /* 00001310    ". ..PS2M" */
+    0x0A,0x02,0x53,0x49,0x4F,0x4B,0x00,0x5B,  /* 00001318    "..SIOK.[" */
+    0x80,0x49,0x4F,0x49,0x44,0x01,0x53,0x50,  /* 00001320    ".IOID.SP" */
+    0x49,0x4F,0x0A,0x02,0x5B,0x81,0x10,0x49,  /* 00001328    "IO..[..I" */
+    0x4F,0x49,0x44,0x01,0x49,0x4E,0x44,0x58,  /* 00001330    "OID.INDX" */
+    0x08,0x44,0x41,0x54,0x41,0x08,0x5B,0x86,  /* 00001338    ".DATA.[." */
+    0x4A,0x09,0x49,0x4E,0x44,0x58,0x44,0x41,  /* 00001340    "J.INDXDA" */
+    0x54,0x41,0x01,0x00,0x38,0x4C,0x44,0x4E,  /* 00001348    "TA..8LDN" */
+    0x5F,0x08,0x00,0x40,0x0D,0x46,0x44,0x43,  /* 00001350    "_..@.FDC" */
+    0x50,0x01,0x00,0x02,0x4C,0x50,0x54,0x50,  /* 00001358    "P...LPTP" */
+    0x01,0x55,0x52,0x41,0x50,0x01,0x55,0x52,  /* 00001360    ".URAP.UR" */
+    0x42,0x50,0x01,0x00,0x4A,0x06,0x41,0x43,  /* 00001368    "BP..J.AC" */
+    0x54,0x52,0x08,0x00,0x48,0x17,0x49,0x4F,  /* 00001370    "TR..H.IO" */
+    0x41,0x48,0x08,0x49,0x4F,0x41,0x4C,0x08,  /* 00001378    "AH.IOAL." */
+    0x49,0x4F,0x48,0x32,0x08,0x49,0x4F,0x4C,  /* 00001380    "IOH2.IOL" */
+    0x32,0x08,0x00,0x40,0x06,0x49,0x4E,0x54,  /* 00001388    "2..@.INT" */
+    0x52,0x08,0x00,0x18,0x44,0x4D,0x43,0x48,  /* 00001390    "R...DMCH" */
+    0x08,0x00,0x48,0x35,0x43,0x52,0x45,0x30,  /* 00001398    "..H5CRE0" */
+    0x08,0x43,0x52,0x45,0x31,0x08,0x43,0x52,  /* 000013A0    ".CRE1.CR" */
+    0x45,0x32,0x08,0x43,0x52,0x45,0x33,0x08,  /* 000013A8    "E2.CRE3." */
+    0x43,0x52,0x45,0x34,0x08,0x00,0x48,0x05,  /* 000013B0    "CRE4..H." */
+    0x4F,0x50,0x54,0x30,0x08,0x4F,0x50,0x54,  /* 000013B8    "OPT0.OPT" */
+    0x31,0x08,0x4F,0x50,0x54,0x32,0x08,0x4F,  /* 000013C0    "1.OPT2.O" */
+    0x50,0x54,0x33,0x08,0x00,0x10,0x4F,0x50,  /* 000013C8    "PT3...OP" */
+    0x54,0x36,0x08,0x00,0x10,0x4F,0x50,0x54,  /* 000013D0    "T6...OPT" */
+    0x39,0x08,0x14,0x0F,0x43,0x47,0x4C,0x44,  /* 000013D8    "9...CGLD" */
+    0x01,0xA4,0x83,0x88,0x44,0x43,0x41,0x54,  /* 000013E0    "....DCAT" */
+    0x68,0x00,0x14,0x4E,0x04,0x44,0x53,0x54,  /* 000013E8    "h..N.DST" */
+    0x41,0x01,0x45,0x4E,0x46,0x47,0x43,0x47,  /* 000013F0    "A.ENFGCG" */
+    0x4C,0x44,0x68,0x70,0x41,0x43,0x54,0x52,  /* 000013F8    "LDhpACTR" */
+    0x60,0x45,0x58,0x46,0x47,0xA0,0x07,0x93,  /* 00001400    "`EXFG..." */
+    0x60,0x0A,0xFF,0xA4,0x00,0x7B,0x60,0x01,  /* 00001408    "`....{`." */
+    0x60,0x7D,0x49,0x4F,0x53,0x54,0x79,0x60,  /* 00001410    "`}IOSTy`" */
+    0x68,0x00,0x49,0x4F,0x53,0x54,0xA0,0x05,  /* 00001418    "h.IOST.." */
+    0x60,0xA4,0x0A,0x0F,0xA1,0x14,0xA0,0x0E,  /* 00001420    "`......." */
+    0x7B,0x79,0x01,0x68,0x00,0x49,0x4F,0x53,  /* 00001428    "{y.h.IOS" */
+    0x54,0x00,0xA4,0x0A,0x0D,0xA1,0x03,0xA4,  /* 00001430    "T......." */
+    0x00,0x14,0x4F,0x04,0x44,0x43,0x4E,0x54,  /* 00001438    "..O.DCNT" */
+    0x02,0x45,0x4E,0x46,0x47,0x43,0x47,0x4C,  /* 00001440    ".ENFGCGL" */
+    0x44,0x68,0x79,0x49,0x4F,0x41,0x48,0x0A,  /* 00001448    "DhyIOAH." */
+    0x08,0x61,0x7D,0x49,0x4F,0x41,0x4C,0x61,  /* 00001450    ".a}IOALa" */
+    0x61,0x52,0x52,0x49,0x4F,0x68,0x69,0x61,  /* 00001458    "aRRIOhia" */
+    0x0A,0x08,0xA0,0x1C,0x90,0x95,0x44,0x4D,  /* 00001460    "......DM" */
+    0x43,0x48,0x0A,0x04,0x92,0x93,0x7B,0x44,  /* 00001468    "CH....{D" */
+    0x4D,0x43,0x48,0x0A,0x03,0x61,0x00,0x52,  /* 00001470    "MCH..a.R" */
+    0x44,0x4D,0x41,0x68,0x69,0x75,0x61,0x70,  /* 00001478    "DMAhiuap" */
+    0x69,0x41,0x43,0x54,0x52,0x45,0x58,0x46,  /* 00001480    "iACTREXF" */
+    0x47,0x08,0x43,0x52,0x53,0x31,0x11,0x13,  /* 00001488    "G.CRS1.." */
+    0x0A,0x10,0x47,0x01,0x00,0x00,0x00,0x00,  /* 00001490    "..G....." */
+    0x01,0x00,0x22,0x00,0x00,0x2A,0x00,0x00,  /* 00001498    ".."..*.." */
+    0x79,0x00,0x8B,0x43,0x52,0x53,0x31,0x0A,  /* 000014A0    "y..CRS1." */
+    0x09,0x49,0x52,0x51,0x4D,0x8C,0x43,0x52,  /* 000014A8    ".IRQM.CR" */
+    0x53,0x31,0x0A,0x0C,0x44,0x4D,0x41,0x4D,  /* 000014B0    "S1..DMAM" */
+    0x8B,0x43,0x52,0x53,0x31,0x0A,0x02,0x49,  /* 000014B8    ".CRS1..I" */
+    0x4F,0x31,0x31,0x8B,0x43,0x52,0x53,0x31,  /* 000014C0    "O11.CRS1" */
+    0x0A,0x04,0x49,0x4F,0x31,0x32,0x8C,0x43,  /* 000014C8    "..IO12.C" */
+    0x52,0x53,0x31,0x0A,0x07,0x4C,0x45,0x4E,  /* 000014D0    "RS1..LEN" */
+    0x31,0x08,0x43,0x52,0x53,0x32,0x11,0x1B,  /* 000014D8    "1.CRS2.." */
+    0x0A,0x18,0x47,0x01,0x00,0x00,0x00,0x00,  /* 000014E0    "..G....." */
+    0x01,0x00,0x47,0x01,0x00,0x00,0x00,0x00,  /* 000014E8    "..G....." */
+    0x01,0x00,0x22,0x40,0x00,0x2A,0x04,0x00,  /* 000014F0    ".."@.*.." */
+    0x79,0x00,0x8B,0x43,0x52,0x53,0x32,0x0A,  /* 000014F8    "y..CRS2." */
+    0x11,0x49,0x52,0x51,0x45,0x8C,0x43,0x52,  /* 00001500    ".IRQE.CR" */
+    0x53,0x32,0x0A,0x14,0x44,0x4D,0x41,0x45,  /* 00001508    "S2..DMAE" */
+    0x8B,0x43,0x52,0x53,0x32,0x0A,0x02,0x49,  /* 00001510    ".CRS2..I" */
+    0x4F,0x32,0x31,0x8B,0x43,0x52,0x53,0x32,  /* 00001518    "O21.CRS2" */
+    0x0A,0x04,0x49,0x4F,0x32,0x32,0x8C,0x43,  /* 00001520    "..IO22.C" */
+    0x52,0x53,0x32,0x0A,0x07,0x4C,0x45,0x4E,  /* 00001528    "RS2..LEN" */
+    0x32,0x8B,0x43,0x52,0x53,0x32,0x0A,0x0A,  /* 00001530    "2.CRS2.." */
+    0x49,0x4F,0x33,0x31,0x8B,0x43,0x52,0x53,  /* 00001538    "IO31.CRS" */
+    0x32,0x0A,0x0C,0x49,0x4F,0x33,0x32,0x8C,  /* 00001540    "2..IO32." */
+    0x43,0x52,0x53,0x32,0x0A,0x0F,0x4C,0x45,  /* 00001548    "CRS2..LE" */
+    0x4E,0x33,0x14,0x46,0x08,0x44,0x43,0x52,  /* 00001550    "N3.F.DCR" */
+    0x53,0x02,0x45,0x4E,0x46,0x47,0x43,0x47,  /* 00001558    "S.ENFGCG" */
+    0x4C,0x44,0x68,0x79,0x49,0x4F,0x41,0x48,  /* 00001560    "LDhyIOAH" */
+    0x0A,0x08,0x49,0x4F,0x31,0x31,0x7D,0x49,  /* 00001568    "..IO11}I" */
+    0x4F,0x41,0x4C,0x49,0x4F,0x31,0x31,0x49,  /* 00001570    "OALIO11I" */
+    0x4F,0x31,0x31,0x70,0x49,0x4F,0x31,0x31,  /* 00001578    "O11pIO11" */
+    0x49,0x4F,0x31,0x32,0x74,0x82,0x49,0x4F,  /* 00001580    "IO12t.IO" */
+    0x31,0x31,0x00,0x01,0x60,0x79,0x01,0x60,  /* 00001588    "11..`y.`" */
+    0x4C,0x45,0x4E,0x31,0xA0,0x0F,0x49,0x4E,  /* 00001590    "LEN1..IN" */
+    0x54,0x52,0x79,0x01,0x49,0x4E,0x54,0x52,  /* 00001598    "TRy.INTR" */
+    0x49,0x52,0x51,0x4D,0xA1,0x07,0x70,0x00,  /* 000015A0    "IRQM..p." */
+    0x49,0x52,0x51,0x4D,0xA0,0x12,0x91,0x94,  /* 000015A8    "IRQM...." */
+    0x44,0x4D,0x43,0x48,0x0A,0x03,0x93,0x69,  /* 000015B0    "DMCH...i" */
+    0x00,0x70,0x00,0x44,0x4D,0x41,0x4D,0xA1,  /* 000015B8    ".p.DMAM." */
+    0x10,0x7B,0x44,0x4D,0x43,0x48,0x0A,0x03,  /* 000015C0    ".{DMCH.." */
+    0x61,0x79,0x01,0x61,0x44,0x4D,0x41,0x4D,  /* 000015C8    "ay.aDMAM" */
+    0x45,0x58,0x46,0x47,0xA4,0x43,0x52,0x53,  /* 000015D0    "EXFG.CRS" */
+    0x31,0x14,0x4F,0x07,0x44,0x53,0x52,0x53,  /* 000015D8    "1.O.DSRS" */
+    0x02,0x8B,0x68,0x0A,0x09,0x49,0x52,0x51,  /* 000015E0    "..h..IRQ" */
+    0x4D,0x8C,0x68,0x0A,0x0C,0x44,0x4D,0x41,  /* 000015E8    "M.h..DMA" */
+    0x4D,0x8B,0x68,0x0A,0x02,0x49,0x4F,0x31,  /* 000015F0    "M.h..IO1" */
+    0x31,0x45,0x4E,0x46,0x47,0x43,0x47,0x4C,  /* 000015F8    "1ENFGCGL" */
+    0x44,0x69,0x7B,0x49,0x4F,0x31,0x31,0x0A,  /* 00001600    "Di{IO11." */
+    0xFF,0x49,0x4F,0x41,0x4C,0x7A,0x49,0x4F,  /* 00001608    ".IOALzIO" */
+    0x31,0x31,0x0A,0x08,0x49,0x4F,0x41,0x48,  /* 00001610    "11..IOAH" */
+    0xA0,0x12,0x49,0x52,0x51,0x4D,0x82,0x49,  /* 00001618    "..IRQM.I" */
+    0x52,0x51,0x4D,0x60,0x74,0x60,0x01,0x49,  /* 00001620    "RQM`t`.I" */
+    0x4E,0x54,0x52,0xA1,0x07,0x70,0x00,0x49,  /* 00001628    "NTR..p.I" */
+    0x4E,0x54,0x52,0xA0,0x12,0x44,0x4D,0x41,  /* 00001630    "NTR..DMA" */
+    0x4D,0x82,0x44,0x4D,0x41,0x4D,0x60,0x74,  /* 00001638    "M.DMAM`t" */
+    0x60,0x01,0x44,0x4D,0x43,0x48,0xA1,0x08,  /* 00001640    "`.DMCH.." */
+    0x70,0x0A,0x04,0x44,0x4D,0x43,0x48,0x45,  /* 00001648    "p..DMCHE" */
+    0x58,0x46,0x47,0x44,0x43,0x4E,0x54,0x69,  /* 00001650    "XFGDCNTi" */
+    0x01,0x5B,0x82,0x4A,0x18,0x52,0x4D,0x53,  /* 00001658    ".[.J.RMS" */
+    0x43,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,  /* 00001660    "C._HID.A" */
+    0xD0,0x0C,0x02,0x08,0x5F,0x55,0x49,0x44,  /* 00001668    "...._UID" */
+    0x0A,0x10,0x08,0x43,0x52,0x53,0x5F,0x11,  /* 00001670    "...CRS_." */
+    0x4E,0x09,0x0A,0x9A,0x47,0x01,0x10,0x00,  /* 00001678    "N...G..." */
+    0x10,0x00,0x00,0x10,0x47,0x01,0x22,0x00,  /* 00001680    "....G."." */
+    0x22,0x00,0x00,0x1E,0x47,0x01,0x44,0x00,  /* 00001688    ""...G.D." */
+    0x44,0x00,0x00,0x1C,0x47,0x01,0x62,0x00,  /* 00001690    "D...G.b." */
+    0x62,0x00,0x00,0x02,0x47,0x01,0x65,0x00,  /* 00001698    "b...G.e." */
+    0x65,0x00,0x00,0x0B,0x47,0x01,0x72,0x00,  /* 000016A0    "e...G.r." */
+    0x72,0x00,0x00,0x0E,0x47,0x01,0x80,0x00,  /* 000016A8    "r...G..." */
+    0x80,0x00,0x00,0x01,0x47,0x01,0x84,0x00,  /* 000016B0    "....G..." */
+    0x84,0x00,0x00,0x03,0x47,0x01,0x88,0x00,  /* 000016B8    "....G..." */
+    0x88,0x00,0x00,0x01,0x47,0x01,0x8C,0x00,  /* 000016C0    "....G..." */
+    0x8C,0x00,0x00,0x03,0x47,0x01,0x90,0x00,  /* 000016C8    "....G..." */
+    0x90,0x00,0x00,0x10,0x47,0x01,0xA2,0x00,  /* 000016D0    "....G..." */
+    0xA2,0x00,0x00,0x1E,0x47,0x01,0xE0,0x00,  /* 000016D8    "....G..." */
+    0xE0,0x00,0x00,0x10,0x47,0x01,0xD0,0x04,  /* 000016E0    "....G..." */
+    0xD0,0x04,0x00,0x02,0x47,0x01,0x00,0x00,  /* 000016E8    "....G..." */
+    0x00,0x00,0x00,0x00,0x47,0x01,0x00,0x00,  /* 000016F0    "....G..." */
+    0x00,0x00,0x00,0x00,0x47,0x01,0x00,0x00,  /* 000016F8    "....G..." */
+    0x00,0x00,0x00,0x00,0x47,0x01,0x00,0xDE,  /* 00001700    "....G..." */
+    0x00,0xDE,0x00,0x80,0x47,0x01,0x80,0xDE,  /* 00001708    "....G..." */
+    0x80,0xDE,0x00,0x80,0x79,0x00,0x14,0x4E,  /* 00001710    "....y..N" */
+    0x0C,0x5F,0x43,0x52,0x53,0x00,0x8B,0x43,  /* 00001718    "._CRS..C" */
+    0x52,0x53,0x5F,0x0A,0x72,0x47,0x50,0x30,  /* 00001720    "RS_.rGP0" */
+    0x30,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x74,  /* 00001728    "0.CRS_.t" */
+    0x47,0x50,0x30,0x31,0x8C,0x43,0x52,0x53,  /* 00001730    "GP01.CRS" */
+    0x5F,0x0A,0x77,0x47,0x50,0x30,0x4C,0x70,  /* 00001738    "_.wGP0Lp" */
+    0x50,0x4D,0x42,0x53,0x47,0x50,0x30,0x30,  /* 00001740    "PMBSGP00" */
+    0x70,0x50,0x4D,0x42,0x53,0x47,0x50,0x30,  /* 00001748    "pPMBSGP0" */
+    0x31,0x70,0x50,0x4D,0x4C,0x4E,0x47,0x50,  /* 00001750    "1pPMLNGP" */
+    0x30,0x4C,0xA0,0x42,0x04,0x53,0x4D,0x42,  /* 00001758    "0L.B.SMB" */
+    0x53,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x7A,  /* 00001760    "S.CRS_.z" */
+    0x47,0x50,0x31,0x30,0x8B,0x43,0x52,0x53,  /* 00001768    "GP10.CRS" */
+    0x5F,0x0A,0x7C,0x47,0x50,0x31,0x31,0x8C,  /* 00001770    "_.|GP11." */
+    0x43,0x52,0x53,0x5F,0x0A,0x7F,0x47,0x50,  /* 00001778    "CRS_..GP" */
+    0x31,0x4C,0x70,0x53,0x4D,0x42,0x53,0x47,  /* 00001780    "1LpSMBSG" */
+    0x50,0x31,0x30,0x70,0x53,0x4D,0x42,0x53,  /* 00001788    "P10pSMBS" */
+    0x47,0x50,0x31,0x31,0x70,0x53,0x4D,0x42,  /* 00001790    "GP11pSMB" */
+    0x4C,0x47,0x50,0x31,0x4C,0xA0,0x42,0x04,  /* 00001798    "LGP1L.B." */
+    0x47,0x50,0x42,0x53,0x8B,0x43,0x52,0x53,  /* 000017A0    "GPBS.CRS" */
+    0x5F,0x0A,0x82,0x47,0x50,0x32,0x30,0x8B,  /* 000017A8    "_..GP20." */
+    0x43,0x52,0x53,0x5F,0x0A,0x84,0x47,0x50,  /* 000017B0    "CRS_..GP" */
+    0x32,0x31,0x8C,0x43,0x52,0x53,0x5F,0x0A,  /* 000017B8    "21.CRS_." */
+    0x87,0x47,0x50,0x32,0x4C,0x70,0x47,0x50,  /* 000017C0    ".GP2LpGP" */
+    0x42,0x53,0x47,0x50,0x32,0x30,0x70,0x47,  /* 000017C8    "BSGP20pG" */
+    0x50,0x42,0x53,0x47,0x50,0x32,0x31,0x70,  /* 000017D0    "PBSGP21p" */
+    0x47,0x50,0x4C,0x4E,0x47,0x50,0x32,0x4C,  /* 000017D8    "GPLNGP2L" */
+    0xA4,0x43,0x52,0x53,0x5F,0x5B,0x82,0x47,  /* 000017E0    ".CRS_[.G" */
+    0x05,0x48,0x50,0x45,0x54,0x08,0x5F,0x48,  /* 000017E8    ".HPET._H" */
+    0x49,0x44,0x0C,0x41,0xD0,0x01,0x03,0x08,  /* 000017F0    "ID.A...." */
+    0x5F,0x43,0x52,0x53,0x11,0x17,0x0A,0x14,  /* 000017F8    "_CRS...." */
+    0x22,0x01,0x00,0x22,0x00,0x01,0x86,0x09,  /* 00001800    "".."...." */
+    0x00,0x00,0x00,0x10,0xC0,0xFE,0x00,0x04,  /* 00001808    "........" */
+    0x00,0x00,0x79,0x00,0x5B,0x80,0x5E,0x4C,  /* 00001810    "..y.[.^L" */
+    0x50,0x43,0x52,0x02,0x0A,0xA0,0x01,0x5B,  /* 00001818    "PCR....[" */
+    0x81,0x0B,0x4C,0x50,0x43,0x52,0x01,0x48,  /* 00001820    "..LPCR.H" */
+    0x50,0x54,0x45,0x01,0x14,0x11,0x5F,0x53,  /* 00001828    "PTE..._S" */
+    0x54,0x41,0x00,0xA0,0x08,0x48,0x50,0x54,  /* 00001830    "TA...HPT" */
+    0x45,0xA4,0x0A,0x0F,0xA4,0x00,0x5B,0x82,  /* 00001838    "E.....[." */
+    0x46,0x0F,0x4F,0x4D,0x53,0x43,0x08,0x5F,  /* 00001840    "F.OMSC._" */
+    0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C,0x02,  /* 00001848    "HID.A..." */
+    0x08,0x5F,0x55,0x49,0x44,0x00,0x08,0x43,  /* 00001850    "._UID..C" */
+    0x52,0x53,0x5F,0x11,0x46,0x04,0x0A,0x42,  /* 00001858    "RS_.F..B" */
+    0x47,0x01,0x4E,0x00,0x4E,0x00,0x00,0x02,  /* 00001860    "G.N.N..." */
+    0x47,0x01,0xA2,0x0C,0xA2,0x0C,0x00,0x02,  /* 00001868    "G......." */
+    0x86,0x09,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00001870    "........" */
+    0x00,0x00,0x00,0x00,0x86,0x09,0x00,0x00,  /* 00001878    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00001880    "........" */
+    0x86,0x09,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00001888    "........" */
+    0x00,0x00,0x00,0x00,0x86,0x09,0x00,0x00,  /* 00001890    "........" */
+    0x00,0x00,0x78,0xFF,0x00,0x00,0x08,0x00,  /* 00001898    "..x....." */
+    0x79,0x00,0x08,0x42,0x4D,0x49,0x4F,0x0A,  /* 000018A0    "y..BMIO." */
+    0x4E,0x14,0x4C,0x08,0x5F,0x43,0x52,0x53,  /* 000018A8    "N.L._CRS" */
+    0x00,0xA0,0x4C,0x06,0x41,0x50,0x43,0x42,  /* 000018B0    "..L.APCB" */
+    0x8A,0x43,0x52,0x53,0x5F,0x0A,0x18,0x4D,  /* 000018B8    ".CRS_..M" */
+    0x4C,0x30,0x31,0x8A,0x43,0x52,0x53,0x5F,  /* 000018C0    "L01.CRS_" */
+    0x0A,0x14,0x4D,0x42,0x30,0x31,0x8A,0x43,  /* 000018C8    "..MB01.C" */
+    0x52,0x53,0x5F,0x0A,0x24,0x4D,0x4C,0x30,  /* 000018D0    "RS_.$ML0" */
+    0x32,0x8A,0x43,0x52,0x53,0x5F,0x0A,0x20,  /* 000018D8    "2.CRS_. " */
+    0x4D,0x42,0x30,0x32,0x8A,0x43,0x52,0x53,  /* 000018E0    "MB02.CRS" */
+    0x5F,0x0A,0x30,0x4D,0x4C,0x30,0x33,0x8A,  /* 000018E8    "_.0ML03." */
+    0x43,0x52,0x53,0x5F,0x0A,0x2C,0x4D,0x42,  /* 000018F0    "CRS_.,MB" */
+    0x30,0x33,0x70,0x41,0x50,0x43,0x42,0x4D,  /* 000018F8    "03pAPCBM" */
+    0x42,0x30,0x31,0x70,0x41,0x50,0x43,0x4C,  /* 00001900    "B01pAPCL" */
+    0x4D,0x4C,0x30,0x31,0x70,0x0C,0x00,0x00,  /* 00001908    "ML01p..." */
+    0xE0,0xFE,0x4D,0x42,0x30,0x32,0x70,0x0B,  /* 00001910    "..MB02p." */
+    0x00,0x10,0x4D,0x4C,0x30,0x32,0x70,0x52,  /* 00001918    "..ML02pR" */
+    0x4F,0x4D,0x53,0x4D,0x42,0x30,0x33,0x74,  /* 00001920    "OMSMB03t" */
+    0x00,0x52,0x4F,0x4D,0x53,0x4D,0x4C,0x30,  /* 00001928    ".ROMSML0" */
+    0x33,0xA4,0x43,0x52,0x53,0x5F,0x5B,0x82,  /* 00001930    "3.CRS_[." */
+    0x47,0x14,0x5E,0x5E,0x52,0x4D,0x45,0x4D,  /* 00001938    "G.^^RMEM" */
+    0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,  /* 00001940    "._HID.A." */
+    0x0C,0x01,0x08,0x5F,0x55,0x49,0x44,0x01,  /* 00001948    "..._UID." */
+    0x08,0x43,0x52,0x53,0x5F,0x11,0x42,0x04,  /* 00001950    ".CRS_.B." */
+    0x0A,0x3E,0x86,0x09,0x00,0x01,0x00,0x00,  /* 00001958    ".>......" */
+    0x00,0x00,0x00,0x00,0x0A,0x00,0x86,0x09,  /* 00001960    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00001968    "........" */
+    0x00,0x00,0x86,0x09,0x00,0x00,0x00,0x00,  /* 00001970    "........" */
+    0x0E,0x00,0x00,0x00,0x02,0x00,0x86,0x09,  /* 00001978    "........" */
+    0x00,0x01,0x00,0x00,0x10,0x00,0x00,0x00,  /* 00001980    "........" */
+    0x00,0x00,0x86,0x09,0x00,0x00,0x00,0x00,  /* 00001988    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x79,0x00,  /* 00001990    "......y." */
+    0x14,0x46,0x0E,0x5F,0x43,0x52,0x53,0x00,  /* 00001998    ".F._CRS." */
+    0x8A,0x43,0x52,0x53,0x5F,0x0A,0x10,0x42,  /* 000019A0    ".CRS_..B" */
+    0x41,0x53,0x31,0x8A,0x43,0x52,0x53,0x5F,  /* 000019A8    "AS1.CRS_" */
+    0x0A,0x14,0x4C,0x45,0x4E,0x31,0x8A,0x43,  /* 000019B0    "..LEN1.C" */
+    0x52,0x53,0x5F,0x0A,0x1C,0x42,0x41,0x53,  /* 000019B8    "RS_..BAS" */
+    0x32,0x8A,0x43,0x52,0x53,0x5F,0x0A,0x20,  /* 000019C0    "2.CRS_. " */
+    0x4C,0x45,0x4E,0x32,0x8A,0x43,0x52,0x53,  /* 000019C8    "LEN2.CRS" */
+    0x5F,0x0A,0x2C,0x4C,0x45,0x4E,0x33,0x8A,  /* 000019D0    "_.,LEN3." */
+    0x43,0x52,0x53,0x5F,0x0A,0x34,0x42,0x41,  /* 000019D8    "CRS_.4BA" */
+    0x53,0x34,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 000019E0    "S4.CRS_." */
+    0x38,0x4C,0x45,0x4E,0x34,0xA0,0x05,0x4F,  /* 000019E8    "8LEN4..O" */
+    0x53,0x46,0x4C,0xA1,0x41,0x06,0xA0,0x28,  /* 000019F0    "SFL.A..(" */
+    0x4D,0x47,0x31,0x42,0xA0,0x22,0x94,0x4D,  /* 000019F8    "MG1B.".M" */
+    0x47,0x31,0x42,0x0C,0x00,0x00,0x0C,0x00,  /* 00001A00    "G1B....." */
+    0x70,0x0C,0x00,0x00,0x0C,0x00,0x42,0x41,  /* 00001A08    "p.....BA" */
+    0x53,0x31,0x74,0x4D,0x47,0x31,0x42,0x42,  /* 00001A10    "S1tMG1BB" */
+    0x41,0x53,0x31,0x4C,0x45,0x4E,0x31,0xA1,  /* 00001A18    "AS1LEN1." */
+    0x15,0x70,0x0C,0x00,0x00,0x0C,0x00,0x42,  /* 00001A20    ".p.....B" */
+    0x41,0x53,0x31,0x70,0x0C,0x00,0x00,0x02,  /* 00001A28    "AS1p...." */
+    0x00,0x4C,0x45,0x4E,0x31,0xA0,0x1F,0x72,  /* 00001A30    ".LEN1..r" */
+    0x4D,0x47,0x31,0x42,0x4D,0x47,0x31,0x4C,  /* 00001A38    "MG1BMG1L" */
+    0x60,0x70,0x60,0x42,0x41,0x53,0x32,0x74,  /* 00001A40    "`p`BAS2t" */
+    0x0C,0x00,0x00,0x10,0x00,0x42,0x41,0x53,  /* 00001A48    ".....BAS" */
+    0x32,0x4C,0x45,0x4E,0x32,0x74,0x4D,0x47,  /* 00001A50    "2LEN2tMG" */
+    0x32,0x42,0x0C,0x00,0x00,0x10,0x00,0x4C,  /* 00001A58    "2B.....L" */
+    0x45,0x4E,0x33,0x72,0x4D,0x47,0x32,0x42,  /* 00001A60    "EN3rMG2B" */
+    0x4D,0x47,0x32,0x4C,0x42,0x41,0x53,0x34,  /* 00001A68    "MG2LBAS4" */
+    0x74,0x00,0x42,0x41,0x53,0x34,0x4C,0x45,  /* 00001A70    "t.BAS4LE" */
+    0x4E,0x34,0xA4,0x43,0x52,0x53,0x5F,0x5B,  /* 00001A78    "N4.CRS_[" */
+    0x82,0x43,0x05,0x47,0x4F,0x4C,0x41,0x08,  /* 00001A80    ".C.GOLA." */
+    0x5F,0x41,0x44,0x52,0x0C,0x00,0x00,0x01,  /* 00001A88    "_ADR...." */
+    0x00,0x5B,0x80,0x42,0x41,0x52,0x30,0x02,  /* 00001A90    ".[.BAR0." */
+    0x00,0x0A,0x50,0x5B,0x81,0x16,0x42,0x41,  /* 00001A98    "..P[..BA" */
+    0x52,0x30,0x01,0x00,0x40,0x04,0x52,0x49,  /* 00001AA0    "R0..@.RI" */
+    0x44,0x5F,0x08,0x00,0x48,0x1B,0x4E,0x41,  /* 00001AA8    "D_..H.NA" */
+    0x50,0x43,0x01,0x14,0x20,0x50,0x43,0x4D,  /* 00001AB0    "PC.. PCM" */
+    0x5F,0x01,0xA0,0x19,0x95,0x52,0x49,0x44,  /* 00001AB8    "_....RID" */
+    0x5F,0x0A,0x12,0xA0,0x08,0x68,0x70,0x00,  /* 00001AC0    "_....hp." */
+    0x4E,0x41,0x50,0x43,0xA1,0x07,0x70,0x01,  /* 00001AC8    "NAPC..p." */
+    0x4E,0x41,0x50,0x43,0x5B,0x82,0x43,0x05,  /* 00001AD0    "NAPC[.C." */
+    0x47,0x4F,0x4C,0x42,0x08,0x5F,0x41,0x44,  /* 00001AD8    "GOLB._AD" */
+    0x52,0x0C,0x00,0x00,0x02,0x00,0x5B,0x80,  /* 00001AE0    "R.....[." */
+    0x42,0x41,0x52,0x30,0x02,0x00,0x0A,0x50,  /* 00001AE8    "BAR0...P" */
+    0x5B,0x81,0x16,0x42,0x41,0x52,0x30,0x01,  /* 00001AF0    "[..BAR0." */
+    0x00,0x40,0x04,0x52,0x49,0x44,0x5F,0x08,  /* 00001AF8    ".@.RID_." */
+    0x00,0x48,0x1B,0x4E,0x41,0x50,0x43,0x01,  /* 00001B00    ".H.NAPC." */
+    0x14,0x20,0x50,0x43,0x4D,0x5F,0x01,0xA0,  /* 00001B08    ". PCM_.." */
+    0x19,0x95,0x52,0x49,0x44,0x5F,0x0A,0x12,  /* 00001B10    "..RID_.." */
+    0xA0,0x08,0x68,0x70,0x00,0x4E,0x41,0x50,  /* 00001B18    "..hp.NAP" */
+    0x43,0xA1,0x07,0x70,0x01,0x4E,0x41,0x50,  /* 00001B20    "C..p.NAP" */
+    0x43,0x5B,0x82,0x19,0x50,0x4D,0x46,0x5F,  /* 00001B28    "C[..PMF_" */
+    0x08,0x5F,0x41,0x44,0x52,0x0C,0x03,0x00,  /* 00001B30    "._ADR..." */
+    0x04,0x00,0x5B,0x80,0x42,0x41,0x52,0x30,  /* 00001B38    "..[.BAR0" */
+    0x02,0x00,0x0A,0xFF,0x5B,0x82,0x4D,0x92,  /* 00001B40    "....[.M." */
+    0x49,0x44,0x45,0x30,0x08,0x5F,0x41,0x44,  /* 00001B48    "IDE0._AD" */
+    0x52,0x0C,0x01,0x00,0x04,0x00,0x08,0x52,  /* 00001B50    "R......R" */
+    0x45,0x47,0x46,0x01,0x14,0x12,0x5F,0x52,  /* 00001B58    "EGF..._R" */
+    0x45,0x47,0x02,0xA0,0x0B,0x93,0x68,0x0A,  /* 00001B60    "EG....h." */
+    0x02,0x70,0x69,0x52,0x45,0x47,0x46,0x5B,  /* 00001B68    ".piREGF[" */
+    0x80,0x42,0x41,0x52,0x30,0x02,0x00,0x0A,  /* 00001B70    ".BAR0..." */
+    0x60,0x5B,0x81,0x4C,0x0B,0x42,0x41,0x52,  /* 00001B78    "`[.L.BAR" */
+    0x30,0x01,0x00,0x40,0x20,0x53,0x43,0x45,  /* 00001B80    "0..@ SCE" */
+    0x4E,0x01,0x50,0x43,0x45,0x4E,0x01,0x00,  /* 00001B88    "N.PCEN.." */
+    0x0A,0x53,0x50,0x57,0x42,0x01,0x53,0x52,  /* 00001B90    ".SPWB.SR" */
+    0x50,0x42,0x01,0x50,0x50,0x57,0x42,0x01,  /* 00001B98    "PB.PPWB." */
+    0x50,0x52,0x50,0x42,0x01,0x50,0x4D,0x38,  /* 00001BA0    "PRPB.PM8" */
+    0x30,0x01,0x50,0x53,0x38,0x30,0x01,0x53,  /* 00001BA8    "0.PS80.S" */
+    0x4D,0x38,0x30,0x01,0x53,0x53,0x38,0x30,  /* 00001BB0    "M80.SS80" */
+    0x01,0x00,0x2C,0x53,0x53,0x52,0x54,0x04,  /* 00001BB8    "..,SSRT." */
+    0x53,0x53,0x50,0x57,0x04,0x53,0x4D,0x52,  /* 00001BC0    "SSPW.SMR" */
+    0x54,0x04,0x53,0x4D,0x50,0x57,0x04,0x50,  /* 00001BC8    "T.SMPW.P" */
+    0x53,0x52,0x54,0x04,0x50,0x53,0x50,0x57,  /* 00001BD0    "SRT.PSPW" */
+    0x04,0x50,0x4D,0x52,0x54,0x04,0x50,0x4D,  /* 00001BD8    ".PMRT.PM" */
+    0x50,0x57,0x04,0x53,0x53,0x41,0x44,0x02,  /* 00001BE0    "PW.SSAD." */
+    0x53,0x4D,0x41,0x44,0x02,0x50,0x53,0x41,  /* 00001BE8    "SMAD.PSA" */
+    0x44,0x02,0x50,0x4D,0x41,0x44,0x02,0x00,  /* 00001BF0    "D.PMAD.." */
+    0x08,0x53,0x58,0x52,0x54,0x04,0x53,0x58,  /* 00001BF8    ".SXRT.SX" */
+    0x50,0x57,0x04,0x50,0x58,0x52,0x54,0x04,  /* 00001C00    "PW.PXRT." */
+    0x50,0x58,0x50,0x57,0x04,0x53,0x53,0x55,  /* 00001C08    "PXPW.SSU" */
+    0x44,0x08,0x53,0x4D,0x55,0x44,0x08,0x50,  /* 00001C10    "D.SMUD.P" */
+    0x53,0x55,0x44,0x08,0x50,0x4D,0x55,0x44,  /* 00001C18    "SUD.PMUD" */
+    0x08,0x50,0x50,0x44,0x4E,0x01,0x50,0x50,  /* 00001C20    ".PPDN.PP" */
+    0x44,0x53,0x01,0x00,0x02,0x53,0x50,0x44,  /* 00001C28    "DS...SPD" */
+    0x4E,0x01,0x53,0x50,0x44,0x53,0x01,0x08,  /* 00001C30    "N.SPDS.." */
+    0x54,0x49,0x4D,0x30,0x12,0x46,0x05,0x06,  /* 00001C38    "TIM0.F.." */
+    0x12,0x0E,0x05,0x0A,0x78,0x0A,0xB4,0x0A,  /* 00001C40    "....x..." */
+    0xF0,0x0B,0x86,0x01,0x0B,0x58,0x02,0x12,  /* 00001C48    ".....X.." */
+    0x10,0x07,0x0A,0x78,0x0A,0x5A,0x0A,0x3C,  /* 00001C50    "...x.Z.<" */
+    0x0A,0x2D,0x0A,0x1E,0x0A,0x14,0x0A,0x0F,  /* 00001C58    ".-......" */
+    0x12,0x0D,0x08,0x0A,0x04,0x0A,0x03,0x0A,  /* 00001C60    "........" */
+    0x02,0x01,0x00,0x00,0x00,0x00,0x12,0x06,  /* 00001C68    "........" */
+    0x03,0x0A,0x02,0x01,0x00,0x12,0x0C,0x05,  /* 00001C70    "........" */
+    0x0A,0x20,0x0A,0x22,0x0A,0x42,0x0A,0x65,  /* 00001C78    ". .".B.e" */
+    0x0A,0xA8,0x12,0x10,0x07,0x0A,0xC2,0x0A,  /* 00001C80    "........" */
+    0xC1,0x0A,0xC0,0x0A,0xC4,0x0A,0xC5,0x0A,  /* 00001C88    "........" */
+    0xC6,0x0A,0xC7,0x08,0x54,0x4D,0x44,0x30,  /* 00001C90    "....TMD0" */
+    0x11,0x03,0x0A,0x14,0x8A,0x54,0x4D,0x44,  /* 00001C98    ".....TMD" */
+    0x30,0x00,0x50,0x49,0x4F,0x30,0x8A,0x54,  /* 00001CA0    "0.PIO0.T" */
+    0x4D,0x44,0x30,0x0A,0x04,0x44,0x4D,0x41,  /* 00001CA8    "MD0..DMA" */
+    0x30,0x8A,0x54,0x4D,0x44,0x30,0x0A,0x08,  /* 00001CB0    "0.TMD0.." */
+    0x50,0x49,0x4F,0x31,0x8A,0x54,0x4D,0x44,  /* 00001CB8    "PIO1.TMD" */
+    0x30,0x0A,0x0C,0x44,0x4D,0x41,0x31,0x8A,  /* 00001CC0    "0..DMA1." */
+    0x54,0x4D,0x44,0x30,0x0A,0x10,0x43,0x48,  /* 00001CC8    "TMD0..CH" */
+    0x4E,0x46,0x5B,0x82,0x42,0x0F,0x43,0x48,  /* 00001CD0    "NF[.B.CH" */
+    0x4E,0x30,0x08,0x5F,0x41,0x44,0x52,0x00,  /* 00001CD8    "N0._ADR." */
+    0x14,0x14,0x5F,0x53,0x54,0x41,0x00,0xA0,  /* 00001CE0    ".._STA.." */
+    0x08,0x50,0x43,0x45,0x4E,0xA4,0x0A,0x0F,  /* 00001CE8    ".PCEN..." */
+    0xA1,0x04,0xA4,0x0A,0x09,0x14,0x23,0x5F,  /* 00001CF0    "......#_" */
+    0x47,0x54,0x4D,0x00,0xA4,0x47,0x54,0x4D,  /* 00001CF8    "GTM..GTM" */
+    0x5F,0x50,0x4D,0x50,0x57,0x50,0x4D,0x52,  /* 00001D00    "_PMPWPMR" */
+    0x54,0x50,0x53,0x50,0x57,0x50,0x53,0x52,  /* 00001D08    "TPSPWPSR" */
+    0x54,0x50,0x4D,0x55,0x44,0x50,0x53,0x55,  /* 00001D10    "TPMUDPSU" */
+    0x44,0x14,0x42,0x07,0x5F,0x53,0x54,0x4D,  /* 00001D18    "D.B._STM" */
+    0x03,0x70,0x68,0x54,0x4D,0x44,0x30,0x70,  /* 00001D20    ".phTMD0p" */
+    0x53,0x54,0x4D,0x5F,0x60,0x7B,0x60,0x0A,  /* 00001D28    "STM_`{`." */
+    0xFF,0x50,0x53,0x55,0x44,0x7A,0x60,0x0A,  /* 00001D30    ".PSUDz`." */
+    0x08,0x60,0x7B,0x60,0x0A,0xFF,0x50,0x4D,  /* 00001D38    ".`{`..PM" */
+    0x55,0x44,0x7A,0x60,0x0A,0x08,0x60,0x7B,  /* 00001D40    "UDz`..`{" */
+    0x60,0x0A,0x0F,0x50,0x53,0x52,0x54,0x7A,  /* 00001D48    "`..PSRTz" */
+    0x60,0x0A,0x04,0x60,0x7B,0x60,0x0A,0x0F,  /* 00001D50    "`..`{`.." */
+    0x50,0x53,0x50,0x57,0x7A,0x60,0x0A,0x04,  /* 00001D58    "PSPWz`.." */
+    0x60,0x7B,0x60,0x0A,0x0F,0x50,0x4D,0x52,  /* 00001D60    "`{`..PMR" */
+    0x54,0x7A,0x60,0x0A,0x04,0x60,0x7B,0x60,  /* 00001D68    "Tz`..`{`" */
+    0x0A,0x0F,0x50,0x4D,0x50,0x57,0x70,0x47,  /* 00001D70    "..PMPWpG" */
+    0x54,0x46,0x5F,0x00,0x69,0x41,0x54,0x41,  /* 00001D78    "TF_.iATA" */
+    0x30,0x70,0x47,0x54,0x46,0x5F,0x01,0x6A,  /* 00001D80    "0pGTF_.j" */
+    0x41,0x54,0x41,0x31,0x5B,0x82,0x1B,0x44,  /* 00001D88    "ATA1[..D" */
+    0x52,0x56,0x30,0x08,0x5F,0x41,0x44,0x52,  /* 00001D90    "RV0._ADR" */
+    0x00,0x14,0x0F,0x5F,0x47,0x54,0x46,0x00,  /* 00001D98    "..._GTF." */
+    0xA4,0x52,0x41,0x54,0x41,0x41,0x54,0x41,  /* 00001DA0    ".RATAATA" */
+    0x30,0x5B,0x82,0x1B,0x44,0x52,0x56,0x31,  /* 00001DA8    "0[..DRV1" */
+    0x08,0x5F,0x41,0x44,0x52,0x01,0x14,0x0F,  /* 00001DB0    "._ADR..." */
+    0x5F,0x47,0x54,0x46,0x00,0xA4,0x52,0x41,  /* 00001DB8    "_GTF..RA" */
+    0x54,0x41,0x41,0x54,0x41,0x31,0x5B,0x82,  /* 00001DC0    "TAATA1[." */
+    0x42,0x0F,0x43,0x48,0x4E,0x31,0x08,0x5F,  /* 00001DC8    "B.CHN1._" */
+    0x41,0x44,0x52,0x01,0x14,0x14,0x5F,0x53,  /* 00001DD0    "ADR..._S" */
+    0x54,0x41,0x00,0xA0,0x08,0x53,0x43,0x45,  /* 00001DD8    "TA...SCE" */
+    0x4E,0xA4,0x0A,0x0F,0xA1,0x04,0xA4,0x0A,  /* 00001DE0    "N......." */
+    0x09,0x14,0x23,0x5F,0x47,0x54,0x4D,0x00,  /* 00001DE8    "..#_GTM." */
+    0xA4,0x47,0x54,0x4D,0x5F,0x53,0x4D,0x50,  /* 00001DF0    ".GTM_SMP" */
+    0x57,0x53,0x4D,0x52,0x54,0x53,0x53,0x50,  /* 00001DF8    "WSMRTSSP" */
+    0x57,0x53,0x53,0x52,0x54,0x53,0x4D,0x55,  /* 00001E00    "WSSRTSMU" */
+    0x44,0x53,0x53,0x55,0x44,0x14,0x42,0x07,  /* 00001E08    "DSSUD.B." */
+    0x5F,0x53,0x54,0x4D,0x03,0x70,0x68,0x54,  /* 00001E10    "_STM.phT" */
+    0x4D,0x44,0x30,0x70,0x53,0x54,0x4D,0x5F,  /* 00001E18    "MD0pSTM_" */
+    0x60,0x7B,0x60,0x0A,0xFF,0x53,0x53,0x55,  /* 00001E20    "`{`..SSU" */
+    0x44,0x7A,0x60,0x0A,0x08,0x60,0x7B,0x60,  /* 00001E28    "Dz`..`{`" */
+    0x0A,0xFF,0x53,0x4D,0x55,0x44,0x7A,0x60,  /* 00001E30    "..SMUDz`" */
+    0x0A,0x08,0x60,0x7B,0x60,0x0A,0x0F,0x53,  /* 00001E38    "..`{`..S" */
+    0x53,0x52,0x54,0x7A,0x60,0x0A,0x04,0x60,  /* 00001E40    "SRTz`..`" */
+    0x7B,0x60,0x0A,0x0F,0x53,0x53,0x50,0x57,  /* 00001E48    "{`..SSPW" */
+    0x7A,0x60,0x0A,0x04,0x60,0x7B,0x60,0x0A,  /* 00001E50    "z`..`{`." */
+    0x0F,0x53,0x4D,0x52,0x54,0x7A,0x60,0x0A,  /* 00001E58    ".SMRTz`." */
+    0x04,0x60,0x7B,0x60,0x0A,0x0F,0x53,0x4D,  /* 00001E60    ".`{`..SM" */
+    0x50,0x57,0x70,0x47,0x54,0x46,0x5F,0x00,  /* 00001E68    "PWpGTF_." */
+    0x69,0x41,0x54,0x41,0x32,0x70,0x47,0x54,  /* 00001E70    "iATA2pGT" */
+    0x46,0x5F,0x01,0x6A,0x41,0x54,0x41,0x33,  /* 00001E78    "F_.jATA3" */
+    0x5B,0x82,0x1B,0x44,0x52,0x56,0x30,0x08,  /* 00001E80    "[..DRV0." */
+    0x5F,0x41,0x44,0x52,0x00,0x14,0x0F,0x5F,  /* 00001E88    "_ADR..._" */
+    0x47,0x54,0x46,0x00,0xA4,0x52,0x41,0x54,  /* 00001E90    "GTF..RAT" */
+    0x41,0x41,0x54,0x41,0x32,0x5B,0x82,0x1B,  /* 00001E98    "AATA2[.." */
+    0x44,0x52,0x56,0x31,0x08,0x5F,0x41,0x44,  /* 00001EA0    "DRV1._AD" */
+    0x52,0x01,0x14,0x0F,0x5F,0x47,0x54,0x46,  /* 00001EA8    "R..._GTF" */
+    0x00,0xA4,0x52,0x41,0x54,0x41,0x41,0x54,  /* 00001EB0    "..RATAAT" */
+    0x41,0x33,0x14,0x45,0x15,0x47,0x54,0x4D,  /* 00001EB8    "A3.E.GTM" */
+    0x5F,0x0E,0x70,0xFF,0x50,0x49,0x4F,0x30,  /* 00001EC0    "_.p.PIO0" */
+    0x70,0xFF,0x50,0x49,0x4F,0x31,0x70,0xFF,  /* 00001EC8    "p.PIO1p." */
+    0x44,0x4D,0x41,0x30,0x70,0xFF,0x44,0x4D,  /* 00001ED0    "DMA0p.DM" */
+    0x41,0x31,0x70,0x0A,0x1A,0x43,0x48,0x4E,  /* 00001ED8    "A1p..CHN" */
+    0x46,0xA0,0x05,0x52,0x45,0x47,0x46,0xA1,  /* 00001EE0    "F..REGF." */
+    0x06,0xA4,0x54,0x4D,0x44,0x30,0x72,0x68,  /* 00001EE8    "..TMD0rh" */
+    0x69,0x60,0x72,0x60,0x0A,0x02,0x60,0x77,  /* 00001EF0    "i`r`..`w" */
+    0x60,0x0A,0x1E,0x50,0x49,0x4F,0x30,0x72,  /* 00001EF8    "`..PIO0r" */
+    0x6A,0x6B,0x60,0x72,0x60,0x0A,0x02,0x60,  /* 00001F00    "jk`r`..`" */
+    0x77,0x60,0x0A,0x1E,0x50,0x49,0x4F,0x31,  /* 00001F08    "w`..PIO1" */
+    0xA0,0x41,0x07,0x7B,0x6C,0x0A,0x40,0x00,  /* 00001F10    ".A.{l.@." */
+    0x7D,0x43,0x48,0x4E,0x46,0x01,0x43,0x48,  /* 00001F18    "}CHNF.CH" */
+    0x4E,0x46,0x7B,0x6C,0x0A,0x07,0x60,0xA0,  /* 00001F20    "NF{l..`." */
+    0x12,0x95,0x60,0x0A,0x04,0x72,0x60,0x0A,  /* 00001F28    "..`..r`." */
+    0x02,0x60,0x77,0x60,0x0A,0x1E,0x44,0x4D,  /* 00001F30    ".`w`..DM" */
+    0x41,0x30,0xA1,0x47,0x04,0xA0,0x0C,0x93,  /* 00001F38    "A0.G...." */
+    0x60,0x0A,0x04,0x70,0x0A,0x2D,0x44,0x4D,  /* 00001F40    "`..p.-DM" */
+    0x41,0x30,0xA1,0x37,0xA0,0x0C,0x93,0x60,  /* 00001F48    "A0.7...`" */
+    0x0A,0x05,0x70,0x0A,0x1E,0x44,0x4D,0x41,  /* 00001F50    "..p..DMA" */
+    0x30,0xA1,0x28,0xA0,0x0C,0x93,0x60,0x0A,  /* 00001F58    "0.(...`." */
+    0x06,0x70,0x0A,0x14,0x44,0x4D,0x41,0x30,  /* 00001F60    ".p..DMA0" */
+    0xA1,0x19,0xA0,0x0C,0x93,0x60,0x0A,0x07,  /* 00001F68    ".....`.." */
+    0x70,0x0A,0x0F,0x44,0x4D,0x41,0x30,0xA1,  /* 00001F70    "p..DMA0." */
+    0x0A,0x70,0x50,0x49,0x4F,0x30,0x44,0x4D,  /* 00001F78    ".pPIO0DM" */
+    0x41,0x30,0xA1,0x0A,0x70,0x50,0x49,0x4F,  /* 00001F80    "A0..pPIO" */
+    0x30,0x44,0x4D,0x41,0x30,0xA0,0x42,0x07,  /* 00001F88    "0DMA0.B." */
+    0x7B,0x6D,0x0A,0x40,0x00,0x7D,0x43,0x48,  /* 00001F90    "{m.@.}CH" */
+    0x4E,0x46,0x0A,0x04,0x43,0x48,0x4E,0x46,  /* 00001F98    "NF..CHNF" */
+    0x7B,0x6D,0x0A,0x07,0x60,0xA0,0x12,0x95,  /* 00001FA0    "{m..`..." */
+    0x60,0x0A,0x04,0x72,0x60,0x0A,0x02,0x60,  /* 00001FA8    "`..r`..`" */
+    0x77,0x60,0x0A,0x1E,0x44,0x4D,0x41,0x31,  /* 00001FB0    "w`..DMA1" */
+    0xA1,0x47,0x04,0xA0,0x0C,0x93,0x60,0x0A,  /* 00001FB8    ".G....`." */
+    0x04,0x70,0x0A,0x2D,0x44,0x4D,0x41,0x31,  /* 00001FC0    ".p.-DMA1" */
+    0xA1,0x37,0xA0,0x0C,0x93,0x60,0x0A,0x05,  /* 00001FC8    ".7...`.." */
+    0x70,0x0A,0x1E,0x44,0x4D,0x41,0x31,0xA1,  /* 00001FD0    "p..DMA1." */
+    0x28,0xA0,0x0C,0x93,0x60,0x0A,0x06,0x70,  /* 00001FD8    "(...`..p" */
+    0x0A,0x14,0x44,0x4D,0x41,0x31,0xA1,0x19,  /* 00001FE0    "..DMA1.." */
+    0xA0,0x0C,0x93,0x60,0x0A,0x07,0x70,0x0A,  /* 00001FE8    "...`..p." */
+    0x0F,0x44,0x4D,0x41,0x30,0xA1,0x0A,0x70,  /* 00001FF0    ".DMA0..p" */
+    0x50,0x49,0x4F,0x31,0x44,0x4D,0x41,0x31,  /* 00001FF8    "PIO1DMA1" */
+    0xA1,0x0A,0x70,0x50,0x49,0x4F,0x31,0x44,  /* 00002000    "..pPIO1D" */
+    0x4D,0x41,0x31,0xA4,0x54,0x4D,0x44,0x30,  /* 00002008    "MA1.TMD0" */
+    0x14,0x41,0x11,0x53,0x54,0x4D,0x5F,0x08,  /* 00002010    ".A.STM_." */
+    0xA0,0x05,0x52,0x45,0x47,0x46,0xA1,0x03,  /* 00002018    "..REGF.." */
+    0xA4,0xFF,0xA0,0x0B,0x93,0x50,0x49,0x4F,  /* 00002020    ".....PIO" */
+    0x30,0xFF,0x70,0x0A,0xA8,0x61,0xA1,0x25,  /* 00002028    "0.p..a.%" */
+    0x7B,0x89,0x83,0x88,0x54,0x49,0x4D,0x30,  /* 00002030    "{...TIM0" */
+    0x00,0x00,0x04,0x50,0x49,0x4F,0x30,0x00,  /* 00002038    "...PIO0." */
+    0x00,0x00,0x0A,0x07,0x60,0x70,0x83,0x88,  /* 00002040    "....`p.." */
+    0x83,0x88,0x54,0x49,0x4D,0x30,0x0A,0x04,  /* 00002048    "..TIM0.." */
+    0x00,0x60,0x00,0x61,0x79,0x61,0x0A,0x08,  /* 00002050    ".`.aya.." */
+    0x61,0xA0,0x0C,0x93,0x50,0x49,0x4F,0x31,  /* 00002058    "a...PIO1" */
+    0xFF,0x7D,0x61,0x0A,0xA8,0x61,0xA1,0x26,  /* 00002060    ".}a..a.&" */
+    0x7B,0x89,0x83,0x88,0x54,0x49,0x4D,0x30,  /* 00002068    "{...TIM0" */
+    0x00,0x00,0x04,0x50,0x49,0x4F,0x31,0x00,  /* 00002070    "...PIO1." */
+    0x00,0x00,0x0A,0x07,0x60,0x7D,0x83,0x88,  /* 00002078    "....`}.." */
+    0x83,0x88,0x54,0x49,0x4D,0x30,0x0A,0x04,  /* 00002080    "..TIM0.." */
+    0x00,0x60,0x00,0x61,0x61,0x79,0x61,0x0A,  /* 00002088    ".`.aaya." */
+    0x08,0x61,0xA0,0x0C,0x93,0x44,0x4D,0x41,  /* 00002090    ".a...DMA" */
+    0x30,0xFF,0x7D,0x61,0x0A,0x03,0x61,0xA1,  /* 00002098    "0.}a..a." */
+    0x36,0xA0,0x2D,0x7B,0x43,0x48,0x4E,0x46,  /* 000020A0    "6.-{CHNF" */
+    0x01,0x00,0x7B,0x89,0x83,0x88,0x54,0x49,  /* 000020A8    "..{...TI" */
+    0x4D,0x30,0x01,0x00,0x02,0x44,0x4D,0x41,  /* 000020B0    "M0...DMA" */
+    0x30,0x00,0x00,0x00,0x0A,0x07,0x60,0x7D,  /* 000020B8    "0.....`}" */
+    0x83,0x88,0x83,0x88,0x54,0x49,0x4D,0x30,  /* 000020C0    "....TIM0" */
+    0x0A,0x05,0x00,0x60,0x00,0x61,0x61,0xA1,  /* 000020C8    "...`.aa." */
+    0x06,0x7D,0x61,0x0A,0x03,0x61,0x79,0x61,  /* 000020D0    ".}a..aya" */
+    0x0A,0x08,0x61,0xA0,0x0C,0x93,0x44,0x4D,  /* 000020D8    "..a...DM" */
+    0x41,0x31,0xFF,0x7D,0x61,0x0A,0x03,0x61,  /* 000020E0    "A1.}a..a" */
+    0xA1,0x37,0xA0,0x2E,0x7B,0x43,0x48,0x4E,  /* 000020E8    ".7..{CHN" */
+    0x46,0x0A,0x04,0x00,0x7B,0x89,0x83,0x88,  /* 000020F0    "F...{..." */
+    0x54,0x49,0x4D,0x30,0x01,0x00,0x02,0x44,  /* 000020F8    "TIM0...D" */
+    0x4D,0x41,0x31,0x00,0x00,0x00,0x0A,0x07,  /* 00002100    "MA1....." */
+    0x60,0x7D,0x83,0x88,0x83,0x88,0x54,0x49,  /* 00002108    "`}....TI" */
+    0x4D,0x30,0x0A,0x05,0x00,0x60,0x00,0x61,  /* 00002110    "M0...`.a" */
+    0x61,0xA1,0x06,0x7D,0x61,0x0A,0x03,0x61,  /* 00002118    "a..}a..a" */
+    0xA4,0x61,0x08,0x41,0x54,0x30,0x31,0x11,  /* 00002120    ".a.AT01." */
+    0x0A,0x0A,0x07,0x03,0x00,0x00,0x00,0x00,  /* 00002128    "........" */
+    0x00,0xEF,0x08,0x41,0x54,0x30,0x32,0x11,  /* 00002130    "...AT02." */
+    0x0A,0x0A,0x07,0x00,0x00,0x00,0x00,0x00,  /* 00002138    "........" */
+    0x00,0x90,0x08,0x41,0x54,0x30,0x33,0x11,  /* 00002140    "...AT03." */
+    0x0A,0x0A,0x07,0x00,0x00,0x00,0x00,0x00,  /* 00002148    "........" */
+    0x00,0xC6,0x08,0x41,0x54,0x30,0x34,0x11,  /* 00002150    "...AT04." */
+    0x0A,0x0A,0x07,0x00,0x00,0x00,0x00,0x00,  /* 00002158    "........" */
+    0x00,0x91,0x08,0x41,0x54,0x41,0x30,0x11,  /* 00002160    "...ATA0." */
+    0x03,0x0A,0x1D,0x08,0x41,0x54,0x41,0x31,  /* 00002168    "....ATA1" */
+    0x11,0x03,0x0A,0x1D,0x08,0x41,0x54,0x41,  /* 00002170    ".....ATA" */
+    0x32,0x11,0x03,0x0A,0x1D,0x08,0x41,0x54,  /* 00002178    "2.....AT" */
+    0x41,0x33,0x11,0x03,0x0A,0x1D,0x08,0x41,  /* 00002180    "A3.....A" */
+    0x54,0x41,0x42,0x11,0x03,0x0A,0x1D,0x8C,  /* 00002188    "TAB....." */
+    0x41,0x54,0x41,0x42,0x00,0x43,0x4D,0x44,  /* 00002190    "ATAB.CMD" */
+    0x43,0x14,0x4C,0x05,0x47,0x54,0x46,0x42,  /* 00002198    "C.L.GTFB" */
+    0x0B,0x77,0x43,0x4D,0x44,0x43,0x0A,0x38,  /* 000021A0    ".wCMDC.8" */
+    0x60,0x72,0x60,0x0A,0x08,0x61,0x5B,0x13,  /* 000021A8    "`r`..a[." */
+    0x41,0x54,0x41,0x42,0x61,0x0A,0x38,0x43,  /* 000021B0    "ATABa.8C" */
+    0x4D,0x44,0x58,0x77,0x43,0x4D,0x44,0x43,  /* 000021B8    "MDXwCMDC" */
+    0x0A,0x07,0x60,0x8C,0x41,0x54,0x41,0x42,  /* 000021C0    "..`.ATAB" */
+    0x72,0x60,0x0A,0x02,0x00,0x41,0x30,0x30,  /* 000021C8    "r`...A00" */
+    0x31,0x8C,0x41,0x54,0x41,0x42,0x72,0x60,  /* 000021D0    "1.ATABr`" */
+    0x0A,0x06,0x00,0x41,0x30,0x30,0x35,0x70,  /* 000021D8    "...A005p" */
+    0x68,0x43,0x4D,0x44,0x58,0x70,0x69,0x41,  /* 000021E0    "hCMDXpiA" */
+    0x30,0x30,0x31,0x70,0x6A,0x41,0x30,0x30,  /* 000021E8    "001pjA00" */
+    0x35,0x75,0x43,0x4D,0x44,0x43,0x14,0x40,  /* 000021F0    "5uCMDC.@" */
+    0x25,0x47,0x54,0x46,0x5F,0x0A,0x70,0x69,  /* 000021F8    "%GTF_.pi" */
+    0x5B,0x31,0x70,0x00,0x43,0x4D,0x44,0x43,  /* 00002200    "[1p.CMDC" */
+    0x08,0x49,0x44,0x34,0x39,0x0B,0x00,0x0C,  /* 00002208    ".ID49..." */
+    0x08,0x49,0x44,0x35,0x39,0x00,0x08,0x49,  /* 00002210    ".ID59..I" */
+    0x44,0x35,0x33,0x0A,0x04,0x08,0x49,0x44,  /* 00002218    "D53...ID" */
+    0x36,0x33,0x0B,0x00,0x0F,0x08,0x49,0x44,  /* 00002220    "63....ID" */
+    0x38,0x38,0x0B,0x00,0x0F,0x08,0x49,0x52,  /* 00002228    "88....IR" */
+    0x44,0x59,0x01,0x08,0x50,0x49,0x4F,0x54,  /* 00002230    "DY..PIOT" */
+    0x00,0x08,0x44,0x4D,0x41,0x54,0x00,0xA0,  /* 00002238    "..DMAT.." */
+    0x4D,0x05,0x93,0x87,0x69,0x0B,0x00,0x02,  /* 00002240    "M...i..." */
+    0x8B,0x69,0x0A,0x62,0x49,0x57,0x34,0x39,  /* 00002248    ".i.bIW49" */
+    0x70,0x49,0x57,0x34,0x39,0x49,0x44,0x34,  /* 00002250    "pIW49ID4" */
+    0x39,0x8B,0x69,0x0A,0x6A,0x49,0x57,0x35,  /* 00002258    "9.i.jIW5" */
+    0x33,0x70,0x49,0x57,0x35,0x33,0x49,0x44,  /* 00002260    "3pIW53ID" */
+    0x35,0x33,0x8B,0x69,0x0A,0x7E,0x49,0x57,  /* 00002268    "53.i.~IW" */
+    0x36,0x33,0x70,0x49,0x57,0x36,0x33,0x49,  /* 00002270    "63pIW63I" */
+    0x44,0x36,0x33,0x8B,0x69,0x0A,0x76,0x49,  /* 00002278    "D63.i.vI" */
+    0x57,0x35,0x39,0x70,0x49,0x57,0x35,0x39,  /* 00002280    "W59pIW59" */
+    0x49,0x44,0x35,0x39,0x8B,0x69,0x0A,0xB0,  /* 00002288    "ID59.i.." */
+    0x49,0x57,0x38,0x38,0x70,0x49,0x57,0x38,  /* 00002290    "IW88pIW8" */
+    0x38,0x49,0x44,0x38,0x38,0x70,0x0A,0xA0,  /* 00002298    "8ID88p.." */
+    0x67,0xA0,0x43,0x06,0x68,0x70,0x0A,0xB0,  /* 000022A0    "g.C.hp.." */
+    0x67,0x7B,0x43,0x48,0x4E,0x46,0x0A,0x08,  /* 000022A8    "g{CHNF.." */
+    0x49,0x52,0x44,0x59,0xA0,0x12,0x7B,0x43,  /* 000022B0    "IRDY..{C" */
+    0x48,0x4E,0x46,0x0A,0x10,0x00,0x70,0x50,  /* 000022B8    "HNF...pP" */
+    0x49,0x4F,0x31,0x50,0x49,0x4F,0x54,0xA1,  /* 000022C0    "IO1PIOT." */
+    0x0A,0x70,0x50,0x49,0x4F,0x30,0x50,0x49,  /* 000022C8    ".pPIO0PI" */
+    0x4F,0x54,0xA0,0x27,0x7B,0x43,0x48,0x4E,  /* 000022D0    "OT.'{CHN" */
+    0x46,0x0A,0x04,0x00,0xA0,0x12,0x7B,0x43,  /* 000022D8    "F.....{C" */
+    0x48,0x4E,0x46,0x0A,0x10,0x00,0x70,0x44,  /* 000022E0    "HNF...pD" */
+    0x4D,0x41,0x31,0x44,0x4D,0x41,0x54,0xA1,  /* 000022E8    "MA1DMAT." */
+    0x0A,0x70,0x44,0x4D,0x41,0x30,0x44,0x4D,  /* 000022F0    ".pDMA0DM" */
+    0x41,0x54,0xA1,0x0A,0x70,0x50,0x49,0x4F,  /* 000022F8    "AT..pPIO" */
+    0x31,0x44,0x4D,0x41,0x54,0xA1,0x27,0x7B,  /* 00002300    "1DMAT.'{" */
+    0x43,0x48,0x4E,0x46,0x0A,0x02,0x49,0x52,  /* 00002308    "CHNF..IR" */
+    0x44,0x59,0x70,0x50,0x49,0x4F,0x30,0x50,  /* 00002310    "DYpPIO0P" */
+    0x49,0x4F,0x54,0xA0,0x11,0x7B,0x43,0x48,  /* 00002318    "IOT..{CH" */
+    0x4E,0x46,0x01,0x00,0x70,0x44,0x4D,0x41,  /* 00002320    "NF..pDMA" */
+    0x30,0x44,0x4D,0x41,0x54,0xA0,0x44,0x04,  /* 00002328    "0DMAT.D." */
+    0x90,0x90,0x7B,0x49,0x44,0x35,0x33,0x0A,  /* 00002330    "..{ID53." */
+    0x04,0x00,0x7B,0x49,0x44,0x38,0x38,0x0B,  /* 00002338    "..{ID88." */
+    0x00,0xFF,0x00,0x44,0x4D,0x41,0x54,0x70,  /* 00002340    "...DMATp" */
+    0x89,0x83,0x88,0x54,0x49,0x4D,0x30,0x01,  /* 00002348    "...TIM0." */
+    0x00,0x02,0x44,0x4D,0x41,0x54,0x00,0x00,  /* 00002350    "..DMAT.." */
+    0x00,0x61,0xA0,0x09,0x94,0x61,0x0A,0x06,  /* 00002358    ".a...a.." */
+    0x70,0x0A,0x06,0x61,0x47,0x54,0x46,0x42,  /* 00002360    "p..aGTFB" */
+    0x41,0x54,0x30,0x31,0x7D,0x0A,0x40,0x61,  /* 00002368    "AT01}.@a" */
+    0x00,0x67,0xA1,0x46,0x05,0xA0,0x43,0x05,  /* 00002370    ".g.F..C." */
+    0x90,0x7B,0x49,0x44,0x36,0x33,0x0B,0x00,  /* 00002378    ".{ID63.." */
+    0xFF,0x00,0x50,0x49,0x4F,0x54,0x7B,0x89,  /* 00002380    "..PIOT{." */
+    0x83,0x88,0x54,0x49,0x4D,0x30,0x00,0x00,  /* 00002388    "..TIM0.." */
+    0x04,0x50,0x49,0x4F,0x54,0x00,0x00,0x00,  /* 00002390    ".PIOT..." */
+    0x0A,0x07,0x60,0xA0,0x12,0x60,0xA0,0x0A,  /* 00002398    "..`..`.." */
+    0x7B,0x60,0x0A,0x04,0x00,0x70,0x0A,0x02,  /* 000023A0    "{`...p.." */
+    0x60,0xA1,0x04,0x70,0x01,0x60,0x7D,0x0A,  /* 000023A8    "`..p.`}." */
+    0x20,0x83,0x88,0x83,0x88,0x54,0x49,0x4D,  /* 000023B0    " ....TIM" */
+    0x30,0x0A,0x03,0x00,0x60,0x00,0x61,0x47,  /* 000023B8    "0...`.aG" */
+    0x54,0x46,0x42,0x41,0x54,0x30,0x31,0x61,  /* 000023C0    "TFBAT01a" */
+    0x67,0xA0,0x35,0x49,0x52,0x44,0x59,0x7B,  /* 000023C8    "g.5IRDY{" */
+    0x89,0x83,0x88,0x54,0x49,0x4D,0x30,0x00,  /* 000023D0    "...TIM0." */
+    0x00,0x04,0x50,0x49,0x4F,0x54,0x00,0x00,  /* 000023D8    "..PIOT.." */
+    0x00,0x0A,0x07,0x60,0x7D,0x0A,0x08,0x83,  /* 000023E0    "...`}..." */
+    0x88,0x83,0x88,0x54,0x49,0x4D,0x30,0x0A,  /* 000023E8    "...TIM0." */
+    0x02,0x00,0x60,0x00,0x61,0x47,0x54,0x46,  /* 000023F0    "..`.aGTF" */
+    0x42,0x41,0x54,0x30,0x31,0x61,0x67,0xA1,  /* 000023F8    "BAT01ag." */
+    0x16,0xA0,0x14,0x7B,0x49,0x44,0x34,0x39,  /* 00002400    "...{ID49" */
+    0x0B,0x00,0x04,0x00,0x47,0x54,0x46,0x42,  /* 00002408    "....GTFB" */
+    0x41,0x54,0x30,0x31,0x01,0x67,0xA0,0x24,  /* 00002410    "AT01.g.$" */
+    0x90,0x7B,0x49,0x44,0x35,0x39,0x0B,0x00,  /* 00002418    ".{ID59.." */
+    0x01,0x00,0x7B,0x49,0x44,0x35,0x39,0x0A,  /* 00002420    "..{ID59." */
+    0xFF,0x00,0x47,0x54,0x46,0x42,0x41,0x54,  /* 00002428    "..GTFBAT" */
+    0x30,0x33,0x7B,0x49,0x44,0x35,0x39,0x0A,  /* 00002430    "03{ID59." */
+    0xFF,0x00,0x67,0x70,0x41,0x54,0x41,0x42,  /* 00002438    "..gpATAB" */
+    0x5B,0x31,0xA4,0x41,0x54,0x41,0x42,0x14,  /* 00002440    "[1.ATAB." */
+    0x2B,0x52,0x41,0x54,0x41,0x01,0x8C,0x68,  /* 00002448    "+RATA..h" */
+    0x00,0x43,0x4D,0x44,0x4E,0x77,0x43,0x4D,  /* 00002450    ".CMDNwCM" */
+    0x44,0x4E,0x0A,0x38,0x60,0x5B,0x13,0x68,  /* 00002458    "DN.8`[.h" */
+    0x0A,0x08,0x60,0x52,0x45,0x54,0x42,0x70,  /* 00002460    "..`RETBp" */
+    0x52,0x45,0x54,0x42,0x5B,0x31,0xA4,0x52,  /* 00002468    "RETB[1.R" */
+    0x45,0x54,0x42,0x5B,0x82,0x48,0x1E,0x50,  /* 00002470    "ETB[.H.P" */
+    0x43,0x49,0x42,0x08,0x5F,0x48,0x49,0x44,  /* 00002478    "CIB._HID" */
+    0x0C,0x41,0xD0,0x0A,0x03,0x08,0x5F,0x41,  /* 00002480    ".A...._A" */
+    0x44,0x52,0x0C,0x02,0x00,0x19,0x00,0x14,  /* 00002488    "DR......" */
+    0x0A,0x5E,0x42,0x4E,0x30,0x42,0x00,0xA4,  /* 00002490    ".^BN0B.." */
+    0x0A,0x05,0x14,0x0B,0x5F,0x42,0x42,0x4E,  /* 00002498    "...._BBN" */
+    0x00,0xA4,0x42,0x4E,0x30,0x42,0x08,0x5F,  /* 000024A0    "..BN0B._" */
+    0x55,0x49,0x44,0x0A,0x0B,0x5B,0x82,0x4A,  /* 000024A8    "UID..[.J" */
+    0x06,0x47,0x4F,0x4C,0x43,0x08,0x5F,0x41,  /* 000024B0    ".GOLC._A" */
+    0x44,0x52,0x0C,0x00,0x00,0x01,0x00,0x5B,  /* 000024B8    "DR.....[" */
+    0x80,0x42,0x41,0x52,0x30,0x02,0x00,0x0A,  /* 000024C0    ".BAR0..." */
+    0x50,0x5B,0x81,0x16,0x42,0x41,0x52,0x30,  /* 000024C8    "P[..BAR0" */
+    0x01,0x00,0x40,0x04,0x52,0x49,0x44,0x5F,  /* 000024D0    "..@.RID_" */
+    0x08,0x00,0x48,0x1B,0x4E,0x41,0x50,0x43,  /* 000024D8    "..H.NAPC" */
+    0x01,0x14,0x20,0x50,0x43,0x4D,0x5F,0x01,  /* 000024E0    ".. PCM_." */
+    0xA0,0x19,0x95,0x52,0x49,0x44,0x5F,0x0A,  /* 000024E8    "...RID_." */
+    0x12,0xA0,0x08,0x68,0x70,0x00,0x4E,0x41,  /* 000024F0    "...hp.NA" */
+    0x50,0x43,0xA1,0x07,0x70,0x01,0x4E,0x41,  /* 000024F8    "PC..p.NA" */
+    0x50,0x43,0x14,0x16,0x5F,0x50,0x52,0x54,  /* 00002500    "PC.._PRT" */
+    0x00,0xA0,0x0A,0x50,0x49,0x43,0x4D,0xA4,  /* 00002508    "...PICM." */
+    0x41,0x52,0x35,0x32,0xA4,0x50,0x52,0x35,  /* 00002510    "AR52.PR5" */
+    0x32,0x5B,0x82,0x4A,0x06,0x47,0x4F,0x4C,  /* 00002518    "2[.J.GOL" */
+    0x44,0x08,0x5F,0x41,0x44,0x52,0x0C,0x00,  /* 00002520    "D._ADR.." */
+    0x00,0x02,0x00,0x5B,0x80,0x42,0x41,0x52,  /* 00002528    "...[.BAR" */
+    0x30,0x02,0x00,0x0A,0x50,0x5B,0x81,0x16,  /* 00002530    "0...P[.." */
+    0x42,0x41,0x52,0x30,0x01,0x00,0x40,0x04,  /* 00002538    "BAR0..@." */
+    0x52,0x49,0x44,0x5F,0x08,0x00,0x48,0x1B,  /* 00002540    "RID_..H." */
+    0x4E,0x41,0x50,0x43,0x01,0x14,0x20,0x50,  /* 00002548    "NAPC.. P" */
+    0x43,0x4D,0x5F,0x01,0xA0,0x19,0x95,0x52,  /* 00002550    "CM_....R" */
+    0x49,0x44,0x5F,0x0A,0x12,0xA0,0x08,0x68,  /* 00002558    "ID_....h" */
+    0x70,0x00,0x4E,0x41,0x50,0x43,0xA1,0x07,  /* 00002560    "p.NAPC.." */
+    0x70,0x01,0x4E,0x41,0x50,0x43,0x14,0x16,  /* 00002568    "p.NAPC.." */
+    0x5F,0x50,0x52,0x54,0x00,0xA0,0x0A,0x50,  /* 00002570    "_PRT...P" */
+    0x49,0x43,0x4D,0xA4,0x41,0x52,0x35,0x33,  /* 00002578    "ICM.AR53" */
+    0xA4,0x50,0x52,0x35,0x33,0x5B,0x82,0x4A,  /* 00002580    ".PR53[.J" */
+    0x06,0x47,0x4F,0x4C,0x45,0x08,0x5F,0x41,  /* 00002588    ".GOLE._A" */
+    0x44,0x52,0x0C,0x00,0x00,0x03,0x00,0x5B,  /* 00002590    "DR.....[" */
+    0x80,0x42,0x41,0x52,0x30,0x02,0x00,0x0A,  /* 00002598    ".BAR0..." */
+    0x50,0x5B,0x81,0x16,0x42,0x41,0x52,0x30,  /* 000025A0    "P[..BAR0" */
+    0x01,0x00,0x40,0x04,0x52,0x49,0x44,0x5F,  /* 000025A8    "..@.RID_" */
+    0x08,0x00,0x48,0x1B,0x4E,0x41,0x50,0x43,  /* 000025B0    "..H.NAPC" */
+    0x01,0x14,0x20,0x50,0x43,0x4D,0x5F,0x01,  /* 000025B8    ".. PCM_." */
+    0xA0,0x19,0x95,0x52,0x49,0x44,0x5F,0x0A,  /* 000025C0    "...RID_." */
+    0x12,0xA0,0x08,0x68,0x70,0x00,0x4E,0x41,  /* 000025C8    "...hp.NA" */
+    0x50,0x43,0xA1,0x07,0x70,0x01,0x4E,0x41,  /* 000025D0    "PC..p.NA" */
+    0x50,0x43,0x14,0x16,0x5F,0x50,0x52,0x54,  /* 000025D8    "PC.._PRT" */
+    0x00,0xA0,0x0A,0x50,0x49,0x43,0x4D,0xA4,  /* 000025E0    "...PICM." */
+    0x41,0x52,0x35,0x34,0xA4,0x50,0x52,0x35,  /* 000025E8    "AR54.PR5" */
+    0x34,0x5B,0x82,0x4A,0x06,0x47,0x4F,0x4C,  /* 000025F0    "4[.J.GOL" */
+    0x46,0x08,0x5F,0x41,0x44,0x52,0x0C,0x00,  /* 000025F8    "F._ADR.." */
+    0x00,0x04,0x00,0x5B,0x80,0x42,0x41,0x52,  /* 00002600    "...[.BAR" */
+    0x30,0x02,0x00,0x0A,0x50,0x5B,0x81,0x16,  /* 00002608    "0...P[.." */
+    0x42,0x41,0x52,0x30,0x01,0x00,0x40,0x04,  /* 00002610    "BAR0..@." */
+    0x52,0x49,0x44,0x5F,0x08,0x00,0x48,0x1B,  /* 00002618    "RID_..H." */
+    0x4E,0x41,0x50,0x43,0x01,0x14,0x20,0x50,  /* 00002620    "NAPC.. P" */
+    0x43,0x4D,0x5F,0x01,0xA0,0x19,0x95,0x52,  /* 00002628    "CM_....R" */
+    0x49,0x44,0x5F,0x0A,0x12,0xA0,0x08,0x68,  /* 00002630    "ID_....h" */
+    0x70,0x00,0x4E,0x41,0x50,0x43,0xA1,0x07,  /* 00002638    "p.NAPC.." */
+    0x70,0x01,0x4E,0x41,0x50,0x43,0x14,0x16,  /* 00002640    "p.NAPC.." */
+    0x5F,0x50,0x52,0x54,0x00,0xA0,0x0A,0x50,  /* 00002648    "_PRT...P" */
+    0x49,0x43,0x4D,0xA4,0x41,0x52,0x35,0x35,  /* 00002650    "ICM.AR55" */
+    0xA4,0x50,0x52,0x35,0x35,0x5B,0x82,0x48,  /* 00002658    ".PR55[.H" */
+    0x1E,0x50,0x43,0x49,0x43,0x08,0x5F,0x48,  /* 00002660    ".PCIC._H" */
+    0x49,0x44,0x0C,0x41,0xD0,0x0A,0x03,0x08,  /* 00002668    "ID.A...." */
+    0x5F,0x41,0x44,0x52,0x0C,0x02,0x00,0x1A,  /* 00002670    "_ADR...." */
+    0x00,0x14,0x0A,0x5E,0x42,0x4E,0x30,0x43,  /* 00002678    "...^BN0C" */
+    0x00,0xA4,0x0A,0x0C,0x14,0x0B,0x5F,0x42,  /* 00002680    "......_B" */
+    0x42,0x4E,0x00,0xA4,0x42,0x4E,0x30,0x43,  /* 00002688    "BN..BN0C" */
+    0x08,0x5F,0x55,0x49,0x44,0x0A,0x0C,0x5B,  /* 00002690    "._UID..[" */
+    0x82,0x4A,0x06,0x47,0x4F,0x4C,0x47,0x08,  /* 00002698    ".J.GOLG." */
+    0x5F,0x41,0x44,0x52,0x0C,0x00,0x00,0x01,  /* 000026A0    "_ADR...." */
+    0x00,0x5B,0x80,0x42,0x41,0x52,0x30,0x02,  /* 000026A8    ".[.BAR0." */
+    0x00,0x0A,0x50,0x5B,0x81,0x16,0x42,0x41,  /* 000026B0    "..P[..BA" */
+    0x52,0x30,0x01,0x00,0x40,0x04,0x52,0x49,  /* 000026B8    "R0..@.RI" */
+    0x44,0x5F,0x08,0x00,0x48,0x1B,0x4E,0x41,  /* 000026C0    "D_..H.NA" */
+    0x50,0x43,0x01,0x14,0x20,0x50,0x43,0x4D,  /* 000026C8    "PC.. PCM" */
+    0x5F,0x01,0xA0,0x19,0x95,0x52,0x49,0x44,  /* 000026D0    "_....RID" */
+    0x5F,0x0A,0x12,0xA0,0x08,0x68,0x70,0x00,  /* 000026D8    "_....hp." */
+    0x4E,0x41,0x50,0x43,0xA1,0x07,0x70,0x01,  /* 000026E0    "NAPC..p." */
+    0x4E,0x41,0x50,0x43,0x14,0x16,0x5F,0x50,  /* 000026E8    "NAPC.._P" */
+    0x52,0x54,0x00,0xA0,0x0A,0x50,0x49,0x43,  /* 000026F0    "RT...PIC" */
+    0x4D,0xA4,0x41,0x52,0x35,0x36,0xA4,0x50,  /* 000026F8    "M.AR56.P" */
+    0x52,0x35,0x36,0x5B,0x82,0x4A,0x06,0x47,  /* 00002700    "R56[.J.G" */
+    0x4F,0x4C,0x48,0x08,0x5F,0x41,0x44,0x52,  /* 00002708    "OLH._ADR" */
+    0x0C,0x00,0x00,0x02,0x00,0x5B,0x80,0x42,  /* 00002710    ".....[.B" */
+    0x41,0x52,0x30,0x02,0x00,0x0A,0x50,0x5B,  /* 00002718    "AR0...P[" */
+    0x81,0x16,0x42,0x41,0x52,0x30,0x01,0x00,  /* 00002720    "..BAR0.." */
+    0x40,0x04,0x52,0x49,0x44,0x5F,0x08,0x00,  /* 00002728    "@.RID_.." */
+    0x48,0x1B,0x4E,0x41,0x50,0x43,0x01,0x14,  /* 00002730    "H.NAPC.." */
+    0x20,0x50,0x43,0x4D,0x5F,0x01,0xA0,0x19,  /* 00002738    " PCM_..." */
+    0x95,0x52,0x49,0x44,0x5F,0x0A,0x12,0xA0,  /* 00002740    ".RID_..." */
+    0x08,0x68,0x70,0x00,0x4E,0x41,0x50,0x43,  /* 00002748    ".hp.NAPC" */
+    0xA1,0x07,0x70,0x01,0x4E,0x41,0x50,0x43,  /* 00002750    "..p.NAPC" */
+    0x14,0x16,0x5F,0x50,0x52,0x54,0x00,0xA0,  /* 00002758    ".._PRT.." */
+    0x0A,0x50,0x49,0x43,0x4D,0xA4,0x41,0x52,  /* 00002760    ".PICM.AR" */
+    0x35,0x37,0xA4,0x50,0x52,0x35,0x37,0x5B,  /* 00002768    "57.PR57[" */
+    0x82,0x4A,0x06,0x47,0x4F,0x4C,0x49,0x08,  /* 00002770    ".J.GOLI." */
+    0x5F,0x41,0x44,0x52,0x0C,0x00,0x00,0x03,  /* 00002778    "_ADR...." */
+    0x00,0x5B,0x80,0x42,0x41,0x52,0x30,0x02,  /* 00002780    ".[.BAR0." */
+    0x00,0x0A,0x50,0x5B,0x81,0x16,0x42,0x41,  /* 00002788    "..P[..BA" */
+    0x52,0x30,0x01,0x00,0x40,0x04,0x52,0x49,  /* 00002790    "R0..@.RI" */
+    0x44,0x5F,0x08,0x00,0x48,0x1B,0x4E,0x41,  /* 00002798    "D_..H.NA" */
+    0x50,0x43,0x01,0x14,0x20,0x50,0x43,0x4D,  /* 000027A0    "PC.. PCM" */
+    0x5F,0x01,0xA0,0x19,0x95,0x52,0x49,0x44,  /* 000027A8    "_....RID" */
+    0x5F,0x0A,0x12,0xA0,0x08,0x68,0x70,0x00,  /* 000027B0    "_....hp." */
+    0x4E,0x41,0x50,0x43,0xA1,0x07,0x70,0x01,  /* 000027B8    "NAPC..p." */
+    0x4E,0x41,0x50,0x43,0x14,0x16,0x5F,0x50,  /* 000027C0    "NAPC.._P" */
+    0x52,0x54,0x00,0xA0,0x0A,0x50,0x49,0x43,  /* 000027C8    "RT...PIC" */
+    0x4D,0xA4,0x41,0x52,0x35,0x38,0xA4,0x50,  /* 000027D0    "M.AR58.P" */
+    0x52,0x35,0x38,0x5B,0x82,0x4A,0x06,0x47,  /* 000027D8    "R58[.J.G" */
+    0x4F,0x4C,0x4A,0x08,0x5F,0x41,0x44,0x52,  /* 000027E0    "OLJ._ADR" */
+    0x0C,0x00,0x00,0x04,0x00,0x5B,0x80,0x42,  /* 000027E8    ".....[.B" */
+    0x41,0x52,0x30,0x02,0x00,0x0A,0x50,0x5B,  /* 000027F0    "AR0...P[" */
+    0x81,0x16,0x42,0x41,0x52,0x30,0x01,0x00,  /* 000027F8    "..BAR0.." */
+    0x40,0x04,0x52,0x49,0x44,0x5F,0x08,0x00,  /* 00002800    "@.RID_.." */
+    0x48,0x1B,0x4E,0x41,0x50,0x43,0x01,0x14,  /* 00002808    "H.NAPC.." */
+    0x20,0x50,0x43,0x4D,0x5F,0x01,0xA0,0x19,  /* 00002810    " PCM_..." */
+    0x95,0x52,0x49,0x44,0x5F,0x0A,0x12,0xA0,  /* 00002818    ".RID_..." */
+    0x08,0x68,0x70,0x00,0x4E,0x41,0x50,0x43,  /* 00002820    ".hp.NAPC" */
+    0xA1,0x07,0x70,0x01,0x4E,0x41,0x50,0x43,  /* 00002828    "..p.NAPC" */
+    0x14,0x16,0x5F,0x50,0x52,0x54,0x00,0xA0,  /* 00002830    ".._PRT.." */
+    0x0A,0x50,0x49,0x43,0x4D,0xA4,0x41,0x52,  /* 00002838    ".PICM.AR" */
+    0x35,0x39,0xA4,0x50,0x52,0x35,0x39,0x5B,  /* 00002840    "59.PR59[" */
+    0x82,0x48,0x1E,0x50,0x43,0x49,0x44,0x08,  /* 00002848    ".H.PCID." */
+    0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x0A,  /* 00002850    "_HID.A.." */
+    0x03,0x08,0x5F,0x41,0x44,0x52,0x0C,0x01,  /* 00002858    ".._ADR.." */
+    0x00,0x1B,0x00,0x14,0x0A,0x5E,0x42,0x4E,  /* 00002860    ".....^BN" */
+    0x30,0x44,0x00,0xA4,0x0A,0x11,0x14,0x0B,  /* 00002868    "0D......" */
+    0x5F,0x42,0x42,0x4E,0x00,0xA4,0x42,0x4E,  /* 00002870    "_BBN..BN" */
+    0x30,0x44,0x08,0x5F,0x55,0x49,0x44,0x0A,  /* 00002878    "0D._UID." */
+    0x0D,0x5B,0x82,0x4A,0x06,0x47,0x4F,0x4C,  /* 00002880    ".[.J.GOL" */
+    0x4B,0x08,0x5F,0x41,0x44,0x52,0x0C,0x00,  /* 00002888    "K._ADR.." */
+    0x00,0x01,0x00,0x5B,0x80,0x42,0x41,0x52,  /* 00002890    "...[.BAR" */
+    0x30,0x02,0x00,0x0A,0x50,0x5B,0x81,0x16,  /* 00002898    "0...P[.." */
+    0x42,0x41,0x52,0x30,0x01,0x00,0x40,0x04,  /* 000028A0    "BAR0..@." */
+    0x52,0x49,0x44,0x5F,0x08,0x00,0x48,0x1B,  /* 000028A8    "RID_..H." */
+    0x4E,0x41,0x50,0x43,0x01,0x14,0x20,0x50,  /* 000028B0    "NAPC.. P" */
+    0x43,0x4D,0x5F,0x01,0xA0,0x19,0x95,0x52,  /* 000028B8    "CM_....R" */
+    0x49,0x44,0x5F,0x0A,0x12,0xA0,0x08,0x68,  /* 000028C0    "ID_....h" */
+    0x70,0x00,0x4E,0x41,0x50,0x43,0xA1,0x07,  /* 000028C8    "p.NAPC.." */
+    0x70,0x01,0x4E,0x41,0x50,0x43,0x14,0x16,  /* 000028D0    "p.NAPC.." */
+    0x5F,0x50,0x52,0x54,0x00,0xA0,0x0A,0x50,  /* 000028D8    "_PRT...P" */
+    0x49,0x43,0x4D,0xA4,0x41,0x52,0x35,0x41,  /* 000028E0    "ICM.AR5A" */
+    0xA4,0x50,0x52,0x35,0x41,0x5B,0x82,0x4A,  /* 000028E8    ".PR5A[.J" */
+    0x06,0x47,0x4F,0x4C,0x4C,0x08,0x5F,0x41,  /* 000028F0    ".GOLL._A" */
+    0x44,0x52,0x0C,0x00,0x00,0x02,0x00,0x5B,  /* 000028F8    "DR.....[" */
+    0x80,0x42,0x41,0x52,0x30,0x02,0x00,0x0A,  /* 00002900    ".BAR0..." */
+    0x50,0x5B,0x81,0x16,0x42,0x41,0x52,0x30,  /* 00002908    "P[..BAR0" */
+    0x01,0x00,0x40,0x04,0x52,0x49,0x44,0x5F,  /* 00002910    "..@.RID_" */
+    0x08,0x00,0x48,0x1B,0x4E,0x41,0x50,0x43,  /* 00002918    "..H.NAPC" */
+    0x01,0x14,0x20,0x50,0x43,0x4D,0x5F,0x01,  /* 00002920    ".. PCM_." */
+    0xA0,0x19,0x95,0x52,0x49,0x44,0x5F,0x0A,  /* 00002928    "...RID_." */
+    0x12,0xA0,0x08,0x68,0x70,0x00,0x4E,0x41,  /* 00002930    "...hp.NA" */
+    0x50,0x43,0xA1,0x07,0x70,0x01,0x4E,0x41,  /* 00002938    "PC..p.NA" */
+    0x50,0x43,0x14,0x16,0x5F,0x50,0x52,0x54,  /* 00002940    "PC.._PRT" */
+    0x00,0xA0,0x0A,0x50,0x49,0x43,0x4D,0xA4,  /* 00002948    "...PICM." */
+    0x41,0x52,0x35,0x42,0xA4,0x50,0x52,0x35,  /* 00002950    "AR5B.PR5" */
+    0x42,0x5B,0x82,0x4A,0x06,0x47,0x4F,0x4C,  /* 00002958    "B[.J.GOL" */
+    0x4D,0x08,0x5F,0x41,0x44,0x52,0x0C,0x00,  /* 00002960    "M._ADR.." */
+    0x00,0x03,0x00,0x5B,0x80,0x42,0x41,0x52,  /* 00002968    "...[.BAR" */
+    0x30,0x02,0x00,0x0A,0x50,0x5B,0x81,0x16,  /* 00002970    "0...P[.." */
+    0x42,0x41,0x52,0x30,0x01,0x00,0x40,0x04,  /* 00002978    "BAR0..@." */
+    0x52,0x49,0x44,0x5F,0x08,0x00,0x48,0x1B,  /* 00002980    "RID_..H." */
+    0x4E,0x41,0x50,0x43,0x01,0x14,0x20,0x50,  /* 00002988    "NAPC.. P" */
+    0x43,0x4D,0x5F,0x01,0xA0,0x19,0x95,0x52,  /* 00002990    "CM_....R" */
+    0x49,0x44,0x5F,0x0A,0x12,0xA0,0x08,0x68,  /* 00002998    "ID_....h" */
+    0x70,0x00,0x4E,0x41,0x50,0x43,0xA1,0x07,  /* 000029A0    "p.NAPC.." */
+    0x70,0x01,0x4E,0x41,0x50,0x43,0x14,0x16,  /* 000029A8    "p.NAPC.." */
+    0x5F,0x50,0x52,0x54,0x00,0xA0,0x0A,0x50,  /* 000029B0    "_PRT...P" */
+    0x49,0x43,0x4D,0xA4,0x41,0x52,0x35,0x43,  /* 000029B8    "ICM.AR5C" */
+    0xA4,0x50,0x52,0x35,0x43,0x5B,0x82,0x4A,  /* 000029C0    ".PR5C[.J" */
+    0x06,0x47,0x4F,0x4C,0x4E,0x08,0x5F,0x41,  /* 000029C8    ".GOLN._A" */
+    0x44,0x52,0x0C,0x00,0x00,0x04,0x00,0x5B,  /* 000029D0    "DR.....[" */
+    0x80,0x42,0x41,0x52,0x30,0x02,0x00,0x0A,  /* 000029D8    ".BAR0..." */
+    0x50,0x5B,0x81,0x16,0x42,0x41,0x52,0x30,  /* 000029E0    "P[..BAR0" */
+    0x01,0x00,0x40,0x04,0x52,0x49,0x44,0x5F,  /* 000029E8    "..@.RID_" */
+    0x08,0x00,0x48,0x1B,0x4E,0x41,0x50,0x43,  /* 000029F0    "..H.NAPC" */
+    0x01,0x14,0x20,0x50,0x43,0x4D,0x5F,0x01,  /* 000029F8    ".. PCM_." */
+    0xA0,0x19,0x95,0x52,0x49,0x44,0x5F,0x0A,  /* 00002A00    "...RID_." */
+    0x12,0xA0,0x08,0x68,0x70,0x00,0x4E,0x41,  /* 00002A08    "...hp.NA" */
+    0x50,0x43,0xA1,0x07,0x70,0x01,0x4E,0x41,  /* 00002A10    "PC..p.NA" */
+    0x50,0x43,0x14,0x16,0x5F,0x50,0x52,0x54,  /* 00002A18    "PC.._PRT" */
+    0x00,0xA0,0x0A,0x50,0x49,0x43,0x4D,0xA4,  /* 00002A20    "...PICM." */
+    0x41,0x52,0x35,0x44,0xA4,0x50,0x52,0x35,  /* 00002A28    "AR5D.PR5" */
+    0x44,0x10,0x40,0x08,0x5C,0x5F,0x47,0x50,  /* 00002A30    "D.@.\_GP" */
+    0x45,0x14,0x38,0x5F,0x4C,0x30,0x38,0x00,  /* 00002A38    "E.8_L08." */
+    0x86,0x5C,0x2F,0x03,0x5F,0x53,0x42,0x5F,  /* 00002A40    ".\/._SB_" */
+    0x50,0x43,0x49,0x41,0x50,0x43,0x49,0x31,  /* 00002A48    "PCIAPCI1" */
+    0x0A,0x02,0x5C,0x2F,0x04,0x5F,0x53,0x42,  /* 00002A50    "..\/._SB" */
+    0x5F,0x50,0x43,0x49,0x41,0x53,0x42,0x52,  /* 00002A58    "_PCIASBR" */
+    0x47,0x53,0x49,0x4F,0x48,0x86,0x5C,0x2E,  /* 00002A60    "GSIOH.\." */
+    0x5F,0x53,0x42,0x5F,0x50,0x57,0x52,0x42,  /* 00002A68    "_SB_PWRB" */
+    0x0A,0x02,0x14,0x3F,0x5F,0x4C,0x30,0x46,  /* 00002A70    "...?_L0F" */
+    0x00,0x86,0x5C,0x2F,0x04,0x5F,0x53,0x42,  /* 00002A78    "..\/._SB" */
+    0x5F,0x50,0x43,0x49,0x41,0x50,0x43,0x49,  /* 00002A80    "_PCIAPCI" */
+    0x31,0x55,0x53,0x42,0x30,0x0A,0x02,0x86,  /* 00002A88    "1USB0..." */
+    0x5C,0x2F,0x04,0x5F,0x53,0x42,0x5F,0x50,  /* 00002A90    "\/._SB_P" */
+    0x43,0x49,0x41,0x50,0x43,0x49,0x31,0x55,  /* 00002A98    "CIAPCI1U" */
+    0x53,0x42,0x31,0x0A,0x02,0x86,0x5C,0x2E,  /* 00002AA0    "SB1...\." */
+    0x5F,0x53,0x42,0x5F,0x50,0x57,0x52,0x42,  /* 00002AA8    "_SB_PWRB" */
+    0x0A,0x02,0x5B,0x82,0x2D,0x50,0x57,0x52,  /* 00002AB0    "..[.-PWR" */
+    0x42,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,  /* 00002AB8    "B._HID.A" */
+    0xD0,0x0C,0x0C,0x08,0x5F,0x55,0x49,0x44,  /* 00002AC0    "...._UID" */
+    0x0A,0xAA,0x08,0x5F,0x53,0x54,0x41,0x0A,  /* 00002AC8    "..._STA." */
+    0x0B,0x14,0x0F,0x5F,0x50,0x52,0x57,0x00,  /* 00002AD0    "..._PRW." */
+    0xA4,0x47,0x50,0x52,0x57,0x0A,0x08,0x0A,  /* 00002AD8    ".GPRW..." */
+    0x03,0x10,0x42,0x21,0x5F,0x53,0x42,0x5F,  /* 00002AE0    "..B!_SB_" */
+    0x5B,0x81,0x27,0x2F,0x03,0x50,0x43,0x49,  /* 00002AE8    "[.'/.PCI" */
+    0x41,0x50,0x4D,0x46,0x5F,0x42,0x41,0x52,  /* 00002AF0    "APMF_BAR" */
+    0x30,0x01,0x00,0x40,0x2B,0x50,0x49,0x52,  /* 00002AF8    "0..@+PIR" */
+    0x41,0x04,0x50,0x49,0x52,0x42,0x04,0x50,  /* 00002B00    "A.PIRB.P" */
+    0x49,0x52,0x43,0x04,0x50,0x49,0x52,0x44,  /* 00002B08    "IRC.PIRD" */
+    0x04,0x08,0x42,0x55,0x46,0x41,0x11,0x09,  /* 00002B10    "..BUFA.." */
+    0x0A,0x06,0x23,0x00,0x80,0x18,0x79,0x00,  /* 00002B18    "..#...y." */
+    0x8B,0x42,0x55,0x46,0x41,0x01,0x49,0x43,  /* 00002B20    ".BUFA.IC" */
+    0x52,0x53,0x14,0x11,0x4C,0x53,0x54,0x41,  /* 00002B28    "RS..LSTA" */
+    0x01,0xA0,0x05,0x68,0xA4,0x0A,0x0B,0xA1,  /* 00002B30    "...h...." */
+    0x04,0xA4,0x0A,0x09,0x14,0x15,0x4C,0x43,  /* 00002B38    "......LC" */
+    0x52,0x53,0x01,0x70,0x68,0x60,0x79,0x01,  /* 00002B40    "RS.ph`y." */
+    0x60,0x49,0x43,0x52,0x53,0xA4,0x42,0x55,  /* 00002B48    "`ICRS.BU" */
+    0x46,0x41,0x14,0x16,0x4C,0x53,0x52,0x53,  /* 00002B50    "FA..LSRS" */
+    0x01,0x8B,0x68,0x01,0x49,0x53,0x52,0x53,  /* 00002B58    "..h.ISRS" */
+    0x82,0x49,0x53,0x52,0x53,0x60,0xA4,0x76,  /* 00002B60    ".ISRS`.v" */
+    0x60,0x5B,0x82,0x40,0x06,0x4C,0x4E,0x4B,  /* 00002B68    "`[.@.LNK" */
+    0x41,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,  /* 00002B70    "A._HID.A" */
+    0xD0,0x0C,0x0F,0x08,0x5F,0x55,0x49,0x44,  /* 00002B78    "...._UID" */
+    0x01,0x14,0x0F,0x5F,0x53,0x54,0x41,0x00,  /* 00002B80    "..._STA." */
+    0xA4,0x4C,0x53,0x54,0x41,0x50,0x49,0x52,  /* 00002B88    ".LSTAPIR" */
+    0x41,0x14,0x0B,0x5F,0x50,0x52,0x53,0x00,  /* 00002B90    "A.._PRS." */
+    0xA4,0x50,0x52,0x53,0x41,0x14,0x0C,0x5F,  /* 00002B98    ".PRSA.._" */
+    0x44,0x49,0x53,0x00,0x70,0x00,0x50,0x49,  /* 00002BA0    "DIS.p.PI" */
+    0x52,0x41,0x14,0x0F,0x5F,0x43,0x52,0x53,  /* 00002BA8    "RA.._CRS" */
+    0x00,0xA4,0x4C,0x43,0x52,0x53,0x50,0x49,  /* 00002BB0    "..LCRSPI" */
+    0x52,0x41,0x14,0x10,0x5F,0x53,0x52,0x53,  /* 00002BB8    "RA.._SRS" */
+    0x01,0x70,0x4C,0x53,0x52,0x53,0x68,0x50,  /* 00002BC0    ".pLSRShP" */
+    0x49,0x52,0x41,0x5B,0x82,0x41,0x06,0x4C,  /* 00002BC8    "IRA[.A.L" */
+    0x4E,0x4B,0x42,0x08,0x5F,0x48,0x49,0x44,  /* 00002BD0    "NKB._HID" */
+    0x0C,0x41,0xD0,0x0C,0x0F,0x08,0x5F,0x55,  /* 00002BD8    ".A...._U" */
+    0x49,0x44,0x0A,0x02,0x14,0x0F,0x5F,0x53,  /* 00002BE0    "ID...._S" */
+    0x54,0x41,0x00,0xA4,0x4C,0x53,0x54,0x41,  /* 00002BE8    "TA..LSTA" */
+    0x50,0x49,0x52,0x42,0x14,0x0B,0x5F,0x50,  /* 00002BF0    "PIRB.._P" */
+    0x52,0x53,0x00,0xA4,0x50,0x52,0x53,0x42,  /* 00002BF8    "RS..PRSB" */
+    0x14,0x0C,0x5F,0x44,0x49,0x53,0x00,0x70,  /* 00002C00    ".._DIS.p" */
+    0x00,0x50,0x49,0x52,0x42,0x14,0x0F,0x5F,  /* 00002C08    ".PIRB.._" */
+    0x43,0x52,0x53,0x00,0xA4,0x4C,0x43,0x52,  /* 00002C10    "CRS..LCR" */
+    0x53,0x50,0x49,0x52,0x42,0x14,0x10,0x5F,  /* 00002C18    "SPIRB.._" */
+    0x53,0x52,0x53,0x01,0x70,0x4C,0x53,0x52,  /* 00002C20    "SRS.pLSR" */
+    0x53,0x68,0x50,0x49,0x52,0x42,0x5B,0x82,  /* 00002C28    "ShPIRB[." */
+    0x41,0x06,0x4C,0x4E,0x4B,0x43,0x08,0x5F,  /* 00002C30    "A.LNKC._" */
+    0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C,0x0F,  /* 00002C38    "HID.A..." */
+    0x08,0x5F,0x55,0x49,0x44,0x0A,0x03,0x14,  /* 00002C40    "._UID..." */
+    0x0F,0x5F,0x53,0x54,0x41,0x00,0xA4,0x4C,  /* 00002C48    "._STA..L" */
+    0x53,0x54,0x41,0x50,0x49,0x52,0x43,0x14,  /* 00002C50    "STAPIRC." */
+    0x0B,0x5F,0x50,0x52,0x53,0x00,0xA4,0x50,  /* 00002C58    "._PRS..P" */
+    0x52,0x53,0x43,0x14,0x0C,0x5F,0x44,0x49,  /* 00002C60    "RSC.._DI" */
+    0x53,0x00,0x70,0x00,0x50,0x49,0x52,0x43,  /* 00002C68    "S.p.PIRC" */
+    0x14,0x0F,0x5F,0x43,0x52,0x53,0x00,0xA4,  /* 00002C70    ".._CRS.." */
+    0x4C,0x43,0x52,0x53,0x50,0x49,0x52,0x43,  /* 00002C78    "LCRSPIRC" */
+    0x14,0x10,0x5F,0x53,0x52,0x53,0x01,0x70,  /* 00002C80    ".._SRS.p" */
+    0x4C,0x53,0x52,0x53,0x68,0x50,0x49,0x52,  /* 00002C88    "LSRShPIR" */
+    0x43,0x5B,0x82,0x41,0x06,0x4C,0x4E,0x4B,  /* 00002C90    "C[.A.LNK" */
+    0x44,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,  /* 00002C98    "D._HID.A" */
+    0xD0,0x0C,0x0F,0x08,0x5F,0x55,0x49,0x44,  /* 00002CA0    "...._UID" */
+    0x0A,0x04,0x14,0x0F,0x5F,0x53,0x54,0x41,  /* 00002CA8    "...._STA" */
+    0x00,0xA4,0x4C,0x53,0x54,0x41,0x50,0x49,  /* 00002CB0    "..LSTAPI" */
+    0x52,0x44,0x14,0x0B,0x5F,0x50,0x52,0x53,  /* 00002CB8    "RD.._PRS" */
+    0x00,0xA4,0x50,0x52,0x53,0x44,0x14,0x0C,  /* 00002CC0    "..PRSD.." */
+    0x5F,0x44,0x49,0x53,0x00,0x70,0x00,0x50,  /* 00002CC8    "_DIS.p.P" */
+    0x49,0x52,0x44,0x14,0x0F,0x5F,0x43,0x52,  /* 00002CD0    "IRD.._CR" */
+    0x53,0x00,0xA4,0x4C,0x43,0x52,0x53,0x50,  /* 00002CD8    "S..LCRSP" */
+    0x49,0x52,0x44,0x14,0x10,0x5F,0x53,0x52,  /* 00002CE0    "IRD.._SR" */
+    0x53,0x01,0x70,0x4C,0x53,0x52,0x53,0x68,  /* 00002CE8    "S.pLSRSh" */
+    0x50,0x49,0x52,0x44,0x10,0x44,0xF5,0x5F,  /* 00002CF0    "PIRD.D._" */
+    0x53,0x42,0x5F,0x10,0x48,0x21,0x50,0x43,  /* 00002CF8    "SB_.H!PC" */
+    0x49,0x30,0x14,0x08,0x42,0x4E,0x30,0x41,  /* 00002D00    "I0..BN0A" */
+    0x00,0xA4,0x00,0x14,0x0E,0x5F,0x53,0x54,  /* 00002D08    "....._ST" */
+    0x41,0x00,0xA0,0x05,0x01,0xA4,0x0A,0x0F,  /* 00002D10    "A......." */
+    0xA4,0x00,0x08,0x43,0x52,0x53,0x5F,0x11,  /* 00002D18    "...CRS_." */
+    0x4A,0x07,0x0A,0x76,0x88,0x0D,0x00,0x02,  /* 00002D20    "J..v...." */
+    0x0C,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,  /* 00002D28    "........" */
+    0x00,0x00,0x00,0x01,0x88,0x0D,0x00,0x01,  /* 00002D30    "........" */
+    0x0C,0x03,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002D38    "........" */
+    0x00,0x00,0x00,0x00,0x88,0x0D,0x00,0x01,  /* 00002D40    "........" */
+    0x0C,0x03,0x00,0x00,0xB0,0x03,0xBB,0x03,  /* 00002D48    "........" */
+    0x00,0x00,0x0C,0x00,0x88,0x0D,0x00,0x01,  /* 00002D50    "........" */
+    0x0C,0x03,0x00,0x00,0xC0,0x03,0xDF,0x03,  /* 00002D58    "........" */
+    0x00,0x00,0x20,0x00,0x87,0x17,0x00,0x00,  /* 00002D60    ".. ....." */
+    0x0C,0x03,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002D68    "........" */
+    0x0A,0x00,0xFF,0xFF,0x0B,0x00,0x00,0x00,  /* 00002D70    "........" */
+    0x00,0x00,0x00,0x00,0x02,0x00,0x87,0x17,  /* 00002D78    "........" */
+    0x00,0x00,0x0C,0x03,0x00,0x00,0x00,0x00,  /* 00002D80    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002D88    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002D90    "........" */
+    0x79,0x00,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 00002D98    "y..CRS_." */
+    0x64,0x4D,0x49,0x4E,0x35,0x8A,0x43,0x52,  /* 00002DA0    "dMIN5.CR" */
+    0x53,0x5F,0x0A,0x68,0x4D,0x41,0x58,0x35,  /* 00002DA8    "S_.hMAX5" */
+    0x8A,0x43,0x52,0x53,0x5F,0x0A,0x70,0x4C,  /* 00002DB0    ".CRS_.pL" */
+    0x45,0x4E,0x35,0x8A,0x43,0x52,0x53,0x5F,  /* 00002DB8    "EN5.CRS_" */
+    0x0A,0x4A,0x4D,0x49,0x4E,0x34,0x8A,0x43,  /* 00002DC0    ".JMIN4.C" */
+    0x52,0x53,0x5F,0x0A,0x4E,0x4D,0x41,0x58,  /* 00002DC8    "RS_.NMAX" */
+    0x34,0x8A,0x43,0x52,0x53,0x5F,0x0A,0x56,  /* 00002DD0    "4.CRS_.V" */
+    0x4C,0x45,0x4E,0x34,0x8B,0x43,0x52,0x53,  /* 00002DD8    "LEN4.CRS" */
+    0x5F,0x0A,0x18,0x4D,0x49,0x4E,0x49,0x8B,  /* 00002DE0    "_..MINI." */
+    0x43,0x52,0x53,0x5F,0x0A,0x1A,0x4D,0x41,  /* 00002DE8    "CRS_..MA" */
+    0x58,0x49,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00002DF0    "XI.CRS_." */
+    0x1E,0x4C,0x45,0x4E,0x49,0x8B,0x43,0x52,  /* 00002DF8    ".LENI.CR" */
+    0x53,0x5F,0x0A,0x28,0x4D,0x49,0x4E,0x31,  /* 00002E00    "S_.(MIN1" */
+    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x2A,0x4D,  /* 00002E08    ".CRS_.*M" */
+    0x41,0x58,0x31,0x8B,0x43,0x52,0x53,0x5F,  /* 00002E10    "AX1.CRS_" */
+    0x0A,0x2E,0x4C,0x45,0x4E,0x31,0x8B,0x43,  /* 00002E18    "..LEN1.C" */
+    0x52,0x53,0x5F,0x0A,0x38,0x4D,0x49,0x4E,  /* 00002E20    "RS_.8MIN" */
+    0x32,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x3A,  /* 00002E28    "2.CRS_.:" */
+    0x4D,0x41,0x58,0x32,0x8B,0x43,0x52,0x53,  /* 00002E30    "MAX2.CRS" */
+    0x5F,0x0A,0x3E,0x4C,0x45,0x4E,0x32,0x8B,  /* 00002E38    "_.>LEN2." */
+    0x43,0x52,0x53,0x5F,0x0A,0x08,0x4D,0x49,  /* 00002E40    "CRS_..MI" */
+    0x4E,0x42,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00002E48    "NB.CRS_." */
+    0x0A,0x4D,0x41,0x58,0x42,0x8B,0x43,0x52,  /* 00002E50    ".MAXB.CR" */
+    0x53,0x5F,0x0A,0x0E,0x4C,0x45,0x4E,0x42,  /* 00002E58    "S_..LENB" */
+    0x14,0x43,0x0B,0x5F,0x43,0x52,0x53,0x00,  /* 00002E60    ".C._CRS." */
+    0xA0,0x28,0x4D,0x47,0x33,0x4C,0x70,0x4D,  /* 00002E68    ".(MG3LpM" */
+    0x47,0x33,0x42,0x4D,0x49,0x4E,0x35,0x70,  /* 00002E70    "G3BMIN5p" */
+    0x4D,0x47,0x33,0x4C,0x4C,0x45,0x4E,0x35,  /* 00002E78    "MG3LLEN5" */
+    0x70,0x4D,0x47,0x33,0x4C,0x60,0x72,0x4D,  /* 00002E80    "pMG3L`rM" */
+    0x49,0x4E,0x35,0x76,0x60,0x4D,0x41,0x58,  /* 00002E88    "IN5v`MAX" */
+    0x35,0xA0,0x3E,0x92,0x93,0x56,0x47,0x41,  /* 00002E90    "5.>..VGA" */
+    0x4F,0x01,0x70,0x00,0x4D,0x49,0x4E,0x34,  /* 00002E98    "O.p.MIN4" */
+    0x70,0x00,0x4D,0x41,0x58,0x34,0x70,0x00,  /* 00002EA0    "p.MAX4p." */
+    0x4C,0x45,0x4E,0x34,0x70,0x00,0x4D,0x49,  /* 00002EA8    "LEN4p.MI" */
+    0x4E,0x31,0x70,0x00,0x4D,0x41,0x58,0x31,  /* 00002EB0    "N1p.MAX1" */
+    0x70,0x00,0x4C,0x45,0x4E,0x31,0x70,0x00,  /* 00002EB8    "p.LEN1p." */
+    0x4D,0x49,0x4E,0x32,0x70,0x00,0x4D,0x41,  /* 00002EC0    "MIN2p.MA" */
+    0x58,0x32,0x70,0x00,0x4C,0x45,0x4E,0x32,  /* 00002EC8    "X2p.LEN2" */
+    0xA0,0x28,0x49,0x4F,0x4C,0x31,0x70,0x49,  /* 00002ED0    ".(IOL1pI" */
+    0x4F,0x42,0x31,0x4D,0x49,0x4E,0x49,0x70,  /* 00002ED8    "OB1MINIp" */
+    0x49,0x4F,0x4C,0x31,0x4C,0x45,0x4E,0x49,  /* 00002EE0    "IOL1LENI" */
+    0x70,0x49,0x4F,0x4C,0x31,0x60,0x72,0x4D,  /* 00002EE8    "pIOL1`rM" */
+    0x49,0x4E,0x49,0x76,0x60,0x4D,0x41,0x58,  /* 00002EF0    "INIv`MAX" */
+    0x49,0x70,0x00,0x60,0x70,0x60,0x4D,0x49,  /* 00002EF8    "Ip.`p`MI" */
+    0x4E,0x42,0x70,0x60,0x4D,0x41,0x58,0x42,  /* 00002F00    "NBp`MAXB" */
+    0x72,0x60,0x01,0x4C,0x45,0x4E,0x42,0xA4,  /* 00002F08    "r`.LENB." */
+    0x43,0x52,0x53,0x5F,0x10,0x4C,0x69,0x50,  /* 00002F10    "CRS_.LiP" */
+    0x43,0x49,0x41,0x08,0x43,0x52,0x53,0x5F,  /* 00002F18    "CIA.CRS_" */
+    0x11,0x41,0x13,0x0B,0x2C,0x01,0x88,0x0D,  /* 00002F20    ".A..,..." */
+    0x00,0x02,0x0C,0x00,0x00,0x00,0x00,0x00,  /* 00002F28    "........" */
+    0xFF,0x00,0x00,0x00,0x00,0x01,0x47,0x01,  /* 00002F30    "......G." */
+    0xF8,0x0C,0xF8,0x0C,0x01,0x08,0x88,0x0D,  /* 00002F38    "........" */
+    0x00,0x01,0x0C,0x03,0x00,0x00,0x00,0x00,  /* 00002F40    "........" */
+    0xAF,0x03,0x00,0x00,0xB0,0x03,0x88,0x0D,  /* 00002F48    "........" */
+    0x00,0x01,0x0C,0x03,0x00,0x00,0xB0,0x03,  /* 00002F50    "........" */
+    0xBB,0x03,0x00,0x00,0x0C,0x00,0x88,0x0D,  /* 00002F58    "........" */
+    0x00,0x01,0x0C,0x03,0x00,0x00,0xBC,0x03,  /* 00002F60    "........" */
+    0xBF,0x03,0x00,0x00,0x04,0x00,0x88,0x0D,  /* 00002F68    "........" */
+    0x00,0x01,0x0C,0x03,0x00,0x00,0xC0,0x03,  /* 00002F70    "........" */
+    0xDF,0x03,0x00,0x00,0x20,0x00,0x88,0x0D,  /* 00002F78    ".... ..." */
+    0x00,0x01,0x0C,0x03,0x00,0x00,0xE0,0x03,  /* 00002F80    "........" */
+    0xF7,0x0C,0x00,0x00,0x18,0x09,0x88,0x0D,  /* 00002F88    "........" */
+    0x00,0x01,0x0C,0x03,0x00,0x00,0x00,0x0D,  /* 00002F90    "........" */
+    0xFF,0x0F,0x00,0x00,0x00,0x03,0x88,0x0D,  /* 00002F98    "........" */
+    0x00,0x01,0x0C,0x03,0x00,0x00,0x00,0x00,  /* 00002FA0    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x87,0x17,  /* 00002FA8    "........" */
+    0x00,0x00,0x0C,0x03,0x00,0x00,0x00,0x00,  /* 00002FB0    "........" */
+    0x00,0x00,0x0A,0x00,0xFF,0xFF,0x0B,0x00,  /* 00002FB8    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,  /* 00002FC0    "........" */
+    0x87,0x17,0x00,0x00,0x0C,0x03,0x00,0x00,  /* 00002FC8    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002FD0    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002FD8    "........" */
+    0x00,0x00,0x87,0x17,0x00,0x00,0x0C,0x03,  /* 00002FE0    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002FE8    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002FF0    "........" */
+    0x00,0x00,0x00,0x00,0x87,0x17,0x00,0x00,  /* 00002FF8    "........" */
+    0x0C,0x03,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003000    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003008    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x87,0x17,  /* 00003010    "........" */
+    0x00,0x00,0x0C,0x03,0x00,0x00,0x00,0x00,  /* 00003018    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003020    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003028    "........" */
+    0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00,  /* 00003030    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003038    "........" */
+    0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00,  /* 00003040    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003048    "........" */
+    0x79,0x00,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 00003050    "y..CRS_." */
+    0x92,0x4D,0x49,0x4E,0x34,0x8A,0x43,0x52,  /* 00003058    ".MIN4.CR" */
+    0x53,0x5F,0x0A,0x96,0x4D,0x41,0x58,0x34,  /* 00003060    "S_..MAX4" */
+    0x8A,0x43,0x52,0x53,0x5F,0x0A,0x9E,0x4C,  /* 00003068    ".CRS_..L" */
+    0x45,0x4E,0x34,0x8A,0x43,0x52,0x53,0x5F,  /* 00003070    "EN4.CRS_" */
+    0x0A,0xAC,0x4D,0x49,0x4E,0x35,0x8A,0x43,  /* 00003078    "..MIN5.C" */
+    0x52,0x53,0x5F,0x0A,0xB0,0x4D,0x41,0x58,  /* 00003080    "RS_..MAX" */
+    0x35,0x8A,0x43,0x52,0x53,0x5F,0x0A,0xB8,  /* 00003088    "5.CRS_.." */
+    0x4C,0x45,0x4E,0x35,0x8A,0x43,0x52,0x53,  /* 00003090    "LEN5.CRS" */
+    0x5F,0x0A,0xC6,0x4D,0x49,0x4E,0x36,0x8A,  /* 00003098    "_..MIN6." */
+    0x43,0x52,0x53,0x5F,0x0A,0xCA,0x4D,0x41,  /* 000030A0    "CRS_..MA" */
+    0x58,0x36,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 000030A8    "X6.CRS_." */
+    0xD2,0x4C,0x45,0x4E,0x36,0x8A,0x43,0x52,  /* 000030B0    ".LEN6.CR" */
+    0x53,0x5F,0x0A,0xE0,0x4D,0x49,0x4E,0x37,  /* 000030B8    "S_..MIN7" */
+    0x8A,0x43,0x52,0x53,0x5F,0x0A,0xE4,0x4D,  /* 000030C0    ".CRS_..M" */
+    0x41,0x58,0x37,0x8A,0x43,0x52,0x53,0x5F,  /* 000030C8    "AX7.CRS_" */
+    0x0A,0xEC,0x4C,0x45,0x4E,0x37,0x8A,0x43,  /* 000030D0    "..LEN7.C" */
+    0x52,0x53,0x5F,0x0A,0xFA,0x4D,0x49,0x4E,  /* 000030D8    "RS_..MIN" */
+    0x38,0x8A,0x43,0x52,0x53,0x5F,0x0A,0xFE,  /* 000030E0    "8.CRS_.." */
+    0x4D,0x41,0x58,0x38,0x8A,0x43,0x52,0x53,  /* 000030E8    "MAX8.CRS" */
+    0x5F,0x0B,0x06,0x01,0x4C,0x45,0x4E,0x38,  /* 000030F0    "_...LEN8" */
+    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x08,0x4D,  /* 000030F8    ".CRS_..M" */
+    0x49,0x4E,0x42,0x8B,0x43,0x52,0x53,0x5F,  /* 00003100    "INB.CRS_" */
+    0x0A,0x0A,0x4D,0x41,0x58,0x42,0x8B,0x43,  /* 00003108    "..MAXB.C" */
+    0x52,0x53,0x5F,0x0A,0x0E,0x4C,0x45,0x4E,  /* 00003110    "RS_..LEN" */
+    0x42,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x70,  /* 00003118    "B.CRS_.p" */
+    0x4D,0x49,0x4E,0x30,0x8B,0x43,0x52,0x53,  /* 00003120    "MIN0.CRS" */
+    0x5F,0x0A,0x72,0x4D,0x41,0x58,0x30,0x8B,  /* 00003128    "_.rMAX0." */
+    0x43,0x52,0x53,0x5F,0x0A,0x76,0x4C,0x45,  /* 00003130    "CRS_.vLE" */
+    0x4E,0x30,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00003138    "N0.CRS_." */
+    0x80,0x4D,0x49,0x4E,0x31,0x8B,0x43,0x52,  /* 00003140    ".MIN1.CR" */
+    0x53,0x5F,0x0A,0x82,0x4D,0x41,0x58,0x31,  /* 00003148    "S_..MAX1" */
+    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x86,0x4C,  /* 00003150    ".CRS_..L" */
+    0x45,0x4E,0x31,0x8B,0x43,0x52,0x53,0x5F,  /* 00003158    "EN1.CRS_" */
+    0x0A,0x30,0x4D,0x49,0x4E,0x32,0x8B,0x43,  /* 00003160    ".0MIN2.C" */
+    0x52,0x53,0x5F,0x0A,0x32,0x4D,0x41,0x58,  /* 00003168    "RS_.2MAX" */
+    0x32,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x36,  /* 00003170    "2.CRS_.6" */
+    0x4C,0x45,0x4E,0x32,0x8B,0x43,0x52,0x53,  /* 00003178    "LEN2.CRS" */
+    0x5F,0x0A,0x50,0x4D,0x49,0x4E,0x33,0x8B,  /* 00003180    "_.PMIN3." */
+    0x43,0x52,0x53,0x5F,0x0A,0x52,0x4D,0x41,  /* 00003188    "CRS_.RMA" */
+    0x58,0x33,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00003190    "X3.CRS_." */
+    0x56,0x4C,0x45,0x4E,0x33,0x8B,0x43,0x52,  /* 00003198    "VLEN3.CR" */
+    0x53,0x5F,0x0B,0x12,0x01,0x4D,0x49,0x4E,  /* 000031A0    "S_...MIN" */
+    0x39,0x8B,0x43,0x52,0x53,0x5F,0x0B,0x14,  /* 000031A8    "9.CRS_.." */
+    0x01,0x4D,0x41,0x58,0x39,0x8B,0x43,0x52,  /* 000031B0    ".MAX9.CR" */
+    0x53,0x5F,0x0B,0x18,0x01,0x4C,0x45,0x4E,  /* 000031B8    "S_...LEN" */
+    0x39,0x8B,0x43,0x52,0x53,0x5F,0x0B,0x22,  /* 000031C0    "9.CRS_."" */
+    0x01,0x4D,0x49,0x4E,0x41,0x8B,0x43,0x52,  /* 000031C8    ".MINA.CR" */
+    0x53,0x5F,0x0B,0x24,0x01,0x4D,0x41,0x58,  /* 000031D0    "S_.$.MAX" */
+    0x41,0x8B,0x43,0x52,0x53,0x5F,0x0B,0x28,  /* 000031D8    "A.CRS_.(" */
+    0x01,0x4C,0x45,0x4E,0x41,0x14,0x48,0x37,  /* 000031E0    ".LENA.H7" */
+    0x5F,0x43,0x52,0x53,0x00,0xA0,0x22,0x94,  /* 000031E8    "_CRS.."." */
+    0x4D,0x47,0x33,0x42,0x4D,0x47,0x34,0x42,  /* 000031F0    "MG3BMG4B" */
+    0x70,0x4D,0x47,0x34,0x42,0x60,0x70,0x4D,  /* 000031F8    "pMG4B`pM" */
+    0x47,0x34,0x4C,0x61,0x70,0x4D,0x47,0x33,  /* 00003200    "G4LapMG3" */
+    0x42,0x62,0x70,0x4D,0x47,0x33,0x4C,0x63,  /* 00003208    "BbpMG3Lc" */
+    0xA1,0x19,0x70,0x4D,0x47,0x33,0x42,0x60,  /* 00003210    "..pMG3B`" */
+    0x70,0x4D,0x47,0x33,0x4C,0x61,0x70,0x4D,  /* 00003218    "pMG3LapM" */
+    0x47,0x34,0x42,0x62,0x70,0x4D,0x47,0x34,  /* 00003220    "G4BbpMG4" */
+    0x4C,0x63,0xA0,0x2F,0x94,0x4D,0x47,0x35,  /* 00003228    "Lc./.MG5" */
+    0x42,0x60,0xA0,0x13,0x94,0x4D,0x47,0x35,  /* 00003230    "B`...MG5" */
+    0x42,0x62,0x70,0x4D,0x47,0x35,0x42,0x64,  /* 00003238    "BbpMG5Bd" */
+    0x70,0x4D,0x47,0x35,0x4C,0x65,0xA1,0x13,  /* 00003240    "pMG5Le.." */
+    0x70,0x62,0x64,0x70,0x63,0x65,0x70,0x4D,  /* 00003248    "pbdpcepM" */
+    0x47,0x35,0x42,0x62,0x70,0x4D,0x47,0x35,  /* 00003250    "G5BbpMG5" */
+    0x4C,0x63,0xA1,0x19,0x70,0x62,0x64,0x70,  /* 00003258    "Lc..pbdp" */
+    0x63,0x65,0x70,0x60,0x62,0x70,0x61,0x63,  /* 00003260    "cep`bpac" */
+    0x70,0x4D,0x47,0x35,0x42,0x60,0x70,0x4D,  /* 00003268    "pMG5B`pM" */
+    0x47,0x35,0x4C,0x61,0x70,0x0A,0x03,0x66,  /* 00003270    "G5Lap..f" */
+    0x70,0x66,0x67,0xA2,0x16,0x67,0xA0,0x11,  /* 00003278    "pfg..g.." */
+    0x92,0x61,0x76,0x66,0x70,0x63,0x61,0x70,  /* 00003280    ".avfpcap" */
+    0x62,0x60,0x70,0x65,0x63,0x70,0x64,0x62,  /* 00003288    "b`pecpdb" */
+    0x76,0x67,0xA0,0x4D,0x0C,0x66,0xA0,0x22,  /* 00003290    "vg.M.f."" */
+    0x92,0x93,0x4D,0x47,0x32,0x42,0x60,0x70,  /* 00003298    "..MG2B`p" */
+    0x4D,0x47,0x32,0x42,0x4D,0x49,0x4E,0x35,  /* 000032A0    "MG2BMIN5" */
+    0x74,0x60,0x4D,0x47,0x32,0x42,0x4C,0x45,  /* 000032A8    "t`MG2BLE" */
+    0x4E,0x35,0x74,0x60,0x01,0x4D,0x41,0x58,  /* 000032B0    "N5t`.MAX" */
+    0x35,0xA0,0x46,0x08,0x94,0x66,0x01,0x72,  /* 000032B8    "5.F..f.r" */
+    0x60,0x61,0x67,0xA0,0x19,0x92,0x93,0x67,  /* 000032C0    "`ag....g" */
+    0x62,0x70,0x67,0x4D,0x49,0x4E,0x36,0x74,  /* 000032C8    "bpgMIN6t" */
+    0x62,0x67,0x4C,0x45,0x4E,0x36,0x74,0x62,  /* 000032D0    "bgLEN6tb" */
+    0x01,0x4D,0x41,0x58,0x36,0xA0,0x42,0x04,  /* 000032D8    ".MAX6.B." */
+    0x94,0x66,0x0A,0x02,0x72,0x62,0x63,0x67,  /* 000032E0    ".f..rbcg" */
+    0xA0,0x19,0x92,0x93,0x66,0x64,0x70,0x66,  /* 000032E8    "....fdpf" */
+    0x4D,0x49,0x4E,0x37,0x74,0x64,0x66,0x4C,  /* 000032F0    "MIN7tdfL" */
+    0x45,0x4E,0x37,0x74,0x64,0x01,0x4D,0x41,  /* 000032F8    "EN7td.MA" */
+    0x58,0x37,0x72,0x64,0x65,0x4D,0x49,0x4E,  /* 00003300    "X7rdeMIN" */
+    0x38,0x70,0xFF,0x4D,0x41,0x58,0x38,0x74,  /* 00003308    "8p.MAX8t" */
+    0x4D,0x41,0x58,0x38,0x4D,0x49,0x4E,0x38,  /* 00003310    "MAX8MIN8" */
+    0x60,0x72,0x60,0x01,0x4C,0x45,0x4E,0x38,  /* 00003318    "`r`.LEN8" */
+    0xA1,0x1F,0x72,0x62,0x63,0x4D,0x49,0x4E,  /* 00003320    "..rbcMIN" */
+    0x38,0x70,0xFF,0x4D,0x41,0x58,0x38,0x74,  /* 00003328    "8p.MAX8t" */
+    0x4D,0x41,0x58,0x38,0x4D,0x49,0x4E,0x38,  /* 00003330    "MAX8MIN8" */
+    0x60,0x72,0x60,0x01,0x4C,0x45,0x4E,0x38,  /* 00003338    "`r`.LEN8" */
+    0xA1,0x1F,0x72,0x60,0x61,0x4D,0x49,0x4E,  /* 00003340    "..r`aMIN" */
+    0x38,0x70,0xFF,0x4D,0x41,0x58,0x38,0x74,  /* 00003348    "8p.MAX8t" */
+    0x4D,0x41,0x58,0x38,0x4D,0x49,0x4E,0x38,  /* 00003350    "MAX8MIN8" */
+    0x60,0x72,0x60,0x01,0x4C,0x45,0x4E,0x38,  /* 00003358    "`r`.LEN8" */
+    0xA1,0x21,0x70,0x4D,0x47,0x32,0x42,0x4D,  /* 00003360    ".!pMG2BM" */
+    0x49,0x4E,0x38,0x70,0xFF,0x4D,0x41,0x58,  /* 00003368    "IN8p.MAX" */
+    0x38,0x74,0x4D,0x41,0x58,0x38,0x4D,0x49,  /* 00003370    "8tMAX8MI" */
+    0x4E,0x38,0x60,0x72,0x60,0x01,0x4C,0x45,  /* 00003378    "N8`r`.LE" */
+    0x4E,0x38,0xA0,0x3B,0x56,0x47,0x41,0x4F,  /* 00003380    "N8.;VGAO" */
+    0x70,0x00,0x4D,0x49,0x4E,0x34,0x70,0x00,  /* 00003388    "p.MIN4p." */
+    0x4D,0x41,0x58,0x34,0x70,0x00,0x4C,0x45,  /* 00003390    "MAX4p.LE" */
+    0x4E,0x34,0x70,0x00,0x4D,0x49,0x4E,0x32,  /* 00003398    "N4p.MIN2" */
+    0x70,0x00,0x4D,0x41,0x58,0x32,0x70,0x00,  /* 000033A0    "p.MAX2p." */
+    0x4C,0x45,0x4E,0x32,0x70,0x00,0x4D,0x49,  /* 000033A8    "LEN2p.MI" */
+    0x4E,0x33,0x70,0x00,0x4D,0x41,0x58,0x33,  /* 000033B0    "N3p.MAX3" */
+    0x70,0x00,0x4C,0x45,0x4E,0x33,0xA0,0x22,  /* 000033B8    "p.LEN3."" */
+    0x94,0x49,0x4F,0x42,0x31,0x49,0x4F,0x42,  /* 000033C0    ".IOB1IOB" */
+    0x32,0x70,0x49,0x4F,0x42,0x32,0x60,0x70,  /* 000033C8    "2pIOB2`p" */
+    0x49,0x4F,0x4C,0x32,0x61,0x70,0x49,0x4F,  /* 000033D0    "IOL2apIO" */
+    0x42,0x31,0x62,0x70,0x49,0x4F,0x4C,0x31,  /* 000033D8    "B1bpIOL1" */
+    0x63,0xA1,0x19,0x70,0x49,0x4F,0x42,0x31,  /* 000033E0    "c..pIOB1" */
+    0x60,0x70,0x49,0x4F,0x4C,0x31,0x61,0x70,  /* 000033E8    "`pIOL1ap" */
+    0x49,0x4F,0x42,0x32,0x62,0x70,0x49,0x4F,  /* 000033F0    "IOB2bpIO" */
+    0x42,0x32,0x63,0xA0,0x2F,0x94,0x49,0x4F,  /* 000033F8    "B2c./.IO" */
+    0x42,0x33,0x60,0xA0,0x13,0x94,0x49,0x4F,  /* 00003400    "B3`...IO" */
+    0x42,0x33,0x62,0x70,0x49,0x4F,0x42,0x33,  /* 00003408    "B3bpIOB3" */
+    0x64,0x70,0x49,0x4F,0x4C,0x33,0x65,0xA1,  /* 00003410    "dpIOL3e." */
+    0x13,0x70,0x62,0x64,0x70,0x63,0x65,0x70,  /* 00003418    ".pbdpcep" */
+    0x49,0x4F,0x42,0x33,0x62,0x70,0x49,0x4F,  /* 00003420    "IOB3bpIO" */
+    0x4C,0x33,0x63,0xA1,0x19,0x70,0x62,0x64,  /* 00003428    "L3c..pbd" */
+    0x70,0x63,0x65,0x70,0x60,0x62,0x70,0x61,  /* 00003430    "pcep`bpa" */
+    0x63,0x70,0x49,0x4F,0x42,0x33,0x60,0x70,  /* 00003438    "cpIOB3`p" */
+    0x49,0x4F,0x4C,0x33,0x61,0x70,0x0A,0x03,  /* 00003440    "IOL3ap.." */
+    0x66,0x70,0x66,0x67,0xA2,0x16,0x67,0xA0,  /* 00003448    "fpfg..g." */
+    0x11,0x92,0x61,0x76,0x66,0x70,0x63,0x61,  /* 00003450    "..avfpca" */
+    0x70,0x62,0x60,0x70,0x65,0x63,0x70,0x64,  /* 00003458    "pb`pecpd" */
+    0x62,0x76,0x67,0xA0,0x4A,0x0C,0x66,0x74,  /* 00003460    "bvg.J.ft" */
+    0x60,0x01,0x4D,0x41,0x58,0x30,0x74,0x60,  /* 00003468    "`.MAX0t`" */
+    0x0B,0x00,0x0D,0x4C,0x45,0x4E,0x30,0x72,  /* 00003470    "...LEN0r" */
+    0x60,0x61,0x67,0xA0,0x4E,0x08,0x94,0x66,  /* 00003478    "`ag.N..f" */
+    0x01,0xA0,0x19,0x92,0x93,0x67,0x62,0x70,  /* 00003480    ".....gbp" */
+    0x67,0x4D,0x49,0x4E,0x31,0x74,0x62,0x67,  /* 00003488    "gMIN1tbg" */
+    0x4C,0x45,0x4E,0x31,0x74,0x62,0x01,0x4D,  /* 00003490    "LEN1tb.M" */
+    0x41,0x58,0x31,0x72,0x62,0x63,0x67,0xA0,  /* 00003498    "AX1rbcg." */
+    0x46,0x04,0x94,0x66,0x0A,0x02,0xA0,0x19,  /* 000034A0    "F..f...." */
+    0x92,0x93,0x67,0x64,0x70,0x67,0x4D,0x49,  /* 000034A8    "..gdpgMI" */
+    0x4E,0x39,0x74,0x64,0x67,0x4C,0x45,0x4E,  /* 000034B0    "N9tdgLEN" */
+    0x39,0x74,0x64,0x01,0x4D,0x41,0x58,0x39,  /* 000034B8    "9td.MAX9" */
+    0x72,0x64,0x65,0x67,0xA0,0x21,0x95,0x67,  /* 000034C0    "rdeg.!.g" */
+    0x0C,0x00,0x00,0x01,0x00,0x70,0x67,0x4D,  /* 000034C8    ".....pgM" */
+    0x49,0x4E,0x41,0x74,0x0C,0x00,0x00,0x01,  /* 000034D0    "INAt...." */
+    0x00,0x67,0x4C,0x45,0x4E,0x41,0x70,0x0B,  /* 000034D8    ".gLENAp." */
+    0xFF,0xFF,0x4D,0x41,0x58,0x41,0xA1,0x23,  /* 000034E0    "..MAXA.#" */
+    0xA0,0x21,0x95,0x67,0x0C,0x00,0x00,0x01,  /* 000034E8    ".!.g...." */
+    0x00,0x70,0x67,0x4D,0x49,0x4E,0x39,0x70,  /* 000034F0    ".pgMIN9p" */
+    0x0B,0xFF,0xFF,0x4D,0x41,0x58,0x39,0x74,  /* 000034F8    "...MAX9t" */
+    0x0C,0x00,0x00,0x01,0x00,0x67,0x4C,0x45,  /* 00003500    ".....gLE" */
+    0x4E,0x39,0xA1,0x23,0xA0,0x21,0x95,0x67,  /* 00003508    "N9.#.!.g" */
+    0x0C,0x00,0x00,0x01,0x00,0x70,0x67,0x4D,  /* 00003510    ".....pgM" */
+    0x49,0x4E,0x31,0x70,0x0B,0xFF,0xFF,0x4D,  /* 00003518    "IN1p...M" */
+    0x41,0x58,0x31,0x74,0x0C,0x00,0x00,0x01,  /* 00003520    "AX1t...." */
+    0x00,0x67,0x4C,0x45,0x4E,0x31,0xA1,0x11,  /* 00003528    ".gLEN1.." */
+    0x70,0x0B,0x00,0xF3,0x4C,0x45,0x4E,0x30,  /* 00003530    "p...LEN0" */
+    0x70,0x0B,0xFF,0xFF,0x4D,0x41,0x58,0x30,  /* 00003538    "p...MAX0" */
+    0x70,0x00,0x4D,0x49,0x4E,0x42,0x74,0x53,  /* 00003540    "p.MINBtS" */
+    0x55,0x42,0x31,0x01,0x4D,0x41,0x58,0x42,  /* 00003548    "UB1.MAXB" */
+    0x70,0x53,0x55,0x42,0x31,0x4C,0x45,0x4E,  /* 00003550    "pSUB1LEN" */
+    0x42,0xA4,0x43,0x52,0x53,0x5F,0x5B,0x80,  /* 00003558    "B.CRS_[." */
+    0x50,0x4D,0x49,0x4F,0x01,0x50,0x4D,0x42,  /* 00003560    "PMIO.PMB" */
+    0x53,0x0A,0xFF,0x5B,0x81,0x44,0x04,0x50,  /* 00003568    "S..[.D.P" */
+    0x4D,0x49,0x4F,0x01,0x00,0x40,0x0F,0x53,  /* 00003570    "MIO..@.S" */
+    0x57,0x53,0x4D,0x08,0x00,0x48,0x04,0x47,  /* 00003578    "WSM..H.G" */
+    0x53,0x54,0x53,0x10,0x47,0x4E,0x42,0x4C,  /* 00003580    "STS.GNBL" */
+    0x10,0x00,0x20,0x53,0x54,0x4D,0x43,0x05,  /* 00003588    ".. STMC." */
+    0x00,0x0B,0x54,0x52,0x50,0x45,0x01,0x45,  /* 00003590    "..TRPE.E" */
+    0x4E,0x4D,0x43,0x05,0x00,0x4A,0x08,0x53,  /* 00003598    "NMC..J.S" */
+    0x54,0x43,0x30,0x10,0x53,0x54,0x43,0x31,  /* 000035A0    "TC0.STC1" */
+    0x08,0x00,0x48,0x30,0x53,0x54,0x48,0x57,  /* 000035A8    "..H0STHW" */
+    0x14,0x10,0x41,0x23,0x50,0x43,0x49,0x42,  /* 000035B0    "..A#PCIB" */
+    0x14,0x0B,0x42,0x4E,0x30,0x42,0x00,0xA4,  /* 000035B8    "..BN0B.." */
+    0x53,0x45,0x42,0x31,0x14,0x11,0x5F,0x53,  /* 000035C0    "SEB1.._S" */
+    0x54,0x41,0x00,0xA0,0x08,0x53,0x45,0x42,  /* 000035C8    "TA...SEB" */
+    0x31,0xA4,0x0A,0x0F,0xA4,0x00,0x08,0x43,  /* 000035D0    "1......C" */
+    0x52,0x53,0x5F,0x11,0x4A,0x07,0x0A,0x76,  /* 000035D8    "RS_.J..v" */
+    0x88,0x0D,0x00,0x02,0x0C,0x00,0x00,0x00,  /* 000035E0    "........" */
+    0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x01,  /* 000035E8    "........" */
+    0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00,  /* 000035F0    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 000035F8    "........" */
+    0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00,  /* 00003600    "........" */
+    0xB0,0x03,0xBB,0x03,0x00,0x00,0x0C,0x00,  /* 00003608    "........" */
+    0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00,  /* 00003610    "........" */
+    0xC0,0x03,0xDF,0x03,0x00,0x00,0x20,0x00,  /* 00003618    "...... ." */
+    0x87,0x17,0x00,0x00,0x0C,0x03,0x00,0x00,  /* 00003620    "........" */
+    0x00,0x00,0x00,0x00,0x0A,0x00,0xFF,0xFF,  /* 00003628    "........" */
+    0x0B,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003630    "........" */
+    0x02,0x00,0x87,0x17,0x00,0x00,0x0C,0x03,  /* 00003638    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003640    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003648    "........" */
+    0x00,0x00,0x00,0x00,0x79,0x00,0x8A,0x43,  /* 00003650    "....y..C" */
+    0x52,0x53,0x5F,0x0A,0x64,0x4D,0x49,0x4E,  /* 00003658    "RS_.dMIN" */
+    0x35,0x8A,0x43,0x52,0x53,0x5F,0x0A,0x68,  /* 00003660    "5.CRS_.h" */
+    0x4D,0x41,0x58,0x35,0x8A,0x43,0x52,0x53,  /* 00003668    "MAX5.CRS" */
+    0x5F,0x0A,0x70,0x4C,0x45,0x4E,0x35,0x8A,  /* 00003670    "_.pLEN5." */
+    0x43,0x52,0x53,0x5F,0x0A,0x4A,0x4D,0x49,  /* 00003678    "CRS_.JMI" */
+    0x4E,0x34,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 00003680    "N4.CRS_." */
+    0x4E,0x4D,0x41,0x58,0x34,0x8A,0x43,0x52,  /* 00003688    "NMAX4.CR" */
+    0x53,0x5F,0x0A,0x56,0x4C,0x45,0x4E,0x34,  /* 00003690    "S_.VLEN4" */
+    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x18,0x4D,  /* 00003698    ".CRS_..M" */
+    0x49,0x4E,0x49,0x8B,0x43,0x52,0x53,0x5F,  /* 000036A0    "INI.CRS_" */
+    0x0A,0x1A,0x4D,0x41,0x58,0x49,0x8B,0x43,  /* 000036A8    "..MAXI.C" */
+    0x52,0x53,0x5F,0x0A,0x1E,0x4C,0x45,0x4E,  /* 000036B0    "RS_..LEN" */
+    0x49,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x28,  /* 000036B8    "I.CRS_.(" */
+    0x4D,0x49,0x4E,0x31,0x8B,0x43,0x52,0x53,  /* 000036C0    "MIN1.CRS" */
+    0x5F,0x0A,0x2A,0x4D,0x41,0x58,0x31,0x8B,  /* 000036C8    "_.*MAX1." */
+    0x43,0x52,0x53,0x5F,0x0A,0x2E,0x4C,0x45,  /* 000036D0    "CRS_..LE" */
+    0x4E,0x31,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 000036D8    "N1.CRS_." */
+    0x38,0x4D,0x49,0x4E,0x32,0x8B,0x43,0x52,  /* 000036E0    "8MIN2.CR" */
+    0x53,0x5F,0x0A,0x3A,0x4D,0x41,0x58,0x32,  /* 000036E8    "S_.:MAX2" */
+    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x3E,0x4C,  /* 000036F0    ".CRS_.>L" */
+    0x45,0x4E,0x32,0x8B,0x43,0x52,0x53,0x5F,  /* 000036F8    "EN2.CRS_" */
+    0x0A,0x08,0x4D,0x49,0x4E,0x42,0x8B,0x43,  /* 00003700    "..MINB.C" */
+    0x52,0x53,0x5F,0x0A,0x0A,0x4D,0x41,0x58,  /* 00003708    "RS_..MAX" */
+    0x42,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x0E,  /* 00003710    "B.CRS_.." */
+    0x4C,0x45,0x4E,0x42,0x14,0x46,0x0C,0x5F,  /* 00003718    "LENB.F._" */
+    0x43,0x52,0x53,0x00,0xA0,0x28,0x4D,0x47,  /* 00003720    "CRS..(MG" */
+    0x33,0x4C,0x70,0x4D,0x47,0x33,0x42,0x4D,  /* 00003728    "3LpMG3BM" */
+    0x49,0x4E,0x35,0x70,0x4D,0x47,0x33,0x4C,  /* 00003730    "IN5pMG3L" */
+    0x4C,0x45,0x4E,0x35,0x70,0x4D,0x47,0x33,  /* 00003738    "LEN5pMG3" */
+    0x4C,0x60,0x72,0x4D,0x49,0x4E,0x35,0x76,  /* 00003740    "L`rMIN5v" */
+    0x60,0x4D,0x41,0x58,0x35,0xA0,0x3E,0x92,  /* 00003748    "`MAX5.>." */
+    0x93,0x56,0x47,0x41,0x4F,0x01,0x70,0x00,  /* 00003750    ".VGAO.p." */
+    0x4D,0x49,0x4E,0x34,0x70,0x00,0x4D,0x41,  /* 00003758    "MIN4p.MA" */
+    0x58,0x34,0x70,0x00,0x4C,0x45,0x4E,0x34,  /* 00003760    "X4p.LEN4" */
+    0x70,0x00,0x4D,0x49,0x4E,0x31,0x70,0x00,  /* 00003768    "p.MIN1p." */
+    0x4D,0x41,0x58,0x31,0x70,0x00,0x4C,0x45,  /* 00003770    "MAX1p.LE" */
+    0x4E,0x31,0x70,0x00,0x4D,0x49,0x4E,0x32,  /* 00003778    "N1p.MIN2" */
+    0x70,0x00,0x4D,0x41,0x58,0x32,0x70,0x00,  /* 00003780    "p.MAX2p." */
+    0x4C,0x45,0x4E,0x32,0xA0,0x28,0x49,0x4F,  /* 00003788    "LEN2.(IO" */
+    0x4C,0x31,0x70,0x49,0x4F,0x42,0x31,0x4D,  /* 00003790    "L1pIOB1M" */
+    0x49,0x4E,0x49,0x70,0x49,0x4F,0x4C,0x31,  /* 00003798    "INIpIOL1" */
+    0x4C,0x45,0x4E,0x49,0x70,0x49,0x4F,0x4C,  /* 000037A0    "LENIpIOL" */
+    0x31,0x60,0x72,0x4D,0x49,0x4E,0x49,0x76,  /* 000037A8    "1`rMINIv" */
+    0x60,0x4D,0x41,0x58,0x49,0x70,0x53,0x45,  /* 000037B0    "`MAXIpSE" */
+    0x42,0x31,0x60,0x70,0x60,0x4D,0x49,0x4E,  /* 000037B8    "B1`p`MIN" */
+    0x42,0x70,0x53,0x55,0x42,0x31,0x60,0x70,  /* 000037C0    "BpSUB1`p" */
+    0x60,0x4D,0x41,0x58,0x42,0x74,0x53,0x55,  /* 000037C8    "`MAXBtSU" */
+    0x42,0x31,0x53,0x45,0x42,0x31,0x60,0x72,  /* 000037D0    "B1SEB1`r" */
+    0x60,0x01,0x4C,0x45,0x4E,0x42,0xA4,0x43,  /* 000037D8    "`.LENB.C" */
+    0x52,0x53,0x5F,0x10,0x42,0x23,0x50,0x43,  /* 000037E0    "RS_.B#PC" */
+    0x49,0x43,0x14,0x0B,0x42,0x4E,0x30,0x43,  /* 000037E8    "IC..BN0C" */
+    0x00,0xA4,0x53,0x45,0x42,0x32,0x14,0x11,  /* 000037F0    "..SEB2.." */
+    0x5F,0x53,0x54,0x41,0x00,0xA0,0x08,0x53,  /* 000037F8    "_STA...S" */
+    0x45,0x42,0x32,0xA4,0x0A,0x0F,0xA4,0x00,  /* 00003800    "EB2....." */
+    0x08,0x43,0x52,0x53,0x5F,0x11,0x4A,0x07,  /* 00003808    ".CRS_.J." */
+    0x0A,0x76,0x88,0x0D,0x00,0x02,0x0C,0x00,  /* 00003810    ".v......" */
+    0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,  /* 00003818    "........" */
+    0x00,0x01,0x88,0x0D,0x00,0x01,0x0C,0x03,  /* 00003820    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003828    "........" */
+    0x00,0x00,0x88,0x0D,0x00,0x01,0x0C,0x03,  /* 00003830    "........" */
+    0x00,0x00,0xB0,0x03,0xBB,0x03,0x00,0x00,  /* 00003838    "........" */
+    0x0C,0x00,0x88,0x0D,0x00,0x01,0x0C,0x03,  /* 00003840    "........" */
+    0x00,0x00,0xC0,0x03,0xDF,0x03,0x00,0x00,  /* 00003848    "........" */
+    0x20,0x00,0x87,0x17,0x00,0x00,0x0C,0x03,  /* 00003850    " ......." */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x0A,0x00,  /* 00003858    "........" */
+    0xFF,0xFF,0x0B,0x00,0x00,0x00,0x00,0x00,  /* 00003860    "........" */
+    0x00,0x00,0x02,0x00,0x87,0x17,0x00,0x00,  /* 00003868    "........" */
+    0x0C,0x03,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003870    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003878    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x79,0x00,  /* 00003880    "......y." */
+    0x8A,0x43,0x52,0x53,0x5F,0x0A,0x64,0x4D,  /* 00003888    ".CRS_.dM" */
+    0x49,0x4E,0x35,0x8A,0x43,0x52,0x53,0x5F,  /* 00003890    "IN5.CRS_" */
+    0x0A,0x68,0x4D,0x41,0x58,0x35,0x8A,0x43,  /* 00003898    ".hMAX5.C" */
+    0x52,0x53,0x5F,0x0A,0x70,0x4C,0x45,0x4E,  /* 000038A0    "RS_.pLEN" */
+    0x35,0x8A,0x43,0x52,0x53,0x5F,0x0A,0x4A,  /* 000038A8    "5.CRS_.J" */
+    0x4D,0x49,0x4E,0x34,0x8A,0x43,0x52,0x53,  /* 000038B0    "MIN4.CRS" */
+    0x5F,0x0A,0x4E,0x4D,0x41,0x58,0x34,0x8A,  /* 000038B8    "_.NMAX4." */
+    0x43,0x52,0x53,0x5F,0x0A,0x56,0x4C,0x45,  /* 000038C0    "CRS_.VLE" */
+    0x4E,0x34,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 000038C8    "N4.CRS_." */
+    0x18,0x4D,0x49,0x4E,0x49,0x8B,0x43,0x52,  /* 000038D0    ".MINI.CR" */
+    0x53,0x5F,0x0A,0x1A,0x4D,0x41,0x58,0x49,  /* 000038D8    "S_..MAXI" */
+    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x1E,0x4C,  /* 000038E0    ".CRS_..L" */
+    0x45,0x4E,0x49,0x8B,0x43,0x52,0x53,0x5F,  /* 000038E8    "ENI.CRS_" */
+    0x0A,0x28,0x4D,0x49,0x4E,0x31,0x8B,0x43,  /* 000038F0    ".(MIN1.C" */
+    0x52,0x53,0x5F,0x0A,0x2A,0x4D,0x41,0x58,  /* 000038F8    "RS_.*MAX" */
+    0x31,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x2E,  /* 00003900    "1.CRS_.." */
+    0x4C,0x45,0x4E,0x31,0x8B,0x43,0x52,0x53,  /* 00003908    "LEN1.CRS" */
+    0x5F,0x0A,0x38,0x4D,0x49,0x4E,0x32,0x8B,  /* 00003910    "_.8MIN2." */
+    0x43,0x52,0x53,0x5F,0x0A,0x3A,0x4D,0x41,  /* 00003918    "CRS_.:MA" */
+    0x58,0x32,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00003920    "X2.CRS_." */
+    0x3E,0x4C,0x45,0x4E,0x32,0x8B,0x43,0x52,  /* 00003928    ">LEN2.CR" */
+    0x53,0x5F,0x0A,0x08,0x4D,0x49,0x4E,0x42,  /* 00003930    "S_..MINB" */
+    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x0A,0x4D,  /* 00003938    ".CRS_..M" */
+    0x41,0x58,0x42,0x8B,0x43,0x52,0x53,0x5F,  /* 00003940    "AXB.CRS_" */
+    0x0A,0x0E,0x4C,0x45,0x4E,0x42,0x14,0x47,  /* 00003948    "..LENB.G" */
+    0x0C,0x5F,0x43,0x52,0x53,0x00,0xA0,0x28,  /* 00003950    "._CRS..(" */
+    0x4D,0x47,0x34,0x4C,0x70,0x4D,0x47,0x34,  /* 00003958    "MG4LpMG4" */
+    0x42,0x4D,0x49,0x4E,0x35,0x70,0x4D,0x47,  /* 00003960    "BMIN5pMG" */
+    0x34,0x4C,0x4C,0x45,0x4E,0x35,0x70,0x4D,  /* 00003968    "4LLEN5pM" */
+    0x47,0x34,0x4C,0x60,0x72,0x4D,0x49,0x4E,  /* 00003970    "G4L`rMIN" */
+    0x35,0x76,0x60,0x4D,0x41,0x58,0x35,0xA0,  /* 00003978    "5v`MAX5." */
+    0x3F,0x92,0x93,0x56,0x47,0x41,0x4F,0x0A,  /* 00003980    "?..VGAO." */
+    0x02,0x70,0x00,0x4D,0x49,0x4E,0x34,0x70,  /* 00003988    ".p.MIN4p" */
+    0x00,0x4D,0x41,0x58,0x34,0x70,0x00,0x4C,  /* 00003990    ".MAX4p.L" */
+    0x45,0x4E,0x34,0x70,0x00,0x4D,0x49,0x4E,  /* 00003998    "EN4p.MIN" */
+    0x31,0x70,0x00,0x4D,0x41,0x58,0x31,0x70,  /* 000039A0    "1p.MAX1p" */
+    0x00,0x4C,0x45,0x4E,0x31,0x70,0x00,0x4D,  /* 000039A8    ".LEN1p.M" */
+    0x49,0x4E,0x32,0x70,0x00,0x4D,0x41,0x58,  /* 000039B0    "IN2p.MAX" */
+    0x32,0x70,0x00,0x4C,0x45,0x4E,0x32,0xA0,  /* 000039B8    "2p.LEN2." */
+    0x28,0x49,0x4F,0x4C,0x32,0x70,0x49,0x4F,  /* 000039C0    "(IOL2pIO" */
+    0x42,0x32,0x4D,0x49,0x4E,0x49,0x70,0x49,  /* 000039C8    "B2MINIpI" */
+    0x4F,0x4C,0x32,0x4C,0x45,0x4E,0x49,0x70,  /* 000039D0    "OL2LENIp" */
+    0x49,0x4F,0x4C,0x32,0x60,0x72,0x4D,0x49,  /* 000039D8    "IOL2`rMI" */
+    0x4E,0x49,0x76,0x60,0x4D,0x41,0x58,0x49,  /* 000039E0    "NIv`MAXI" */
+    0x70,0x53,0x45,0x42,0x32,0x60,0x70,0x60,  /* 000039E8    "pSEB2`p`" */
+    0x4D,0x49,0x4E,0x42,0x70,0x53,0x55,0x42,  /* 000039F0    "MINBpSUB" */
+    0x32,0x60,0x70,0x60,0x4D,0x41,0x58,0x42,  /* 000039F8    "2`p`MAXB" */
+    0x74,0x53,0x55,0x42,0x32,0x53,0x45,0x42,  /* 00003A00    "tSUB2SEB" */
+    0x32,0x60,0x72,0x60,0x01,0x4C,0x45,0x4E,  /* 00003A08    "2`r`.LEN" */
+    0x42,0xA4,0x43,0x52,0x53,0x5F,0x10,0x42,  /* 00003A10    "B.CRS_.B" */
+    0x23,0x50,0x43,0x49,0x44,0x14,0x0B,0x42,  /* 00003A18    "#PCID..B" */
+    0x4E,0x30,0x44,0x00,0xA4,0x53,0x45,0x42,  /* 00003A20    "N0D..SEB" */
+    0x33,0x14,0x11,0x5F,0x53,0x54,0x41,0x00,  /* 00003A28    "3.._STA." */
+    0xA0,0x08,0x53,0x45,0x42,0x33,0xA4,0x0A,  /* 00003A30    "..SEB3.." */
+    0x0F,0xA4,0x00,0x08,0x43,0x52,0x53,0x5F,  /* 00003A38    "....CRS_" */
+    0x11,0x4A,0x07,0x0A,0x76,0x88,0x0D,0x00,  /* 00003A40    ".J..v..." */
+    0x02,0x0C,0x00,0x00,0x00,0x00,0x00,0xFF,  /* 00003A48    "........" */
+    0x00,0x00,0x00,0x00,0x01,0x88,0x0D,0x00,  /* 00003A50    "........" */
+    0x01,0x0C,0x03,0x00,0x00,0x00,0x00,0x00,  /* 00003A58    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x88,0x0D,0x00,  /* 00003A60    "........" */
+    0x01,0x0C,0x03,0x00,0x00,0xB0,0x03,0xBB,  /* 00003A68    "........" */
+    0x03,0x00,0x00,0x0C,0x00,0x88,0x0D,0x00,  /* 00003A70    "........" */
+    0x01,0x0C,0x03,0x00,0x00,0xC0,0x03,0xDF,  /* 00003A78    "........" */
+    0x03,0x00,0x00,0x20,0x00,0x87,0x17,0x00,  /* 00003A80    "... ...." */
+    0x00,0x0C,0x03,0x00,0x00,0x00,0x00,0x00,  /* 00003A88    "........" */
+    0x00,0x0A,0x00,0xFF,0xFF,0x0B,0x00,0x00,  /* 00003A90    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x87,  /* 00003A98    "........" */
+    0x17,0x00,0x00,0x0C,0x03,0x00,0x00,0x00,  /* 00003AA0    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003AA8    "........" */
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003AB0    "........" */
+    0x00,0x79,0x00,0x8A,0x43,0x52,0x53,0x5F,  /* 00003AB8    ".y..CRS_" */
+    0x0A,0x64,0x4D,0x49,0x4E,0x35,0x8A,0x43,  /* 00003AC0    ".dMIN5.C" */
+    0x52,0x53,0x5F,0x0A,0x68,0x4D,0x41,0x58,  /* 00003AC8    "RS_.hMAX" */
+    0x35,0x8A,0x43,0x52,0x53,0x5F,0x0A,0x70,  /* 00003AD0    "5.CRS_.p" */
+    0x4C,0x45,0x4E,0x35,0x8A,0x43,0x52,0x53,  /* 00003AD8    "LEN5.CRS" */
+    0x5F,0x0A,0x4A,0x4D,0x49,0x4E,0x34,0x8A,  /* 00003AE0    "_.JMIN4." */
+    0x43,0x52,0x53,0x5F,0x0A,0x4E,0x4D,0x41,  /* 00003AE8    "CRS_.NMA" */
+    0x58,0x34,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 00003AF0    "X4.CRS_." */
+    0x56,0x4C,0x45,0x4E,0x34,0x8B,0x43,0x52,  /* 00003AF8    "VLEN4.CR" */
+    0x53,0x5F,0x0A,0x18,0x4D,0x49,0x4E,0x49,  /* 00003B00    "S_..MINI" */
+    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x1A,0x4D,  /* 00003B08    ".CRS_..M" */
+    0x41,0x58,0x49,0x8B,0x43,0x52,0x53,0x5F,  /* 00003B10    "AXI.CRS_" */
+    0x0A,0x1E,0x4C,0x45,0x4E,0x49,0x8B,0x43,  /* 00003B18    "..LENI.C" */
+    0x52,0x53,0x5F,0x0A,0x28,0x4D,0x49,0x4E,  /* 00003B20    "RS_.(MIN" */
+    0x31,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x2A,  /* 00003B28    "1.CRS_.*" */
+    0x4D,0x41,0x58,0x31,0x8B,0x43,0x52,0x53,  /* 00003B30    "MAX1.CRS" */
+    0x5F,0x0A,0x2E,0x4C,0x45,0x4E,0x31,0x8B,  /* 00003B38    "_..LEN1." */
+    0x43,0x52,0x53,0x5F,0x0A,0x38,0x4D,0x49,  /* 00003B40    "CRS_.8MI" */
+    0x4E,0x32,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00003B48    "N2.CRS_." */
+    0x3A,0x4D,0x41,0x58,0x32,0x8B,0x43,0x52,  /* 00003B50    ":MAX2.CR" */
+    0x53,0x5F,0x0A,0x3E,0x4C,0x45,0x4E,0x32,  /* 00003B58    "S_.>LEN2" */
+    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x08,0x4D,  /* 00003B60    ".CRS_..M" */
+    0x49,0x4E,0x42,0x8B,0x43,0x52,0x53,0x5F,  /* 00003B68    "INB.CRS_" */
+    0x0A,0x0A,0x4D,0x41,0x58,0x42,0x8B,0x43,  /* 00003B70    "..MAXB.C" */
+    0x52,0x53,0x5F,0x0A,0x0E,0x4C,0x45,0x4E,  /* 00003B78    "RS_..LEN" */
+    0x42,0x14,0x47,0x0C,0x5F,0x43,0x52,0x53,  /* 00003B80    "B.G._CRS" */
+    0x00,0xA0,0x28,0x4D,0x47,0x35,0x4C,0x70,  /* 00003B88    "..(MG5Lp" */
+    0x4D,0x47,0x35,0x42,0x4D,0x49,0x4E,0x35,  /* 00003B90    "MG5BMIN5" */
+    0x70,0x4D,0x47,0x35,0x4C,0x4C,0x45,0x4E,  /* 00003B98    "pMG5LLEN" */
+    0x35,0x70,0x4D,0x47,0x35,0x4C,0x60,0x72,  /* 00003BA0    "5pMG5L`r" */
+    0x4D,0x49,0x4E,0x35,0x76,0x60,0x4D,0x41,  /* 00003BA8    "MIN5v`MA" */
+    0x58,0x35,0xA0,0x3F,0x92,0x93,0x56,0x47,  /* 00003BB0    "X5.?..VG" */
+    0x41,0x4F,0x0A,0x03,0x70,0x00,0x4D,0x49,  /* 00003BB8    "AO..p.MI" */
+    0x4E,0x34,0x70,0x00,0x4D,0x41,0x58,0x34,  /* 00003BC0    "N4p.MAX4" */
+    0x70,0x00,0x4C,0x45,0x4E,0x34,0x70,0x00,  /* 00003BC8    "p.LEN4p." */
+    0x4D,0x49,0x4E,0x31,0x70,0x00,0x4D,0x41,  /* 00003BD0    "MIN1p.MA" */
+    0x58,0x31,0x70,0x00,0x4C,0x45,0x4E,0x31,  /* 00003BD8    "X1p.LEN1" */
+    0x70,0x00,0x4D,0x49,0x4E,0x32,0x70,0x00,  /* 00003BE0    "p.MIN2p." */
+    0x4D,0x41,0x58,0x32,0x70,0x00,0x4C,0x45,  /* 00003BE8    "MAX2p.LE" */
+    0x4E,0x32,0xA0,0x28,0x49,0x4F,0x4C,0x33,  /* 00003BF0    "N2.(IOL3" */
+    0x70,0x49,0x4F,0x42,0x33,0x4D,0x49,0x4E,  /* 00003BF8    "pIOB3MIN" */
+    0x49,0x70,0x49,0x4F,0x4C,0x33,0x4C,0x45,  /* 00003C00    "IpIOL3LE" */
+    0x4E,0x49,0x70,0x49,0x4F,0x4C,0x33,0x60,  /* 00003C08    "NIpIOL3`" */
+    0x72,0x4D,0x49,0x4E,0x49,0x76,0x60,0x4D,  /* 00003C10    "rMINIv`M" */
+    0x41,0x58,0x49,0x70,0x53,0x45,0x42,0x33,  /* 00003C18    "AXIpSEB3" */
+    0x60,0x70,0x60,0x4D,0x49,0x4E,0x42,0x70,  /* 00003C20    "`p`MINBp" */
+    0x53,0x55,0x42,0x33,0x60,0x70,0x60,0x4D,  /* 00003C28    "SUB3`p`M" */
+    0x41,0x58,0x42,0x74,0x53,0x55,0x42,0x33,  /* 00003C30    "AXBtSUB3" */
+    0x53,0x45,0x42,0x33,0x60,0x72,0x60,0x01,  /* 00003C38    "SEB3`r`." */
+    0x4C,0x45,0x4E,0x42,0xA4,0x43,0x52,0x53,  /* 00003C40    "LENB.CRS" */
+    0x5F,0x14,0x44,0x05,0x5F,0x50,0x54,0x53,  /* 00003C48    "_.D._PTS" */
+    0x01,0x70,0x68,0x44,0x42,0x47,0x38,0x50,  /* 00003C50    ".phDBG8P" */
+    0x54,0x53,0x5F,0x68,0x70,0x00,0x88,0x57,  /* 00003C58    "TS_hp..W" */
+    0x41,0x4B,0x50,0x00,0x00,0x70,0x00,0x88,  /* 00003C60    "AKP..p.." */
+    0x57,0x41,0x4B,0x50,0x01,0x00,0x70,0x5C,  /* 00003C68    "WAKP..p\" */
+    0x2F,0x03,0x5F,0x53,0x42,0x5F,0x50,0x43,  /* 00003C70    "/._SB_PC" */
+    0x49,0x41,0x53,0x54,0x4D,0x43,0x5C,0x2F,  /* 00003C78    "IASTMC\/" */
+    0x03,0x5F,0x53,0x42,0x5F,0x50,0x43,0x49,  /* 00003C80    "._SB_PCI" */
+    0x41,0x53,0x54,0x4D,0x43,0x70,0x01,0x5C,  /* 00003C88    "ASTMCp.\" */
+    0x2F,0x03,0x5F,0x53,0x42,0x5F,0x50,0x43,  /* 00003C90    "/._SB_PC" */
+    0x49,0x41,0x54,0x52,0x50,0x45,0x14,0x36,  /* 00003C98    "IATRPE.6" */
+    0x5F,0x57,0x41,0x4B,0x01,0x79,0x68,0x0A,  /* 00003CA0    "_WAK.yh." */
+    0x04,0x44,0x42,0x47,0x38,0x57,0x41,0x4B,  /* 00003CA8    ".DBG8WAK" */
+    0x5F,0x68,0xA0,0x12,0x83,0x88,0x57,0x41,  /* 00003CB0    "_h....WA" */
+    0x4B,0x50,0x00,0x00,0x70,0x00,0x88,0x57,  /* 00003CB8    "KP..p..W" */
+    0x41,0x4B,0x50,0x01,0x00,0xA1,0x0A,0x70,  /* 00003CC0    "AKP....p" */
+    0x68,0x88,0x57,0x41,0x4B,0x50,0x01,0x00,  /* 00003CC8    "h.WAKP.." */
+    0xA4,0x57,0x41,0x4B,0x50,0x08,0x5F,0x53,  /* 00003CD0    ".WAKP._S" */
+    0x30,0x5F,0x12,0x06,0x04,0x00,0x00,0x00,  /* 00003CD8    "0_......" */
+    0x00,0x08,0x5F,0x53,0x31,0x5F,0x12,0x06,  /* 00003CE0    ".._S1_.." */
+    0x04,0x01,0x00,0x00,0x00,0x08,0x5F,0x53,  /* 00003CE8    "......_S" */
+    0x34,0x5F,0x12,0x07,0x04,0x0A,0x06,0x00,  /* 00003CF0    "4_......" */
+    0x00,0x00,0x08,0x5F,0x53,0x35,0x5F,0x12,  /* 00003CF8    "..._S5_." */
+    0x07,0x04,0x0A,0x07,0x00,0x00,0x00,0x14,  /* 00003D00    "........" */
+    0x1D,0x50,0x54,0x53,0x5F,0x01,0xA0,0x16,  /* 00003D08    ".PTS_..." */
+    0x68,0x5C,0x2F,0x04,0x5F,0x53,0x42,0x5F,  /* 00003D10    "h\/._SB_" */
+    0x50,0x43,0x49,0x41,0x53,0x42,0x52,0x47,  /* 00003D18    "PCIASBRG" */
+    0x53,0x49,0x4F,0x53,0x68,0x14,0x1A,0x57,  /* 00003D20    "SIOSh..W" */
+    0x41,0x4B,0x5F,0x01,0x5C,0x2F,0x04,0x5F,  /* 00003D28    "AK_.\/._" */
+    0x53,0x42,0x5F,0x50,0x43,0x49,0x41,0x53,  /* 00003D30    "SB_PCIAS" */
+    0x42,0x52,0x47,0x53,0x49,0x4F,0x57,0x68,  /* 00003D38    "BRGSIOWh" */
+
+};

diff --git a/src/mainboard/island/aruma/fadt.c b/src/mainboard/island/aruma/fadt.c
new file mode 100644 (file)
index 0000000..74e454d
--- /dev/null
+++ b/src/mainboard/island/aruma/fadt.c
@@ -0,0 +1,143 @@
+/*
+ * ACPI - create the Fixed ACPI Description Tables (FADT)
+ * (C) Copyright 2005 Stefan Reinauer <stepan@openbios.org>
+ */
+
+#include <string.h>
+#include <arch/acpi.h>
+
+void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){
+       acpi_header_t *header=&(fadt->header);
+
+       /* Prepare the header */
+       memset((void *)fadt,0,sizeof(acpi_fadt_t));
+       memcpy(header->signature,"FACP",4);
+       header->length = 244;
+       header->revision = 1;
+       memcpy(header->oem_id,OEM_ID,6);
+       memcpy(header->oem_table_id,"LXBACPI ",8);
+       memcpy(header->asl_compiler_id,ASLC,4);
+       header->asl_compiler_revision=0;
+
+       fadt->firmware_ctrl=(unsigned long)facs;
+       fadt->dsdt= dsdt;
+       fadt->res1=0x0;
+       // 3=Workstation,4=Enterprise Server, 7=Performance Server
+       fadt->preferred_pm_profile=0x03;
+       fadt->sci_int=9;
+       // disable system management mode by setting to 0: 
+       fadt->smi_cmd = 0x502f;
+       fadt->acpi_enable = 0xe1;
+       fadt->acpi_disable = 0x1e;
+       fadt->s4bios_req = 0x0;
+       fadt->pstate_cnt = 0xe2;
+
+       fadt->pm1a_evt_blk = 0x5000;
+       fadt->pm1b_evt_blk = 0x0000;
+       fadt->pm1a_cnt_blk = 0x5004;
+       fadt->pm1b_cnt_blk = 0x0000;
+       fadt->pm2_cnt_blk  = 0x0000;
+       fadt->pm_tmr_blk   = 0x5008;
+       fadt->gpe0_blk     = 0x5020;
+       fadt->gpe1_blk     = 0x50b0;
+
+       fadt->pm1_evt_len  =  4;
+       fadt->pm1_cnt_len  =  2;
+       fadt->pm2_cnt_len  =  0;
+       fadt->pm_tmr_len   =  4;
+       fadt->gpe0_blk_len =  4;
+       fadt->gpe1_blk_len =  8;
+       fadt->gpe1_base    = 16;
+       
+       fadt->cst_cnt    = 0xe3;
+       fadt->p_lvl2_lat =  101;
+       fadt->p_lvl3_lat = 1001;
+       fadt->flush_size = 1024;
+       fadt->flush_stride = 16;
+       fadt->duty_offset = 1;
+       fadt->duty_width = 3;
+       fadt->day_alrm = 0; // 0x7d these have to be
+       fadt->mon_alrm = 0; // 0x7e added to cmos.layout
+       fadt->century =  0; // 0x7f to make rtc alrm work
+       fadt->iapc_boot_arch = 0x3; // See table 5-11
+       fadt->flags = 0xa5;
+       
+       fadt->res2 = 0;
+
+       fadt->reset_reg.space_id = 1;
+       fadt->reset_reg.bit_width = 8;
+       fadt->reset_reg.bit_offset = 0;
+       fadt->reset_reg.resv = 0;
+       fadt->reset_reg.addrl = 0xcf9;
+       fadt->reset_reg.addrh = 0x0;
+
+       fadt->reset_value = 6;
+       fadt->x_firmware_ctl_l = facs;
+       fadt->x_firmware_ctl_h = 0;
+       fadt->x_dsdt_l = dsdt;
+       fadt->x_dsdt_h = 0;
+
+       fadt->x_pm1a_evt_blk.space_id = 1;
+       fadt->x_pm1a_evt_blk.bit_width = 32;
+       fadt->x_pm1a_evt_blk.bit_offset = 0;
+       fadt->x_pm1a_evt_blk.resv = 0;
+       fadt->x_pm1a_evt_blk.addrl = 0x5000;
+       fadt->x_pm1a_evt_blk.addrh = 0x0;
+
+       fadt->x_pm1b_evt_blk.space_id = 1;
+       fadt->x_pm1b_evt_blk.bit_width = 4;
+       fadt->x_pm1b_evt_blk.bit_offset = 0;
+       fadt->x_pm1b_evt_blk.resv = 0;
+       fadt->x_pm1b_evt_blk.addrl = 0x0;
+       fadt->x_pm1b_evt_blk.addrh = 0x0;
+
+
+       fadt->x_pm1a_cnt_blk.space_id = 1;
+       fadt->x_pm1a_cnt_blk.bit_width = 16;
+       fadt->x_pm1a_cnt_blk.bit_offset = 0;
+       fadt->x_pm1a_cnt_blk.resv = 0;
+       fadt->x_pm1a_cnt_blk.addrl = 0x5004;
+       fadt->x_pm1a_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm1b_cnt_blk.space_id = 1;
+       fadt->x_pm1b_cnt_blk.bit_width = 2;
+       fadt->x_pm1b_cnt_blk.bit_offset = 0;
+       fadt->x_pm1b_cnt_blk.resv = 0;
+       fadt->x_pm1b_cnt_blk.addrl = 0x0;
+       fadt->x_pm1b_cnt_blk.addrh = 0x0;
+
+
+       fadt->x_pm2_cnt_blk.space_id = 1;
+       fadt->x_pm2_cnt_blk.bit_width = 0;
+       fadt->x_pm2_cnt_blk.bit_offset = 0;
+       fadt->x_pm2_cnt_blk.resv = 0;
+       fadt->x_pm2_cnt_blk.addrl = 0x0;
+       fadt->x_pm2_cnt_blk.addrh = 0x0;
+
+
+       fadt->x_pm_tmr_blk.space_id = 1;
+       fadt->x_pm_tmr_blk.bit_width = 32;
+       fadt->x_pm_tmr_blk.bit_offset = 0;
+       fadt->x_pm_tmr_blk.resv = 0;
+       fadt->x_pm_tmr_blk.addrl = 0x5008;
+       fadt->x_pm_tmr_blk.addrh = 0x0;
+
+
+       fadt->x_gpe0_blk.space_id = 1;
+       fadt->x_gpe0_blk.bit_width = 32;
+       fadt->x_gpe0_blk.bit_offset = 0;
+       fadt->x_gpe0_blk.resv = 0;
+       fadt->x_gpe0_blk.addrl = 0x5020;
+       fadt->x_gpe0_blk.addrh = 0x0;
+
+
+       fadt->x_gpe1_blk.space_id = 1;
+       fadt->x_gpe1_blk.bit_width = 64;
+       fadt->x_gpe1_blk.bit_offset = 16;
+       fadt->x_gpe1_blk.resv = 0;
+       fadt->x_gpe1_blk.addrl = 0x50b0;
+       fadt->x_gpe1_blk.addrh = 0x0;
+
+       header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t));
+
+}

diff --git a/src/mainboard/island/aruma/failover.c b/src/mainboard/island/aruma/failover.c
new file mode 100644 (file)
index 0000000..5d5e7e9
--- /dev/null
+++ b/src/mainboard/island/aruma/failover.c
@@ -0,0 +1,71 @@
+#define ASSEMBLY 1
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <device/pci_ids.h>
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <cpu/x86/lapic.h>
+#include "pc80/mc146818rtc_early.c"
+#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
+#include "northbridge/amd/amdk8/early_ht.c"
+#include "cpu/x86/lapic/boot_cpu.c"
+#include "northbridge/amd/amdk8/reset_test.c"
+
+static unsigned long main(unsigned long bist)
+{
+       unsigned nodeid;
+       /* Make cerain my local apic is useable */
+       enable_lapic();
+
+       nodeid=lapicid();
+       /* Is this a cpu only reset? */
+       if (cpu_init_detected(nodeid)) {
+               if (last_boot_normal()) {
+                       goto normal_image;
+               } else {
+                       goto cpu_reset;
+               }
+       }
+       /* Is this a secondary cpu? */
+       if (!boot_cpu()) {
+               if (last_boot_normal()) {
+                       goto normal_image;
+               } else {
+                       goto fallback_image;
+               }
+       }
+       
+
+       /* Nothing special needs to be done to find bus 0 */
+       /* Allow the HT devices to be found */
+       enumerate_ht_chain();
+       
+       /* Setup the 8111 */
+       amd8111_enable_rom();
+
+       /* Is this a deliberate reset by the bios */
+       if (bios_reset_detected() && last_boot_normal()) {
+               goto normal_image;
+       }
+       /* This is the primary cpu how should I boot? */
+       else if (do_normal_boot()) {
+               goto normal_image;
+       }
+       else {
+               goto fallback_image;
+       }
+ normal_image:
+       asm volatile ("jmp __normal_image" 
+               : /* outputs */ 
+               : "a" (bist) /* inputs */
+               : /* clobbers */
+               );
+ cpu_reset:
+       asm volatile ("jmp __cpu_reset"
+               : /* outputs */ 
+               : "a"(bist) /* inputs */
+               : /* clobbers */
+               );
+ fallback_image:
+       return bist;
+}

diff --git a/src/mainboard/island/aruma/irq_tables.c b/src/mainboard/island/aruma/irq_tables.c
new file mode 100644 (file)
index 0000000..a6e3ee8
--- /dev/null
+++ b/src/mainboard/island/aruma/irq_tables.c
@@ -0,0 +1,56 @@
+#include <arch/pirq_routing.h>
+#include <device/pci.h>
+
+#define IRQ_ROUTER_BUS         1
+#define IRQ_ROUTER_DEVFN       PCI_DEVFN(4,3)
+#define IRQ_ROUTER_VENDOR      0x1022
+#define IRQ_ROUTER_DEVICE      0x746b
+
+#define AVAILABLE_IRQS 0xdef8
+#define IRQ_SLOT(slot, bus, dev, fn, linka, linkb, linkc, linkd) \
+       { bus, (dev<<3)|fn, {{ linka, AVAILABLE_IRQS}, { linkb, AVAILABLE_IRQS}, \
+       {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
+
+/*  Each IRQ_SLOT entry consists of:
+ *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu  
+ */
+
+const struct irq_routing_table intel_irq_routing_table = {
+       PIRQ_SIGNATURE,         /* u32 signature */
+       PIRQ_VERSION,           /* u16 version   */
+       32+16*IRQ_SLOT_COUNT,   /* there can be total IRQ_SLOT_COUNT table entries */
+       IRQ_ROUTER_BUS,         /* Where the interrupt router lies (bus) */
+       IRQ_ROUTER_DEVFN,       /* Where the interrupt router lies (dev) */
+       0x00,                   /* IRQs devoted exclusively to PCI usage */
+       IRQ_ROUTER_VENDOR,      /* Vendor */
+       IRQ_ROUTER_DEVICE,      /* Device */
+       0x00,                   /* Crap (miniport) */
+       { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
+       0x6a,           /*  u8 checksum , mod 256 checksum must give zero */
+       {       /* slot(0=onboard), devfn, irqlinks (line id, 0=not routed) */
+               IRQ_SLOT(0, 0x01,4,0, 1,2,3,4 ), /* 8111 PCI bridge */
+               IRQ_SLOT(0, 0x04,0,0, 4,0,0,0 ), /* 8111 USB */
+               IRQ_SLOT(1, 0x06,1,0, 2,3,4,1 ), /* ???? was: bus A*/
+               IRQ_SLOT(2, 0x07,1,0, 2,3,4,1 ), /* ???? was: bus 9*/
+               IRQ_SLOT(3, 0x0a,1,0, 2,3,4,1 ), /* IBM PCI-X <-> PCI-X */
+               IRQ_SLOT(4, 0x08,1,0, 2,3,4,1 ), /* IBM PCI-X <-> PCI-X */
+               IRQ_SLOT(0, 0x04,4,0, 1,0,0,0 ), /* ATI Rage */
+               IRQ_SLOT(0, 0x06,2,0, 3,4,0,0 ), /* ???? was: bus A */
+               IRQ_SLOT(0, 0x07,2,0, 3,4,0,0 ), /* ???? was: bus 9 */
+               IRQ_SLOT(0, 0x0a,2,0, 3,4,0,0 ), /* Intel 82546EB GBit */
+               IRQ_SLOT(0, 0x08,2,0, 3,4,0,0 ), /* Intel 82546EB GBit */
+               IRQ_SLOT(0, 0x0d,1,0, 1,0,0,0 ), /* Marvell MV88SX5080 SATA */
+               IRQ_SLOT(0, 0x0d,2,0, 2,0,0,0 ), /* Marvell MV88SX5080 SATA */
+               IRQ_SLOT(0, 0x0e,1,0, 1,2,3,4 ), /* Intel Memory Controller 031a */
+               IRQ_SLOT(0, 0x0f,1,0, 1,0,0,0 ), /* Marvell MV88SX5080 SATA */
+               IRQ_SLOT(0, 0x04,5,0, 2,0,0,0 ), /* Intel 8255 Ethernet */
+               IRQ_SLOT(5, 0x10,1,0, 1,2,3,4 ), /* ???? was: bus C */
+               IRQ_SLOT(0, 0x12,1,0, 1,0,0,0 ), /* Marvell MV88SX5080 SATA */
+               IRQ_SLOT(0, 0x12,2,0, 2,0,0,0 ), /* Marvell MV88SX5080 SATA */
+               IRQ_SLOT(0, 0x13,1,0, 1,2,3,4 ), /* Intel Memory Controller 031b */
+               IRQ_SLOT(0, 0x14,1,0, 1,0,0,0 ), /* Marvell MV88SX5080 SATA */
+               IRQ_SLOT(6, 0x15,1,0, 1,2,3,4 ), /* ???? was: bus 11 */
+               /* Let Linux know about bus 1 */
+               IRQ_SLOT(0, 1,4,3, 0,0,0,0 ),
+       }
+};

diff --git a/src/mainboard/island/aruma/mainboard.c b/src/mainboard/island/aruma/mainboard.c
new file mode 100644 (file)
index 0000000..6de2b30
--- /dev/null
+++ b/src/mainboard/island/aruma/mainboard.c
@@ -0,0 +1,339 @@
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <cpu/x86/msr.h>
+#include <part/hard_reset.h>
+#include <device/smbus.h>
+#include <delay.h>
+
+#include <arch/io.h>
+#include "../../../northbridge/amd/amdk8/northbridge.h"
+#include "../../../northbridge/amd/amdk8/cpu_rev.c"
+#include "chip.h"
+
+#include "pc80/mc146818rtc.h"
+
+
+#undef DEBUG
+#define DEBUG 0
+#if DEBUG 
+static void debug_init(device_t dev)
+{
+       unsigned bus;
+       unsigned devfn;
+#if 0
+       for(bus = 0; bus < 256; bus++) {
+               for(devfn = 0; devfn < 256; devfn++) {
+                       int i;
+                       dev = dev_find_slot(bus, devfn);
+                       if (!dev) {
+                               continue;
+                       }
+                       if (!dev->enabled) {
+                               continue;
+                       }
+                       printk_info("%02x:%02x.%0x aka %s\n", 
+                               bus, devfn >> 3, devfn & 7, dev_path(dev));
+                       for(i = 0; i < 256; i++) {
+                               if ((i & 0x0f) == 0) {
+                                       printk_info("%02x:", i);
+                               }
+                               printk_info(" %02x", pci_read_config8(dev, i));
+                               if ((i & 0x0f) == 0xf) {
+                                       printk_info("\n");
+                               }
+                       }
+                       printk_info("\n");
+               }
+       }
+#endif
+#if 0
+       msr_t msr;
+       unsigned index;
+       unsigned eax, ebx, ecx, edx;
+       index = 0x80000007;
+       printk_debug("calling cpuid 0x%08x\n", index);
+       asm volatile(
+               "cpuid"
+               : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
+               : "a" (index)
+               );
+       printk_debug("cpuid[%08x]: %08x %08x %08x %08x\n",
+               index, eax, ebx, ecx, edx);
+       if (edx & (3 << 1)) {
+               index = 0xC0010042;
+               printk_debug("Reading msr: 0x%08x\n", index);
+               msr = rdmsr(index);
+               printk_debug("msr[0x%08x]: 0x%08x%08x\n",
+                       index, msr.hi, msr.hi);
+       }
+#endif
+}
+
+static void debug_noop(device_t dummy)
+{
+}
+
+static struct device_operations debug_operations = {
+       .read_resources   = debug_noop,
+       .set_resources    = debug_noop,
+       .enable_resources = debug_noop,
+       .init             = debug_init,
+};
+
+static unsigned int scan_root_bus(device_t root, unsigned int max)
+{
+       struct device_path path;
+       device_t debug;
+       max = root_dev_scan_bus(root, max);
+       path.type = DEVICE_PATH_PNP;
+       path.u.pnp.port   = 0;
+       path.u.pnp.device = 0;
+       debug = alloc_dev(&root->link[1], &path);
+       debug->ops = &debug_operations;
+       return max;
+}
+#endif
+
+#if 0
+static void handle_smbus_error(int value, const char *msg)
+{
+       if (value >= 0) {
+               return;
+       }
+       switch(value) {
+       case SMBUS_WAIT_UNTIL_READY_TIMEOUT:
+               printk_emerg("SMBUS wait until ready timed out - resetting...");
+               hard_reset();
+               break;
+       case SMBUS_WAIT_UNTIL_DONE_TIMEOUT:
+               printk_emerg("SMBUS wait until done timed out - resetting...");
+               hard_reset();
+               break;
+       default:
+               die(msg);
+               break;
+       }
+}
+
+#define ADM1026_DEVICE 0x2c /* 0x2e or 0x2d */
+#define ADM1026_REG_CONFIG1 0x00
+#define CFG1_MONITOR     0x01
+#define CFG1_INT_ENABLE  0x02
+#define CFG1_INT_CLEAR   0x04
+#define CFG1_AIN8_9      0x08
+#define CFG1_THERM_HOT   0x10
+#define CFT1_DAC_AFC     0x20
+#define CFG1_PWM_AFC     0x40
+#define CFG1_RESET       0x80
+#define ADM1026_REG_CONFIG2 0x01
+#define ADM1026_REG_CONFIG3 0x07
+
+
+
+#define BILLION 1000000000UL
+
+static void  verify_cpu_voltage(const char *name, 
+       device_t dev, unsigned int reg, 
+       unsigned factor, unsigned cpu_volts, unsigned delta)
+{
+       unsigned nvolts_lo, nvolts_hi;
+       unsigned cpuvolts_hi, cpuvolts_lo;
+       int value;
+       int loops;
+
+       loops = 1000;
+       do {
+               value = smbus_read_byte(dev, reg);
+               handle_smbus_error(value, "SMBUS read byte failed");
+       } while ((--loops > 0) && value == 0);
+       /* Convert the byte value to nanoVolts.
+        * My accuracy is nowhere near that good but I don't
+        * have to round so the math is simple. 
+        * I can only go up to about 4.2 Volts this way so my range is
+        * limited.
+        */
+       nvolts_lo = ((unsigned)value * factor);
+       nvolts_hi = nvolts_lo + factor - 1;
+       /* Get the range of acceptable cpu voltage values */
+       cpuvolts_lo = cpu_volts - delta;
+       cpuvolts_hi = cpu_volts + delta;
+       if ((nvolts_lo < cpuvolts_lo) || (nvolts_hi > cpuvolts_hi)) {
+               printk_emerg("%s at (%u.%09u-%u.%09u)Volts expected %u.%09u+/-%u.%09uVolts\n",
+                       name,
+                       nvolts_lo/BILLION, nvolts_lo%BILLION,
+                       nvolts_hi/BILLION, nvolts_hi%BILLION,
+                       cpu_volts/BILLION, cpu_volts%BILLION,
+                       delta/BILLION, delta%BILLION);
+               die("");
+       }
+       printk_info("%s at (%u.%09u-%u.%09u)Volts\n",
+               name,
+               nvolts_lo/BILLION, nvolts_lo%BILLION,
+               nvolts_hi/BILLION, nvolts_hi%BILLION);
+               
+}
+
+static void adm1026_enable_monitoring(device_t dev)
+{
+       int result;
+       result = smbus_read_byte(dev, ADM1026_REG_CONFIG1);
+       handle_smbus_error(result, "ADM1026: cannot read config1");
+
+       result = (result | CFG1_MONITOR) & ~(CFG1_INT_CLEAR | CFG1_RESET);
+       result = smbus_write_byte(dev, ADM1026_REG_CONFIG1, result);
+       handle_smbus_error(result, "ADM1026: cannot write to config1");
+
+       result = smbus_read_byte(dev, ADM1026_REG_CONFIG1);
+       handle_smbus_error(result, "ADM1026: cannot reread config1");
+       if (!(result & CFG1_MONITOR)) {
+               die("ADM1026: monitoring would not enable");
+       }
+}
+
+
+static unsigned k8_cpu_volts(void)
+{
+       unsigned volts = ~0;
+       if (is_cpu_c0()) {
+               volts = 1500000000;
+       }
+       if (is_cpu_b3()) {
+               volts = 1550000000;
+       }
+       return volts;
+}
+
+static void verify_cpu_voltages(device_t dev)
+{
+       unsigned cpu_volts;
+       unsigned delta;
+#if 0
+       delta =  50000000;
+#else
+       delta =  75000000;
+#endif
+       cpu_volts = k8_cpu_volts();
+       if (cpu_volts == ~0) {
+               printk_info("Required cpu voltage unknwon not checking\n");
+               return; 
+       }
+       /* I need to read registers 0x37 == Ain7CPU1 core 0x2d == VcppCPU0 core */
+       /* CPU1 core 
+        * The sensor has a range of 0-2.5V and reports in
+        * 256 distinct steps.
+        */
+       verify_cpu_voltage("CPU1 Vcore", dev, 0x37, 9765625, 
+               cpu_volts, delta);
+       /* CPU0 core 
+        * The sensor has range of 0-3.0V and reports in 
+        * 256 distinct steps.
+        */
+       verify_cpu_voltage("CPU0 Vcore", dev, 0x2d, 11718750, 
+               cpu_volts, delta);
+}
+
+#define SMBUS_MUX 0x70
+
+static void do_verify_cpu_voltages(void)
+{
+       device_t smbus_dev;
+       device_t mux, sensor;
+       struct device_path mux_path, sensor_path;
+       int result;
+       int mux_setting;
+       
+       /* Find the smbus controller */
+       smbus_dev = dev_find_device(0x1022, 0x746b, 0);
+       if (!smbus_dev) {
+               die("SMBUS controller not found\n");
+       }
+       
+       /* Find the smbus mux */
+       mux_path.type         = DEVICE_PATH_I2C;
+       mux_path.u.i2c.device = SMBUS_MUX;
+       mux = find_dev_path(smbus_dev, &mux_path);
+       if (!mux) {
+               die("SMBUS mux not found\n");
+       }
+
+       /* Find the adm1026 sensor */
+       sensor_path.type         = DEVICE_PATH_I2C;
+       sensor_path.u.i2c.device = ADM1026_DEVICE;
+       sensor = find_dev_path(mux, &sensor_path);
+       if (!sensor) {
+               die("ADM1026 not found\n");
+       }
+       
+       /* Set the mux to see the temperature sensors */
+       mux_setting = 1;
+       result = smbus_send_byte(mux, mux_setting);
+       handle_smbus_error(result, "SMBUS send byte failed\n");
+
+       result = smbus_recv_byte(mux);
+       handle_smbus_error(result, "SMBUS recv byte failed\n");
+       if (result != mux_setting) {
+               printk_emerg("SMBUS mux would not set to %d\n", mux_setting);
+               die("");
+       }
+
+       adm1026_enable_monitoring(sensor);
+
+       /* It takes 11.38ms to read a new voltage sensor value */
+       mdelay(12);
+
+       /* Read the cpu voltages and make certain everything looks sane */
+       verify_cpu_voltages(sensor);
+}
+#else
+#define do_verify_cpu_voltages() do {} while(0)
+#endif
+
+
+static void fixup_aruma(void)
+{
+       msr_t msr;
+
+       /* bit 6 (0x40) in MSR 0xC0010015 
+        * disables the TLB cache flush filter
+        */
+       msr=rdmsr(0xC0010015);
+       msr.lo |= 0x40;
+       wrmsr(0xC0010015, msr);
+}
+
+
+static void mainboard_init(device_t dev)
+{
+       root_dev_init(dev);
+
+       do_verify_cpu_voltages();
+
+       printk_info("Initializing mainboard specific functions... ");
+       fixup_aruma();
+       printk_info("ok\n");
+}
+
+static struct device_operations mainboard_operations = {
+       .read_resources   = root_dev_read_resources,
+       .set_resources    = root_dev_set_resources,
+       .enable_resources = root_dev_enable_resources,
+       .init             = mainboard_init,
+#if !DEBUG
+       .scan_bus         = root_dev_scan_bus,
+#else
+       .scan_bus         = scan_root_bus,
+#endif
+       .enable           = 0,
+};
+
+static void enable_dev(struct device *dev)
+{
+       dev->ops = &mainboard_operations;
+}
+struct chip_operations mainboard_island_aruma_ops = {
+       .enable_dev = enable_dev, 
+};
+

diff --git a/src/mainboard/island/aruma/mptable.c b/src/mainboard/island/aruma/mptable.c
new file mode 100644 (file)
index 0000000..ce256e3
--- /dev/null
+++ b/src/mainboard/island/aruma/mptable.c
@@ -0,0 +1,256 @@
+#include <console/console.h>
+#include <arch/smp/mpspec.h>
+#include <cpu/x86/lapic.h>
+#include <device/pci.h>
+#include <string.h>
+#include <stdint.h>
+
+#define WRITE_IOAPIC(bus,device,fn,id,version)         \
+do {                                                   \
+       device_t dev;                                   \
+       struct resource *res;                           \
+       dev = dev_find_slot(bus, PCI_DEVFN(device,fn)); \
+       if (!dev) break;                                \
+       res = find_resource(dev, PCI_BASE_ADDRESS_0);   \
+       if (!res) break;                                \
+       smp_write_ioapic(mc, id, version, res->base);   \
+} while(0);
+
+unsigned get_apicid_base(unsigned ioapic_num)
+{
+        device_t dev;
+        unsigned apicid_base;
+
+        dev = dev_find_slot(0, PCI_DEVFN(0x18,0));
+        apicid_base = ((pci_read_config32(dev, 0x60)>>4) & 7) + 1;
+
+        return apicid_base;
+}
+
+
+void *smp_write_config_table(void *v)
+{
+        static const char sig[4] = "PCMP";
+        static const char oem[8] = "ISLAND  ";
+        static const char productid[12] = "ARUMA       ";
+        struct mp_config_table *mc;
+       int i;
+       unsigned apicid_base;
+       unsigned char bus_isa;
+       device_t dev;
+
+        mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
+        memset(mc, 0, sizeof(*mc));
+
+        memcpy(mc->mpc_signature, sig, sizeof(sig));
+        mc->mpc_length = sizeof(*mc); /* initially just the header */
+        mc->mpc_spec = 0x04;
+        mc->mpc_checksum = 0; /* not yet computed */
+        memcpy(mc->mpc_oem, oem, sizeof(oem));
+        memcpy(mc->mpc_productid, productid, sizeof(productid));
+        mc->mpc_oemptr = 0;
+        mc->mpc_oemsize = 0;
+        mc->mpc_entry_count = 0; /* No entries yet... */
+        mc->mpc_lapic = LAPIC_ADDR;
+        mc->mpe_length = 0;
+        mc->mpe_checksum = 0;
+        mc->reserved = 0;
+
+        smp_write_processors(mc);
+       
+       /* Write busses */
+       bus_isa=22; // ISA
+       for (i=0; i<bus_isa; i++)
+               smp_write_bus(mc, i, "PCI   ");
+       smp_write_bus(mc, bus_isa, "ISA   ");
+
+       /* enable ext_apic_id */
+#if 1
+       apicid_base = 1;
+#else  
+       apicid_base = get_apicid_base(15);
+        if(lapicid()>=0x10) { 
+               apicid_base = 0; 
+       }
+#endif
+
+       printk_info("APIC ID BASE=0x%x\n",apicid_base);
+
+       /* I/O APICs */
+       smp_write_ioapic(mc, apicid_base, 0x11, 0xfec00000); // 8111 IOAPIC
+       /* Write all 8131 IOAPICs */
+       /* (8131: bus, dev, fn) , id, version */
+       WRITE_IOAPIC(0x01,1,1, apicid_base+1, 0x11);
+       WRITE_IOAPIC(0x01,2,1, apicid_base+2, 0x11);
+       WRITE_IOAPIC(0x05,1,1, apicid_base+3, 0x11);
+       WRITE_IOAPIC(0x05,2,1, apicid_base+4, 0x11);
+       WRITE_IOAPIC(0x05,3,1, apicid_base+5, 0x11);
+       WRITE_IOAPIC(0x05,4,1, apicid_base+6, 0x11);
+       WRITE_IOAPIC(0x0c,1,1, apicid_base+7, 0x11);
+       WRITE_IOAPIC(0x0c,2,1, apicid_base+8, 0x11);
+       WRITE_IOAPIC(0x0c,3,1, apicid_base+9, 0x11);
+       WRITE_IOAPIC(0x0c,4,1, apicid_base+10, 0x11);
+       WRITE_IOAPIC(0x11,1,1, apicid_base+11, 0x11);
+       WRITE_IOAPIC(0x11,2,1, apicid_base+12, 0x11);
+       WRITE_IOAPIC(0x11,3,1, apicid_base+13, 0x11);
+       WRITE_IOAPIC(0x11,4,1, apicid_base+14, 0x11);
+       
+       /*I/O Ints:     Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */ 
+       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_base, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_base, 0x1);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_base, 0x2);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x3, apicid_base, 0x3);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x4, apicid_base, 0x4);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x6, apicid_base, 0x6);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x7, apicid_base, 0x7);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x8, apicid_base, 0x8);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xc, apicid_base, 0xc);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_base, 0xd);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_base, 0xe);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_base, 0xf);
+
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 1, (4<<2)|0, apicid_base, 0x13);
+       
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x1f, apicid_base, 0x13);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x4, 0x03, apicid_base, 0x13);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x4, 0x10, apicid_base, 0x10);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x4, 0x14, apicid_base, 0x11);
+       
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xb, 0x10, 0x5, 0x1);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xb, 0x11, 0x5, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xb, 0x14, 0x5, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xb, 0x15, 0x5, 0x3);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xb, 0x18, 0x5, 0x3);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xb, 0x19, 0x5, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xa, 0x8, 0x5, 0x2);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xa, 0x9, 0x5, 0x3);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x9, 0x10, 0x6, 0x1);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x9, 0x11, 0x6, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x9, 0x14, 0x6, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x9, 0x15, 0x6, 0x3);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x9, 0x18, 0x6, 0x3);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x9, 0x19, 0x6, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x8, 0x8, 0x6, 0x2);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x8, 0x9, 0x6, 0x3);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xd, 0x4, 0x7, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xd, 0x8, 0x7, 0x1);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xe, 0x4, 0x8, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xf, 0x4, 0x9, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x12, 0x4, 0xb, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x12, 0x8, 0xb, 0x1);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x13, 0x4, 0xc, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x14, 0x4, 0xd, 0x0);
+       
+       /*Local Ints:   Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#*/
+       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
+       smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
+
+       /*
+       MP Config Extended Table Entries:
+         --
+         System Address Space
+          bus ID: 0 address type: I/O address
+          address base: 0x9000
+          address range: 0x2000
+         --
+         System Address Space
+          bus ID: 0 address type: I/O address
+          address base: 0x0
+          address range: 0x100
+         --
+         System Address Space
+          bus ID: 0 address type: memory address
+          address base: 0xa0000
+          address range: 0x20000
+         --
+         System Address Space
+          bus ID: 0 address type: memory address
+          address base: 0xaed00000
+          address range: 0x2200000
+         --
+         System Address Space
+          bus ID: 0 address type: prefetch address
+          address base: 0xb0f00000
+          address range: 0x100000
+         --
+         System Address Space
+          bus ID: 4 address type: I/O address
+          address base: 0xb000
+          address range: 0x2000
+         --
+         System Address Space
+          bus ID: 4 address type: memory address
+          address base: 0xb1000000
+          address range: 0x700000
+         --
+         System Address Space
+          bus ID: 4 address type: prefetch address
+          address base: 0xb1700000
+          address range: 0x500000
+         --
+         System Address Space
+          bus ID: 11 address type: memory address
+          address base: 0xb1c00000
+          address range: 0x400000
+         --
+         System Address Space
+          bus ID: 11 address type: prefetch address
+          address base: 0xb2000000
+          address range: 0x2400000
+         --
+         System Address Space
+          bus ID: 16 address type: memory address
+          address base: 0xb4400000
+          address range: 0x400000
+         --
+         System Address Space
+          bus ID: 16 address type: prefetch address
+          address base: 0xb4800000
+          address range: 0x4a400000
+         --
+         Bus Heirarchy
+          bus ID: 21 bus info: 0x01 parent bus ID: 0--
+         Compatibility Bus Address
+          bus ID: 0 address modifier: add
+          predefined range: 0x00000000--
+         Compatibility Bus Address
+          bus ID: 4 address modifier: subtract
+          predefined range: 0x00000000--
+         Compatibility Bus Address
+          bus ID: 11 address modifier: subtract
+          predefined range: 0x00000000--
+         Compatibility Bus Address
+          bus ID: 16 address modifier: subtract
+          predefined range: 0x00000000--
+         Compatibility Bus Address
+          bus ID: 0 address modifier: add
+          predefined range: 0x00000001--
+         Compatibility Bus Address
+          bus ID: 4 address modifier: subtract
+          predefined range: 0x00000001--
+         Compatibility Bus Address
+          bus ID: 11 address modifier: subtract
+          predefined range: 0x00000001--
+         Compatibility Bus Address
+          bus ID: 16 address modifier: subtract
+          predefined range: 0x00000001 
+       */
+       
+       /* There is no extension information... */
+         
+       /* Compute the checksums */
+       mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
+       mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
+       printk_debug("Wrote the mp table end at: %p - %p\n",
+               mc, smp_next_mpe_entry(mc));
+       return smp_next_mpe_entry(mc);
+}
+
+unsigned long write_smp_table(unsigned long addr)
+{
+       void *v;
+       v = smp_write_floating_table(addr);
+       return (unsigned long)smp_write_config_table(v);
+}
+
+

diff --git a/src/mainboard/island/aruma/resourcemap.c b/src/mainboard/island/aruma/resourcemap.c
new file mode 100644 (file)
index 0000000..2a45082
--- /dev/null
+++ b/src/mainboard/island/aruma/resourcemap.c
@@ -0,0 +1,265 @@
+/*
+ * Island Aruma needs a different resource map
+ *
+ */
+
+static void setup_aruma_resource_map(void)
+{
+       static const unsigned int register_values[] = {
+       /* Careful set limit registers before base registers which contain the enables */
+       /* DRAM Limit i Registers
+        * F1:0x44 i = 0
+        * F1:0x4C i = 1
+        * F1:0x54 i = 2
+        * F1:0x5C i = 3
+        * F1:0x64 i = 4
+        * F1:0x6C i = 5
+        * F1:0x74 i = 6
+        * F1:0x7C i = 7
+        * [ 2: 0] Destination Node ID
+        *         000 = Node 0
+        *         001 = Node 1
+        *         010 = Node 2
+        *         011 = Node 3
+        *         100 = Node 4
+        *         101 = Node 5
+        *         110 = Node 6
+        *         111 = Node 7
+        * [ 7: 3] Reserved
+        * [10: 8] Interleave select
+        *         specifies the values of A[14:12] to use with interleave enable.
+        * [15:11] Reserved
+        * [31:16] DRAM Limit Address i Bits 39-24
+        *         This field defines the upper address bits of a 40 bit  address
+        *         that define the end of the DRAM region.
+        */
+       PCI_ADDR(0, 0x18, 1, 0x44), 0x0000f8f8, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x4C), 0x0000f8f8, 0x00000001,
+       PCI_ADDR(0, 0x18, 1, 0x54), 0x0000f8f8, 0x00000002,
+       PCI_ADDR(0, 0x18, 1, 0x5C), 0x0000f8f8, 0x00000003,
+       PCI_ADDR(0, 0x18, 1, 0x64), 0x0000f8f8, 0x00000004,
+       PCI_ADDR(0, 0x18, 1, 0x6C), 0x0000f8f8, 0x00000005,
+       PCI_ADDR(0, 0x18, 1, 0x74), 0x0000f8f8, 0x00000006,
+       PCI_ADDR(0, 0x18, 1, 0x7C), 0x0000f8f8, 0x00000007,
+       /* DRAM Base i Registers
+        * F1:0x40 i = 0
+        * F1:0x48 i = 1
+        * F1:0x50 i = 2
+        * F1:0x58 i = 3
+        * F1:0x60 i = 4
+        * F1:0x68 i = 5
+        * F1:0x70 i = 6
+        * F1:0x78 i = 7
+        * [ 0: 0] Read Enable
+        *         0 = Reads Disabled
+        *         1 = Reads Enabled
+        * [ 1: 1] Write Enable
+        *         0 = Writes Disabled
+        *         1 = Writes Enabled
+        * [ 7: 2] Reserved
+        * [10: 8] Interleave Enable
+        *         000 = No interleave
+        *         001 = Interleave on A[12] (2 nodes)
+        *         010 = reserved
+        *         011 = Interleave on A[12] and A[14] (4 nodes)
+        *         100 = reserved
+        *         101 = reserved
+        *         110 = reserved
+        *         111 = Interleve on A[12] and A[13] and A[14] (8 nodes)
+        * [15:11] Reserved
+        * [13:16] DRAM Base Address i Bits 39-24
+        *         This field defines the upper address bits of a 40-bit address
+        *         that define the start of the DRAM region.
+        */
+       PCI_ADDR(0, 0x18, 1, 0x40), 0x0000f8fc, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x48), 0x0000f8fc, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x50), 0x0000f8fc, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x58), 0x0000f8fc, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x60), 0x0000f8fc, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x68), 0x0000f8fc, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x70), 0x0000f8fc, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x78), 0x0000f8fc, 0x00000000,
+
+       /* Memory-Mapped I/O Limit i Registers
+        * F1:0x84 i = 0
+        * F1:0x8C i = 1
+        * F1:0x94 i = 2
+        * F1:0x9C i = 3
+        * F1:0xA4 i = 4
+        * F1:0xAC i = 5
+        * F1:0xB4 i = 6
+        * F1:0xBC i = 7
+        * [ 2: 0] Destination Node ID
+        *         000 = Node 0
+        *         001 = Node 1
+        *         010 = Node 2
+        *         011 = Node 3
+        *         100 = Node 4
+        *         101 = Node 5
+        *         110 = Node 6
+        *         111 = Node 7
+        * [ 3: 3] Reserved
+        * [ 5: 4] Destination Link ID
+        *         00 = Link 0
+        *         01 = Link 1
+        *         10 = Link 2
+        *         11 = Reserved
+        * [ 6: 6] Reserved
+        * [ 7: 7] Non-Posted
+        *         0 = CPU writes may be posted
+        *         1 = CPU writes must be non-posted
+        * [31: 8] Memory-Mapped I/O Limit Address i (39-16)
+        *         This field defines the upp adddress bits of a 40-bit address that
+        *         defines the end of a memory-mapped I/O region n
+        */
+       PCI_ADDR(0, 0x18, 1, 0x84), 0x00000048, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x8C), 0x00000048, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x94), 0x00000048, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x9C), 0x00000048, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xA4), 0x00000048, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xAC), 0x00000048, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xB4), 0x00000048, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff10, // Link 1 CPU 0
+
+       /* Memory-Mapped I/O Base i Registers
+        * F1:0x80 i = 0
+        * F1:0x88 i = 1
+        * F1:0x90 i = 2
+        * F1:0x98 i = 3
+        * F1:0xA0 i = 4
+        * F1:0xA8 i = 5
+        * F1:0xB0 i = 6
+        * F1:0xB8 i = 7
+        * [ 0: 0] Read Enable
+        *         0 = Reads disabled
+        *         1 = Reads Enabled
+        * [ 1: 1] Write Enable
+        *         0 = Writes disabled
+        *         1 = Writes Enabled
+        * [ 2: 2] Cpu Disable
+        *         0 = Cpu can use this I/O range
+        *         1 = Cpu requests do not use this I/O range
+        * [ 3: 3] Lock
+        *         0 = base/limit registers i are read/write
+        *         1 = base/limit registers i are read-only
+        * [ 7: 4] Reserved
+        * [31: 8] Memory-Mapped I/O Base Address i (39-16)
+        *         This field defines the upper address bits of a 40bit address 
+        *         that defines the start of memory-mapped I/O region i
+        */
+       PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x88), 0x000000f0, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x90), 0x000000f0, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0x98), 0x000000f0, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xA0), 0x000000f0, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xA8), 0x000000f0, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xB0), 0x000000f0, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xB8), 0x000000f0, 0x00fc0003,
+
+       /* PCI I/O Limit i Registers
+        * F1:0xC4 i = 0
+        * F1:0xCC i = 1
+        * F1:0xD4 i = 2
+        * F1:0xDC i = 3
+        * [ 2: 0] Destination Node ID
+        *         000 = Node 0
+        *         001 = Node 1
+        *         010 = Node 2
+        *         011 = Node 3
+        *         100 = Node 4
+        *         101 = Node 5
+        *         110 = Node 6
+        *         111 = Node 7
+        * [ 3: 3] Reserved
+        * [ 5: 4] Destination Link ID
+        *         00 = Link 0
+        *         01 = Link 1
+        *         10 = Link 2
+        *         11 = reserved
+        * [11: 6] Reserved
+        * [24:12] PCI I/O Limit Address i
+        *         This field defines the end of PCI I/O region n
+        * [31:25] Reserved
+        */
+       PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff010, // CPU0 LDT1
+       PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
+
+       /* PCI I/O Base i Registers
+        * F1:0xC0 i = 0
+        * F1:0xC8 i = 1
+        * F1:0xD0 i = 2
+        * F1:0xD8 i = 3
+        * [ 0: 0] Read Enable
+        *         0 = Reads Disabled
+        *         1 = Reads Enabled
+        * [ 1: 1] Write Enable
+        *         0 = Writes Disabled
+        *         1 = Writes Enabled
+        * [ 3: 2] Reserved
+        * [ 4: 4] VGA Enable
+        *         0 = VGA matches Disabled
+        *         1 = matches all address < 64K and where A[9:0] is in the 
+        *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
+        * [ 5: 5] ISA Enable
+        *         0 = ISA matches Disabled
+        *         1 = Blocks address < 64K and in the last 768 bytes of eack 1K block
+        *             from matching agains this base/limit pair
+        * [11: 6] Reserved
+        * [24:12] PCI I/O Base i
+        *         This field defines the start of PCI I/O region n 
+        * [31:25] Reserved
+        */
+       PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
+       PCI_ADDR(0, 0x18, 1, 0xC8), 0xFE000FCC, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xD0), 0xFE000FCC, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xD8), 0xFE000FCC, 0x00000000,
+
+       /* Config Base and Limit i Registers
+        * F1:0xE0 i = 0
+        * F1:0xE4 i = 1
+        * F1:0xE8 i = 2
+        * F1:0xEC i = 3
+        * [ 0: 0] Read Enable
+        *         0 = Reads Disabled
+        *         1 = Reads Enabled
+        * [ 1: 1] Write Enable
+        *         0 = Writes Disabled
+        *         1 = Writes Enabled
+        * [ 2: 2] Device Number Compare Enable
+        *         0 = The ranges are based on bus number
+        *         1 = The ranges are ranges of devices on bus 0
+        * [ 3: 3] Reserved
+        * [ 6: 4] Destination Node
+        *         000 = Node 0
+        *         001 = Node 1
+        *         010 = Node 2
+        *         011 = Node 3
+        *         100 = Node 4
+        *         101 = Node 5
+        *         110 = Node 6
+        *         111 = Node 7
+        * [ 7: 7] Reserved
+        * [ 9: 8] Destination Link
+        *         00 = Link 0
+        *         01 = Link 1
+        *         10 = Link 2
+        *         11 - Reserved
+        * [15:10] Reserved
+        * [23:16] Bus Number Base i
+        *         This field defines the lowest bus number in configuration region i
+        * [31:24] Bus Number Limit i
+        *         This field defines the highest bus number in configuration regin i
+        */
+       
+        PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x04000103, // CPU0 LDT1
+        PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x0b050213, // CPU1 LDT2
+        PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x100c0223, // CPU2 LDT2
+        PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x15110133, // CPU3 LTD1
+       };
+       int max;
+       max = sizeof(register_values)/sizeof(register_values[0]);
+       setup_resource_map(register_values, max);
+}
+

diff --git a/targets/island/aruma/Config.lb b/targets/island/aruma/Config.lb
new file mode 100644 (file)
index 0000000..40db142
--- /dev/null
+++ b/targets/island/aruma/Config.lb
@@ -0,0 +1,35 @@
+# This will make a target directory of ./island_aruma
+
+target island_aruma
+mainboard island/aruma
+
+option DEFAULT_CONSOLE_LOGLEVEL=8
+option MAXIMUM_CONSOLE_LOGLEVEL=8
+
+#option DEFAULT_CONSOLE_LOGLEVEL=7
+#option MAXIMUM_CONSOLE_LOGLEVEL=7
+
+option CC="gcc -m32"
+
+option CONFIG_MAX_CPUS=4
+option HAVE_ACPI_TABLES=1
+
+romimage "normal"
+       # 512-36 k
+        option ROM_SIZE = 487424 
+       option USE_FALLBACK_IMAGE=0
+       option ROM_IMAGE_SIZE=0x1c000
+       option XIP_ROM_SIZE=0x20000
+       option LINUXBIOS_EXTRA_VERSION=".0-normal"
+       payload /home/stepan/agami/build/filo-0.4.2/filo.elf
+end
+
+romimage "fallback" 
+       option USE_FALLBACK_IMAGE=1
+       option ROM_IMAGE_SIZE=0x1c000
+       option XIP_ROM_SIZE=0x20000
+       option LINUXBIOS_EXTRA_VERSION=".0-fallback"
+       payload /home/stepan/agami/build/filo-0.4.2/filo.elf
+end
+
+buildrom ./island_aruma.rom ROM_SIZE "normal" "fallback"

diff --git a/targets/island/aruma/build b/targets/island/aruma/build
new file mode 100755 (executable)
index 0000000..46cf08b
--- /dev/null
+++ b/targets/island/aruma/build
@@ -0,0 +1,12 @@
+#!/bin/bash
+#
+# script to generate rom image with builtin vga option rom.
+# call from freebios2/targets
+#
+rm -rf island/aruma/island_aruma
+./buildtarget island/aruma/
+cd island/aruma/island_aruma
+make
+mv island_aruma.rom island_aruma_novga.rom
+cat ~/atiragexl.rom island_aruma_novga.rom > island_aruma.rom
+cd ../../..