Flashrom README
-------------------------------------------------------------------------------
-This is the universal (LinuxBIOS) flash utility.
+This is the universal (coreboot) flash utility.
Build Requirements
------------------
is that flash info is dumped and the flash chip is set to writable.
-LinuxBIOS Table and Mainboard Identification
+coreboot Table and Mainboard Identification
--------------------------------------------
-Flashrom reads the LinuxBIOS table to determine the current mainboard
-(parse DMI as well in future?). If no LinuxBIOS table could be read
+Flashrom reads the coreboot table to determine the current mainboard
+(parse DMI as well in future?). If no coreboot table could be read
or if you want to override these values, you can specify -m, e.g.:
flashrom -w --mainboard AGAMI:ARUMA agami_aruma.rom
The following boards require the specification of the board name, if
-no LinuxBIOS table is found:
+no coreboot table is found:
* IWILL DK8-HTX: use -m iwill:dk8_htx
* Agami Aruma: use -m AGAMI:ARUMA
/**
* Suited for VIAs EPIA M and MII, and maybe other CLE266 based EPIAs.
*
- * We don't need to do this when using LinuxBIOS, GPIO15 is never lowered there.
+ * We don't need to do this when using coreboot, GPIO15 is never lowered there.
*/
static int board_via_epia_m(const char *name)
{
uint16_t second_card_vendor;
uint16_t second_card_device;
- /* The vendor / part name from the LinuxBIOS table. */
+ /* The vendor / part name from the coreboot table. */
const char *lb_vendor;
const char *lb_part;
};
/**
- * Match boards on LinuxBIOS table gathered vendor and part name.
+ * Match boards on coreboot table gathered vendor and part name.
* Require main PCI IDs to match too as extra safety.
*/
-static struct board_pciid_enable *board_match_linuxbios_name(const char *vendor, const char *part)
+static struct board_pciid_enable *board_match_coreboot_name(const char *vendor, const char *part)
{
struct board_pciid_enable *board = board_pciid_enables;
int ret = 0;
if (vendor && part)
- board = board_match_linuxbios_name(vendor, part);
+ board = board_match_coreboot_name(vendor, part);
if (!board)
board = board_match_pci_card_ids();
int handle_romentries(uint8_t *buffer, uint8_t *content);
/* lbtable.c */
-int linuxbios_init(void);
+int coreboot_init(void);
extern char *lb_part, *lb_vendor;
/* spi.c */
int block_erase_m29f400bt(volatile uint8_t *bios,
volatile uint8_t *dst);
int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
-int write_linuxbios_m29f400bt(struct flashchip *flash, uint8_t *buf);
+int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf);
void toggle_ready_m29f400bt(volatile uint8_t *dst);
void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data);
void protect_m29f400bt(volatile uint8_t *bios);
{"EN29F002(A)(N)B", EON_ID, EN_29F002B, 256, 256,
probe_jedec, erase_chip_jedec, write_jedec},
{"MBM29F400TC", FUJITSU_ID, MBM29F400TC_STRANGE, 512, 64 * 1024,
- probe_m29f400bt, erase_m29f400bt, write_linuxbios_m29f400bt},
+ probe_m29f400bt, erase_m29f400bt, write_coreboot_m29f400bt},
{"MX29F002", MX_ID, MX_29F002, 256, 64 * 1024,
probe_29f002, erase_29f002, write_29f002},
{"MX25L4005", MX_ID, MX_25L4005, 512, 256,
{"M29F002T/NT", ST_ID, ST_M29F002T, 256, 64 * 1024,
probe_jedec, erase_chip_jedec, write_jedec},
{"M29F400BT", ST_ID, ST_M29F400BT, 512, 64 * 1024,
- probe_m29f400bt, erase_m29f400bt, write_linuxbios_m29f400bt},
+ probe_m29f400bt, erase_m29f400bt, write_coreboot_m29f400bt},
{"M50FLW040A", ST_ID, ST_M50FLW040A, 512, 64 * 1024,
probe_jedec, erase_chip_jedec, write_jedec},
{"M50FLW040B", ST_ID, ST_M50FLW040B, 512, 64 * 1024,
.SH DESCRIPTION
.B flashrom
is a universal flash programming utility for DIP, PLCC, or SPI flash ROM
-chips. It can be used to flash BIOS/LinuxBIOS/firmware images, for example.
+chips. It can be used to flash BIOS/coreboot/firmware images, for example.
.SH OPTIONS
If no file is specified, then all that happens
is that flash info is dumped and the flash chip is set to writable.
Force write without checking whether the ROM image file is really meant
to be used on this board.
.sp
-Note: This check only works while LinuxBIOS is running, and only for those
-boards where the LinuxBIOS code supports it.
+Note: This check only works while coreboot is running, and only for those
+boards where the coreboot code supports it.
.TP
.B "\-l, \-\-layout" <layout.file>
Read ROM layout from file.
.\".B "\-\-version"
.\"Show version information and exit.
.SH BUGS
-Please report any bugs at http://tracker.linuxbios.org/trac/LinuxBIOS/,
-or on the LinuxBIOS mailing list (http://linuxbios.org/Mailinglist).
+Please report any bugs at http://tracker.coreboot.org/trac/coreboot/,
+or on the coreboot mailing list (http://www.coreboot.org/Mailinglist).
.SH LICENCE
.B flashrom
is covered by the GNU General Public License (GPL), version 2 or later.
/* We look at the lbtable first to see if we need a
* mainboard specific flash enable sequence.
*/
- linuxbios_init();
+ coreboot_init();
/* try to enable it. Failure IS an option, since not all motherboards
* really need this to be done, etc., etc.
return 0;
}
- printf_debug("LinuxBIOS last image size "
+ printf_debug("coreboot last image size "
"(not ROM size) is %d bytes.\n", *walk);
walk--;
printf_debug("Mainboard ID: %s\n", mainboard_part);
/*
- * If lb_vendor is not set, the linuxbios table was
+ * If lb_vendor is not set, the coreboot table was
* not found. Nor was -mVENDOR:PART specified
*/
head->table_checksum);
continue;
}
- fprintf(stdout, "Found LinuxBIOS table at 0x%08lx.\n", addr);
+ fprintf(stdout, "Found coreboot table at 0x%08lx.\n", addr);
return head;
};
}
}
-int linuxbios_init(void)
+int coreboot_init(void)
{
uint8_t *low_1MB;
struct lb_header *lb_table;
if (lb_table) {
unsigned long addr;
addr = ((char *)lb_table) - ((char *)low_1MB);
- printf_debug("LinuxBIOS table found at %p.\n", lb_table);
+ printf_debug("Coreboot table found at %p.\n", lb_table);
rec = (struct lb_record *)(((char *)lb_table) + lb_table->header_bytes);
last = (struct lb_record *)(((char *)rec) + lb_table->table_bytes);
- printf_debug("LinuxBIOS header(%d) checksum: %04x table(%d) checksum: %04x entries: %d\n",
+ printf_debug("Coreboot header(%d) checksum: %04x table(%d) checksum: %04x entries: %d\n",
lb_table->header_bytes, lb_table->header_checksum,
lb_table->table_bytes, lb_table->table_checksum,
lb_table->table_entries);
search_lb_records(rec, last, addr + lb_table->header_bytes);
} else {
- printf("No LinuxBIOS table found.\n");
+ printf("No coreboot table found.\n");
return -1;
}
-#ifndef LINUXBIOS_TABLES_H
-#define LINUXBIOS_TABLES_H
+#ifndef COREBOOT_TABLES_H
+#define COREBOOT_TABLES_H
#include <stdint.h>
-/* The linuxbios table information is for conveying information
+/* The coreboot table information is for conveying information
* from the firmware to the loaded OS image. Primarily this
* is expected to be information that cannot be discovered by
* other means, such as quering the hardware directly.
* table entries and be backwards compatible, but it is not required.
*/
-/* Since LinuxBIOS is usually compiled 32bit, gcc will align 64bit
- * types to 32bit boundaries. If the LinuxBIOS table is dumped on a
+/* Since coreboot is usually compiled 32bit, gcc will align 64bit
+ * types to 32bit boundaries. If the coreboot table is dumped on a
* 64bit system, a uint64_t would be aligned to 64bit boundaries,
* breaking the table format.
*
- * lb_uint64 will keep 64bit LinuxBIOS table values aligned to 32bit
+ * lb_uint64 will keep 64bit coreboot table values aligned to 32bit
* to ensure compatibility. They can be accessed with the two functions
* below: unpack_lb64() and pack_lb64()
*
#define CHECKSUM_PCBIOS 1
};
-#endif /* LINUXBIOS_TABLES_H */
+#endif /* COREBOOT_TABLES_H */
return 0;
}
-int write_linuxbios_m29f400bt(struct flashchip *flash, uint8_t *buf)
+int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf)
{
volatile uint8_t *bios = flash->virtual_memory;
projects / coreboot.git / commitdiff