We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.

[coreboot.git] / src / southbridge / nvidia / mcp55 / mcp55_lpc.c

diff --git a/src/southbridge/nvidia/mcp55/mcp55_lpc.c b/src/southbridge/nvidia/mcp55/mcp55_lpc.c
index c247d98be1f316a1124203fb0c9ea5786af0ffd0..0fb77c3e38952151109cb490d4be7982169c7713 100644 (file)
--- a/src/southbridge/nvidia/mcp55/mcp55_lpc.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_lpc.c
@@ -65,7 +65,7 @@ static void lpc_common_init(device_t dev, int master)
 
        if (master)
                setup_ioapic(ioapic_base, 0);
-       else 
+       else
                clear_ioapic(ioapic_base);
 }
 
@@ -80,7 +80,7 @@ static void enable_hpet(struct device *dev)
 
        pci_write_config32(dev,0x44, 0xfed00001);
        hpet_address=pci_read_config32(dev,0x44)& 0xfffffffe;
-       printk_debug("enabling HPET @0x%x\n", hpet_address);
+       printk(BIOS_DEBUG, "enabling HPET @0x%lx\n", hpet_address);
 }
 
 static void lpc_init(device_t dev)
@@ -108,7 +108,7 @@ static void lpc_init(device_t dev)
                byte |= 0x40;
        }
        pci_write_config8(dev, PREVIOUS_POWER_STATE, byte);
-       printk_info("set power %s after power fail\n", on?"on":"off");
+       printk(BIOS_INFO, "set power %s after power fail\n", on?"on":"off");
 #endif
        /* Throttle the CPU speed down for testing */
        on = SLOW_CPU_OFF;
@@ -120,7 +120,7 @@ static void lpc_init(device_t dev)
                outl(((on<<1)+0x10)  ,(pm10_bar + 0x10));
                dword = inl(pm10_bar + 0x10);
                on = 8-on;
-               printk_debug("Throttling CPU %2d.%1.1d percent.\n",
+               printk(BIOS_DEBUG, "Throttling CPU %2d.%1.1d percent.\n",
                             (on*12)+(on>>1),(on&1)*5);
        }
 
@@ -185,7 +185,7 @@ static void mcp55_lpc_read_resources(device_t dev)
                     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
        res = new_resource(dev, 3); /* IOAPIC */
-       res->base = 0xfec00000;
+       res->base = IO_APIC_ADDR;
        res->size = 0x00001000;
        res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }
@@ -195,36 +195,27 @@ static void mcp55_lpc_read_resources(device_t dev)
  *
  * @param dev the device whos children's resources are to be enabled
  *
- * This function is called by the global enable_resources() indirectly via the
- * device_operation::enable_resources() method of devices.
- *
- * Indirect mutual recursion:
- *      enable_childrens_resources() -> enable_resources()
- *      enable_resources() -> device_operation::enable_resources()
- *      device_operation::enable_resources() -> enable_children_resources()
  */
 static void mcp55_lpc_enable_childrens_resources(device_t dev)
 {
-       unsigned link;
        uint32_t reg, reg_var[4];
        int i;
        int var_num = 0;
+       struct bus *link;
 
        reg = pci_read_config32(dev, 0xa0);
 
-       for (link = 0; link < dev->links; link++) {
+       for (link = dev->link_list; link; link = link->next) {
                device_t child;
-               for (child = dev->link[link].children; child; child = child->sibling) {
-                       enable_resources(child);
+               for (child = link->children; child; child = child->sibling) {
                        if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
-                               for(i=0;i<child->resources;i++) {
-                                       struct resource *res;
+                               struct resource *res;
+                               for(res = child->resource_list; res; res = res->next) {
                                        unsigned long base, end; // don't need long long
-                                       res = &child->resource[i];
                                        if(!(res->flags & IORESOURCE_IO)) continue;
                                        base = res->base;
                                        end = resource_end(res);
-                                       printk_debug("mcp55 lpc decode:%s, base=0x%08x, end=0x%08x\n",dev_path(child),base, end);
+                                       printk(BIOS_DEBUG, "mcp55 lpc decode:%s, base=0x%08lx, end=0x%08lx\n",dev_path(child),base, end);
                                        switch(base) {
                                        case 0x3f8: // COM1
                                                reg |= (1<<0);  break;