* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that value

[coreboot.git] / src / southbridge / nvidia / mcp55 / mcp55.h

diff --git a/src/southbridge/nvidia/mcp55/mcp55.h b/src/southbridge/nvidia/mcp55/mcp55.h
index 687232f302d642acadfef5f14169c005e6387bc3..3173c50f3980fd4736f849bfaad0ca6df8e3b745 100644 (file)
--- a/src/southbridge/nvidia/mcp55/mcp55.h
+++ b/src/southbridge/nvidia/mcp55/mcp55.h
@@ -19,14 +19,24 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#ifndef MCP55_H
-#define MCP55_H
+#ifndef SOUTHBRIDGE_NVIDIA_MCP55_MCP55_H
+#define SOUTHBRIDGE_NVIDIA_MCP55_MCP55_H
 
-#include "chip.h"
+#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
+#define MCP55_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE
+#else
+#define MCP55_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE
+#endif
 
 #ifndef __PRE_RAM__
+#include "chip.h"
 void mcp55_enable(device_t dev);
+extern struct pci_operations mcp55_pci_ops;
 #else
+#if !defined(__ROMCC__)
 void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn);
+void enable_usbdebug(unsigned int port);
+#endif
+#endif
+
 #endif
-#endif /* MCP55_H */