We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.
[coreboot.git] / src / southbridge / nvidia / ck804 / ck804_lpc.c
index db7c29ba8421fcb994ee04ebbc02a01113dc2502..7d8c9ad723d85362fda23c7059149def7555ca8e 100644 (file)
@@ -15,6 +15,7 @@
 #include <pc80/isa-dma.h>
 #include <bitops.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
 #include "ck804.h"
 
 #define NMI_OFF 0
 
-struct ioapicreg {
-       unsigned int reg;
-       unsigned int value_low, value_high;
-};
-
-static struct ioapicreg ioapicregvalues[] = {
-#define ALL            (0xff << 24)
-#define NONE           (0)
-#define DISABLED       (1 << 16)
-#define ENABLED                (0 << 16)
-#define TRIGGER_EDGE   (0 << 15)
-#define TRIGGER_LEVEL  (1 << 15)
-#define POLARITY_HIGH  (0 << 13)
-#define POLARITY_LOW   (1 << 13)
-#define PHYSICAL_DEST  (0 << 11)
-#define LOGICAL_DEST   (1 << 11)
-#define ExtINT         (7 << 8)
-#define NMI            (4 << 8)
-#define SMI            (2 << 8)
-#define INT            (1 << 8)
-       /* IO-APIC virtual wire mode configuration */
-       /* mask, trigger, polarity, destination, delivery, vector */
-       {0,  ENABLED | TRIGGER_EDGE | POLARITY_HIGH | PHYSICAL_DEST | ExtINT, NONE},
-       {1,  DISABLED, NONE},
-       {2,  DISABLED, NONE},
-       {3,  DISABLED, NONE},
-       {4,  DISABLED, NONE},
-       {5,  DISABLED, NONE},
-       {6,  DISABLED, NONE},
-       {7,  DISABLED, NONE},
-       {8,  DISABLED, NONE},
-       {9,  DISABLED, NONE},
-       {10, DISABLED, NONE},
-       {11, DISABLED, NONE},
-       {12, DISABLED, NONE},
-       {13, DISABLED, NONE},
-       {14, DISABLED, NONE},
-       {15, DISABLED, NONE},
-       {16, DISABLED, NONE},
-       {17, DISABLED, NONE},
-       {18, DISABLED, NONE},
-       {19, DISABLED, NONE},
-       {20, DISABLED, NONE},
-       {21, DISABLED, NONE},
-       {22, DISABLED, NONE},
-       {23, DISABLED, NONE},
-       /* Be careful and don't write past the end... */
-};
-
-static void setup_ioapic(unsigned long ioapic_base)
-{
-       int i;
-       unsigned long value_low, value_high;
-       /* unsigned long ioapic_base = 0xfec00000; */
-       volatile unsigned long *l;
-       struct ioapicreg *a = ioapicregvalues;
-
-       ioapicregvalues[0].value_high = lapicid() << (56 - 32);
-
-       l = (unsigned long *)ioapic_base;
-
-       for (i = 0; i < ARRAY_SIZE(ioapicregvalues); i++, a++) {
-               l[0] = (a->reg * 2) + 0x10;
-               l[4] = a->value_low;
-               value_low = l[4];
-               l[0] = (a->reg * 2) + 0x11;
-               l[4] = a->value_high;
-               value_high = l[4];
-               if ((i == 0) && (value_low == 0xffffffff)) {
-                       printk_warning("IO APIC not responding.\n");
-                       return;
-               }
-               printk_spew("for IRQ, reg 0x%08x value 0x%08x 0x%08x\n",
-                           a->reg, a->value_low, a->value_high);
-       }
-}
-
 // 0x7a or e3
 #define PREVIOUS_POWER_STATE 0x7A
 
@@ -108,8 +32,8 @@ static void setup_ioapic(unsigned long ioapic_base)
 #define SLOW_CPU_OFF 0
 #define SLOW_CPU__ON 1
 
-#ifndef MAINBOARD_POWER_ON_AFTER_POWER_FAIL
-#define MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
+#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
+#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
 #endif
 
 static void lpc_common_init(device_t dev)
@@ -123,7 +47,7 @@ static void lpc_common_init(device_t dev)
        pci_write_config8(dev, 0x74, byte);
        dword = pci_read_config32(dev, PCI_BASE_ADDRESS_1);     /* 0x14 */
 
-       setup_ioapic(dword);
+       setup_ioapic(dword, 0); // Don't rename IOAPIC ID
 
 #if 1
        dword = pci_read_config32(dev, 0xe4);
@@ -171,7 +95,7 @@ static void enable_hpet(struct device *dev)
 
        pci_write_config32(dev, 0x44, 0xfed00001);
        hpet_address = pci_read_config32(dev, 0x44) & 0xfffffffe;
-       printk_debug("Enabling HPET @0x%lx\n", hpet_address);
+       printk(BIOS_DEBUG, "Enabling HPET @0x%lx\n", hpet_address);
 }
 
 unsigned pm_base=0;
@@ -184,7 +108,7 @@ static void lpc_init(device_t dev)
        lpc_common_init(dev);
 
        pm_base = pci_read_config32(dev, 0x60) & 0xff00;
-       printk_info("%s: pm_base = %x \n", __func__, pm_base);
+       printk(BIOS_INFO, "%s: pm_base = %x \n", __func__, pm_base);
 
 #if CK804_CHIP_REV==1
        if (dev->bus->secondary != 1)
@@ -198,14 +122,14 @@ static void lpc_init(device_t dev)
 #endif
 
        /* power after power fail */
-       on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
+       on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
        get_option(&on, "power_on_after_fail");
        byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);
        byte &= ~0x40;
        if (!on)
                byte |= 0x40;
        pci_write_config8(dev, PREVIOUS_POWER_STATE, byte);
-       printk_info("set power %s after power fail\n", on ? "on" : "off");
+       printk(BIOS_INFO, "set power %s after power fail\n", on ? "on" : "off");
 
        /* Throttle the CPU speed down for testing. */
        on = SLOW_CPU_OFF;
@@ -217,7 +141,7 @@ static void lpc_init(device_t dev)
                outl(((on << 1) + 0x10), (pm10_bar + 0x10));
                dword = inl(pm10_bar + 0x10);
                on = 8 - on;
-               printk_debug("Throttling CPU %2d.%1.1d percent.\n",
+               printk(BIOS_DEBUG, "Throttling CPU %2d.%1.1d percent.\n",
                             (on * 12) + (on >> 1), (on & 1) * 5);
        }
 #if 0
@@ -245,7 +169,7 @@ static void lpc_init(device_t dev)
                byte |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW. */
        }
        if (byte != byte_old)
-               outb(0x70, byte);
+               outb(byte, 0x70);
 
        /* Initialize the real time clock (RTC). */
        rtc_init(0);
@@ -275,12 +199,21 @@ static void ck804_lpc_read_resources(device_t dev)
 
        /* Add an extra subtractive resource for both memory and I/O. */
        res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-       res->flags =
-           IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
+       res->base = 0;
+       res->size = 0x1000;
+       res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
+                    IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
        res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-       res->flags =
-           IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
+       res->base = 0xff800000;
+       res->size = 0x00800000; /* 8 MB for flash */
+       res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
+                    IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
+
+       res = new_resource(dev, 3); /* IOAPIC */
+       res->base = IO_APIC_ADDR;
+       res->size = 0x00001000;
+       res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }
 
 /**
@@ -289,35 +222,27 @@ static void ck804_lpc_read_resources(device_t dev)
  * This function is called by the global enable_resources() indirectly via the
  * device_operation::enable_resources() method of devices.
  *
- * Indirect mutual recursion:
- *      enable_childrens_resources() -> enable_resources()
- *      enable_resources() -> device_operation::enable_resources()
- *      device_operation::enable_resources() -> enable_children_resources()
- *
- * @param dev The device whose children's resources are to be enabled.
  */
 static void ck804_lpc_enable_childrens_resources(device_t dev)
 {
-       unsigned link;
+       struct bus *link;
        uint32_t reg, reg_var[4];
        int i, var_num = 0;
 
        reg = pci_read_config32(dev, 0xa0);
 
-       for (link = 0; link < dev->links; link++) {
+       for (link = dev->link_list; link; link = link->next) {
                device_t child;
-               for (child = dev->link[link].children; child; child = child->sibling) {
-                       enable_resources(child);
-                       if (child->have_resources && (child->path.type == DEVICE_PATH_PNP)) {
-                               for (i = 0; i < child->resources; i++) {
-                                       struct resource *res;
+               for (child = link->children; child; child = child->sibling) {
+                       if (child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
+                               struct resource *res;
+                               for (res = child->resource_list; res; res = res->next) {
                                        unsigned long base, end;        // don't need long long
-                                       res = &child->resource[i];
                                        if (!(res->flags & IORESOURCE_IO))
                                                continue;
                                        base = res->base;
                                        end = resource_end(res);
-                                       printk_debug("ck804 lpc decode:%s, base=0x%08lx, end=0x%08lx\r\n", dev_path(child), base, end);
+                                       printk(BIOS_DEBUG, "ck804 lpc decode:%s, base=0x%08lx, end=0x%08lx\n", dev_path(child), base, end);
                                        switch (base) {
                                        case 0x3f8:     // COM1
                                                reg |= (1 << 0);