This patch unifies the use of config options in v2 to all start with CONFIG_

[coreboot.git] / src / southbridge / intel / i82801xx / cmos_failover.c

diff --git a/src/southbridge/intel/i82801xx/cmos_failover.c b/src/southbridge/intel/i82801xx/cmos_failover.c
index 2e1d84adb859d0d736c7144554a78e273670faa3..9307f40305ff1ed9919d7fa992e8cb97832d0f78 100644 (file)
--- a/src/southbridge/intel/i82801xx/cmos_failover.c
+++ b/src/southbridge/intel/i82801xx/cmos_failover.c
@@ -1,5 +1,5 @@
 /*
- * This file is part of the LinuxBIOS project.
+ * This file is part of the coreboot project.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -18,15 +18,15 @@
 
 #include "i82801xx.h"
 
-static void check_cmos_failed(void) 
+static void check_cmos_failed(void)
 {
        uint8_t byte;
        byte = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
-       if( byte & RTC_FAILED) {
+       if (byte & RTC_FAILED) {
                //clear bit 1 and bit 2
                byte = cmos_read(RTC_BOOT_BYTE);
                byte &= 0x0c;
-               byte |= MAX_REBOOT_CNT << 4;
+               byte |= CONFIG_MAX_REBOOT_CNT << 4;
                cmos_write(byte, RTC_BOOT_BYTE);
        }
 }