This patch unifies the use of config options in v2 to all start with CONFIG_

[coreboot.git] / src / southbridge / intel / i82801ca / i82801ca_lpc.c

diff --git a/src/southbridge/intel/i82801ca/i82801ca_lpc.c b/src/southbridge/intel/i82801ca/i82801ca_lpc.c
index 2327c01150463029712d4447c5f4e0bf25ae0630..69535bc016111277454c24f638d8bdcb10e995b7 100644 (file)
--- a/src/southbridge/intel/i82801ca/i82801ca_lpc.c
+++ b/src/southbridge/intel/i82801ca/i82801ca_lpc.c
@@ -15,8 +15,8 @@
 
 #define NMI_OFF 0
 
-#ifndef MAINBOARD_POWER_ON_AFTER_POWER_FAIL
-#define MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
+#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
+#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
 #endif
 
 #define MAINBOARD_POWER_OFF 0
@@ -88,7 +88,7 @@ void i82801ca_rtc_init(struct device *dev)
 {
     uint32_t dword;
     int rtc_failed;
-    uint32_t pwr_on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
+       int pwr_on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
     uint8_t pmcon3 = pci_read_config8(dev, GEN_PMCON_3);
 
     rtc_failed = pmcon3 & RTC_BATTERY_DEAD;
@@ -99,7 +99,7 @@ void i82801ca_rtc_init(struct device *dev)
         pmcon3 &= ~RTC_POWER_FAILED;
     }
 
-    get_option("power_on_after_fail", &pwr_on);
+    get_option(&pwr_on, "power_on_after_fail");
        pmcon3 &= ~SLEEP_AFTER_POWER_FAIL;
        if (!pwr_on) {
                pmcon3 |= SLEEP_AFTER_POWER_FAIL;
@@ -158,7 +158,7 @@ static void lpc_init(struct device *dev)
 {
        uint8_t byte;
        int pwr_on=-1;
-       uint32_t nmi_option;
+       int nmi_option;
 
        /* IO APIC initialization */
        i82801ca_enable_ioapic(dev);
@@ -186,7 +186,7 @@ static void lpc_init(struct device *dev)
     outb(byte, 0x61);
     byte = inb(0x70);
     nmi_option = NMI_OFF;
-    get_option("nmi", &nmi_option);
+    get_option(&nmi_option, "nmi");
     if (nmi_option) {                  
         byte &= ~(1 << 7); /* set NMI */
         outb(byte, 0x70);