Remove dev-i440fx.c/h - move code closer to its callers.

[seabios.git] / src / shadow.c

diff --git a/src/shadow.c b/src/shadow.c
index ed530e0296548d768111db923601d0f53f27e96d..169decf7508184d0f796cb0c7d89fd11ffb5505e 100644 (file)
--- a/src/shadow.c
+++ b/src/shadow.c
@@ -9,11 +9,13 @@
 #include "pci.h" // pci_config_writeb
 #include "config.h" // CONFIG_*
 #include "pci_ids.h" // PCI_VENDOR_ID_INTEL
-#include "dev-i440fx.h"
+#include "xen.h" // usingXen
 
 // On the emulators, the bios at 0xf0000 is also at 0xffff0000
 #define BIOS_SRC_OFFSET 0xfff00000
 
+#define I440FX_PAM0     0x59
+
 // Enable shadowing and copy bios.
 static void
 __make_bios_writable_intel(u16 bdf, u32 pam0)
@@ -51,7 +53,7 @@ __make_bios_writable_intel(u16 bdf, u32 pam0)
            , code32flat_end - code32flat_start);
 }
 
-void
+static void
 make_bios_writable_intel(u16 bdf, u32 pam0)
 {
     int reg = pci_config_readb(bdf, pam0);
@@ -69,7 +71,7 @@ make_bios_writable_intel(u16 bdf, u32 pam0)
     __make_bios_writable_intel(bdf, pam0);
 }
 
-void
+static void
 make_bios_readonly_intel(u16 bdf, u32 pam0)
 {
     // Flush any pending writes before locking memory.
@@ -92,17 +94,33 @@ make_bios_readonly_intel(u16 bdf, u32 pam0)
     pci_config_writeb(bdf, pam0, 0x10);
 }
 
+static void i440fx_bios_make_writable(u16 bdf, void *arg)
+{
+    make_bios_writable_intel(bdf, I440FX_PAM0);
+}
+
+static void i440fx_bios_make_readonly(u16 bdf, void *arg)
+{
+    make_bios_readonly_intel(bdf, I440FX_PAM0);
+}
+
 static const struct pci_device_id dram_controller_make_writable_tbl[] = {
     PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441,
                i440fx_bios_make_writable),
     PCI_DEVICE_END
 };
 
+static const struct pci_device_id dram_controller_make_readonly_tbl[] = {
+    PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441,
+               i440fx_bios_make_readonly),
+    PCI_DEVICE_END
+};
+
 // Make the 0xc0000-0x100000 area read/writable.
 void
 make_bios_writable(void)
 {
-    if (CONFIG_COREBOOT)
+    if (CONFIG_COREBOOT || usingXen())
         return;
 
     dprintf(3, "enabling shadow ram\n");
@@ -117,17 +135,11 @@ make_bios_writable(void)
     }
 }
 
-static const struct pci_device_id dram_controller_make_readonly_tbl[] = {
-    PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441,
-               i440fx_bios_make_readonly),
-    PCI_DEVICE_END
-};
-
 // Make the BIOS code segment area (0xf0000) read-only.
 void
 make_bios_readonly(void)
 {
-    if (CONFIG_COREBOOT)
+    if (CONFIG_COREBOOT || usingXen())
         return;
 
     dprintf(3, "locking shadow ram\n");