Be sure to add "void" to all function prototypes that take no args.

[seabios.git] / src / pci.h

diff --git a/src/pci.h b/src/pci.h
index aae8e9f47534920db3dc96c4f3bce55be4f7e7f6..eea5b09c3b399be0ae1bac1db1c46049834e3b3c 100644 (file)
--- a/src/pci.h
+++ b/src/pci.h
@@ -1,102 +1,83 @@
-/*
- * pci.h
- * 
- * Copyright (C) 2008  Nguyen Anh Quynh <aquynh@gmail.com>
- * Copyright (C) 2002  MandrakeSoft S.A.
- * 
- * This file may be distributed under the terms of the GNU GPLv3 license.
- */
-
 #ifndef __PCI_H
 #define __PCI_H
 
-#include "ioport.h" // outl
-
-/* PCI init */
-#define PCI_ADDRESS_SPACE_IO           0x01
-
-#define PCI_ROM_SLOT    6
-#define PCI_NUM_REGIONS 7
-
-#define PCI_VENDOR_ID          0x00    /* 16 bits */
-#define PCI_DEVICE_ID          0x02    /* 16 bits */
-#define PCI_COMMAND                    0x04    /* 16 bits */
-#define PCI_COMMAND_IO         0x1             /* Enable response in I/O space */
-#define PCI_COMMAND_MEMORY     0x2             /* Enable response in Memory space */
-#define PCI_CLASS_DEVICE       0x0a    /* Device class */
-#define PCI_INTERRUPT_LINE     0x3c    /* 8 bits */
-#define PCI_INTERRUPT_PIN      0x3d    /* 8 bits */
-
-#define PCI_VENDOR_ID_INTEL             0x8086
-#define PCI_DEVICE_ID_INTEL_82441       0x1237
-#define PCI_DEVICE_ID_INTEL_82371SB_0   0x7000
-#define PCI_DEVICE_ID_INTEL_82371SB_1   0x7010
-#define PCI_DEVICE_ID_INTEL_82371AB_3   0x7113
-
-#define PCI_VENDOR_ID_IBM               0x1014
-#define PCI_VENDOR_ID_APPLE             0x106b
-
-/* 64 KB used to copy the BIOS to shadow RAM */
-#define BIOS_TMP_STORAGE  0x00030000
-
-#define SMB_IO_BASE         0xb100
-#define PM_IO_BASE          0xb000
-
-#define wbinvd() asm volatile("wbinvd")
+#include "types.h" // u32
 
-typedef struct PCIDevice {
-    int bus;
-    int devfn;
-} PCIDevice;
-
-static inline void
-pci_config_writel(PCIDevice *d, u32 addr, u32 val)
-{
-    outl(0x80000000 | (d->bus << 16) | (d->devfn << 8) | (addr & 0xfc), 0xcf8);
-    outl(val, 0xcfc);
+static inline u8 pci_bdf_to_bus(u16 bdf) {
+    return bdf >> 8;
 }
-
-static inline void
-pci_config_writew(PCIDevice *d, u32 addr, u32 val)
-{
-    outl(0x80000000 | (d->bus << 16) | (d->devfn << 8) | (addr & 0xfc), 0xcf8);
-    outw(val, 0xcfc + (addr & 2));
+static inline u8 pci_bdf_to_devfn(u16 bdf) {
+    return bdf & 0xff;
 }
-
-static inline void
-pci_config_writeb(PCIDevice *d, u32 addr, u32 val)
-{
-    outl(0x80000000 | (d->bus << 16) | (d->devfn << 8) | (addr & 0xfc), 0xcf8);
-    outb(val, 0xcfc + (addr & 3));
+static inline u16 pci_bdf_to_busdev(u16 bdf) {
+    return bdf & ~0x07;
 }
-
-static inline u32
-pci_config_readl(PCIDevice *d, u32 addr)
-{
-    outl(0x80000000 | (d->bus << 16) | (d->devfn << 8) | (addr & 0xfc), 0xcf8);
-
-    return inl(0xcfc);
+static inline u8 pci_bdf_to_dev(u16 bdf) {
+    return (bdf >> 3) & 0x1f;
 }
-
-static inline u32
-pci_config_readw(PCIDevice *d, u32 addr)
-{
-    outl(0x80000000 | (d->bus << 16) | (d->devfn << 8) | (addr & 0xfc), 0xcf8);
-    return inw(0xcfc + (addr & 2));
+static inline u8 pci_bdf_to_fn(u16 bdf) {
+    return bdf & 0x07;
 }
-
-static inline u32
-pci_config_readb(PCIDevice *d, u32 addr)
-{
-    outl(0x80000000 | (d->bus << 16) | (d->devfn << 8) | (addr & 0xfc), 0xcf8);
-
-    return inb(0xcfc + (addr & 3));
+static inline u16 pci_to_bdf(int bus, int dev, int fn) {
+    return (bus<<8) | (dev<<3) | fn;
 }
 
-void pci_bios_init(void);
-
-void bios_lock_shadow_ram(void);
+void pci_config_writel(u16 bdf, u32 addr, u32 val);
+void pci_config_writew(u16 bdf, u32 addr, u16 val);
+void pci_config_writeb(u16 bdf, u32 addr, u8 val);
+u32 pci_config_readl(u16 bdf, u32 addr);
+u16 pci_config_readw(u16 bdf, u32 addr);
+u8 pci_config_readb(u16 bdf, u32 addr);
+void pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on);
+
+int pci_find_vga(void);
+int pci_find_device(u16 vendid, u16 devid);
+int pci_find_class(u16 classid);
+
+int pci_next(int bdf, int *pmax);
+#define foreachpci(BDF, MAX)                    \
+    for (MAX=0x0100, BDF=pci_next(0, &MAX)      \
+         ; BDF >= 0                             \
+         ; BDF=pci_next(BDF+1, &MAX))
+
+// pirtable.c
+void create_pirtable(void);
+
+
+/****************************************************************
+ * PIR table
+ ****************************************************************/
+
+extern u16 PirOffset;
+
+struct link_info {
+    u8 link;
+    u16 bitmap;
+} PACKED;
+
+struct pir_slot {
+    u8 bus;
+    u8 dev;
+    struct link_info links[4];
+    u8 slot_nr;
+    u8 reserved;
+} PACKED;
+
+struct pir_header {
+    u32 signature;
+    u16 version;
+    u16 size;
+    u8 router_bus;
+    u8 router_devfunc;
+    u16 exclusive_irqs;
+    u32 compatible_devid;
+    u32 miniport_data;
+    u8 reserved[11];
+    u8 checksum;
+    struct pir_slot slots[0];
+} PACKED;
+
+#define PIR_SIGNATURE 0x52495024 // $PIR
 
-extern PCIDevice i440_pcidev;
 
 #endif