This patch unifies the use of config options in v2 to all start with CONFIG_

[coreboot.git] / src / northbridge / intel / i855pm / northbridge.c

diff --git a/src/northbridge/intel/i855pm/northbridge.c b/src/northbridge/intel/i855pm/northbridge.c
index 4fbd3b3cec93ef9dddf1be61bce725f524d6ccd3..ce655a9f0d5782aa2ae0485a9a2cbdbae604882d 100644 (file)
--- a/src/northbridge/intel/i855pm/northbridge.c
+++ b/src/northbridge/intel/i855pm/northbridge.c
@@ -66,7 +66,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
        return tolm;
 }
 
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
 #define HIGH_TABLES_SIZE 64    // maximum size of high tables in KB
 extern uint64_t high_tables_base, high_tables_size;
 #endif
@@ -114,7 +114,7 @@ static void pci_domain_set_resources(device_t dev)
                ram_resource(dev, idx++, 0, 640);
                ram_resource(dev, idx++, 768, tolmk - 768);
 
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
                /* Leave some space for ACPI, PIRQ and MP tables */
                high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
                high_tables_size = HIGH_TABLES_SIZE * 1024;