This patch unifies the use of config options in v2 to all start with CONFIG_

[coreboot.git] / src / northbridge / ibm / cpc710 / cpc710_pci.h

diff --git a/src/northbridge/ibm/cpc710/cpc710_pci.h b/src/northbridge/ibm/cpc710/cpc710_pci.h
index 51aaa220492f96324ffa7b8fea3ae8550fbbe71a..0b3374ebd4babbc5e6ea2cef320f2ad8a212dde3 100644 (file)
--- a/src/northbridge/ibm/cpc710/cpc710_pci.h
+++ b/src/northbridge/ibm/cpc710/cpc710_pci.h
@@ -24,17 +24,17 @@
 #ifndef _CPC710_PCI_H_
 #define _CPC710_PCI_H_
 
-#define CPC710_PCI32_CONFIG            (PCIC0_CFGADDR & 0xfff00000)
+#define CPC710_PCI32_CONFIG            (CONFIG_PCIC0_CFGADDR & 0xfff00000)
 #define CPC710_PCI32_MEM_SIZE          0xf8000000
 #define CPC710_PCI32_MEM_BASE          0xc0000000
 #define CPC710_PCI32_IO_SIZE           0xf8000000
-#define CPC710_PCI32_IO_BASE           0x80000000
+#define CPC710_PCI32CONFIG_IO_BASE             0x80000000
 
 //#define CPC710_PCI64_CONFIG          0xff400000
 //#define CPC710_PCI64_MEM_SIZE                0xf8000000
 //#define CPC710_PCI64_MEM_BASE                0xc8000000
 //#define CPC710_PCI64_IO_SIZE         0xf8000000
-//#define CPC710_PCI64_IO_BASE         0x88000000
+//#define CPC710_PCI64CONFIG_IO_BASE           0x88000000
 
 #define CPC710_PCIL0_PSEA              0xf6110
 #define CPC710_PCIL0_PCIDG             0xf6120