Move the v3 resource allocator to v2.

[coreboot.git] / src / northbridge / amd / gx1 / northbridge.c

diff --git a/src/northbridge/amd/gx1/northbridge.c b/src/northbridge/amd/gx1/northbridge.c
index 2c578d06713f71d22ee5736d25074a3b9fe9c239..d8e80c247f4a307dfaddce3d0043705532f9e07e 100644 (file)
--- a/src/northbridge/amd/gx1/northbridge.c
+++ b/src/northbridge/amd/gx1/northbridge.c
@@ -66,27 +66,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
        .device = PCI_DEVICE_ID_CYRIX_PCI_MASTER, 
 };
 
-
-
-#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
-
-static void pci_domain_read_resources(device_t dev)
-{
-        struct resource *resource;
-
-       printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__);
-
-        /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
-        resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-        /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
-        resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
         unsigned long basek, unsigned long sizek)
 {
@@ -187,12 +166,6 @@ static void pci_domain_set_resources(device_t dev)
        assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-        max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-        return max;
-}
-
 static struct device_operations pci_domain_ops = {
         .read_resources   = pci_domain_read_resources,
         .set_resources    = pci_domain_set_resources,