Re-integrate "USE_OPTION_TABLE" code.

[coreboot.git] / src / northbridge / amd / amdk8 / coherent_ht.c

diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index d4b93a6c6de91d10731521fc15d4b11959a6dfde..293abc7067d27d1356a260d7b9b16decf68bdbd1 100644 (file)
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -68,6 +68,7 @@
 #include <device/hypertransport_def.h>
 #include <stdlib.h>
 #include "arch/romcc_io.h"
+#include <pc80/mc146818rtc.h>
 
 #include "amdk8.h"
 
@@ -111,13 +112,7 @@
 
 static inline void print_linkn (const char *strval, uint8_t byteval)
 {
-#if 1
-#if CONFIG_USE_PRINTK_IN_CAR
-       printk_debug("%s%02x\r\n", strval, byteval);
-#else
-       print_debug(strval); print_debug_hex8(byteval); print_debug("\r\n");
-#endif
-#endif
+       printk(BIOS_DEBUG, "%s%02x\n", strval, byteval);
 }
 
 static void disable_probes(void)
@@ -155,10 +150,11 @@ static void disable_probes(void)
                HTTC_DIS_RD_DW_P | HTTC_DIS_RD_B_P;
        pci_write_config32(NODE_HT(0), HT_TRANSACTION_CONTROL, val);
 
-       print_spew("done.\r\n");
+       print_spew("done.\n");
 
 }
 
+#if 0
 static void enable_apic_ext_id(u8 node)
 {
 #if CONFIG_ENABLE_APIC_EXT_ID==1
@@ -171,6 +167,7 @@ static void enable_apic_ext_id(u8 node)
        pci_write_config32(NODE_HT(node), 0x68, val);
 #endif
 }
+#endif
 
 static void enable_routing(u8 node)
 {
@@ -206,7 +203,7 @@ static void enable_routing(u8 node)
        val &= ~((1<<1)|(1<<0));
        pci_write_config32(NODE_HT(node), 0x6c, val);
 
-       print_spew(" done.\r\n");
+       print_spew(" done.\n");
 }
 
 static void fill_row(u8 node, u8 row, u32 value)
@@ -256,7 +253,7 @@ static void rename_temp_node(u8 node)
        val |= node;  /* new node        */
        pci_write_config32(NODE_HT(7), 0x60, val);
 
-       print_spew(" done.\r\n");
+       print_spew(" done.\n");
 }
 
 static int verify_connection(u8 dest)
@@ -384,6 +381,7 @@ static uint8_t get_linkn_first(uint8_t byte)
        return byte;
 }
 
+#if TRY_HIGH_FIRST == 1
 static uint8_t get_linkn_last(uint8_t byte)
 {
        if(byte & 0x02) { byte &= 0x0f; byte |= 0x00;  }
@@ -391,7 +389,9 @@ static uint8_t get_linkn_last(uint8_t byte)
        if(byte & 0x08) { byte &= 0x0f; byte |= 0x20;  }
        return byte>>4;
 }
+#endif
 
+#if (CONFIG_MAX_PHYSICAL_CPUS > 2) || (CONFIG_MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED == 1)
 static uint8_t get_linkn_last_count(uint8_t byte)
 {
        byte &= 0x0f;
@@ -400,6 +400,7 @@ static uint8_t get_linkn_last_count(uint8_t byte)
        if(byte & 0x08) { byte &= 0xcf; byte |= 0x20; byte+=0x40; }
        return byte>>4;
 }
+#endif
 
 static void setup_row_local(u8 source, u8 row) /* source will be 7 when it is for temp use*/
 {
@@ -490,10 +491,12 @@ static void setup_temp_row(u8 source, u8 dest)
        fill_row(source,7,get_row(source,dest));
 }
 
+#if 0
 static void clear_temp_row(u8 source)
 {
        fill_row(source, 7, DEFAULT);
 }
+#endif
 
 static void setup_remote_node(u8 node)
 {
@@ -519,7 +522,7 @@ static void setup_remote_node(u8 node)
                pci_write_config32(NODE_MP(7), reg, value);
 
        }
-       print_spew("done\r\n");
+       print_spew("done\n");
 }
 
 #endif /* CONFIG_MAX_PHYSICAL_CPUS > 1*/
@@ -658,7 +661,7 @@ static void setup_remote_row_indirect_group(const u8 *conn, int num)
 
 static void setup_uniprocessor(void)
 {
-       print_spew("Enabling UP settings\r\n");
+       print_spew("Enabling UP settings\n");
 #if CONFIG_LOGICAL_CPUS==1
        unsigned tmp = (pci_read_config32(NODE_MC(0), 0xe8) >> 12) & 3;
        if (tmp>0) return;
@@ -1484,7 +1487,7 @@ static unsigned setup_smp(void)
 {
        unsigned nodes;
 
-       print_spew("Enabling SMP settings\r\n");
+       print_spew("Enabling SMP settings\n");
 
        nodes = setup_smp2();
 #if CONFIG_MAX_PHYSICAL_CPUS > 2
@@ -1502,12 +1505,7 @@ static unsigned setup_smp(void)
                nodes = setup_smp8();
 #endif
 
-#if CONFIG_USE_PRINTK_IN_CAR
-       printk_debug("%02x nodes initialized.\r\n", nodes);
-#else
-       print_debug_hex8(nodes);
-       print_debug(" nodes initialized.\r\n");
-#endif
+       printk(BIOS_DEBUG, "%02x nodes initialized.\n", nodes);
 
        return nodes;
 }
@@ -1526,14 +1524,14 @@ static unsigned verify_mp_capabilities(unsigned nodes)
 #if CONFIG_MAX_PHYSICAL_CPUS > 2
        case 0x02: /* MPCap    */
                if(nodes > 2) {
-                       print_err("Going back to DP\r\n");
+                       print_err("Going back to DP\n");
                        return 2;
                }
                break;
 #endif
        case 0x00: /* Non SMP */
                if(nodes >1 ) {
-                       print_err("Going back to UP\r\n");
+                       print_err("Going back to UP\n");
                        return 1;
                }
                break;
@@ -1597,8 +1595,7 @@ static void coherent_ht_finalize(unsigned nodes)
 #if CONFIG_LOGICAL_CPUS==1
        unsigned total_cpus;
 
-       if ((!CONFIG_HAVE_OPTION_TABLE) ||
-           read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) == 0) { /* dual_core */
+       if (read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) == 0) { /* multi_core */
                total_cpus = verify_dualcore(nodes);
        }
        else {
@@ -1612,7 +1609,7 @@ static void coherent_ht_finalize(unsigned nodes)
         * registers on Hammer A0 revision.
         */
 
-       print_spew("coherent_ht_finalize\r\n");
+       print_spew("coherent_ht_finalize\n");
 #if CONFIG_K8_REV_F_SUPPORT == 0
        rev_a0 = is_cpu_rev_a0();
 #endif
@@ -1653,7 +1650,7 @@ static void coherent_ht_finalize(unsigned nodes)
 #endif
        }
 
-       print_spew("done\r\n");
+       print_spew("done\n");
 }
 
 static int apply_cpu_errata_fixes(unsigned nodes)