#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
-#include "lib/ramtest.c"
+#include <pc80/mc146818rtc.h>
+#include <console/console.h>
+#include <lib.h>
#include "northbridge/via/cn700/raminit.h"
-#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
-#include "cpu/x86/lapic/boot_cpu.c"
#include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
#include "superio/ite/it8716f/it8716f_early_serial.c"
+#include <spd.h>
#define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)
.d0f4 = 0x4000,
.d0f7 = 0x7000,
.d1f0 = 0x8000,
- .channel0 = { 0x50 }, /* TODO: CN700 currently only supports 1 DIMM. */
+ .channel0 = { DIMM0 }, /* TODO: CN700 currently only supports 1 DIMM. */
};
-static void main(unsigned long bist)
+void main(unsigned long bist)
{
/* Enable multifunction for northbridge. */
pci_write_config8(ctrl.d0f0, 0x4f, 0x01);
it8716f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
uart_init();
console_init();
-
enable_smbus();
smbus_fixup(&ctrl);
-
- if (bist == 0)
- early_mtrr_init();
-
- /* Halt if there was a built-in self test failure. */
report_bist_failure(bist);
-
ddr_ram_setup(&ctrl);
-
- /* ram_check(0, 640 * 1024); */
}
-