Drop per-board ram_check() calls for now.
[coreboot.git] / src / mainboard / via / epia-n / romstage.c
index df9f82ea9b4c4474e66de23e72ebed07609dde35..30ea0f2a3a253d6f0376adb221ed040ced571955 100644 (file)
@@ -26,9 +26,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
-#include "lib/ramtest.c"
+#include <console/console.h>
 #include "northbridge/via/cn400/raminit.h"
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
 #include "superio/winbond/w83697hf/w83697hf_early_serial.c"
+#include <spd.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1)
 
-/*
- * NOOB ::
- * d0f0 - Device 0 Function 0 etc.
- */
 static const struct mem_controller ctrl = {
        .d0f0 = 0x0000,
        .d0f2 = 0x2000,
@@ -51,7 +46,7 @@ static const struct mem_controller ctrl = {
        .d0f4 = 0x4000,
        .d0f7 = 0x7000,
        .d1f0 = 0x8000,
-       .channel0 = { 0x50 },
+       .channel0 = { DIMM0 },
 };
 
 static inline int spd_read_byte(unsigned device, unsigned address)
@@ -66,7 +61,8 @@ static void enable_mainboard_devices(void)
        device_t dev;
        u8 reg;
 
-       dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
+       dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
+                               PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
        if (dev == PCI_DEV_INVALID)
                die("Southbridge not found!!!\n");
 
@@ -114,14 +110,10 @@ static void main(unsigned long bist)
        pci_write_config8(ctrl.d0f0, 0x4f, 0x01);
 
        w83697hf_set_clksel_48(SERIAL_DEV);
-
        w83697hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-
        uart_init();
        console_init();
 
-       print_spew("In romstage.c:main()\n");
-
        enable_smbus();
        smbus_fixup(&ctrl);
 
@@ -134,19 +126,11 @@ static void main(unsigned long bist)
        print_debug("Enable F-ROM Shadow RAM\n");
        enable_shadow_ram();
 
-       /* setup cpu */
        print_debug("Setup CPU Interface\n");
        c3_cpu_setup(ctrl.d0f2);
 
        ddr_ram_setup();
 
-       if (bist == 0) {
-               print_debug("doing early_mtrr\n");
+       if (bist == 0)
                early_mtrr_init();
-       }
-
-       //ram_check(0, 640 * 1024);
-
-       print_spew("Leaving romstage.c:main()\n");
 }
-