new cache_as_ram support

[coreboot.git] / src / mainboard / tyan / s2892 / Config.lb

diff --git a/src/mainboard/tyan/s2892/Config.lb b/src/mainboard/tyan/s2892/Config.lb
index dcb0c45abf8b48c0e0e1e9e5db3b0991a00c027a..6fa8e5d44ac211e742842b55ef635a14485cf93d 100644 (file)
--- a/src/mainboard/tyan/s2892/Config.lb
+++ b/src/mainboard/tyan/s2892/Config.lb
@@ -313,7 +313,8 @@ chip northbridge/amd/amdk8/root_complex
                                        #       chip drivers/ati/ragexl
                                                chip drivers/pci/onboard
                                                        device pci 6.0 on end
-                                                       register "rom_address" = "0xfff80000"
+                                                #       register "rom_address" = "0xfff80000" #for 512K
+                                                        register "rom_address" = "0xfff00000" #for 1M
                                                end
                                                 chip drivers/pci/onboard
                                                         device pci 8.0 on end