new cache_as_ram support

[coreboot.git] / src / mainboard / tyan / s2891 / get_bus_conf.c

diff --git a/src/mainboard/tyan/s2891/get_bus_conf.c b/src/mainboard/tyan/s2891/get_bus_conf.c
index 92fefa6a0cd11c10e72a3a045fed05a993a2203d..3462a5f557cbcb9f67a32fd8ce457720cbff9bb4 100644 (file)
--- a/src/mainboard/tyan/s2891/get_bus_conf.c
+++ b/src/mainboard/tyan/s2891/get_bus_conf.c
@@ -152,9 +152,10 @@ void get_bus_conf(void)
                 else {
                         printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
 
-                        bus_8131_0 = bus_ck804_5+1;
                 }
 
+               bus_8131_0 = (pci1234[1] >> 16) & 0xff;
+
                 /* 8131-1 */
                 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
                 if (dev) {