We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.
[coreboot.git] / src / mainboard / tyan / s2875 / mptable.c
index c2a7012f139e2fc12a1936b2ccc4643bc9d15061..a2aa275e34dd4a6499ceef9e2e9cb2cd821a61cb 100644 (file)
@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -48,8 +49,7 @@ static void *smp_write_config_table(void *v)
         static const char productid[12] = "S2875       ";
         struct mp_config_table *mc;
 
-        unsigned char bus_num;
-        unsigned char bus_isa;
+        int bus_isa;
        unsigned char bus_chain_0;
         unsigned char bus_8111_1;
        unsigned char bus_8151_1;
@@ -89,15 +89,11 @@ static void *smp_write_config_table(void *v)
                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x04,0));
                 if (dev) {
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-                        bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
-                        bus_isa++;
-                       printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
                 }
                 else {
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
 
                         bus_8111_1 = 3;
-                        bus_isa = 4;
                 }
                       /* 8151 */
                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,0));
@@ -116,11 +112,7 @@ static void *smp_write_config_table(void *v)
         }
 
 /*Bus:         Bus ID  Type*/
-       /* define bus and isa numbers */
-        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
-                smp_write_bus(mc, bus_num, "PCI   ");
-        }
-        smp_write_bus(mc, bus_isa, "ISA   ");
+       mptable_write_buses(mc, NULL, &bus_isa);
 
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
@@ -129,23 +121,11 @@ static void *smp_write_config_table(void *v)
         apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
         apicid_8111 = apicid_base+0;
-       smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
-
-/*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
-*/     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_8111, 0x1);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid_8111, 0x2);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x3, apicid_8111, 0x3);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x4, apicid_8111, 0x4);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x6, apicid_8111, 0x6);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x7, apicid_8111, 0x7);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x8, apicid_8111, 0x8);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xc, apicid_8111, 0xc);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xd, apicid_8111, 0xd);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xe, apicid_8111, 0xe);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xf, apicid_8111, 0xf);
+       smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
 
+       mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0);
 
+/*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
 //??? What
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (5<<2)|3, apicid_8111, 0x13);
 //Onboard AMD AC97 Audio ???