We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.

[coreboot.git] / src / mainboard / tyan / s2850 / mptable.c

diff --git a/src/mainboard/tyan/s2850/mptable.c b/src/mainboard/tyan/s2850/mptable.c
index 051e9fd4870f69ecc5fc854f5963698632ee4ed8..d452dd9c3ad3717fbbd1594a4f40755aefbab2f2 100644 (file)
--- a/src/mainboard/tyan/s2850/mptable.c
+++ b/src/mainboard/tyan/s2850/mptable.c
@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -29,7 +30,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;
-#if 0                           
+#if 0
                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);
@@ -46,12 +47,11 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "TYAN    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "S2850       ";
         struct mp_config_table *mc;
 
-        unsigned char bus_num;
-        unsigned char bus_isa;
+        int bus_isa;
        unsigned char bus_chain_0;
         unsigned char bus_8111_1;
         unsigned apicid_base;
@@ -88,52 +88,32 @@ static void *smp_write_config_table(void *v)
                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
                 if (dev) {
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-                        bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
-                        bus_isa++;
-                }     
-                else {  
+                }
+                else {
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
 
                         bus_8111_1 = 2;
-                        bus_isa = 3;
                 }
         }
 /*Bus:          Bus ID  Type*/
-        /* define bus and isa numbers */
-        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
-                smp_write_bus(mc, bus_num, "PCI   ");
-        }
-        smp_write_bus(mc, bus_isa, "ISA   ");
-
+       mptable_write_buses(mc, NULL, &bus_isa);
 
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(1);
 #else
-        apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+        apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
-        apicid_8111 = apicid_base+0; 
+        apicid_8111 = apicid_base+0;
 
-       smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
-  
-/*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
+       smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
 
-        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x2);
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x3, apicid_8111, 0x3);
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x4, apicid_8111, 0x4);
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x6, apicid_8111, 0x6);
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x7, apicid_8111, 0x7);
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x8, apicid_8111, 0x8);
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xc, apicid_8111, 0xc);
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_8111, 0xd);
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe);
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf);
+       mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0);
 
+/*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (2<<2)|3, apicid_8111, 0x13);
-       
+
 //On Board AMD USB
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, apicid_8111, 0x13);