new cache_as_ram support

[coreboot.git] / src / mainboard / tyan / s2850 / Config.lb

diff --git a/src/mainboard/tyan/s2850/Config.lb b/src/mainboard/tyan/s2850/Config.lb
index 1916fa70c3731d3877e0177eb80a6dbe8c2d2871..e227bc1542cc7e8ae747e978bcc169c91f172bfe 100644 (file)
--- a/src/mainboard/tyan/s2850/Config.lb
+++ b/src/mainboard/tyan/s2850/Config.lb
@@ -44,7 +44,6 @@ driver mainboard.o
 
 if HAVE_MP_TABLE object mptable.o end
 if HAVE_PIRQ_TABLE object irq_tables.o end
-object reset.o
 
 if USE_DCACHE_RAM