We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.

[coreboot.git] / src / mainboard / tyan / s2735 / mptable.c

diff --git a/src/mainboard/tyan/s2735/mptable.c b/src/mainboard/tyan/s2735/mptable.c
index 828226fd4dc651f1a122584cfdfcac7530ad9b06..5e4afaee010e3f62e47ecade27f662c6a8007697 100644 (file)
--- a/src/mainboard/tyan/s2735/mptable.c
+++ b/src/mainboard/tyan/s2735/mptable.c
@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -10,6 +11,7 @@ static void *smp_write_config_table(void *v)
         static const char oem[8] = "COREBOOT";
         static const char productid[12] = "S2735       ";
         struct mp_config_table *mc;
+        int isa_bus;
 
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
@@ -29,17 +31,9 @@ static void *smp_write_config_table(void *v)
         mc->reserved = 0;
 
         smp_write_processors(mc);
-
-
-/*Bus:         Bus ID  Type*/
-       smp_write_bus(mc, 0, "PCI   ");
-       smp_write_bus(mc, 1, "PCI   ");
-       smp_write_bus(mc, 2, "PCI   ");
-       smp_write_bus(mc, 3, "PCI   ");
-       smp_write_bus(mc, 4, "PCI   ");
-       smp_write_bus(mc, 5, "ISA   ");
+       mptable_write_buses(mc, NULL, &isa_bus);
 /*I/O APICs:   APIC ID Version State           Address*/
-       smp_write_ioapic(mc, 8, 0x20, 0xfec00000);
+       smp_write_ioapic(mc, 8, 0x20, IO_APIC_ADDR);
        {
                 device_t dev;
                 struct resource *res;
@@ -58,7 +52,7 @@ static void *smp_write_config_table(void *v)
                         }
                }
        }
-       mptable_add_isa_interrupts(mc, 0x5, 0x8, 0);
+       mptable_add_isa_interrupts(mc, isa_bus, 0x8, 0);
 
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */