We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.

[coreboot.git] / src / mainboard / tyan / s2735 / mptable.c

diff --git a/src/mainboard/tyan/s2735/mptable.c b/src/mainboard/tyan/s2735/mptable.c
index 22130dd1be019689f1e0303948fa0a02932bd9cd..5e4afaee010e3f62e47ecade27f662c6a8007697 100644 (file)
--- a/src/mainboard/tyan/s2735/mptable.c
+++ b/src/mainboard/tyan/s2735/mptable.c
@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -7,9 +8,10 @@
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "TYAN    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "S2735       ";
         struct mp_config_table *mc;
+        int isa_bus;
 
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
@@ -29,17 +31,9 @@ static void *smp_write_config_table(void *v)
         mc->reserved = 0;
 
         smp_write_processors(mc);
-
-
-/*Bus:         Bus ID  Type*/
-       smp_write_bus(mc, 0, "PCI   ");
-       smp_write_bus(mc, 1, "PCI   ");
-       smp_write_bus(mc, 2, "PCI   ");
-       smp_write_bus(mc, 3, "PCI   ");
-       smp_write_bus(mc, 4, "PCI   ");
-       smp_write_bus(mc, 5, "ISA   ");
+       mptable_write_buses(mc, NULL, &isa_bus);
 /*I/O APICs:   APIC ID Version State           Address*/
-       smp_write_ioapic(mc, 8, 0x20, 0xfec00000);
+       smp_write_ioapic(mc, 8, 0x20, IO_APIC_ADDR);
        {
                 device_t dev;
                 struct resource *res;
@@ -48,30 +42,20 @@ static void *smp_write_config_table(void *v)
                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
                         if (res) {
                                 smp_write_ioapic(mc, 0x09, 0x20, res->base);
-                        }              
+                        }
                }
                dev = dev_find_slot(1, PCI_DEVFN(0x1c,0));
                if (dev) {
                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
                         if (res) {
                                 smp_write_ioapic(mc, 0x0a, 0x20, res->base);
-                        }              
+                        }
                }
        }
+       mptable_add_isa_interrupts(mc, isa_bus, 0x8, 0);
+
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
-*/     
-       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x0, 0x8, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x1, 0x8, 0x1);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x0, 0x8, 0x2);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x3, 0x8, 0x3);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x4, 0x8, 0x4);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x6, 0x8, 0x6);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x8, 0x8, 0x8);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x9, 0x8, 0x9);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0xc, 0x8, 0xc);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0xd, 0x8, 0xd);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0xe, 0x8, 0xe);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0xf, 0x8, 0xf);
+*/
 //USB
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x7c, 0x8, 0x12);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x7d, 0x8, 0x11);
@@ -149,7 +133,7 @@ Compatibility Bus Address
  predefined range: 0x00000000--
 Compatibility Bus Address
  bus ID: 0 address modifier: add
- predefined range: 0x00000001  // There is no extension information... 
+ predefined range: 0x00000001  // There is no extension information...
 */
        /* Compute the checksums */
        mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);