Drop per-board ram_check() calls for now.

[coreboot.git] / src / mainboard / supermicro / x6dhr_ig2 / romstage.c

diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
index 6d8e482463fcbc8f045d11fd83435fe0ff556020..5e54fa66fa179d7794afd89d7e9a8f05ae65f984 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
@@ -6,7 +6,6 @@
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
 #include <console/console.h>
-#include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
 #include "northbridge/intel/e7520/raminit.h"
 #include "superio/winbond/w83627hf/w83627hf.h"
@@ -19,6 +18,7 @@
 #include "superio/winbond/w83627hf/w83627hf_early_init.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
+#include <spd.h>
 
 #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 #define HIDDEN_SERIAL_DEV  PNP_DEV(0x2e, W83627HF_SP2)
@@ -44,31 +44,21 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 static void main(unsigned long bist)
 {
-       /*
-        *
-        *
-        */
        static const struct mem_controller mch[] = {
                {
                        .node_id = 0,
-                       /*
-                       .f0 = PCI_DEV(0, 0x00, 0),
-                       .f1 = PCI_DEV(0, 0x00, 1),
-                       .f2 = PCI_DEV(0, 0x00, 2),
-                       .f3 = PCI_DEV(0, 0x00, 3),
-                       */
-                       .channel0 = {(0xa<<3)|3, (0xa<<3)|2, (0xa<<3)|1, (0xa<<3)|0, },
-                       .channel1 = {(0xa<<3)|7, (0xa<<3)|6, (0xa<<3)|5, (0xa<<3)|4, },
+                       .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, },
+                       .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, },
                }
        };
 
        if (bist == 0) {
                /* Skip this if there was a built in self test failure */
                early_mtrr_init();
-               if (memory_initialized()) {
+               if (memory_initialized())
                        skip_romstage();
-               }
        }
+
        /* Setup the console */
        outb(0x87,0x2e);
        outb(0x87,0x2e);
@@ -84,16 +74,13 @@ static void main(unsigned long bist)
        /* config LPC decode for flash memory access */
         device_t dev;
         dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
-        if (dev == PCI_DEV_INVALID) {
+        if (dev == PCI_DEV_INVALID)
                 die("Missing ich5?");
-        }
         pci_write_config32(dev, 0xe8, 0x00000000);
         pci_write_config8(dev, 0xf0, 0x00);
 
 #if 0
        display_cpuid_update_microcode();
-#endif
-#if 0
        print_pci_devices();
 #endif
 #if 1
@@ -102,9 +89,8 @@ static void main(unsigned long bist)
 #if 0
 //     dump_spd_registers(&cpu[0]);
        int i;
-       for(i = 0; i < 1; i++) {
+       for(i = 0; i < 1; i++)
                dump_spd_registers();
-       }
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();
@@ -112,29 +98,7 @@ static void main(unsigned long bist)
        sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
        dump_pci_devices();
-#endif
-#if 0
        dump_pci_device(PCI_DEV(0, 0x00, 0));
        dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
-
-#if 0 // temporarily disabled
-       /* Check the first 1M */
-//     ram_check(0x00000000, 0x000100000);
-//     ram_check(0x00000000, 0x000a0000);
-//     ram_check(0x00100000, 0x01000000);
-       ram_check(0x00100000, 0x00100100);
-       /* check the first 1M in the 3rd Gig */
-//     ram_check(0x30100000, 0x31000000);
-#endif
-#if 0
-       ram_check(0x00000000, 0x02000000);
-#endif
-
-#if 0
-       while(1) {
-               hlt();
-       }
-#endif
 }
-