We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.

[coreboot.git] / src / mainboard / supermicro / x6dhe_g2 / mptable.c

diff --git a/src/mainboard/supermicro/x6dhe_g2/mptable.c b/src/mainboard/supermicro/x6dhe_g2/mptable.c
index c50fabb0f3c1ad4d244e43fd4365abbdc07b4bf6..50b6299b4fa7f201f80b9edd9feaf085d70fbbf1 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g2/mptable.c
+++ b/src/mainboard/supermicro/x6dhe_g2/mptable.c
@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -35,7 +36,7 @@ static void *smp_write_config_table(void *v)
        mc->reserved = 0;
 
        smp_write_processors(mc);
-       
+
        {
                device_t dev;
 
@@ -75,7 +76,7 @@ static void *smp_write_config_table(void *v)
                        bus_pxhd_2 = 3;
                }
        }
-       
+
        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");
@@ -84,8 +85,8 @@ static void *smp_write_config_table(void *v)
 
        /* IOAPIC handling */
 
-       smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
-       smp_write_ioapic(mc, 3, 0x20, 0xfec10000);
+       smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+       smp_write_ioapic(mc, 3, 0x20, IO_APIC_ADDR + 0x10000);
        {
                struct resource *res;
                device_t dev;
@@ -113,39 +114,15 @@ static void *smp_write_config_table(void *v)
                }
        }
 
+       mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
+
        /* ISA backward compatibility interrupts  */
-       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x00, 0x02, 0x00);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x01, 0x02, 0x01);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x00, 0x02, 0x02);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x03, 0x02, 0x03);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x04, 0x02, 0x04);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
                0x00, 0x74, 0x02, 0x10);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x06, 0x02, 0x06);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, // added
-               bus_isa, 0x07, 0x02, 0x07);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x08, 0x02, 0x08);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x09, 0x02, 0x09);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
                0x00, 0x77, 0x02, 0x17);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
                0x00, 0x75, 0x02, 0x13);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x0c, 0x02, 0x0c);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x0d, 0x02, 0x0d);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x0e, 0x02, 0x0e);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x0f, 0x02, 0x0f);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
                0x00, 0x7c, 0x02, 0x12);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
@@ -162,7 +139,7 @@ static void *smp_write_config_table(void *v)
                bus_esb6300_2, 0x04, 0x02, 0x10);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
                bus_esb6300_2, 0x08, 0x02, 0x14);
-       
+
        /* Standard local interrupt assignments */
        smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, MP_APIC_ALL, 0x00);