run uart_init() from console_init, just like the other console initialization functions.

[coreboot.git] / src / mainboard / supermicro / h8dmr / romstage.c

diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c
index 65517ec31e075c15cfef18ea1acc8f0f361c4bea..38aef5ea4fbbe4e322fcdc21dc0c31954fad05db 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/romstage.c
+++ b/src/mainboard/supermicro/h8dmr/romstage.c
@@ -42,8 +42,8 @@
 #include "lib/delay.c"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
-#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "superio/winbond/w83627hf/w83627hf_early_init.c"
+#include "superio/winbond/w83627hf/early_serial.c"
+#include "superio/winbond/w83627hf/early_init.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/debug.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -61,7 +61,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#include "northbridge/amd/amdk8/amdk8_f.h"
+#include "northbridge/amd/amdk8/f.h"
 #include "northbridge/amd/amdk8/incoherent_ht.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "northbridge/amd/amdk8/raminit_f.c"
@@ -126,7 +126,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        w83627hf_set_clksel_48(DUMMY_DEV);
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 
-        uart_init();
         console_init();
 
        /* Halt if there was a built in self test failure */