AMD K8 platforms must use CAR so it makes sense to use the PRINK_IN_CAR

[coreboot.git] / src / mainboard / supermicro / h8dmr / Options.lb

diff --git a/src/mainboard/supermicro/h8dmr/Options.lb b/src/mainboard/supermicro/h8dmr/Options.lb
index 0e0cf7d9fbfed9cb0ef9e1885cce59dcdd91f9d6..15f9ad4c4ff5f8edc0dded50adca7f33555bfb0f 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/Options.lb
+++ b/src/mainboard/supermicro/h8dmr/Options.lb
@@ -1,5 +1,5 @@
 ## 
-## This file is part of the LinuxBIOS project.
+## This file is part of the coreboot project.
 ## 
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
@@ -62,7 +62,7 @@ uses MAINBOARD_VENDOR
 uses MAINBOARD
 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
-uses LINUXBIOS_EXTRA_VERSION
+uses COREBOOT_EXTRA_VERSION
 uses _RAMBASE
 uses TTYS0_BAUD
 uses TTYS0_BASE
@@ -145,7 +145,7 @@ default HAVE_FALLBACK_BOOT=1
 default HAVE_FAILOVER_BOOT=1
 
 ##
-## Build code to reset the motherboard from linuxBIOS
+## Build code to reset the motherboard from coreboot
 ##
 default HAVE_HARD_RESET=1
 
@@ -170,7 +170,7 @@ default HAVE_ACPI_TABLES=0
 default HAVE_OPTION_TABLE=1
 
 ##
-## Move the default LinuxBIOS cmos range off of AMD RTC registers
+## Move the default coreboot cmos range off of AMD RTC registers
 ##
 default LB_CKS_RANGE_START=49
 default LB_CKS_RANGE_END=122
@@ -236,7 +236,7 @@ default DCACHE_RAM_SIZE=0x08000
 default DCACHE_RAM_GLOBAL_VAR_SIZE=0x01000
 default CONFIG_USE_INIT=0
 
-default CONFIG_AP_CODE_IN_CAR=0
+default CONFIG_AP_CODE_IN_CAR=1
 default MEM_TRAIN_SEQ=1
 default WAIT_BEFORE_CPUS_INIT=1
 
@@ -254,10 +254,10 @@ default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x15d9
 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x1511
 
 ###
-### LinuxBIOS layout values
+### coreboot layout values
 ###
 
-## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
+## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
 default ROM_IMAGE_SIZE = 65536
 
 ##
@@ -276,7 +276,7 @@ default HEAP_SIZE=0x8000
 default USE_OPTION_TABLE = (!USE_FALLBACK_IMAGE) && (!USE_FAILOVER_IMAGE )
 
 ##
-## LinuxBIOS C code runs at this location in RAM
+## Coreboot C code runs at this location in RAM
 ##
 default _RAMBASE=0x00100000
 
@@ -305,7 +305,7 @@ default CONFIG_GDB_STUB=0
 ##
 ## The Serial Console
 ##
-default CONFIG_USE_PRINTK_IN_CAR=0
+default CONFIG_USE_PRINTK_IN_CAR=1
 
 # To Enable the Serial Console
 default CONFIG_CONSOLE_SERIAL8250=1
@@ -328,7 +328,7 @@ default TTYS0_BASE=0x3f8
 default TTYS0_LCS=0x3
 
 ##
-### Select the linuxBIOS loglevel
+### Select the coreboot loglevel
 ##
 ## EMERG      1   system is unusable               
 ## ALERT      2   action must be taken immediately