This commit updates the Geode LX GLCP delay control setup from the v2 way to the...

[coreboot.git] / src / mainboard / pcengines / alix1c / romstage.c

diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c
index ee101b944f4200b51d483332c465538f0ec4de9f..6ec9557aac16d184e53c6e9ef6ac0396ef3fc9e4 100644 (file)
--- a/src/mainboard/pcengines/alix1c/romstage.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -18,6 +18,7 @@
  */
 
 #include <stdint.h>
+#include <stdlib.h>
 #include <spd.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
@@ -148,7 +149,7 @@ void main(unsigned long bist)
 
        pll_reset(ManualConf);
 
-       cpuRegInit();
+       cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED);
 
        sdram_initialize(1, memctrl);