This commit updates the Geode LX GLCP delay control setup from the v2 way to the...
authorEdwin Beasant <edwin_beasant@virtensys.com>
Thu, 10 Jun 2010 15:24:57 +0000 (15:24 +0000)
committerEdwin Beasant <edwin_beasant@virtensys.com>
Thu, 10 Jun 2010 15:24:57 +0000 (15:24 +0000)
commitf333ba09580c00a6f27e3ee0796431f5df936ecf
treed9d961b45e248d59bf8e3e582b1619887d1921b9
parent1965a237124cc8e988cf760eb7e9a61efb2adabb
This commit updates the Geode LX GLCP delay control setup from the v2 way to the v3 way.
This resolves problems with terminated DRAM modules.
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Roland G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5629 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
14 files changed:
src/cpu/amd/model_lx/cpureginit.c
src/cpu/amd/model_lx/msrinit.c
src/include/cpu/amd/lxdef.h
src/include/cpu/x86/msr.h
src/mainboard/amd/db800/romstage.c
src/mainboard/amd/norwich/romstage.c
src/mainboard/artecgroup/dbe61/romstage.c
src/mainboard/digitallogic/msm800sev/romstage.c
src/mainboard/iei/pcisa-lx-800-r10/romstage.c
src/mainboard/lippert/roadrunner-lx/romstage.c
src/mainboard/lippert/spacerunner-lx/romstage.c
src/mainboard/pcengines/alix1c/romstage.c
src/mainboard/traverse/geos/romstage.c
src/mainboard/winent/pl6064/romstage.c