config BOARD_NVIDIA_L1_2PVV
- bool "L1 2PVV"
+ bool "l1_2pvv"
select ARCH_X86
- select CPU_AMD_K8
select CPU_AMD_SOCKET_F
select NORTHBRIDGE_AMD_AMDK8
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_NVIDIA_MCP55
select SUPERIO_WINBOND_W83627EHG
+ select HAVE_BUS_CONFIG
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
- select IOAPIC
- select MEM_TRAIN_SEQ
- select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select LIFT_BSP_APIC_ID
select K8_REV_F_SUPPORT
select BOARD_ROMSIZE_KB_512
config APIC_ID_OFFSET
hex
- default 16
+ default 0x10
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config MEM_TRAIN_SEQ
+ int
+ default 1
depends on BOARD_NVIDIA_L1_2PVV
config SB_HT_CHAIN_ON_BUS0
default n
depends on BOARD_NVIDIA_L1_2PVV
-config HAVE_FALLBACK_BOOT
- bool
- default n
- depends on BOARD_NVIDIA_L1_2PVV
-
-config USE_FALLBACK_IMAGE
- bool
- default n
- depends on BOARD_NVIDIA_L1_2PVV
-
config HW_MEM_HOLE_SIZEK
hex
default 0x100000
config MAX_CPUS
int
- default 2
+ default 4
depends on BOARD_NVIDIA_L1_2PVV
config MAX_PHYSICAL_CPUS
int
- default 1
- depends on BOARD_NVIDIA_L1_2PVV
-
-config AP_CODE_IN_CAR
- bool
- default n
+ default 2
depends on BOARD_NVIDIA_L1_2PVV
config HW_MEM_HOLE_SIZE_AUTO_INC
config HT_CHAIN_END_UNITID_BASE
hex
- default 0x0
+ default 0x20
depends on BOARD_NVIDIA_L1_2PVV
config USE_INIT
default n
depends on BOARD_NVIDIA_L1_2PVV
-config WAIT_BEFORE_CPUS_INIT
- bool
- default n
- depends on BOARD_NVIDIA_L1_2PVV
-
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
hex
default 0x1022